WO2022097186A1 - Dispositif de conversion de puissance - Google Patents

Dispositif de conversion de puissance Download PDF

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Publication number
WO2022097186A1
WO2022097186A1 PCT/JP2020/041154 JP2020041154W WO2022097186A1 WO 2022097186 A1 WO2022097186 A1 WO 2022097186A1 JP 2020041154 W JP2020041154 W JP 2020041154W WO 2022097186 A1 WO2022097186 A1 WO 2022097186A1
Authority
WO
WIPO (PCT)
Prior art keywords
power conversion
gate signal
duty ratio
circuit
period
Prior art date
Application number
PCT/JP2020/041154
Other languages
English (en)
Japanese (ja)
Inventor
大斗 水谷
亮太 近藤
幹幸 谷口
修 森
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to PCT/JP2020/041154 priority Critical patent/WO2022097186A1/fr
Priority to JP2022560426A priority patent/JP7305062B2/ja
Publication of WO2022097186A1 publication Critical patent/WO2022097186A1/fr

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac

Definitions

  • FIG. 1 It is a figure which shows the hardware composition of the control circuit by Embodiment 1.
  • FIG. It is a waveform diagram explaining the generation of the gate signal by another example of Embodiment 1.
  • FIG. It is a waveform diagram explaining the control operation of the power conversion apparatus by Embodiment 2.
  • FIG. It is a figure which shows the structure of the power conversion apparatus by Embodiment 3.
  • FIG. It is a control block diagram of the power conversion apparatus according to Embodiment 3.
  • the switching circuit 21 is an inverter having a full bridge configuration in which switching elements 211, 212, 213, and 214 are provided between DC bus wires connected to the DC power supply 1, and the AC output line is the primary winding of the transformer 22. Connected to.
  • the switching elements 211 and 214 are the first switching elements that are one diagonal switching element of the switching circuit 21, and the switching elements 212 and 213 are the second diagonal switching elements of the switching circuit 21. It is a switching element.
  • the control circuit 5 has a first sawtooth wave having a positive gradient during the period in which the second reference sawtooth wave 11 counts up from zero to the peak value (A / 2). Generates Cr1.
  • the first sawtooth wave Cr1 has a switching cycle Tsw as one cycle, a peak value (A / 2N), counts up from zero, and becomes a peak value (A / 2N) in the Tsw period.
  • the first sawtooth wave Cr1 reaches the peak value (A / 2N), it is reset to zero, the count-up is repeated, and it is generated N times during the period of N ⁇ Tsw.
  • the second gate signal G2 continues Low during the period from the half value 0.5 of the peak value to the peak value 1 of the carrier wave Cr (second sawtooth wave Cr2), and the first gate signal G1. Only, the gate pulse is generated in the period from the second duty ratio D2 to the peak value 1, and the first gate signal G1 becomes High. Then, during the period from 0 to half of the peak value of the carrier wave Cr (second sawtooth wave Cr2), the first gate signal G1 continues Low, and only the second gate signal G2 starts from the first duty ratio D1. A gate pulse is generated in the period up to half of the peak value of 0.5, and the second gate signal G2 becomes High.
  • the control circuit 5 controls on / off of the first switching elements 211 and 214 and the second switching elements 212 and 213 in the power conversion circuit 2 by the first gate signal G1 and the second gate signal G2 generated as described above. ..
  • FIG. 15 is a waveform diagram illustrating the control operation according to the first embodiment. As shown in the figure, the number of consecutive times of the first sawtooth wave Cr1 and the number of consecutive times of the second sawtooth wave Cr2 are both 2, and the polarity of the slope of the carrier wave Cr is inverted every two cycles of the switching cycle Tsw.
  • the control circuit 5A has two control modes, a first control mode and a second control mode, and controls the power conversion circuit 9.
  • the duty ratio of the switching element 72 is adjusted so that the voltage Vdc of the DC link capacitor 8 follows the command value Vdc * to generate the third gate signal G3 to the switching element 72, and AC / Controls the DC converter 7.
  • the voltage of the DC link capacitor 8 is controlled to be constant by the operation of the AC / DC converter 7, and the DC link capacitor 8 can be regarded as a DC power supply.
  • 2 Power conversion circuit 2A isolated DC / DC converter, 2N integer, 5,5A control circuit, 7 AC / DC converter, 8 DC link capacitor, 9 power conversion circuit, 21 switching circuit, 22 transformer, 23, 23A, 23B , 23C, 23D, 23E rectifier circuit, 100, 100A power converter, 211,214 first switching element, 212,213 second switching element, 241 reactor, Cr carrier, Cr1 first sawtooth wave, Cr2 second sawtooth wave, D1 1st duty ratio, D2 2nd duty ratio, fsw switching frequency, Idc DC current, Iout reactor current, Iout * command value, N consecutive times, T1 1st section, T2 2nd section, Tsw switching cycle, G1 1st Gate signal, G2 second gate signal, Vdc voltage, Vdc * command value.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

La présente invention concerne un dispositif de conversion de puissance (100) qui comprend : un circuit de conversion de puissance (2) comprenant au moins un élément de commutation (211-214) et un réacteur (241) ; et un circuit de commande (5) permettant de générer des signaux de grille (G1, G2) pour les éléments de commutation (211-214) de façon à commander le circuit de conversion de puissance (2). Le circuit de commande (5) calcule des rapports cycliques (D1, D2), génère les signaux de grille (G1, G2) par commande sur la base d'une comparaison des rapports cycliques (D1, D2) avec une onde porteuse (Cr), et superpose, sur un courant (Iout) circulant dans le réacteur (241), un courant d'ondulation de basse fréquence obtenu par division d'une fréquence de commutation (fsw) par un nombre entier (2N) supérieur ou égal à 2.
PCT/JP2020/041154 2020-11-04 2020-11-04 Dispositif de conversion de puissance WO2022097186A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/JP2020/041154 WO2022097186A1 (fr) 2020-11-04 2020-11-04 Dispositif de conversion de puissance
JP2022560426A JP7305062B2 (ja) 2020-11-04 2020-11-04 電力変換装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2020/041154 WO2022097186A1 (fr) 2020-11-04 2020-11-04 Dispositif de conversion de puissance

Publications (1)

Publication Number Publication Date
WO2022097186A1 true WO2022097186A1 (fr) 2022-05-12

Family

ID=81457587

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2020/041154 WO2022097186A1 (fr) 2020-11-04 2020-11-04 Dispositif de conversion de puissance

Country Status (2)

Country Link
JP (1) JP7305062B2 (fr)
WO (1) WO2022097186A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117060748A (zh) * 2023-08-21 2023-11-14 哈尔滨工业大学 基于双电容输出结构的单级无桥隔离反激式整流器

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008011665A (ja) * 2006-06-30 2008-01-17 Mitsubishi Heavy Ind Ltd 電力変換装置
JP2013042591A (ja) * 2011-08-15 2013-02-28 Hitachi Ltd 電力変換器制御装置
JP2014161190A (ja) * 2013-02-20 2014-09-04 Fujitsu Ltd 制御装置、制御方法および電源装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008011665A (ja) * 2006-06-30 2008-01-17 Mitsubishi Heavy Ind Ltd 電力変換装置
JP2013042591A (ja) * 2011-08-15 2013-02-28 Hitachi Ltd 電力変換器制御装置
JP2014161190A (ja) * 2013-02-20 2014-09-04 Fujitsu Ltd 制御装置、制御方法および電源装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117060748A (zh) * 2023-08-21 2023-11-14 哈尔滨工业大学 基于双电容输出结构的单级无桥隔离反激式整流器

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JPWO2022097186A1 (fr) 2022-05-12
JP7305062B2 (ja) 2023-07-07

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