WO2022089664A1 - 碳化硅电池 - Google Patents

碳化硅电池 Download PDF

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WO2022089664A1
WO2022089664A1 PCT/CN2021/136126 CN2021136126W WO2022089664A1 WO 2022089664 A1 WO2022089664 A1 WO 2022089664A1 CN 2021136126 W CN2021136126 W CN 2021136126W WO 2022089664 A1 WO2022089664 A1 WO 2022089664A1
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silicon carbide
layer
silicon
type
silicon substrate
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PCT/CN2021/136126
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English (en)
French (fr)
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吴兆
徐琛
李子峰
解俊杰
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隆基绿能科技股份有限公司
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Priority claimed from CN202011159794.8A external-priority patent/CN112259630B/zh
Priority claimed from CN202011159811.8A external-priority patent/CN112259631B/zh
Application filed by 隆基绿能科技股份有限公司 filed Critical 隆基绿能科技股份有限公司
Publication of WO2022089664A1 publication Critical patent/WO2022089664A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0216—Coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the present disclosure relates to the field of solar photovoltaic technology, and in particular, to a silicon carbide cell.
  • Silicon carbide material has ideal intermediate band material properties and is a more suitable intermediate band absorbing layer material.
  • the present disclosure provides a silicon carbide battery, aiming at solving the problem of difficulty in mass production of the silicon carbide battery.
  • a silicon carbide cell comprising: a first transport layer, a silicon carbide absorption layer on the light-facing surface of the first transport layer;
  • the first transport layer is a silicon substrate, and the silicon carbide absorber layer includes a silicon carbide material with an intermediate band;
  • the first transport layer transports electron or hole type carriers generated by the silicon carbide absorption layer.
  • the first transmission layer is a silicon substrate
  • the silicon carbide material including the intermediate band is located on the light-facing surface of the silicon substrate, that is, the silicon carbide absorption layer is fabricated on the light-facing surface of the low-cost silicon substrate
  • the silicon substrate is used as the first transport layer to transport the electron or hole type carriers generated by the silicon carbide absorption layer, without removal, and the process is simple.
  • the present disclosure provides a silicon carbide battery, aiming at solving the problem of difficulty in mass production of the silicon carbide battery.
  • a silicon carbide cell comprising: a silicon substrate, a silicon carbide absorption layer on a light-facing surface of the silicon substrate;
  • the silicon substrate has a plurality of first conductive holes, a first conductive electrode is formed in the first conductive holes, and the first conductive electrode is used for transporting the first type of carriers generated by the silicon carbide absorption layer;
  • the The silicon substrate is intrinsic or lightly doped silicon;
  • the silicon carbide absorber layer includes a silicon carbide material with an intermediate band.
  • the silicon carbide absorption layer is located on the light-facing surface of the silicon substrate, and the silicon carbide absorption layer includes a silicon carbide material with an intermediate band, that is, the silicon carbide absorption layer is fabricated on the light-facing surface of the low-cost silicon substrate.
  • the re-cutting process of growing silicon carbide crystal rods simplifies the production process of silicon carbide cells, has high production efficiency, and facilitates mass production of silicon carbide cells.
  • the silicon substrate is intrinsic or lightly doped silicon, the silicon substrate does not selectively transport carriers, the first conductive holes on the silicon substrate, and the first conductive electrodes located in the first conductive holes transport the silicon carbide absorber layer to generate The first type of carriers can reduce the series resistance.
  • another silicon carbide cell comprising: a silicon substrate, a silicon carbide absorption layer on a light-facing surface of the silicon substrate;
  • the silicon substrate has a plurality of first conductive holes, a first conductive electrode is formed in the first conductive holes, and the first conductive electrode is used for transporting the first type of carriers generated by the silicon carbide absorption layer; the The silicon substrate is used to selectively transport the second type of carriers;
  • the silicon carbide absorber layer includes a silicon carbide material with an intermediate band.
  • the silicon carbide absorption layer is located on the light-facing surface of the silicon substrate, and the silicon carbide absorption layer includes a silicon carbide material with an intermediate band, that is, the silicon carbide absorption layer is fabricated on the light-facing surface of the low-cost silicon substrate.
  • the re-cutting process of growing silicon carbide crystal rods simplifies the production process of silicon carbide cells, has high production efficiency, and facilitates mass production of silicon carbide cells.
  • the first conductive hole on the silicon substrate and the first conductive electrode located in the first conductive hole transmit the first type of carriers generated by the silicon carbide absorption layer, which can reduce the series resistance.
  • FIG. 1 shows a schematic structural diagram of a first silicon carbide cell in an embodiment of the present disclosure
  • FIG. 2 shows a schematic structural diagram of a second type of silicon carbide cell in an embodiment of the present disclosure
  • FIG. 3 shows a schematic structural diagram of a third silicon carbide cell in an embodiment of the present disclosure
  • FIG. 4 shows a schematic structural diagram of a fourth silicon carbide cell in an embodiment of the present disclosure.
  • FIG. 5 shows a schematic structural diagram of a fifth silicon carbide cell in an embodiment of the present disclosure
  • FIG. 6 shows a schematic structural diagram of a sixth silicon carbide cell in an embodiment of the present disclosure
  • FIG. 7 shows a schematic structural diagram of a seventh silicon carbide cell in an embodiment of the present disclosure.
  • FIG. 8 shows a schematic structural diagram of an eighth silicon carbide cell in an embodiment of the present disclosure.
  • FIG. 1 shows a schematic structural diagram of a first silicon carbide cell in an embodiment of the present disclosure.
  • the silicon carbide cell includes: a first transmission layer 1 , and a silicon carbide absorption layer 2 on the light-facing surface of the first transmission layer 1 .
  • the first transport layer 1 is a silicon substrate.
  • the silicon carbide absorber layer 2 is formed on the silicon substrate in an epitaxial form.
  • the silicon substrate provides the growth base for the silicon carbide absorber layer 2 and provides mechanical support.
  • the silicon carbide absorber layer 2 includes a silicon carbide material with an intermediate band, and the intermediate band is formed by doping in an epitaxial process. The proportion of the silicon carbide material having an intermediate band in the silicon carbide absorption layer 2 is not specifically limited.
  • all of the silicon carbide absorber layer 2 may be a silicon carbide material with an intermediate band.
  • the silicon carbide material with the intermediate band can absorb more light due to the existence of the intermediate band. Therefore, the silicon carbide material with the intermediate band can mainly play the role of light absorption.
  • Fabricating the silicon carbide absorption layer 2 on the light-facing surface of the low-cost silicon substrate simplifies the production process of silicon carbide cells compared to the prior art for growing silicon carbide ingots and re-cutting, and has a higher production rate. efficiency.
  • the conductive doping in the silicon carbide absorption layer 2 adopts III group elements (p-type doping) or V group elements (n-type doping). Common conductive doping elements include boron, aluminum, gallium, indium, nitrogen, Phosphorus, Arsenic, etc. In the case where the conductive doping in the silicon carbide absorber layer 2 is of the same doping type as the silicon substrate, the doping concentration of the conductive doping in the silicon carbide absorber layer 2 is less than or equal to 1 ⁇ 10 19 cm ⁇ 3 .
  • the doping concentration of the conductive doping in the silicon carbide absorber layer 2 is greater than or equal to 1 ⁇ 10 13 cm ⁇ 3 .
  • the intermediate band doping of the silicon carbide material with the intermediate band in the silicon carbide absorber layer 2 can adopt transition metal elements, group III elements, group V elements or group VI elements, such as cobalt, boron, nitrogen, oxygen, scandium, titanium, vanadium , manganese, iron, cobalt, nickel, copper, zinc, etc., and the doping concentration ranges from 1 ⁇ 10 12 cm -3 to 9 ⁇ 10 20 cm -3 .
  • the element having the function of doping in the middle band in the silicon carbide absorption layer 2 has the function of doping conductive or not is not specifically limited.
  • the silicon carbide material having the intermediate band in the silicon carbide absorption layer 2 has conductive doping
  • both the conductive doping and the intermediate band doping can be performed with boron element.
  • the silicon substrate is used as the first transport layer 1 for transporting electron carriers or hole-type carriers generated by the silicon carbide absorption layer 2 , which does not need to be removed, and the process is simple.
  • the silicon carbide absorption layer 2 may be of cubic structure crystal, and the silicon carbide absorption layer 2 may be of single crystal or polycrystalline. Referring to FIG. 1 , the thickness of the silicon carbide absorption layer 2 is h1, and 100um ⁇ h1 ⁇ 0.5um.
  • the light-facing surface of the silicon carbide absorption layer 2 is a flat surface or a textured surface.
  • the light-facing surface of the silicon carbide absorption layer 2 may also be provided with a nano-light trapping structure, a plasmon structure, etc., so as to increase the light trapping effect.
  • the silicon carbide absorption layer 2 is provided as a single layer, the single layer has a single conductive doping type, and the conductivity doping of the silicon carbide absorption layer 2 is one of n-type or p-type. kind.
  • the silicon carbide absorption layer 2 can form a carrier separation interface with the first transport layer 1 or the second transport layer 3, and a carrier separation interface is formed between the silicon carbide absorption layer 2 and the first transport layer 1.
  • the second transport layer 3 can be omitted.
  • the doping type of the first transport layer 1 and the second transport layer 3 is the same as or different from the conductivity doping type of the silicon carbide absorption layer 2, that is, high-low junction and pn junction are formed for separating and transporting carriers.
  • the doping concentration of the silicon substrate is greater than or equal to 1 ⁇ 10 15 cm -3 .
  • the silicon substrate has better conductivity as the first transport layer.
  • the silicon substrate and the silicon carbide absorber layer 2 can form a high-low junction or a pn junction with better performance, and play a good role in carrier separation and transport.
  • the band gap of silicon is naturally narrower than that of silicon carbide, allowing for a natural matching of many sub-levels.
  • the doping concentration of the silicon substrate is greater than or equal to 1 ⁇ 10 15 cm ⁇ 3 , the minority carrier energy level of the silicon substrate is matched with the silicon carbide absorption layer 2 to shield minority carriers.
  • the top energy level of the valence band of the silicon substrate needs to be less than or equal to the top energy level of the 2 valence band of the silicon carbide absorption layer to shield holes.
  • the bottom energy level of the conduction band of the silicon substrate must be greater than or equal to the bottom energy level of the conduction band of the silicon carbide absorption layer 2 to shield electrons.
  • the doping concentration of the silicon substrate can be greater than the conductivity dopant of the silicon carbide absorber layer 2.
  • concentration of impurities on the one hand, the silicon substrate has a relatively low series resistance, on the other hand, it satisfies the energy level matching between the silicon substrate and the silicon carbide.
  • the conductivity doping type of the silicon carbide absorber layer 2 can be different from that of the silicon substrate, so as to facilitate the realization of the above-mentioned silicon substrate and silicon carbide absorber Carrier separation and energy level matching between layers 2.
  • the second transport layer 3 For the selective contact of holes, the silicon material selects one of the photogenerated carriers and transports them, and the second transport layer 3 selects and transports the other.
  • the second transport layer 3 for electron selective contact.
  • FIG. 2 shows a schematic structural diagram of a second type of silicon carbide cell in an embodiment of the present disclosure.
  • the silicon carbide absorption layer 2 is configured as two sublayers, namely: a first silicon carbide sublayer and a second silicon carbide sublayer stacked in a direction away from the first transmission layer 1 .
  • the first silicon carbide sub-layer located below the dotted line may be the first silicon carbide sub-layer, and the one above the dotted line may be the second silicon carbide sub-layer.
  • the first silicon carbide sublayer and the second silicon carbide sublayer respectively have different conductive doping types, and the first silicon carbide sublayer and the second silicon carbide sublayer form a pn junction for separating carriers.
  • the silicon substrate is only used to transport electron carriers or hole-type carriers generated by the silicon carbide absorption layer 2, and the doping type of the silicon substrate is the same as that of the first silicon carbide sublayer close to the silicon substrate.
  • the type of conductive doping is the same.
  • the doping concentration of the silicon substrate is 1 ⁇ 10 17 cm ⁇ 3 to 1 ⁇ 10 19 cm ⁇ 3 , and the series resistance is relatively low.
  • the silicon carbide absorption layer 2 When the silicon carbide absorption layer 2 is set as two sub-layers, the silicon carbide absorption layer 2 completes the separation of carriers by itself, avoiding the interface carrier separation caused by many interface defects between the silicon substrate and the silicon carbide absorption layer 2 The problem of instability and high recombination improves the collection efficiency of carriers.
  • the silicon carbide cell further includes a second transmission layer 3 , the silicon carbide absorption layer 2 is located between the first transmission layer 1 and the second transmission layer 3 , and the first transmission layer 1 and the second transport layer 3 transports electron-type carriers or hole-type carriers, respectively. That is, the second transmission layer 3 is located on the light-facing surface of the silicon carbide absorption layer 2, and the second transmission layer 3 also acts as a window layer and has a high average transmittance in the visible light band to ensure the incident light of the device.
  • the first transport layer 1 and the second transport layer 3 are respectively used to transport one type of carriers, and the types of carriers transported in the two are different. For example, the first transport layer 1 transports electron-type carriers, and the second transport layer 3 transports hole-type carriers.
  • the doping type and doping concentration of the first transport layer 1 and the second transport layer 3 need to be matched with the type of carriers to be transported.
  • the conductivity doping of the first silicon carbide sublayer below the dotted line is n-type, then the first transport layer 1 is n-type doped for transporting electron carriers son.
  • the conductivity doping of the second silicon carbide sub-layer above the dotted line is p-type, then, the second transport layer 3 is p-type doped for transporting hole carriers.
  • the material of the second transport layer 3 is selected from low-work function p-type wide-bandgap semiconductor materials and high-work-function n-type wide-bandgap semiconductor materials. , a high work function metal, and a heavily doped p-type silicon carbide material, so that the second transport layer 3 has a better effect of transporting hole-type carriers.
  • the low work function p-type wide bandgap semiconductor material is selected from oxides of nickel or oxides of copper.
  • the high work function n-type wide band gap semiconductor material is selected from at least one of molybdenum oxide, tungsten oxide and vanadium oxide.
  • the high work function metal is selected from at least one of nickel, silver, and gold.
  • the material of the second transport layer 3 is selected from n-type wide-bandgap semiconductor materials or metals with low work function, so that the second transport layer 3 has a better transport electron type The role of charge carriers.
  • the n-type wide bandgap semiconductor material is selected from zinc oxide and/or tin oxide.
  • the low work function metal is selected from at least one of calcium, magnesium, and aluminum.
  • the light-facing surface of the second transmission layer 3 may also be provided with an anti-reflection layer 302 on the upper surface.
  • the anti-reflection layer 302 on the upper surface is a one-layer or multi-layer structure, and plays the role of reducing surface reflection.
  • the light-facing surface of the silicon carbide absorption layer 2 can be made of an anti-reflection structure by chemical etching or particle etching, or a nano-light trapping structure, a plasmon light trapping structure or other light trapping structures can be arranged on the light-facing surface. Arbitrary light trapping structure.
  • An upper surface passivation layer 301 may also be disposed between the silicon carbide absorption layer 2 and the second transmission layer 3 to passivate interface defects.
  • the material of the upper surface passivation layer 301 can be selected from silicon oxide, aluminum oxide, silicon nitride and the like.
  • the thickness of the silicon substrate is not limited, and the lattice orientation is also not specifically limited.
  • FIG. 3 shows a schematic structural diagram of a third silicon carbide cell in an embodiment of the present disclosure.
  • FIG. 4 shows a schematic structural diagram of a fourth silicon carbide cell in an embodiment of the present disclosure.
  • the silicon carbide cell further includes a lower functional layer 102 located on the backlight surface of the silicon substrate, and the lower functional layer 102 includes a work function adjustment layer, a passivation layer, and a carrier conduction layer. at least one of them.
  • the work function adjusting layer plays the role of adjusting the work function, which is beneficial to the separation or transport of carriers.
  • the passivation layer functions to passivate the interface defects.
  • the carrier conducting layer plays a role of supplementary transport carriers.
  • the material of the work function adjustment layer can be selected from calcium, lithium fluoride, magnesium fluoride and other work function adjustment materials.
  • the material of the passivation layer can be selected from passivation materials such as aluminum oxide, silicon oxide, and silicon nitride.
  • the material of the carrier conducting layer can be selected from conductive materials such as zinc oxide (and its dopant material), tin oxide (and its dopant material).
  • the silicon carbide cell further includes a modification layer 101 located between the silicon substrate and the silicon carbide absorber layer 2, and the modification layer 101 includes a lattice adaptation layer, At least one of the buffer layer, the seed layer, and the passivation layer is used to obtain the silicon carbide absorption layer 2 with better crystal quality.
  • the modification layer 101 mainly plays the role of buffering interface lattice mismatch, energy level matching, etc., which facilitates the growth of the cubic-phase silicon carbide absorption layer 2 and obtains a high-quality crystalline film.
  • the lattice adaptation layer is mainly used to adjust the interface lattice mismatch.
  • the material of the lattice adaptation layer may be selected from at least one of a hexagonal silicon carbide layer, an amorphous silicon carbide layer, a silicon layer or a silicon carbide layer.
  • the trim layer 101 may be provided in a stepped form, a wave form or other shapes.
  • the trim layer 101 may be an off-axis surface, which may or may not be etched.
  • the material of the modification layer 101 may be a silicon germanium compound.
  • the buffer layer mainly plays the role of interface energy level matching.
  • the buffer layer material is selected from amorphous silicon carbide, nanocrystalline silicon carbide, microcrystalline silicon carbide, crystalline silicon carbide, amorphous silicon, nanocrystalline silicon, microcrystalline silicon, and crystalline silicon, and the buffer layer exists.
  • narrow bandgap material There are two types, narrow bandgap material and wide bandgap material.
  • the bandgap of the narrow bandgap material is smaller than the bandgap of the cubic silicon carbide absorber layer 2
  • the bandgap of the wide bandgap material is larger than the bandgap of the cubic silicon carbide absorber layer 2 .
  • the narrow band gap material needs to meet the band gap width of 1.3-1.8 eV, and the narrow band gap material can be amorphous silicon or amorphous silicon carbide, nanocrystalline silicon or nanocrystalline silicon carbide, microcrystalline silicon or microcrystalline silicon carbide, or silicon carbon compound.
  • the wide band gap material needs to satisfy that the band gap width is greater than or equal to the band gap width of the silicon carbide absorption layer 2 .
  • the wide bandgap material can be doped silicon carbide material, can be amorphous silicon carbide or crystalline silicon carbide, can be cubic crystal phase or other crystalline phase (eg hexagonal) silicon carbide.
  • the buffer layer of the above-mentioned materials can meet the requirements of carrier conduction buffer, and at the same time, the buffer layer can shield another type of carrier, that is, play the function of selective contact.
  • the thickness of the buffer layer is not limited.
  • the doping type of the buffer layer is the same as that of the silicon carbide absorber layer 2 .
  • the silicon carbide cell further includes a bottom electrode 5 for collecting carriers on the first transport layer 1 and transferring electrical energy to the outside, and a bottom electrode 5 for collecting carriers on the third transport layer 3 , Top electrode 4 that transmits electrical energy to the outside.
  • the materials and structures of the bottom electrode 5 and the top electrode 4 are not specifically limited.
  • the top electrode 4 may be a parallel or intersecting grid-like structure.
  • the bottom electrode 5 may be a full back electrode.
  • Embodiments of the present disclosure also provide a method for producing a silicon carbide battery.
  • a silicon substrate is first prepared. Specifically, it includes the processing of the silicon substrate, the fabrication of the modification layer, and the like.
  • the silicon carbide absorber layer 2 is fabricated, and then the remaining structures are fabricated to form a complete device.
  • the silicon carbide cell in the production method of the silicon carbide cell reference may be made to the relevant records in the foregoing silicon carbide cell embodiments, and can achieve the same or similar beneficial effects. To avoid repetition, details are not described here.
  • Embodiments of the present disclosure also provide a photovoltaic assembly comprising any of the aforementioned silicon carbide cells.
  • the photovoltaic module may also include an encapsulation film, a cover plate or a back plate, etc. located on the light-facing surface and the backlight surface of the silicon carbide cell.
  • silicon carbide cell in the photovoltaic module reference can be made to the relevant records in the foregoing silicon carbide cell embodiments, and can achieve the same or similar beneficial effects. In order to avoid repetition, details are not described here.
  • the first transport layer 1 is an n-type silicon substrate, and the doping concentration is greater than or equal to 1 ⁇ 10 15 cm ⁇ 3 , more preferably, it may be 1 ⁇ 10 17 cm ⁇ 3 -1 ⁇ 10 19 cm -3 .
  • the silicon substrate is the epitaxial substrate of the silicon carbide absorption layer 2 , and at the same time, it needs to play the role of conducting the light-excited electron carriers of the silicon carbide absorption layer 2 .
  • the lower functional layer 102 and the bottom electrode 5 exist on the backlight surface of the silicon substrate.
  • the bottom electrode 5 is made of metal or alloy material, and the bottom electrode 5 can cover all or part of the backlight surface of the silicon substrate.
  • the lower functional layer 102 is a one-layer or multi-layer structure, which can play the functions of adjusting work function, passivating interface defects, conducting carriers, etc., and can include work function adjusting materials such as calcium, lithium fluoride, and magnesium fluoride. It includes passivation materials such as aluminum oxide, silicon oxide, and silicon nitride, and may include conductive materials such as zinc oxide (and its doped materials), and tin oxide (and its doped materials).
  • the light-facing surface of the first transmission layer 1 is provided with a silicon carbide absorption layer 2, and the silicon carbide absorption layer 2 is p-type silicon carbide, single crystal or polycrystalline, the doping concentration is not limited, and the thickness is 0.5-100um.
  • the silicon carbide absorption layer 2 is prepared by chemical vapor deposition. A feasible solution is to use silane as the silicon source, propane as the carbon source, and trimethylaluminum (Al(CH 3 ) 3 ) as the conductive dopant. , using trimethyl boron (B(CH 3 ) 3 ) as the intermediate band doping source (or only using boron doping, the boron element has the dual role of conductive doping and intermediate band doping) to perform epitaxial growth. After epitaxial growth, the residual stress in the material and at the interface can be further reduced by heat treatment.
  • a modification layer 101 can be arranged between the first transmission layer 1 and the silicon carbide absorption layer 2, and the modification layer 101 here can be a lattice adaptation layer, which mainly plays To adjust the interface lattice mismatch, it is convenient to grow the cubic phase silicon carbide absorber layer 2 and obtain a high-quality crystalline thin film.
  • the trim layer 101 may be n-type or p-type.
  • the modification layer 101 may be a hexagonal silicon carbide layer, an amorphous silicon carbide layer or a silicon material layer or a silicon carbon compound layer, arranged in a stepped form, a wave form or other shapes.
  • the modification layer 101 can be an off-axis surface, which can be etched or not; it can be a silicon germanium compound.
  • a heavily doped p-type sublayer may exist in the region of the silicon carbide absorption layer 2 facing the light-facing surface, and the doping concentration is greater than that in the middle position of the silicon carbide absorption layer 2 .
  • the light-facing surface of the silicon carbide absorption layer 2 is provided with a second transport layer 3 for collecting and conducting light-excited hole carriers.
  • the second transmission layer 3 may be a one-layer or multi-layer structure.
  • the second transmission layer 3 may be a p-type wide bandgap semiconductor material, such as nickel oxide or copper oxide.
  • the second transmission layer 3 can also use a high work function n-type wide bandgap semiconductor material, such as molybdenum oxide, tungsten oxide, vanadium oxide, and the like.
  • the second transmission layer 3 can also be made of high work function metals, such as nickel, silver, gold, etc. and alloy materials thereof.
  • the second transport layer 3 can also be a heavily doped p-type silicon carbide material.
  • An upper surface passivation layer 301 may be disposed between the second transmission layer 3 and the silicon carbide absorption layer 2 to passivate interface defects.
  • the upper surface passivation layer 301 may be silicon oxide, aluminum oxide, silicon nitride, or the like.
  • the second transmission layer 3 is provided with an upper surface anti-reflection layer 302 toward the light surface, which is a one-layer or multi-layer structure, and plays the role of reducing surface reflection.
  • the light-facing surface of the silicon carbide absorption layer 2 can be made of an anti-reflection structure by chemical etching or particle etching. Or, a nano light trapping structure, a plasmon light trapping structure or any other light trapping structure may be arranged on the light-facing surface of the silicon carbide absorption layer 2 .
  • a top electrode 4 is arranged on the upper surface of the device, which is in electrical contact with the second transmission layer 3, and plays the role of outputting electrical energy to the outside.
  • the top electrode 4 may be a parallel or intersecting grid-like structure.
  • the modification layer 101 in FIG. 4 may be a buffer layer, and the energy level difference of the buffer interface energy band is different.
  • the remaining parts in FIG. 4 may be the same as those in Embodiment 1.
  • the first transport layer 1 is a silicon substrate, using p-type doping, and the doping concentration is greater than or equal to 1 ⁇ 10 15 cm -3 , more preferably, it can be 1 ⁇ 10 17 cm -3 - 1 ⁇ 10 19 cm -3 .
  • the silicon substrate is the epitaxial substrate of the silicon carbide absorption layer 2, and at the same time needs to play the role of conducting the absorption layer to excite hole carriers.
  • a lower functional layer 102 and a bottom electrode 5 exist on the backlight surface of the silicon substrate.
  • the bottom electrode 5 is made of a metal or alloy material and can cover all or part of the backlight surface of the silicon substrate.
  • the lower functional layer 102 is a one-layer or multi-layer structure, which can play the functions of adjusting work function, passivating interface defects, conducting carriers, etc.
  • Passivation materials such as aluminum oxide, silicon oxide, and silicon nitride may include conductive materials such as zinc oxide (and its doped materials), and tin oxide (and its doped materials).
  • the light-facing surface of the first transmission layer 1 is provided with a silicon carbide absorption layer 2, and the silicon carbide absorption layer 2 is single crystal or polycrystalline, the doping concentration is not limited, and the thickness is 1-100um.
  • the silicon carbide absorption layer 2 contains two types of doping, which itself can complete the separation of photogenerated carriers, and the silicon substrate and the second transport layer 3 only play the role of selectively contacting and transporting carriers.
  • the first silicon carbide sub-layer below the dotted line in the silicon carbide absorption layer 2 is in contact with the silicon substrate, and the first silicon carbide sub-layer is p-type doped and epitaxially grown.
  • Chemical vapor epitaxy can be performed by using dichlorosilane as a silicon source, using acetylene as a carbon source, using boron element as a doping element, and using hydrogen and hydrogen chloride as carrier gas and auxiliary line gas. Subsequently, the doping element is changed, and phosphorus element is used as the doping element to obtain an n-type layer on the p-type layer.
  • Embodiment 3 refers Embodiment 1 above.
  • the solution of the buffer layer in Embodiment 2 can also be used, the doping type of the buffer layer is different from that of the silicon carbide absorber layer 2, and the buffer layer and the silicon substrate adopt the same doping type.
  • the buffer layer not only plays the role of energy band buffer, but also selects carriers at the interface between the buffer layer and the silicon carbide absorber layer 2 .
  • FIG. 5 shows a schematic structural diagram of a fifth silicon carbide cell in an embodiment of the present disclosure.
  • the silicon carbide cell includes: a silicon substrate 1', and a silicon carbide absorption layer 2' on the light-facing surface of the silicon substrate 1'.
  • the silicon carbide absorber layer 2' is epitaxially formed on the silicon substrate 1'.
  • the silicon substrate 1&apos provides the growth base for the silicon carbide absorber layer 2' and provides mechanical support.
  • the silicon carbide absorber layer 2' comprises a silicon carbide material having an intermediate zone, which is formed by doping in an epitaxy process.
  • the proportion of the silicon carbide material having an intermediate band in the silicon carbide absorption layer 2' is not particularly limited.
  • all of the silicon carbide absorber layer 2&apos may be a silicon carbide material with an intermediate band.
  • the silicon carbide material with the intermediate band can absorb more light due to the existence of the intermediate band. Therefore, the silicon carbide material with the intermediate band can mainly play the role of light absorption.
  • the silicon carbide absorption layer 2' is fabricated on the light-facing surface of the low-cost silicon substrate 1', which simplifies the production process of the silicon carbide cell compared with the re-cutting process of growing the silicon carbide crystal rod in the prior art, and has higher advantages. The high production efficiency makes the mass production of silicon carbide cells easier.
  • the conductive doping in the silicon carbide absorber layer 2' adopts group III elements (p-type doping) or V group elements (n-type doping). Common conductive doping elements include boron, aluminum, gallium, indium, and nitrogen. , phosphorus, arsenic, etc.
  • the doping concentration of the conductive doping in the silicon carbide absorber layer 2 is 1 ⁇ 10 13 cm ⁇ 3 to 1 ⁇ 10 19 cm ⁇ 3 .
  • the intermediate band doping of the silicon carbide material with the intermediate band in the silicon carbide absorber layer 2' can adopt transition metal elements, group III elements, group V elements or group VI elements, such as cobalt, boron, nitrogen, oxygen, scandium, titanium, Vanadium, manganese, iron, cobalt, nickel, copper, zinc, etc., the doping concentration ranges from 1 ⁇ 10 12 cm -3 to 9 ⁇ 10 20 cm -3 .
  • the element having the function of doping in the middle band in the silicon carbide absorption layer 2 has the function of doping conductive or not is not specifically limited.
  • the silicon carbide material having the intermediate band in the silicon carbide absorber layer 2' has conductive doping
  • both the conductive doping and the intermediate band doping can be performed with boron element.
  • the silicon carbide absorber layer 2' may be of cubic structure crystal, and the silicon carbide absorber layer 2' may be of single crystal or polycrystalline. Referring to Fig. 5, the thickness of the silicon carbide absorption layer 2' is h1, 100um ⁇ h1 ⁇ 0.5um.
  • the light-facing surface of the silicon carbide absorption layer 2' is a flat surface or a textured surface.
  • the light-facing surface of the silicon carbide absorption layer 2 may also be provided with a nano-light trapping structure, a plasmon structure, etc., so as to increase the light trapping effect.
  • the silicon substrate 1' has a plurality of first conductive holes, and the number and size of the first conductive holes are not specifically limited.
  • the first conductive electrode 62' is formed in the first conductive hole, and the first conductive electrode 62' is used for transporting the first type of carriers generated by the silicon carbide absorption layer 2'.
  • the first type of carriers are hole carriers or electron carriers.
  • the number of the first conductive electrodes 62' is not particularly limited, and the first conductive electrodes 62' conduct the first type of carriers to the first electrode 5' to transmit electrical energy to the outside.
  • the material and structure of the first electrode 5' are not specifically limited. For example, in the case where the first electrode is located on the backlight side of the silicon carbide absorber layer 2', the first electrode 5' may be a full back electrode. In the structure of Fig. 5, the second carriers are extracted from the second electrode 4'.
  • the silicon substrate 1' shown in Fig. 5 is intrinsic or lightly doped silicon, that is, the silicon substrate 1' in Fig. 5 is not used to select and transport carriers, which can reduce the series resistance.
  • FIG. 6 shows a schematic structural diagram of a sixth silicon carbide cell in an embodiment of the present disclosure.
  • a first contact layer 61 ′ is formed between the first conductive electrode 62 ′ and the silicon carbide absorber layer 2 ′, and the first contact layer 61 ′ selectively transmits the first type of carriers .
  • the first type of carriers may be electron carriers or hole carriers.
  • the projected area of the first contact layer 61 ′ on the silicon substrate 1 ′ is smaller than the area of the silicon substrate 1 ′, and the light-facing surface of the silicon substrate 1 ′ is apart from the first contact layer.
  • the projected area of the first contact layer 61' is not specifically limited to how much smaller than the area of the silicon substrate 1', so as to satisfy the carrier transport and the growth of the silicon carbide absorption layer 2' as constraints.
  • FIG. 7 shows a schematic structural diagram of a seventh silicon carbide cell in an embodiment of the present disclosure.
  • the silicon substrate 1' further includes a plurality of second conductive holes, and the number and size of the second conductive holes are not specifically limited.
  • the second conductive electrode 64' is formed in the second conductive hole.
  • a second contact layer 3' is formed between the second conductive electrode 64' and the silicon carbide absorber layer 2'.
  • the second contact layer 3' selectively transports the second type of carriers.
  • the sum of the projected areas of the first contact layer 61' and the second contact layer 3' on the silicon substrate 1' is smaller than the area of the silicon substrate 1', and thus the light-facing surface of the silicon substrate 1'
  • the first contact layer 61' and the second contact layer 3' there are exposed areas, and the light-facing surface of the silicon substrate 1' has exposed areas other than the first contact layer 61' and the second contact layer 3'. It can be used as the growth basis of the silicon carbide absorber layer 2'.
  • the projected area of the first contact layer 61 ′ and the second contact layer 3 ′ on the silicon substrate 1 ′ and how much is smaller than the area of the silicon substrate 1 ′ are not specifically limited, so as to satisfy the carrier transport and carbonization requirements.
  • the growth of the silicon absorber layer 2' is a constraint.
  • the silicon carbide cells shown in FIG. 6 and FIG. 7 have no electrodes to block the light surface, and the first electrode 5' and the second electrode 4' located on the backlight surface lead out two kinds of carriers. Specifically, the first electrode 5' can The carriers on the first conductive electrode 62' can be extracted, and the second electrode 4' can lead out the carriers on the second conductive electrode 64', which can improve the power generation efficiency.
  • the first electrode 5' and the second electrode 4' may be provided with an electrical isolation structure or a gap 7' between them to avoid leakage.
  • an electrical isolation structure or void 7' may be provided between the first contact layer 61' and the second contact layer 3' to avoid electric leakage.
  • the conductive doping of the silicon carbide absorber layer 2' is not limited.
  • the silicon carbide absorber layer 2' may have a single conductive doping, e.g. only p-type doping or only n-type doping or, alternatively, the silicon carbide absorber layer 2' may be intrinsic.
  • carrier separation is mainly performed at the interface of the first contact layer 61' and/or at the interface of the second contact layer 3'.
  • the first contact layer 61' or the second contact layer 3' is embedded in the surface of the silicon substrate 1 .
  • FIG. 5-7 the first contact layer 61' or the second contact layer 3' is embedded in the surface of the silicon substrate 1 .
  • the first contact layer 61' is located on the light-facing surface of the silicon substrate 1'.
  • the first contact layer 61 ′ and the second contact layer 3 ′ are embedded or embedded in the silicon substrate 1 ′, and are exposed from the light-facing surface of the silicon substrate 1 ′, or are connected to the light-facing surface of the silicon substrate 1 ′.
  • the faces are evenly distributed.
  • the first contact layer 61' or the second contact layer 3' can be provided in various ways.
  • the main common point of Figure 6 and Figure 7 is that the silicon carbide cell is not shielded from the smooth surface by electrodes, and the exposed area of the silicon substrate 1' to the smooth surface can be used as the growth base of the silicon carbide absorption layer 2' and provide mechanical support. Meanwhile, the conductive doping of the silicon carbide absorber layer 2' is not particularly limited. The silicon substrate in FIGS. 5 , 6 and 7 may not be used to transport carriers.
  • the silicon substrate 1' in Figs. 5, 6, and 7 is intrinsic or lightly doped silicon.
  • the silicon carbide cell further includes a second contact layer 3 ′, the second contact layer 3 ′ is located on the light-facing surface of the silicon carbide absorption layer 2 ′ for selectively transmitting the second type of carrier streamer.
  • the second contact layer 3' is located on the light-facing surface of the silicon carbide absorption layer 2'.
  • the second contact layer 3' also acts as a window layer and has a high average transmittance in the visible light band to ensure the incident light of the device.
  • the doping type and doping concentration of the first contact layer 61' and the second contact layer 3' need to be matched with the type of carriers to be transported.
  • the silicon carbide cell shown in FIG. 5 further includes a second electrode 4 ′ in electrical contact with the second contact layer 3 ′, and the second electrode 4 ′ is used to export the carriers on the second contact layer 3 ′ to the outside transmit electrical energy.
  • the material and structure of the second electrode 4' are not specifically limited.
  • the second electrode 4' may be a parallel or intersecting grid-like grid line structure.
  • the silicon carbide absorber layer 2' is provided as a single layer with a single conductive doping type, that is, the conductivity doping of the silicon carbide absorber layer 2' is one of n-type or p-type.
  • the doping type of the first contact layer 61' and the second contact layer 3' is the same as or different from the conductivity doping type of the silicon carbide absorber layer 2'.
  • the doping type of the second contact layer 3' is the same as the conductivity doping type of the silicon carbide absorber layer 2', the silicon carbide absorber layer 2' and the second contact layer 3' can form a high-low junction, and the two types are opposite,
  • the silicon carbide absorber layer 2' and the second contact layer 3' may form a pn junction.
  • the pn junction described above can be used to separate carriers.
  • the silicon carbide absorber layer 2' and the first contact layer 61' may form a pn junction for carrier separation.
  • the conductivity doping of the silicon carbide absorber layer 2' is n-type doping
  • the first contact layer 61' is p-type doping, both of which can form a pn junction.
  • the conductivity doping of the silicon carbide absorber layer 2' is a low-concentration n-type doping
  • the first contact layer 61' is a high-concentration n-type doping, which can form a high-low junction.
  • the silicon carbide absorption layer 2' is provided as two sublayers, namely: a first silicon carbide sublayer and a second silicon carbide sublayer stacked in a direction away from the silicon substrate 1'.
  • the first silicon carbide sub-layer located below the dotted line may be the first silicon carbide sub-layer
  • the one above the dotted line may be the second silicon carbide sub-layer.
  • the first silicon carbide sublayer and the second silicon carbide sublayer respectively have different conductive doping types, and the first silicon carbide sublayer and the second silicon carbide sublayer form a pn junction for separating carriers.
  • the first contact layer 61' and the second contact layer 3' are only used to transport electron carriers or hole-type carriers generated by the silicon carbide absorption layer 2'.
  • the first contact layer 61' is of the same type of conductivity doping as the first silicon carbide sublayer adjacent to the first contact layer 61'.
  • the second contact layer 3' is of the same type of conductivity doping as the second silicon carbide sublayer adjacent to the second contact layer 3'.
  • the conductivity doping of the first silicon carbide sublayer below the dotted line is n-type
  • the first contact layer 61 ′ can be n-type doped for transmission electron carrier.
  • the conductivity doping of the second silicon carbide sublayer above the dotted line is p-type, then the second contact layer 3' is p-type doped for transporting hole carriers.
  • the silicon carbide absorption layer 2' When the silicon carbide absorption layer 2' is set as two sub-layers, the silicon carbide absorption layer 2' completes the separation of carriers by itself, avoiding the carrier caused by the many interface defects between the silicon substrate 1' and the silicon carbide absorption layer 2'.
  • the difficulty of separation and serious recombination of carriers improves the separation and conduction efficiency of carriers and improves the efficiency of devices.
  • the material of the second contact layer 3' is selected from a low work function p-type wide bandgap semiconductor material, a high work function n-type wide bandgap semiconductor material.
  • a low work function p-type wide bandgap semiconductor material a high work function n-type wide bandgap semiconductor material.
  • semiconductor materials, high work function metals, and heavily doped p-type silicon carbide materials so that the second contact layer 3' has a better function of transporting hole-type carriers.
  • the material of the first contact layer 61' is selected from a low work function p-type wide bandgap semiconductor material and a high work function n-type wide bandgap semiconductor material , a high work function metal, or a heavily doped p-type silicon carbide material, so that the first contact layer 61 ′ has a better function of transporting hole-type carriers.
  • the low work function p-type wide bandgap semiconductor material is selected from oxides of nickel or oxides of copper.
  • the high work function n-type wide band gap semiconductor material is selected from at least one of molybdenum oxide, tungsten oxide and vanadium oxide.
  • the high work function metal is selected from at least one of nickel, silver, and gold.
  • the material of the second contact layer 3' is selected from n-type wide bandgap semiconductor materials or low work function metals, so that the second contact layer 3' has better The role of transport electron-type carriers.
  • the material of the first contact layer 61' is selected from n-type wide bandgap semiconductor materials or low work function metals, so that the first contact layer 61' has a relatively low work function. The role of good transport electron type carriers.
  • the n-type wide bandgap semiconductor material is selected from zinc oxide and/or tin oxide.
  • the low work function metal is selected from at least one of calcium, magnesium, and aluminum.
  • the light-facing surface of the silicon carbide absorption layer 2' may also be provided with an upper surface anti-reflection layer 302'.
  • the anti-reflection layer 302' on the upper surface is a one-layer or multi-layer structure, which plays the role of reducing surface reflection.
  • the light-facing surface of the silicon carbide absorption layer 2' can be made of an anti-reflection structure by chemical etching or particle etching, or a nano light trapping structure, a plasmon light trapping structure or Other arbitrary light trapping structures.
  • the light-facing surface of the silicon carbide absorption layer 2' may also be provided with an upper surface passivation layer 301', which plays the role of passivating interface defects.
  • the material of the upper surface passivation layer 301' can be selected from silicon oxide, aluminum oxide, silicon nitride, and the like.
  • the light-facing surface of the silicon substrate 1' is a flat surface or a textured surface, which is favorable for the growth or deposition of the silicon carbide absorption layer 2'.
  • the thickness of the silicon substrate 1' is not limited, and the lattice orientation is also not specifically limited.
  • the silicon carbide cell further includes a lower functional layer 102 ′ located on the backlight surface of the silicon substrate 1 ′, and the lower functional layer 102 ′ includes a work function adjustment layer, a passivation layer, and a carrier conduction layer. at least one of them.
  • the work function adjusting layer can adjust the work function, which is beneficial to the transport of carriers and reduces the metal-silicon contact resistance.
  • the passivation layer functions to passivate the interface defects.
  • the carrier conducting layer plays a role of supplementary transport carriers.
  • the material of the work function adjustment layer can be selected from calcium, lithium fluoride, magnesium fluoride and other work function adjustment materials.
  • the material of the passivation layer can be selected from passivation materials such as aluminum oxide, silicon oxide, and silicon nitride.
  • the material of the carrier conducting layer can be selected from conductive materials such as zinc oxide (and its dopant material), tin oxide (and its dopant material).
  • the silicon carbide cell further includes a modification layer 101 ′ located between the silicon substrate 1 ′ and the silicon carbide absorber layer 2 ′, and the modification layer 101 ′ includes a lattice adaptation layer , at least one of a buffer layer, a seed layer, and a passivation layer to obtain a silicon carbide absorption layer 2' with better crystal quality.
  • the trim layer 101' is located on the part of the silicon substrate 1' not covered by the first contact layer 61' or the second contact layer 3'.
  • the modification layer 101' mainly plays the role of buffer interface lattice mismatch, energy level matching, etc., which facilitates the growth of the cubic phase silicon carbide absorption layer 2' and obtains a high-quality crystalline film.
  • the lattice adaptation layer is mainly used to adjust the interface lattice mismatch.
  • the material of the lattice adaptation layer may be selected from at least one of a hexagonal silicon carbide layer, an amorphous silicon carbide layer, a silicon layer or a silicon carbide layer.
  • the trim layer 101' may be arranged in a stepped form, a wave form or other shapes.
  • the trim layer 101' may be an off-axis surface, which may or may not be etched.
  • the material of the modification layer 101' may be a silicon germanium compound.
  • the buffer layer mainly plays the role of interface energy level matching.
  • the buffer layer material is selected from amorphous silicon carbide, nanocrystalline silicon carbide, microcrystalline silicon carbide, crystalline silicon carbide, amorphous silicon, nanocrystalline silicon, microcrystalline silicon, and crystalline silicon.
  • the bandgap of the narrow-bandgap material is smaller than the bandgap of the cubic silicon carbide absorber layer 2', and the bandgap of the wide-bandgap material is greater than the bandgap of the cubic silicon carbide absorber layer 2'.
  • the narrow band gap material needs to meet the band gap width of 1.3-1.8 eV, and the narrow band gap material can be amorphous silicon or amorphous silicon carbide, nanocrystalline silicon or nanocrystalline silicon carbide, microcrystalline silicon or microcrystalline silicon carbide, or silicon carbon compound.
  • the wide band gap material needs to satisfy the band gap width greater than or equal to the band gap width of the silicon carbide absorber layer 2'.
  • the wide bandgap material can be doped silicon carbide material, can be amorphous silicon carbide or crystalline silicon carbide, can be cubic crystal phase or other crystalline phase (eg hexagonal) silicon carbide.
  • the buffer layer of the above-mentioned material can meet the requirements of carrier conduction and buffering, and at the same time, the buffer layer can shield another type of carrier, that is, the function of selective contact.
  • the thickness of the buffer layer is not limited.
  • the buffer layer doping type is the same as the silicon carbide absorber layer 2'.
  • FIG. 8 shows a schematic structural diagram of an eighth silicon carbide cell in an embodiment of the present disclosure.
  • the silicon carbide cell includes: a silicon substrate 1', and a silicon carbide absorption layer 2' on the light-facing surface of the silicon substrate 1'.
  • the silicon carbide absorber layer 2 ′ includes a silicon carbide material with an intermediate band.
  • the silicon carbide absorber layer 2 ′ in FIG. 8 can refer to the description of the silicon carbide absorber layer 2 ′ in the aforementioned FIGS. 6 and 7 , and can achieve the same or similar The beneficial effects are not repeated here in order to avoid repetition.
  • the silicon substrate 1' has a plurality of first conductive holes, and the first conductive electrodes 62' are formed in the first conductive holes, and the first conductive electrodes 62' are used to transport the first type of carriers generated by the silicon carbide absorption layer 2'.
  • the first conductive hole and the first conductive electrode 62 ′ refer to the corresponding descriptions of the first conductive hole and the first conductive electrode 62 ′ in the aforementioned FIG. 5 to FIG. 7 , and can achieve the same or similar beneficial effects. In order to avoid repetition, this It is not repeated here.
  • the silicon substrate 1 ′ is used to selectively transport the second type of carriers, that is, compared with FIGS. 5 to 7 , the silicon substrate 1 ′ not only plays the corresponding role in FIGS. 5 to 7 , but also Select to transport the second type of carriers. That is, the silicon substrate 1 ′ and the first conductive electrode 62 shown in FIG. 8 transport one type of carrier, respectively.
  • the doping concentration of the silicon substrate 1 ′ is greater than or equal to 1 ⁇ 10 15 cm ⁇ 3 , and the electrical conductivity of the silicon substrate 1 ′ is good.
  • the band gap of silicon is naturally narrower than that of silicon carbide, allowing for a natural matching of many sub-levels.
  • the minority carrier energy level of the silicon substrate 1 ′ needs to be matched with the silicon carbide absorption layer 2 ′ to shield minority carriers.
  • the silicon substrate 1' is n-type
  • the top energy level of the valence band of the silicon substrate 1' needs to be less than or equal to the top energy level of the valence band of the silicon carbide absorption layer 2' to shield holes.
  • the silicon substrate 1' is p-type
  • the bottom energy level of the conduction band of the silicon substrate 1' needs to be greater than or equal to the bottom energy level of the conduction band of the silicon carbide absorption layer 2' to shield electrons.
  • the silicon substrate 1' transports hole carriers
  • the first conductive electrode 62' transports electron carriers.
  • the silicon carbide cell shown in FIG. 8 is not shielded from the light surface by electrodes, and the first electrode 5 ′ and the second electrode 4 ′ respectively lead out two kinds of carriers. Specifically, the first electrode 5 ′ can lead out the first conductive electrode 62 ', the second electrode 4' can lead out the carriers on the silicon substrate 1', which can improve the power generation efficiency.
  • the first electrode 5' and the second electrode 4' may be provided with electrical isolation structures or voids 7' to avoid electrical leakage.
  • the first conductive electrode 62' and the silicon substrate 1' are provided with an electrical isolation structure or gap to avoid leakage.
  • the conductivity doping of the silicon carbide absorber layer 2' is not limited.
  • the silicon carbide absorber layer 2' may have a single conductive doping, e.g. only p-type doping or only n-type doping or, alternatively, the silicon carbide absorber layer 2' may be intrinsic.
  • carrier separation is mainly performed at the interface of the first contact layer 61' and/or at the interface of the silicon substrate 1'.
  • Embodiments of the present disclosure also provide a method for producing a silicon carbide battery, specifically, preparing a silicon substrate first. Specifically, it includes the processing of the silicon substrate, the fabrication of the modification layer, and the like. The silicon carbide absorber layer 2' is then fabricated, followed by fabrication of the remaining structures to form a complete device.
  • the silicon carbide cell in the production method of the silicon carbide cell reference may be made to the relevant records in the foregoing silicon carbide cell embodiments, and can achieve the same or similar beneficial effects. To avoid repetition, details are not described here.
  • Embodiments of the present disclosure also provide a photovoltaic assembly comprising any of the aforementioned silicon carbide cells.
  • the photovoltaic module may also include an encapsulation film, a cover plate or a back plate, etc. located on the light-facing surface and the backlight surface of the silicon carbide cell.
  • silicon carbide cell in the photovoltaic module reference can be made to the relevant records in the foregoing silicon carbide cell embodiments, and can achieve the same or similar beneficial effects. In order to avoid repetition, details are not described here.
  • a first contact layer 61 ′ is provided on the light-facing surface of the silicon substrate 1 ′, a first conductive hole is provided on the silicon substrate 1 ′, and a first conductive hole is provided in the first conductive hole Electrode 62'.
  • the lower surface of the silicon carbide absorber layer 2' is in electrical contact with the first contact layer 61', and the first contact layer 61' is in electrical contact with the first conductive electrode 62', so as to assist the collection of carriers of the silicon carbide absorber layer 2'.
  • the projected area of the first contact layer 61' on the silicon substrate 1' is smaller than the area of the silicon substrate 1', and the growth is based on the area of the silicon substrate 1' facing the light surface except the first contact layer 61', which is grown by epitaxial growth.
  • Silicon carbide absorber layer 2' A feasible implementation manner is to provide a first conductive hole, a first conductive electrode 62' and a first contact layer 61' on the silicon substrate 1' before the silicon carbide absorber layer 2' is deposited.
  • the first conductive holes can be round holes or square holes or irregular holes, and the holes are filled with high conductivity materials such as metal or alloy electrodes or conductive oxides to form the first conductive electrodes 62 ′, the metal material of the first conductive electrodes 62 ′.
  • the material of the first electrode 5' may be the same or different.
  • a first contact layer 61' is arranged on the light-facing surface of the silicon substrate 1'. The first contact layer 61' surrounds the first conductive electrode 62' as a center-symmetric grid line structure, or a planar structure, but part of the silicon substrate 1' needs to be exposed.
  • a smooth or partially modified layer 101' is provided to provide a starting position for epitaxial growth of the silicon carbide absorber layer 2'.
  • the first contact layer 61' may be a selective contact material opposite to the carrier selectivity of the second contact layer 3'.
  • the material of the first contact layer 61' may be a metal material or an alloy material, and the material of the first contact layer 61' may be the same as or different from that of the first conductive electrode 62' and the first electrode 5'.
  • the silicon carbide absorption layer 2' is single crystal or polycrystalline, the doping concentration is not limited, and the thickness is 0.5-100um.
  • the silicon carbide absorption layer 2' needs to include a p-type doping sublayer and an n-type doping sublayer, which can complete the separation of photogenerated carriers by itself.
  • the first contact layer 61' and the second contact layer 3' are only for selection. Sexual contact and the role of transport carriers.
  • the first silicon carbide sublayer below the dotted line in the silicon carbide absorption layer 2' is in contact with the first contact layer 61', the first silicon carbide sublayer is p-type doped, and epitaxially grown, and the first contact layer 61' is hole selective contact material.
  • the second silicon carbide sublayer above the dotted line in the silicon carbide absorber layer 2' is n-type doped, and the second contact layer 3' is an electron selective contact material.
  • the lower functional layer 102' and the first electrode 5' exist on the backlight surface of the silicon substrate 1'.
  • the first electrode 5' is a metal or alloy material, and the first electrode 5' can cover all or part of the backlight surface of the silicon substrate 1 .
  • the lower functional layer 102' is a one-layer or multi-layer structure, which can adjust the work function, passivate interface defects, conduct carriers and other functions, and can include work function adjustment materials such as calcium, lithium fluoride, magnesium fluoride, etc.
  • Passivation materials such as aluminum oxide, silicon oxide, and silicon nitride may be included, and conductive materials such as zinc oxide (and its dopant materials), and tin oxide (and its dopant materials) may be included.
  • a modification layer 101' can be arranged between the silicon substrate 1' and the silicon carbide absorption layer 2', and the modification layer 101' here can be a lattice adaptation layer , mainly plays the role of adjusting the interface lattice mismatch, facilitating the growth of the cubic phase silicon carbide absorber layer 2' and obtaining a high-quality crystalline film.
  • the modification layer 101' may or may not be doped. In Embodiment 4, the modification layer 101' may not be doped, and only serves as an epitaxy starting point.
  • the modification layer 101' may be a hexagonal silicon carbide layer, an amorphous silicon carbide layer or a silicon material layer or a silicon carbon compound layer, arranged in a stepped form, a wave form or other shapes.
  • the trim layer 101' may be an off-axis surface, which may or may not be etched.
  • the modification layer 101' may be a silicon germanium compound.
  • An upper surface passivation layer 301' may be disposed between the second contact layer 3' and the silicon carbide absorber layer 2' to passivate interface defects.
  • the upper surface passivation layer 301' may be silicon oxide, aluminum oxide, silicon nitride, or the like.
  • the second contact layer 3' is provided with an upper surface anti-reflection layer 302' facing the light surface, which is a one-layer or multi-layer structure, and plays a role in reducing surface reflection.
  • the light-facing surface of the silicon carbide absorption layer 2' can be made of an anti-reflection structure by chemical etching or particle etching.
  • a nano light trapping structure, a plasmon light trapping structure or any other light trapping structure may be arranged on the light-facing surface of the silicon carbide absorption layer 2'.
  • a second electrode 4' is arranged on the upper surface of the device, which is in electrical contact with the second contact layer 3' and plays the role of outputting electrical energy to the outside.
  • the second electrode 4' may be a parallel or intersecting grid-like grid structure.
  • the silicon substrate 1' mainly functions as a growth substrate for the silicon carbide absorber layer 2', and the transport carriers are not selected, and the doping type or doping concentration of the silicon substrate 1' is not limited. That is, the silicon substrate 1' is intrinsic silicon or lightly doped silicon.
  • Embodiment 5 the difference between Embodiment 5 and Embodiment 4 is that the second contact layer 3 ′ is moved from the light-facing side of the silicon carbide absorption layer 2 ′ to the backlight side of the silicon substrate 1 , and the first contact layer 61 ′ is moved. and the second contact layer 3' are respectively located in different regions of the backlight surface of the silicon substrate 1'.
  • An electrical isolation structure or void 7' is provided between the first contact layer 61' and the second contact layer 3', and a second conductive hole and a second conductive hole corresponding to the second contact layer 3' are also provided on the silicon substrate 1'.
  • Conductive electrode 64' the difference between Embodiment 5 and Embodiment 4 is that the second contact layer 3 ′ is moved from the light-facing side of the silicon carbide absorption layer 2 ′ to the backlight side of the silicon substrate 1 , and the first contact layer 61 ′ is moved. and the second contact layer 3' are respectively located in different regions of the backlight surface of the silicon substrate 1
  • the sum of the projected areas of the first contact layer 61' and the second contact layer 3' on the silicon substrate 1' is smaller than the area of the silicon substrate 1'.
  • a region of the light-facing side of the silicon substrate 1 except the first contact layer 61' and the second contact layer 3' provides a starting position for epitaxial growth of the silicon carbide absorber layer 2'.
  • the silicon carbide absorption layer 2' is formed by means of selective epitaxy.
  • the conductive doping of the silicon carbide absorber layer 2' is not limited.
  • the silicon substrate 1' also mainly functions as a growth substrate for the silicon carbide absorber layer 2', and the transport carriers are not selected, and the doping type or doping concentration of the silicon substrate 1' is not limited. That is, the silicon substrate 1' is intrinsic silicon or lightly doped silicon.

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Abstract

本公开提供一种碳化硅电池，涉及太阳能光伏技术领域。碳化硅电池包括：硅基底，硅基底的向光面上的碳化硅吸收层；硅基底具有多个第一导电孔，第一导电电极形成于第一导电孔内，第一导电电极用于传输碳化硅吸收层产生的第一类载流子；硅基底为本征或轻掺杂的硅；碳化硅吸收层包含具有中间带的碳化硅材料。碳化硅吸收层位于硅基底的向光面，碳化硅吸收层包含具有中间带的碳化硅材料，简化了碳化硅电池的生产工艺，具备较高的生产效率，使得碳化硅电池量产变得容易。硅基底上的第一导电孔，以及位于第一导电孔内的第一导电电极传输碳化硅吸收层产生的第一类载流子，可以降低串联电阻。

Description

碳化硅电池
相关申请的交叉引用
本申请要求在2020年10月26日提交中国专利局、申请号为202011159811.8、名称为“碳化硅电池”的中国专利申请的优先权，和在同日提交中国专利局、申请号为202011159794.8、名称为“碳化硅电池”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本公开涉及太阳能光伏技术领域，特别是涉及一种碳化硅电池。
背景技术
碳化硅材料具备较为理想的中间带材料特性，是较为合适的中间带吸收层材料。
但是，碳化硅晶片生长、切片成本较高，且成品后难以实施掺杂等后续加工工艺，导致碳化硅电池量产困难。
概述
本公开提供一种碳化硅电池，旨在解决碳化硅电池量产困难的问题。
根据本公开的第一方面，提供了一种碳化硅电池，所述碳化硅电池包括：第一传输层、第一传输层向光面上的碳化硅吸收层；
所述第一传输层为硅衬底，所述碳化硅吸收层包含具有中间带的碳化硅材料；
所述第一传输层传输碳化硅吸收层产生的电子或空穴型载流子。
本公开中，第一传输层为硅衬底，包含具有中间带的碳化硅材料位于硅衬底的向光面，也就是在低成本的硅衬底的向光面上制作碳化硅吸收层，相对于现有技术中生长碳化硅晶棒再切割加工而言，简化了碳化硅电池的生产工艺，具备较高的生产效率。同时，硅衬底作为第一传输层传输碳化硅吸收 层产生的电子或空穴型载流子，无需去除，工艺简单。
本公开提供一种碳化硅电池，旨在解决碳化硅电池量产困难的问题。
根据本公开的第一方面，提供了一种碳化硅电池，所述碳化硅电池包括：硅基底，所述硅基底的向光面上的碳化硅吸收层；
所述硅基底具有多个第一导电孔，第一导电电极形成于所述第一导电孔内，所述第一导电电极用于传输碳化硅吸收层产生的第一类载流子；所述硅基底为本征或轻掺杂的硅；
所述碳化硅吸收层包含具有中间带的碳化硅材料。
本公开中，碳化硅吸收层位于硅基底的向光面，碳化硅吸收层包含具有中间带的碳化硅材料，也就是在低成本的硅基底的向光面上制作碳化硅吸收层，相对于现有技术中生长碳化硅晶棒再切割加工而言，简化了碳化硅电池的生产工艺，具备较高的生产效率，使得碳化硅电池量产变得容易。同时，硅基底为本征或轻掺杂的硅，硅基底不选择传输载流子，硅基底上的第一导电孔，以及位于第一导电孔内的第一导电电极传输碳化硅吸收层产生的第一类载流子，可以降低串联电阻。
根据本公开的第二方面，提供了另一种碳化硅电池，所述碳化硅电池包括：硅基底，所述硅基底的向光面上的碳化硅吸收层；
所述硅基底具有多个第一导电孔，第一导电电极形成于所述第一导电孔内，所述第一导电电极用于传输碳化硅吸收层产生的第一类载流子；所述硅基底用于选择传输第二类载流子；
所述碳化硅吸收层包含具有中间带的碳化硅材料。
本公开中，碳化硅吸收层位于硅基底的向光面，碳化硅吸收层包含具有中间带的碳化硅材料，也就是在低成本的硅基底的向光面上制作碳化硅吸收层，相对于现有技术中生长碳化硅晶棒再切割加工而言，简化了碳化硅电池的生产工艺，具备较高的生产效率，使得碳化硅电池量产变得容易。同时，硅基底上的第一导电孔，以及位于第一导电孔内的第一导电电极传输碳化硅吸收层产生的第一类载流子，可以降低串联电阻。
上述说明仅是本公开技术方案的概述，为了能够更清楚了解本公开的技术手段，而可依照说明书的内容予以实施，并且为了让本公开的上述和其它目的、特征和优点能够更明显易懂，以下特举本公开的具体实施方式。
附图简述
为了更清楚地说明本公开实施例的技术方案，下面将对本公开实施例的描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1示出了本公开实施例中的第一种碳化硅电池的结构示意图；
图2示出了本公开实施例中的第二种碳化硅电池的结构示意图；
图3示出了本公开实施例中的第三种碳化硅电池的结构示意图；
图4示出了本公开实施例中的第四种碳化硅电池的结构示意图。
图5示出了本公开实施例中的第五种碳化硅电池的结构示意图；
图6示出了本公开实施例中的第六种碳化硅电池的结构示意图；
图7示出了本公开实施例中的第七种碳化硅电池的结构示意图；并且
图8示出了本公开实施例中的第八种碳化硅电池的结构示意图。
详细描述
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
图1示出了本公开实施例中的第一种碳化硅电池的结构示意图。参照图1所示，该碳化硅电池包括：第一传输层1、位于第一传输层1的向光面上的碳化硅吸收层2。第一传输层1为硅衬底。可选的，碳化硅吸收层2以外延的形式形成在硅衬底上。硅衬底提供碳化硅吸收层2的生长基础，且提供机械支 撑。碳化硅吸收层2包含具有中间带的碳化硅材料，在外延工艺中通过掺杂的形式，形成上述中间带。具有中间带的碳化硅材料在碳化硅吸收层2中所占的比例不作具体限定。例如，全部的碳化硅吸收层2可以均为具有中间带的碳化硅材料。具有中间带的碳化硅材料，由于中间带的存在可以吸收更多的光，因此，具有中间带的碳化硅材料可以主要起到的光吸收作用。在低成本的硅衬底的向光面上制作碳化硅吸收层2，相对于现有技术中生长碳化硅晶棒再切割加工而言，简化了碳化硅电池的生产工艺，具备较高的生产效率。
碳化硅吸收层2中的导电性掺杂采用采用III族元素(p型掺杂)或V族元素(n型掺杂)，常用导电性掺杂元素包括硼、铝、镓、铟、氮、磷、砷等。在碳化硅吸收层2中的导电性掺杂与硅衬底为相同的掺杂类型的情况下，碳化硅吸收层2中的导电性掺杂的掺杂浓度小于或等于1×10 19cm -3。在碳化硅吸收层2中的导电性掺杂与硅衬底为不同的掺杂类型的情况下，碳化硅吸收层2中的导电性掺杂的掺杂浓度大于或等于1×10 13cm -3。
碳化硅吸收层2中具有中间带的碳化硅材料的中间带掺杂可以采用过渡金属元素、III族元素、V族元素或VI族元素，如钴、硼、氮、氧、钪、钛、钒、锰、铁、钴、镍、铜、锌等，掺杂浓度范围为1×10 12cm -3-9×10 20cm -3。
碳化硅吸收层2中具有中间带掺杂功能的元素是否具有导电性掺杂功能不作具体限定。例如，在碳化硅吸收层2中具有中间带的碳化硅材料具有导电性掺杂的情况下，导电性掺杂和中间带掺杂均可以采用硼元素进行。
硅衬底作为第一传输层1用于传输碳化硅吸收层2产生的电子载流子或空穴型载流子，无需去除，工艺简单。
可选地，碳化硅吸收层2可以为立方结构晶体，碳化硅吸收层2可以为单晶或多晶。参照图1所示，碳化硅吸收层2的厚度为h1，100um≥h1≥0.5um。碳化硅吸收层2的向光面为平面或绒面。碳化硅吸收层2的向光面还可以具备纳米陷光结构、等离子激元结构等，以增加陷光效果。
可选地，如图1所示，碳化硅吸收层2设置为单层，该单层具有单一的 导电掺杂类型，碳化硅吸收层2的导电性掺杂为n型或p型中的一种。此种情况下，碳化硅吸收层2可以与第一传输层1或第二传输层3形成载流子分离界面，且在在碳化硅吸收层2与第一传输层1形成载流子分离界面的情况下，可以省略第二传输层3。第一传输层1、第二传输层3的掺杂类型与碳化硅吸收层2的导电性掺杂类型相同或不同，即形成高低结和pn结，用于分离和传输载流子。
可选地，在碳化硅吸收层2设置为单层的情况下，硅衬底的掺杂浓度大于或等于1×10 15cm -3，一方面硅衬底作为第一传输层导电性能较好，另一方面硅衬底与碳化硅吸收层2可以形成性能较好的高低结或pn结，起到良好的载流子分离和传输作用。硅带隙天然比碳化硅的带隙窄，使得多子能级可以自然匹配。硅衬底的掺杂浓度大于或等于1×10 15cm -3的情况下，硅衬底的少子能级与碳化硅吸收层2进行匹配以屏蔽少子。例如，当硅衬底为n型，则硅衬底价带顶能级需小于或等于碳化硅吸收层2价带顶能级，以屏蔽空穴。当硅衬底为p型，则硅衬底导带底能级需大于或等于碳化硅吸收层2导带底能级，以屏蔽电子。
可选地，在碳化硅吸收层2设置为单层的情况下，若硅衬底和碳化硅吸收层2形成高低结，硅衬底的掺杂浓度可以大于碳化硅吸收层2的导电性掺杂的浓度，一方面，硅衬底具有相对较低的串联电阻，另一方面满足硅衬底与碳化硅的能级匹配。
在碳化硅吸收层2设置为单层的情况下，更优的，碳化硅吸收层2的导电性掺杂类型可以与硅衬底的掺杂类型不同，便于实现上述硅衬底与碳化硅吸收层2间载流子分离及能级匹配。
在碳化硅吸收层2设置为单层，且碳化硅吸收层2的导电性掺杂类型与硅衬底的掺杂类型相同的情况下，如n型Si和n型SiC，第二传输层3为空穴选择性接触，硅材料选择其中一种光生载流子并加以传输，第二传输层3选择另一种并加以传输。
在碳化硅吸收层2设置为单层，且碳化硅吸收层2的导电性掺杂类型与硅衬底的掺杂类型不同的情况下，如p型Si和n型SiC，第二传输层3为电子选择性接触。
图2示出了本公开实施例中的第二种碳化硅电池的结构示意图。可选的，参照图2所示，碳化硅吸收层2设置为两个子层，分别为：在远离第一传输层1的方向上层叠的第一碳化硅子层、第二碳化硅子层。图2中，碳化硅吸收层2中，位于虚线下方的可以为第一碳化硅子层，位于虚线上方的可以为第二碳化硅子层。第一碳化硅子层、第二碳化硅子层分别具有不同的导电掺杂类型，进而第一碳化硅子层、第二碳化硅子层形成pn结用于分离载流子。此种情况下，硅衬底仅用于传输碳化硅吸收层2产生的电子载流子或空穴型载流子，硅衬底的掺杂类型与靠近硅衬底的第一碳化硅子层的导电性掺杂的类型相同。
碳化硅吸收层2设置为两个子层的情况下，硅衬底的掺杂浓度为1×10 17cm -3-1×10 19cm -3，具有较低的串联电阻。
碳化硅吸收层2设置为两个子层的情况下，碳化硅吸收层2自身完成了分离载流子，避免了硅衬底与碳化硅吸收层2较多的界面缺陷导致的界面载流子分离不稳定且复合高的问题，提升了载流子的收集效率。
可选的，参照图1或图2所示，该碳化硅电池还包括第二传输层3，碳化硅吸收层2位于第一传输层1和第二传输层3之间，第一传输层1、第二传输层3分别传输电子型载流子或空穴型载流子。即，第二传输层3位于碳化硅吸收层2的向光面，第二传输层3同时作为窗口层，在可见光波段具备较高的平均透过率，以保证器件入射光。第一传输层1和第二传输层3分别用于传输一种载流子，两者中传输的载流子类型不同。如，第一传输层1传输电子型载流子，则，第二传输层3则传输空穴型载流子。第一传输层1和第二传输层3的掺杂类型、掺杂浓度等，需要和传输的载流子类型进行匹配。
例如，图2中，碳化硅吸收层2中，位于虚线下方的第一碳化硅子层的 导电性掺杂为n型，则，第一传输层1为n型掺杂，用于传输电子载流子。位于虚线上方的第二碳化硅子层的导电性掺杂为p型，则，第二传输层3为p型掺杂，用于传输空穴载流子。
可选地，在第二传输层3传输空穴型载流子的情况下，第二传输层3的材料选自低功函数p型宽带隙半导材料、高功函数n型宽带隙半导体材料、高功函数金属、重掺杂p型碳化硅材料中的一种，进而使得第二传输层3具有较好的传输空穴型载流子的作用。
可选地，低功函数p型宽带隙半导材料选自镍的氧化物或铜的氧化物。高功函数n型宽带隙半导体材料选自氧化钼、氧化钨、氧化钒中的至少一种。高功函数金属选自镍、银、金中的至少一种。
在第二传输层3传输电子型载流子的情况下，第二传输层3的材料选自n型宽带隙半导体材料或低功函数金属，使得第二传输层3具有较好的传输电子型载流子的作用。
可选地，n型宽带隙半导体材料选自氧化锌和/或氧化锡。低功函数金属选自钙、镁、铝中的至少一种。
可选地，第二传输层3的向光面还可以设置有上表面减反射层302。上表面减反射层302为一层或多层结构，起到减少表面反射的作用。为了进一步降低表面反射，碳化硅吸收层2的向光面可以采用化学腐蚀或粒子刻蚀的方法制作出减反射结构，或在向光面设置纳米陷光结构、等离子激元陷光结构或其他任意陷光结构。
碳化硅吸收层2和第二传输层3之间还可以设置有上表面钝化层301，起到钝化界面缺陷的作用。上表面钝化层301的材料可以选自氧化硅、氧化铝、氮化硅等。
可选地，硅衬底的厚度不限，晶格取向也不做具体限定。
图3示出了本公开实施例中的第三种碳化硅电池的结构示意图。图4示出了本公开实施例中的第四种碳化硅电池的结构示意图。可选的，参照图2、 图3、图4，碳化硅电池还包括位于硅衬底背光面的下功能层102，下功能层102包括功函数调节层、钝化层、载流子传导层中的至少一种。功函数调节层起到调节功函数，利于载流子的分离或传输的作用。钝化层起到界面缺陷钝化的作用。载流子传导层起到补充传输载流子的作用。功函数调节层的材料可以选自钙、氟化锂、氟化镁等功函数调节材料。钝化层的材料可以选自氧化铝、氧化硅、氮化硅等钝化材料。载流子传导层的材料可以选自氧化锌(及其掺杂材料)、氧化锡(及其掺杂材料)等导电材料。
和/或，可选地，参照图2、图3、图4，碳化硅电池还包括位于硅衬底和碳化硅吸收层2之间的修饰层101，修饰层101包括晶格适配层、缓冲层、种子层、钝化层中的至少一种，以获得结晶质量较好的碳化硅吸收层2。修饰层101主要起到缓冲界面晶格失配、能级匹配等作用，便于立方相碳化硅吸收层2生长并获得高质量结晶薄膜。晶格适配层主要用于调节界面晶格失配。可选的，晶格适配层的材料可以选自六方相碳化硅层、非晶碳化硅层、硅层或硅碳化合物层中的至少一种。修饰层101可以以阶梯形式、波浪形式或其他形状设置。修饰层101可以为偏轴(off-axis)表面，可以刻蚀或不刻蚀。修饰层101的材料可以为硅锗化合物。
缓冲层主要起到界面能级匹配的作用。可选地，缓冲层材料选自非晶碳化硅、纳米晶碳化硅、微晶碳化硅、晶体结构的碳化硅、非晶硅、纳米晶硅、微晶硅、晶体结构的硅，缓冲层存在两种类型，窄带隙材料和宽带隙材料，窄带隙材料的带隙小于立方碳化硅吸收层2的带隙，宽带隙材料的带隙大于立方碳化硅吸收层2的带隙。窄带隙材料需满足带隙宽度1.3-1.8eV，窄带隙材料可以为非晶硅或非晶碳化硅、纳米晶硅或纳米晶碳化硅、微晶硅或微晶碳化硅、或硅碳化合物。宽带隙材料需满足带隙宽度大于或等于碳化硅吸收层2的带隙宽度。宽带隙材料可以为掺杂的碳化硅材料，可以为非晶碳化硅或晶体碳化硅，可以为立方晶相或其他晶相(如六方)碳化硅。
上述材料的缓冲层能够满足载流子传导缓冲的要求，同时缓冲层可以屏 蔽另一种载流子，即起到选择性接触的功能。缓冲层厚度不限定。缓冲层掺杂类型与碳化硅吸收层2相同。通过在硅衬底和碳化硅吸收层2之间设置缓冲层，可以极大的降低硅衬底和碳化硅吸收层2之间的带间复合。
参照图1至图4，碳化硅电池还包括用于收集第一传输层1上的载流子、向外传输电能的底电极5，以及用于收集第三传输层3上的载流子、向外传输电能的顶电极4。底电极5、顶电极4的材料和结构均不作具体限定。例如，顶电极4可以为平行或交叉的网格状栅线结构。底电极5可以为全背电极。
本公开实施例还提供一种碳化硅电池的生产方法，具体的，先准备硅衬底。具体包括硅衬底的处理，修饰层的制作等。接着制作碳化硅吸收层2，然后制作其余结构，形成完整器件。该碳化硅电池的生产方法中的碳化硅电池可以参照前述碳化硅电池实施例中的相关记载，且能达到相同或相似的有益效果，为了避免重复，此处不再赘述。
本公开实施例还提供一种光伏组件，该光伏组件包括任一前述的碳化硅电池。该光伏组件还可以包括位于碳化硅电池的向光面、背光面的封装胶膜、盖板或背板等。该光伏组件中的碳化硅电池可以参照前述碳化硅电池实施例中的相关记载，且能达到相同或相似的有益效果，为了避免重复，此处不再赘述。
下面列举几种具体的实施例，进一步解释本公开。
实施例1
参照图3所示，本实施例中，第一传输层1为n型硅衬底，掺杂浓度大于或等于1×10 15cm -3，更优地，可以为1×10 17cm -3-1×10 19cm -3。硅衬底为碳化硅吸收层2的外延衬底，同时需要起到传导碳化硅吸收层2光激发电子载流子的作用。硅衬底背光面存在下功能层102及底电极5。底电极5为金属或合金材料，底电极5可以覆盖硅衬底的全部或部分背光面。下功能层102为一层或多层结构，可以起到调节功函数、钝化界面缺陷、传导载流子等功能，可以包含钙、氟化锂、氟化镁等功函数调节材料，也可以包含氧化铝、氧化 硅、氮化硅等钝化材料，可以包含氧化锌(及其掺杂材料)、氧化锡(及其掺杂材料)等导电材料。
第一传输层1的向光面设置有碳化硅吸收层2，碳化硅吸收层2为p型碳化硅，单晶或多晶，掺杂浓度不限，厚度0.5-100um。碳化硅吸收层2采用化学气相沉积的方法制备，一种可行的方案为采用硅烷作为硅源，采用丙烷作为碳源，采用三甲基铝(Al(CH 3) 3)作为导电性掺杂元，采用三甲基硼(B(CH 3) 3)作为中间带掺杂源(或只采用硼掺杂，硼元素具备导电性掺杂和中间带掺杂的双重作用)，进行外延生长。外延生长后可以通过热处理进一步降低材料内部及界面残余应力。
为便于获得结晶质量较好的碳化硅吸收层2，在第一传输层1与碳化硅吸收层2之间可以设置修饰层101，此处的修饰层101可以为晶格适配层，主要起到调节界面晶格失配的作用，便于立方相碳化硅吸收层2生长并获得高质量结晶薄膜。修饰层101可以为n型或p型。修饰层101可以为六方相碳化硅层、非晶碳化硅层或硅材料层或硅碳化合物层，以阶梯形式、波浪形式或其他形状设置。修饰层101可以为偏轴(off-axis)表面，可以刻蚀或不刻蚀；可以为硅锗化合物。
碳化硅吸收层2中朝向向光面的区域可以存在重掺杂p型子层，掺杂浓度大于碳化硅吸收层2层的中间位置。碳化硅吸收层2的向光面设置第二传输层3，用于收集并传导光激发空穴载流子。第二传输层3可以是一层或多层结构。第二传输层3可以为p型宽带隙半导材料，如镍的氧化物或铜的氧化物。第二传输层3也可以采用高功函数n型宽带隙半导体材料，如氧化钼、氧化钨、氧化钒等。第二传输层3也可以采用高功函数金属，如镍、银、金等及其合金材料。第二传输层3也可以为重掺杂p型碳化硅材料。
第二传输层3与碳化硅吸收层2之间可以设置上表面钝化层301，起到钝化界面缺陷的作用。上表面钝化层301可以为氧化硅、氧化铝、氮化硅等。
第二传输层3向光面设置上表面减反射层302，为一层或多层结构，起到 减少表面反射的作用。为了进一步降低表面反射，碳化硅吸收层2的向光面可以采用化学腐蚀或粒子刻蚀的方法制作出减反射结构。或在碳化硅吸收层2的向光面设置纳米陷光结构、等离子激元陷光结构或其他任意陷光结构。
器件上表面设置顶电极4，与第二传输层3电性接触，起到对外输出电能的作用。顶电极4可以为平行或交叉的网格状栅线结构。
实施例2
参照图4所示，图4中修饰层101可以为缓冲层，缓冲界面能带能级差。图4中其余部分可以和实施例1中的部分对应相同。通过在硅衬底和碳化硅吸收层2之间设置缓冲层，可以极大的降低硅衬底和碳化硅吸收层2之间的带间复合。
实施例3
参照图2所示，第一传输层1为硅衬底，采用p型掺杂，掺杂浓度大于或等于1×10 15cm -3，更优地，可以为1×10 17cm -3-1×10 19cm -3。硅衬底为碳化硅吸收层2的外延衬底，同时需要起到传导吸收层光激发空穴载流子的作用。
硅衬底的背光面存在下功能层102及底电极5，底电极5为金属或合金材料，可以覆盖硅衬底的全部或部分背光面。下功能层102为一层或多层结构，可以起到调节功函数、钝化界面缺陷、传导载流子等功能，可以包含钙、氟化锂、氟化镁等功函数调节材料，可以包含氧化铝、氧化硅、氮化硅等钝化材料，可以包含氧化锌(及其掺杂材料)、氧化锡(及其掺杂材料)等导电材料。
第一传输层1的向光面设置有碳化硅吸收层2，碳化硅吸收层2为单晶或多晶，掺杂浓度不限，厚度1-100um。碳化硅吸收层2包含两种掺杂类型，其自身可以完成光生载流子的分离，硅衬底与第二传输层3仅起到选择性接触与传输载流子的作用。碳化硅吸收层2中虚线下方的第一碳化硅子层与硅衬底接触，第一碳化硅子层为p型掺杂，采用外延生长。可以采用二氯氢硅作为硅源，采用乙炔作为碳源，采用硼元素作为掺杂元素，采用氢气和氯化氢 作为载气和辅助线气体，进行化学气相外延生长。随后更改掺杂元素，采用磷元素作为掺杂元素，获得p型层上的n型层。
实施例3中其余设置参考上述实施例1。此外，还可以采用实施例2中缓冲层的方案，缓冲层的掺杂类型与碳化硅吸收层2不同，且缓冲层与硅衬底采用相同的掺杂类型。缓冲层既起到能带缓冲的作用，同时在缓冲层与碳化硅吸收层2界面选择载流子。
图5示出了本公开实施例中的第五种碳化硅电池的结构示意图。参照图5所示，该碳化硅电池包括：硅基底1’、位于硅基底1’的向光面上的碳化硅吸收层2’。可选的，碳化硅吸收层2’以外延的形式形成在硅基底1’上。硅基底1’提供碳化硅吸收层2’的生长基础，且提供机械支撑。碳化硅吸收层2’包含具有中间带的碳化硅材料，在外延工艺中通过掺杂的形式，形成上述中间带。具有中间带的碳化硅材料在碳化硅吸收层2’中所占的比例不作具体限定。例如，全部的碳化硅吸收层2’可以均为具有中间带的碳化硅材料。具有中间带的碳化硅材料，由于中间带的存在可以吸收更多的光，因此，具有中间带的碳化硅材料可以主要起到的光吸收作用。在低成本的硅基底1’的向光面上制作碳化硅吸收层2’，相对于现有技术中生长碳化硅晶棒再切割加工而言，简化了碳化硅电池的生产工艺，具备较高的生产效率，使得碳化硅电池的量产变得容易。
碳化硅吸收层2’中的导电性掺杂采用采用III族元素(p型掺杂)或V族元素(n型掺杂)，常用导电性掺杂元素包括硼、铝、镓、铟、氮、磷、砷等。碳化硅吸收层2中的导电性掺杂的掺杂浓度为1×10 13cm -3-1×10 19cm -3。
碳化硅吸收层2’中具有中间带的碳化硅材料的中间带掺杂可以采用过渡金属元素、III族元素、V族元素或VI族元素，如钴、硼、氮、氧、钪、钛、钒、锰、铁、钴、镍、铜、锌等，掺杂浓度范围为1×10 12cm -3-9×10 20cm -3。
碳化硅吸收层2中具有中间带掺杂功能的元素是否具有导电性掺杂功能不作具体限定。例如，在碳化硅吸收层2’中具有中间带的碳化硅材料具有导电性掺杂的情况下，导电性掺杂和中间带掺杂均可以采用硼元素进行。
可选地，碳化硅吸收层2’可以为立方结构晶体，碳化硅吸收层2’可以为单晶或多晶。参照图5所示，碳化硅吸收层2’的厚度为h1，100um≥h1≥0.5um。碳化硅吸收层2’的向光面为平面或绒面。碳化硅吸收层2的向光面还可以具备纳米陷光结构、等离子激元结构等，以增加陷光效果。
硅基底1’具有多个第一导电孔，第一导电孔数量和尺寸不作具体限定。第一导电电极62’形成于第一导电孔内，第一导电电极62’用于传输碳化硅吸收层2’产生的第一类载流子。该第一类载流子为空穴载流子或电子载流子。第一导电电极62’的数量不作具体限定，第一导电电极62’将第一类载流子传导至第一电极5’，以向外传输电能。第一电极5’的材料和结构均不作具体限定。例如，在第一电极位于碳化硅吸收层2’的背光面的情况下，第一电极5’可以为全背电极。图5结构中，第二载流子在第二电极4’导出。
图5所示的硅基底1’为本征或轻掺杂的硅，即，图5中硅基底1’不用于选择传输载流子，可以降低串联电阻。
图6示出了本公开实施例中的第六种碳化硅电池的结构示意图。可选地，参照图5或图6所示，第一导电电极62’与碳化硅吸收层2’之间形成第一接触层61’，第一接触层61’选择传输第一类载流子。第一类载流子可以为电子载流子或空穴载流子。
可选的，参照图5或图6所示，第一接触层61’在硅基底1’上的投影面积小于硅基底1’的面积，进而硅基底1’的向光面除了第一接触层61’之外还有裸露的区域，硅基底1’的向光面除了第一接触层61’之外的裸露的区域可以作为碳化硅吸收层2’的生长基础。需要说明的是，第一接触层61’的投影面积具体比硅基底1’的面积小多少不作具体限定，以满足载流子传输以及碳化硅吸收层2’的生长为约束。
图7示出了本公开实施例中的第七种碳化硅电池的结构示意图。参照图6、图7所示，可选地，硅基底1’还包括多个第二导电孔，第二导电孔数量和尺寸不作具体限定。第二导电电极64’形成于第二导电孔内。
参照图6、图7所示，可选地，第二导电电极64’与碳化硅吸收层2’之间形成第二接触层3’。第二接触层3’选择传输第二类载流子。
参照图6、图7所示，第一接触层61’与第二接触层3’在硅基底1’上的投影面积和，小于硅基底1’的面积，进而硅基底1’的向光面除了第一接触层61’、第二接触层3’之外还有裸露的区域，硅基底1’的向光面除了第一接触层61’、第二接触层3’之外的裸露的区域可以作为碳化硅吸收层2’的生长基础。需要说明的是，第一接触层61’、第二接触层3’在硅基底1’上的投影面积和具体比硅基底1’的面积小多少不作具体限定，以满足载流子传输以及碳化硅吸收层2’的生长为约束。
图6、图7所示的碳化硅电池向光面没有电极遮挡，位于背光面的第一电极5’和第二电极4’将两种载流子导出，具体地，第一电极5’可以导出第一导电电极62’上的载流子，第二电极4’可以导出第二导电电极64’上的载流子，可以提升发电效率。
图6、图7所示的碳化硅电池，第一电极5’和第二电极4’，两者之间可以设置有电学隔离结构或空隙7’，以避免漏电。同样的，第一接触层61’、第二接触层3’之间的可以设置有电学隔离结构或空隙7’，以避免漏电。
可选地，图6、图7所示的碳化硅电池中，碳化硅吸收层2’的导电性掺杂情况不作限定。例如，碳化硅吸收层2’可以具有单一导电掺杂，如，仅为p型掺杂或仅为n型掺杂或者，或者，碳化硅吸收层2’可以为本征的。图6、图7所示的碳化硅电池中，主要在第一接触层61’的界面处、和/或，第二接触层3’的界面处进行载流子分离。可选的，参照图5-图7所示，第一接触层61’或第二接触层3’内嵌于硅基底1的表面。如，图5、图6中，第一接触层61’位于硅基底1’的向光面。而图7中，第一接触层61’、第二接触层3’埋设或内嵌于硅基底1’中，并从硅基底1’的向光面露出，或与硅基底1’的向光面平齐分布。第一接触层61’或第二接触层3’设置形式多样。
图6和图7的主要共同点在于：碳化硅电池向光面没有电极遮挡，硅基 底1’的向光面裸露的区域可以作为碳化硅吸收层2’的生长基础，且提供机械支撑。同时，碳化硅吸收层2’的导电掺杂不作具体限定。图5、图6、图7中硅基底均可以不用于传输载流子。
图5、图6、图7中，由于硅基底1’可以不用传输载流子，因此，图5、图6、图7中的硅基底1’为本征或轻掺杂的硅。
参照图5所示，可选地，碳化硅电池还包括第二接触层3’，该第二接触层3’位于碳化硅吸收层2’的向光面上，用于选择传输第二类载流子。第二接触层3’位于碳化硅吸收层2’的向光面，第二接触层3’同时作为窗口层，在可见光波段具备较高的平均透过率，以保证器件入射光。第一接触层61’和第二接触层3’的掺杂类型、掺杂浓度等，需要和传输的载流子类型进行匹配。
图5所示的碳化硅电池还包括与第二接触层3’电性接触的第二电极4’，第二电极4’用于将第二接触层3’上的载流子导出，向外传输电能。第二电极4’的材料和结构均不作具体限定。例如，第二电极4’可以为平行或交叉的网格状栅线结构。
可选地，碳化硅吸收层2’设置为单层，该单层具有单一的导电掺杂类型，就是说碳化硅吸收层2’的导电性掺杂为n型或p型中的一种。此种情况下，第一接触层61’、第二接触层3’的掺杂类型与碳化硅吸收层2’的导电性掺杂类型相同或不同。如，第二接触层3’的掺杂类型与碳化硅吸收层2’的导电性掺杂类型相同，碳化硅吸收层2’与第二接触层3’可以形成高低结，两者类型相反，碳化硅吸收层2’与第二接触层3’可以形成pn结。上述pn结可以用于分离载流子。和/或，碳化硅吸收层2’与第一接触层61’可以形成pn结用于分离载流子。例如，碳化硅吸收层2’的导电性掺杂为n型掺杂，第一接触层61’为p型掺杂，两者可以形成pn结。或者，碳化硅吸收层2’的导电性掺杂为低浓度的n型掺杂，第一接触层61’为高浓度的n型掺杂，两者可以形成高低结。
或者，可选地，参照图5所示，碳化硅吸收层2’设置为两个子层，分别为：在远离硅基底1’的方向上层叠的第一碳化硅子层、第二碳化硅子层。如， 图5中，碳化硅吸收层2’中，位于虚线下方的可以为第一碳化硅子层，位于虚线上方的可以为第二碳化硅子层。第一碳化硅子层、第二碳化硅子层分别具有不同的导电掺杂类型，进而第一碳化硅子层、第二碳化硅子层形成pn结用于分离载流子。此种情况下，第一接触层61’、第二接触层3’仅用于传输碳化硅吸收层2’产生的电子载流子或空穴型载流子。第一接触层61’与靠近第一接触层61’的第一碳化硅子层的导电性掺杂的类型相同。第二接触层3’与靠近第二接触层3’的第二碳化硅子层的导电性掺杂的类型相同。例如，图5中，碳化硅吸收层2’中，位于虚线下方的第一碳化硅子层的导电性掺杂为n型，则，第一接触层61’可以为n型掺杂，用于传输电子载流子。位于虚线上方的第二碳化硅子层的导电性掺杂为p型，则，第二接触层3’为p型掺杂，用于传输空穴载流子。
碳化硅吸收层2’设置为两个子层的情况下，碳化硅吸收层2’自身完成了分离载流子，避免了硅基底1’与碳化硅吸收层2’较多的界面缺陷导致的载流子分离困难以及复合严重的问题，提升了载流子的分离与传导效率，提升了器件效率。
可选地，在第二接触层3’传输空穴型载流子的情况下，第二接触层3’的材料选自低功函数p型宽带隙半导材料、高功函数n型宽带隙半导体材料、高功函数金属、重掺杂p型碳化硅材料中的一种，进而使得第二接触层3’具有较好的传输空穴型载流子的作用。或者，在第一接触层61’传输空穴型载流子的情况下，第一接触层61’的材料选自低功函数p型宽带隙半导材料、高功函数n型宽带隙半导体材料、高功函数金属、重掺杂p型碳化硅材料中的一种，进而使得第一接触层61’具有较好的传输空穴型载流子的作用。
可选地，低功函数p型宽带隙半导材料选自镍的氧化物或铜的氧化物。高功函数n型宽带隙半导体材料选自氧化钼、氧化钨、氧化钒中的至少一种。高功函数金属选自镍、银、金中的至少一种。
在第二接触层3’传输电子型载流子的情况下，第二接触层3’的材料选自 n型宽带隙半导体材料或低功函数金属，使得第二接触层3’具有较好的传输电子型载流子的作用。或者，在第一接触层61’传输电子型载流子的情况下，第一接触层61’的材料选自n型宽带隙半导体材料或低功函数金属，使得第一接触层61’具有较好的传输电子型载流子的作用。
可选地，n型宽带隙半导体材料选自氧化锌和/或氧化锡。低功函数金属选自钙、镁、铝中的至少一种。
可选地，碳化硅吸收层2’的向光面还可以设置有上表面减反射层302’。上表面减反射层302’为一层或多层结构，起到减少表面反射的作用。为了进一步降低表面反射，碳化硅吸收层2’的向光面可以采用化学腐蚀或粒子刻蚀的方法制作出减反射结构，或在向光面设置纳米陷光结构、等离子激元陷光结构或其他任意陷光结构。
碳化硅吸收层2’的向光面还可以设置有上表面钝化层301’，起到钝化界面缺陷的作用。上表面钝化层301’的材料可以选自氧化硅、氧化铝、氮化硅等。
可选地，硅基底1’的向光面为平面或绒面，利于碳化硅吸收层2’的生长或沉积。硅基底1’的厚度不限，晶格取向也不做具体限定。
可选地，参照图5-图7，碳化硅电池还包括位于硅基底1’背光面的下功能层102’，下功能层102’包括功函数调节层、钝化层、载流子传导层中的至少一种。功函数调节层起到调节功函数，利于载流子的传输，降低金属-硅接触电阻。钝化层起到界面缺陷钝化的作用。载流子传导层起到补充传输载流子的作用。功函数调节层的材料可以选自钙、氟化锂、氟化镁等功函数调节材料。钝化层的材料可以选自氧化铝、氧化硅、氮化硅等钝化材料。载流子传导层的材料可以选自氧化锌(及其掺杂材料)、氧化锡(及其掺杂材料)等导电材料。
和/或，可选地，参照图5-图7，碳化硅电池还包括位于硅基底1’和碳化硅吸收层2’之间的修饰层101’，修饰层101’包括晶格适配层、缓冲层、种子 层、钝化层中的至少一种，以获得结晶质量较好的碳化硅吸收层2’。修饰层101’位于硅基底1’未被第一接触层61’或第二接触层3’覆盖的部分。修饰层101’主要起到缓冲界面晶格失配、能级匹配等作用，便于立方相碳化硅吸收层2’生长并获得高质量结晶薄膜。晶格适配层主要用于调节界面晶格失配。可选的，晶格适配层的材料可以选自六方相碳化硅层、非晶碳化硅层、硅层或硅碳化合物层中的至少一种。修饰层101’可以以阶梯形式、波浪形式或其他形状设置。修饰层101’可以为偏轴(off-axis)表面，可以刻蚀或不刻蚀。修饰层101’的材料可以为硅锗化合物。
缓冲层主要起到界面能级匹配的作用。可选地，缓冲层材料选自非晶碳化硅、纳米晶碳化硅、微晶碳化硅、晶体结构的碳化硅、非晶硅、纳米晶硅、微晶硅、晶体结构的硅。缓冲层存在两种类型，窄带隙材料和宽带隙材料，窄带隙材料的带隙小于立方碳化硅吸收层2’的带隙，宽带隙材料的带隙大于立方碳化硅吸收层2’的带隙。窄带隙材料需满足带隙宽度1.3-1.8eV，窄带隙材料可以为非晶硅或非晶碳化硅、纳米晶硅或纳米晶碳化硅、微晶硅或微晶碳化硅、或硅碳化合物。宽带隙材料需满足带隙宽度大于或等于碳化硅吸收层2’的带隙宽度。宽带隙材料可以为掺杂的碳化硅材料，可以为非晶碳化硅或晶体碳化硅，可以为立方晶相或其他晶相(如六方)碳化硅。
上述材料的缓冲层能够满足载流子传导缓冲的要求，同时缓冲层可以屏蔽另一种载流子，即起到选择性接触的功能。缓冲层厚度不限定。缓冲层掺杂类型与碳化硅吸收层2’相同。通过在硅基底1’和碳化硅吸收层2’之间设置缓冲层，可以极大的降低硅基底1’和碳化硅吸收层2’之间的带间复合。
图8示出了本公开实施例中的第八种碳化硅电池的结构示意图。参照图8所示，碳化硅电池包括：硅基底1’，硅基底1’的向光面上的碳化硅吸收层2’。碳化硅吸收层2’包含具有中间带的碳化硅材料，图8中的碳化硅吸收层2’可以参照前述图6和图7中关于碳化硅吸收层2’的记载，且能达到相同或类似的有益效果，为了避免重复，此处不再赘述。
硅基底1’具有多个第一导电孔，第一导电电极62’形成于第一导电孔内，第一导电电极62’用于传输碳化硅吸收层2’产生的第一类载流子。第一导电孔，第一导电电极62’参照前述图5-图7中关于第一导电孔，第一导电电极62’的对应记载，且能达到相同或类似的有益效果，为了避免重复，此处不再赘述。
图8中，硅基底1’用于选择传输第二类载流子，即，相对于图5-图7而言，硅基底1’在起到图5-图7中的对应作用外，还选择传输第二类载流子。即图8所示的硅基底1’和第一导电电极62分别传输一种载流子。此种情况下，硅基底1’的掺杂浓度大于或等于1×10 15cm -3，硅基底1’导电性能较好。硅带隙天然比碳化硅的带隙窄，使得多子能级可以自然匹配。硅基底1’的掺杂浓度大于或等于1×10 15cm -3的情况下，硅基底1’的少子能级需要与碳化硅吸收层2’进行匹配以屏蔽少子。例如，当硅基底1’为n型，则硅基底1’价带顶能级需小于或等于碳化硅吸收层2’价带顶能级，以屏蔽空穴。当硅基底1’为p型，则硅基底1’导带底能级需大于或等于碳化硅吸收层2’导带底能级，以屏蔽电子。如，硅基底1’传输空穴载流子，则第一导电电极62’传输电子载流子。
图8所示的碳化硅电池向光面没有电极遮挡，第一电极5’和第二电极4’分别将两种载流子导出，具体地，第一电极5’可以导出第一导电电极62’上的载流子，第二电极4’可以导出硅基底1’上的载流子，可以提升发电效率。第一电极5’和第二电极4’可以设置有电学隔离结构或空隙7’，以避免漏电。图8中，第一导电电极62’与硅基底1’设置有电学隔离结构或空隙，以避免漏电。
图8所示的碳化硅电池中，碳化硅吸收层2’的导电性掺杂情况不作限定。例如，碳化硅吸收层2’可以具有单一导电掺杂，如，仅为p型掺杂或仅为n型掺杂或者，或者，碳化硅吸收层2’可以为本征的。图8所示的碳化硅电池中，主要在第一接触层61’的界面处、和/或，硅基底1’的界面处进行载流子分离。
本公开实施例还提供一种碳化硅电池的生产方法，具体地，先准备硅基底。具体包括硅基底的处理，修饰层的制作等。接着制作碳化硅吸收层2’，然后制作其余结构，形成完整器件。该碳化硅电池的生产方法中的碳化硅电池可以参照前述碳化硅电池实施例中的相关记载，且能达到相同或相似的有益效果，为了避免重复，此处不再赘述。
本公开实施例还提供一种光伏组件，该光伏组件包括任一前述的碳化硅电池。该光伏组件还可以包括位于碳化硅电池的向光面、背光面的封装胶膜、盖板或背板等。该光伏组件中的碳化硅电池可以参照前述碳化硅电池实施例中的相关记载，且能达到相同或相似的有益效果，为了避免重复，此处不再赘述。
下面列举几种具体的实施例，进一步解释本公开。
实施例4
参照图5所示，本实施例中，硅基底1’的向光面上设置有第一接触层61’，硅基底1’上设置第一导电孔，第一导电孔中设置有第一导电电极62’。碳化硅吸收层2’下表面与第一接触层61’电性接触，第一接触层61’与第一导电电极62’电性接触，以辅助碳化硅吸收层2’载流子收集。第一接触层61’在硅基底1’上的投影面积小于硅基底1’的面积，以硅基底1’向光面除了第一接触层61’的区域为生长基础，采用外延生长的方式生长碳化硅吸收层2’。一种可行的实施方式为，在碳化硅吸收层2’沉积前，在硅基底1’上设置第一导电孔、第一导电电极62’以及第一接触层61’。第一导电孔可为圆孔或方孔或不规则孔洞，孔内填充金属或合金电极或导电氧化物等高电导率材料，形成第一导电电极62’，第一导电电极62’的金属材料与第一电极5’的材料可以相同或不同。在硅基底1’的向光面设置第一接触层61’，第一接触层61’围绕第一导电电极62’为中心对称栅线结构，或平面结构，但需暴露部分硅基底1’向光面或部分修饰层101’，以提供碳化硅吸收层2’外延生长起始位置。第一接触层61’可以为选择性接触材料，与第二接触层3’载流子选择性相反。第一接触层61’ 的材料可以为金属材料或合金材料，第一接触层61’的材料可以与第一导电电极62’、第一电极5’的材料相同或不同。
碳化硅吸收层2’为单晶或多晶，掺杂浓度不限，厚度0.5-100um。碳化硅吸收层2’需包含p型掺杂子层与n型掺杂子层，其自身可以完成光生载流子的分离，第一接触层61’与第二接触层3’仅起到选择性接触与传输载流子的作用。碳化硅吸收层2’中虚线下方的第一碳化硅子层与第一接触层61’接触，第一碳化硅子层为p型掺杂，采用外延生长，第一接触层61’为空穴选择性接触材料。碳化硅吸收层2’中虚线上方的第二碳化硅子层为n型掺杂，第二接触层3’为电子选择性接触材料。
硅基底1’的背光面存在下功能层102’及第一电极5’。第一电极5’为金属或合金材料，第一电极5’可以覆盖硅基底1的全部或部分背光面。下功能层102’为一层或多层结构，可以起到调节功函数、钝化界面缺陷、传导载流子等功能，可以包含钙、氟化锂、氟化镁等功函数调节材料，也可以包含氧化铝、氧化硅、氮化硅等钝化材料，可以包含氧化锌(及其掺杂材料)、氧化锡(及其掺杂材料)等导电材料。
为便于获得结晶质量较好的碳化硅吸收层2’，在硅基底1’与碳化硅吸收层2’之间可以设置修饰层101’，此处的修饰层101’可以为晶格适配层，主要起到调节界面晶格失配的作用，便于立方相碳化硅吸收层2’生长并获得高质量结晶薄膜。修饰层101’可以掺杂或者不掺杂，在实施例4中，修饰层101’可以不掺杂，仅起到外延起点的作用。修饰层101’可以为六方相碳化硅层、非晶碳化硅层或硅材料层或硅碳化合物层，以阶梯形式、波浪形式或其他形状设置。修饰层101’可以为偏轴(off-axis)表面，可以刻蚀或不刻蚀。修饰层101’可以为硅锗化合物。
第二接触层3’与碳化硅吸收层2’之间可以设置上表面钝化层301’，起到钝化界面缺陷的作用。上表面钝化层301’可以为氧化硅、氧化铝、氮化硅等。
第二接触层3’向光面设置上表面减反射层302’，为一层或多层结构，起 到减少表面反射的作用。为了进一步降低表面反射，碳化硅吸收层2’的向光面可以采用化学腐蚀或粒子刻蚀的方法制作出减反射结构。或在碳化硅吸收层2’的向光面设置纳米陷光结构、等离子激元陷光结构或其他任意陷光结构。
器件上表面设置第二电极4’，与第二接触层3’电性接触，起到对外输出电能的作用。第二电极4’可以为平行或交叉的网格状栅线结构。
实施例4中，硅基底1’主要起到作为碳化硅吸收层2’生长衬底的作用，不选择传输载流子，硅基底1’的掺杂类型或掺杂浓度均不作限定。即，硅基底1’为本征硅的或轻掺杂的硅。
实施例5
参照图6所示，实施例5与实施例4的区别在于，将第二接触层3’从碳化硅吸收层2’的向光面移至硅基底1的背光面，第一接触层61’和第二接触层3’分别位于硅基底1’的背光面的不同区域。第一接触层61’和第二接触层3’之间设置有具有电学隔离结构或空隙7’，硅基底1’上还设置有与第二接触层3’对应的第二导电孔以及第二导电电极64’。第一接触层61’的和第二接触层3’在硅基底1’上的投影面积和，小于硅基底1’的面积。硅基底1的向光面中除了第一接触层61’和第二接触层3’的区域提供碳化硅吸收层2’外延生长起始位置。
实施例5中，碳化硅吸收层2’采用选区外延的方式设置。实施例5中，碳化硅吸收层2’的导电性掺杂情况不作限定。实施例2中，硅基底1’也主要起到作为碳化硅吸收层2’生长衬底的作用，不选择传输载流子，硅基底1’的掺杂类型或掺杂浓度均不作限定。即，硅基底1’为本征硅的或轻掺杂的硅。
最后应说明的是：以上实施例仅用以说明本公开的技术方案，而非对其限制；尽管参照前述实施例对本公开进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本公开各实施例技术方案的精神和范围。

Claims (25)

  1. 一种碳化硅电池，其特征在于，包括：第一传输层、第一传输层向光面上的碳化硅吸收层；
    所述第一传输层为硅衬底，所述碳化硅吸收层包含具有中间带的碳化硅材料；
    所述第一传输层传输碳化硅吸收层产生的电子或空穴型载流子。
  2. 根据权利要求1所述的碳化硅电池，其特征在于，所述碳化硅吸收层设置为单层，所述单层具有单一的导电掺杂类型；
    或，
    所述碳化硅吸收层设置为两个子层，分别为：在远离所述第一传输层的方向上层叠的第一碳化硅子层、第二碳化硅子层，两个碳化硅子层具有不同的导电掺杂类型。
  3. 根据权利要求2所述的碳化硅电池，其特征在于，所述碳化硅吸收层为单层的情况下，所述硅衬底的掺杂浓度大于或等于1×10 15cm -3。
  4. 根据权利要求2所述的碳化硅电池，其特征在于，所述碳化硅吸收层设置为两个子层的情况下，所述硅衬底的掺杂浓度为1×10 17cm -3-1×10 19cm -3。
  5. 根据权利要求1-4中任一所述的碳化硅电池，其特征在于，所述碳化硅电池还包括第二传输层；所述碳化硅吸收层位于所述第一传输层和所述第二传输层之间，所述第一传输层、所述第二传输层分别传输电子或空穴型载流子。
  6. 根据权利要求1-4中任一所述的碳化硅电池，其特征在于，所述碳化硅吸收层以外延的方式形成于所述硅衬底上，且在外延工艺中通过掺杂的方式形成所述中间带。
  7. 根据权利要求1-4中任一所述的碳化硅电池，其特征在于，所述碳化硅吸收层的厚度为h1，100um≥h1≥0.5um；所述碳化硅吸收层的向光面为平面或绒面。
  8. 根据权利要求5所述的碳化硅电池，其特征在于，在所述第二传输层传输空穴型载流子的情况下，所述第二传输层材料选自低功函数p型宽带隙半导材料、高功函数n型宽带隙半导体材料、高功函数金属、重掺杂p型碳化硅材料中的一种；
    在所述第二传输层传输电子型载流子的情况下，所述第二传输层选自n型宽带隙半导体材料或低功函数金属。
  9. 根据权利要求8所述的碳化硅电池，其特征在于，所述低功函数p型宽带隙半导材料选自镍的氧化物或铜的氧化物，所述高功函数n型宽带隙半导体材料选自氧化钼、氧化钨、氧化钒中的至少一种；所述高功函数金属选自镍、银、金中的至少一种；
    所述n型宽带隙半导体材料选自氧化锌和/或氧化锡；所述低功函数金属选自钙、镁、铝中的至少一种。
  10. 根据权利要求1-4中任一所述的碳化硅电池，其特征在于，所述碳化硅电池还包括位于所述硅衬底背光面的下功能层，所述下功能层包括功函数调节层、钝化层、载流子传导层中的至少一种；
    和/或，所述碳化硅电池还包括位于所述硅衬底和所述碳化硅吸收层之间的修饰层，所述修饰层包括晶格适配层、缓冲层、种子层、钝化层中的至少一种。
  11. 根据权利要求10所述的碳化硅电池，其特征在于，所述晶格适配层的材料选自六方相碳化硅层、非晶碳化硅层、硅层、硅碳化合物层、硅锗化合层中的至少一种。
  12. 根据权利要求10所述的碳化硅电池，其特征在于，所述缓冲层材料选自非晶碳化硅、纳米晶碳化硅、微晶碳化硅、晶体结构的碳化硅、非晶硅、纳米晶硅、微晶硅、晶体结构的硅。
  13. 一种碳化硅电池，其特征在于，包括：硅基底以及所述硅基底的向光面上的碳化硅吸收层；
    所述硅基底具有多个第一导电孔，第一导电电极形成于所述第一导电孔内，所述第一导电电极用于传输碳化硅吸收层产生的第一类载流子；
    所述硅基底为本征或轻掺杂的硅；
    所述碳化硅吸收层包含具有中间带的碳化硅材料。
  14. 根据权利要求13所述的碳化硅电池，其特征在于，所述第一导电电极与所述碳化硅吸收层之间形成第一接触层，所述第一接触层用于选择传输第一类载流子；
    所述第一接触层在所述硅基底上的投影面积小于所述硅基底的面积。
  15. 根据权利要求14所述的碳化硅电池，其特征在于，所述硅基底还包括多个第二导电孔，第二导电电极形成于所述第二导电孔内；
    所述第二导电电极与所述碳化硅吸收层之间形成第二接触层；
    所述第二接触层用于选择传输第二类载流子；
    所述第一接触层与所述第二接触层在所述硅基底上的投影面积和，小于所述硅基底的面积。
  16. 根据权利要求14所述的碳化硅电池，其特征在于，所述碳化硅电池还包括第二接触层，所述第二接触层位于所述碳化硅吸收层的向光面上，用于选择传输第二类载流子。
  17. 根据权利要求16所述的碳化硅电池，其特征在于，所述碳化硅吸收层设置为单层，所述单层具有单一的导电掺杂类型；
    或，
    所述碳化硅吸收层设置为两个子层，分别为：在远离硅基底方向上层叠的第一碳化硅子层、第二碳化硅子层，两个碳化硅子层具有不同的导电掺杂类型。
  18. 根据权利要求13-17中任一项所述的碳化硅电池，其特征在于，所述硅基底的向光面为平面或绒面。
  19. 根据权利要求13-17中任一项所述的碳化硅电池，其特征在于，所述 碳化硅吸收层的厚度为h1，100um≥h1≥0.5um；所述碳化硅吸收层的向光面为平面或绒面。
  20. 根据权利要求14或15所述的碳化硅电池，其特征在于，所述第一接触层、第二接触层内嵌于所述硅基底表面。
  21. 根据权利要求14-17中任一项所述的碳化硅电池，其特征在于，在所述第一接触层选择传输空穴载流子的情况下，所述第一接触层的材料选自低功函数p型宽带隙半导材料、高功函数n型宽带隙半导体材料、高功函数金属、重掺杂p型碳化硅材料中的一种；
    在所述第一接触层选择传输电子载流子的情况下，所述第一接触层的材料选自n型宽带隙半导体材料或低功函数金属。
  22. 根据权利要求21所述的碳化硅电池，其特征在于，所述低功函数p型宽带隙半导材料选自镍的氧化物或铜的氧化物，所述高功函数n型宽带隙半导体材料选自氧化钼、氧化钨、氧化钒中的至少一种；所述高功函数金属选自镍、银、金中的至少一种；
    所述n型宽带隙半导体材料选自氧化锌和/或氧化锡；所述低功函数金属选自钙、镁、铝中的至少一种。
  23. 根据权利要求14-17中任一项所述的碳化硅电池，其特征在于，所述碳化硅电池还包括位于所述硅基底和所述碳化硅吸收层之间的修饰层，所述修饰层包括晶格适配层、缓冲层、种子层中的至少一种，所述修饰层位于所述硅基底未被第一接触层或第二接触层覆盖的部分。
  24. 根据权利要求23所述的碳化硅电池，其特征在于，所述晶格适配层的材料选自六方相碳化硅层、非晶碳化硅层、硅层、硅碳化合物层、硅锗化合层中的至少一种；
    所述缓冲层选自非晶碳化硅、纳米晶碳化硅、微晶碳化硅、晶体结构的碳化硅、非晶硅、纳米晶硅、微晶硅、晶体结构的硅。
  25. 一种碳化硅电池，其特征在于，包括：硅基底，所述硅基底的向光 面上的碳化硅吸收层；
    所述硅基底具有多个第一导电孔，第一导电电极形成于所述第一导电孔内，所述第一导电电极用于传输碳化硅吸收层产生的第一类载流子；所述硅基底用于选择传输第二类载流子；
    所述碳化硅吸收层包含具有中间带的碳化硅材料。
PCT/CN2021/136126 2020-10-26 2021-12-07 碳化硅电池 WO2022089664A1 (zh)

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