WO2022083302A1 - 一种显示基板及其驱动方法、显示装置 - Google Patents

一种显示基板及其驱动方法、显示装置 Download PDF

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Publication number
WO2022083302A1
WO2022083302A1 PCT/CN2021/115885 CN2021115885W WO2022083302A1 WO 2022083302 A1 WO2022083302 A1 WO 2022083302A1 CN 2021115885 W CN2021115885 W CN 2021115885W WO 2022083302 A1 WO2022083302 A1 WO 2022083302A1
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Prior art keywords
light
electrically connected
pixel
emitting
display substrate
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PCT/CN2021/115885
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English (en)
French (fr)
Inventor
张粲
丛宁
玄明花
陈小川
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京东方科技集团股份有限公司
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Priority to US17/787,681 priority Critical patent/US11749194B2/en
Publication of WO2022083302A1 publication Critical patent/WO2022083302A1/zh

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    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
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    • H10K59/121Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
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Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a display substrate, a driving method thereof, and a display device.
  • OLEDs Organic light emitting diodes
  • a base substrate having a plurality of independently arranged pixel islands, the pixel islands including a plurality of sub-pixels distributed in an array;
  • a pixel circuit located in the sub-pixel, the pixel circuit includes a driving transistor and a light-emitting device, a first electrode of the driving transistor is electrically connected to a first power supply terminal, and a second electrode of the driving transistor is connected to the light-emitting device The anode of the light-emitting device is electrically connected, and the cathode of the light-emitting device is electrically connected to the second power supply terminal;
  • a plurality of light-emitting control circuits are located at the gaps between the adjacent pixel islands, and the light-emitting control circuits are electrically connected between the first power supply terminal and the first electrode of the driving transistor.
  • the first electrodes of all the driving transistors in at least one of the pixel islands are electrically connected to the same light-emitting control circuit, and the driving transistors in different pixel islands are electrically connected to the first electrodes.
  • the light-emitting control circuits electrically connected to the first poles are different.
  • the light-emitting control circuit includes a first switch transistor, the gate of the first switch transistor is electrically connected to the light-emitting control terminal, and the first switch transistor is The first electrode is electrically connected to the first power supply terminal, and the second electrode of the first switching transistor is electrically connected to the first electrode of the driving transistor.
  • a plurality of resistors are further included, and the resistors are located at the gaps between the adjacent pixel islands;
  • the first end of the resistor is electrically connected to the anode of the light emitting device, and the second end of the resistor is grounded.
  • the anodes of all light-emitting devices in at least one pixel island are electrically connected to the same resistor, and the anodes of light-emitting devices in different pixel islands are electrically connected. resistance is different.
  • the resistance value of the resistor is greater than 10K ⁇ .
  • the width of the gap between the adjacent pixel islands is 10 ⁇ m-30 ⁇ m.
  • the pixel circuit further includes: a second switch transistor, a third switch transistor, and a capacitor; wherein,
  • the gate of the second switch transistor is electrically connected to the scan control terminal, the first pole of the second switch transistor is electrically connected to the data signal terminal, and the second pole of the second switch transistor is electrically connected to the gate of the drive transistor pole electrical connection;
  • the gate of the third switch transistor is electrically connected to the detection control terminal, the first pole of the third switch transistor is electrically connected to the detection signal terminal, and the second pole of the third switch transistor is electrically connected to the anode of the light-emitting device electrical connection;
  • the capacitor is electrically connected between the gate and the first electrode of the driving transistor.
  • the above-mentioned display substrate provided by the embodiment of the present disclosure further includes a plurality of sensing lines; the detection signal terminals in the sub-pixels in the same column are electrically connected to the same sensing line, and the The detection signal terminals in the sub-pixels are electrically connected to the different sensing lines.
  • each of the light-emitting devices in the same pixel island has the same light-emitting color.
  • a plurality of the pixel islands are distributed in an array, and the plurality of the pixel islands include a plurality of first pixel islands displaying red, and a plurality of first pixel islands displaying green. A second pixel island and a plurality of third pixel islands displaying blue.
  • an embodiment of the present disclosure further provides a display device including the above-mentioned display substrate provided by an embodiment of the present disclosure.
  • an embodiment of the present disclosure also provides a method for driving the above-mentioned display substrate provided by an embodiment of the present disclosure, including:
  • the drive transistors and light-emitting devices in the pixel circuit are initialized
  • the data signal and the threshold voltage of the driving transistor are written into the control electrode of the driving transistor
  • the driving transistor is controlled to drive the light-emitting device to emit light.
  • the voltage of the first power supply terminal is fixed, and the voltage of the first power supply terminal is fixed by adjusting The duty ratio of the first switching transistor realizes different grayscale display.
  • FIG. 1 is a schematic top-view structure diagram of a display substrate according to an embodiment of the present disclosure
  • FIG. 2 is a schematic structural diagram of a pixel island in a display substrate according to an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of a potential characteristic provided by an embodiment of the present disclosure.
  • FIG. 4 is a schematic flowchart of a method for driving a display substrate according to an embodiment of the present disclosure
  • FIG. 5 is a schematic diagram of a working sequence of a display substrate corresponding to FIG. 4;
  • FIG. 6 is a schematic diagram of a working sequence of another display substrate corresponding to FIG. 4 .
  • a display substrate having pixel island regions can generally be applied to a virtual reality (VR) display device or an augmented reality (AR) display device.
  • VR virtual reality
  • AR augmented reality
  • the display device may also be provided with a plurality of microlenses, and the light rays of different colors emitted by each pixel island can be presented on a real image surface through the microlenses to complete the display.
  • a VR or AR display device with a pixel island area can achieve retina display, such as 300 PPI, which is converted into an angular resolution (pixels per degree, PPD) of 60 PPD. Assuming that the field of view angle is 120 degrees when the user's eyes overlap, the number of pixels required for a single eye needs to reach 7200*7200, that is, 7200 pixels need to be set for each row, and 7200 pixels need to be set for each column.
  • the size of the silicon-based OLED display substrate is generally less than or equal to 1.5 inches, which in turn affects the resolution (pixel per inch) of the display substrate. , PPI) put forward higher requirements.
  • silicon-based OLEDs try to use a simple pixel circuit driving method to ensure that the number of MOS tubes is minimal and the size of MOS tubes is as small as possible. Due to the reduction in the number and size of MOS tubes, a series of problems will be brought about, such as the problem of the uniformity of the threshold voltage Vth of the MOS tube, the problem of the offset of the threshold voltage Vth caused by the fatigue of the MOS tube, etc. Therefore, the pixel circuit generally adopts 3T1C pixel circuit scheme with external compensation function.
  • the pixels of silicon-based OLEDs are small and the required current is small, usually tens of PA to tens of nA, and for our new pixel island display mode, RGB OLED light-emitting devices are needed by evaporation, not traditional The light-emitting device of WOLED, so the current required by silicon-based OLED is smaller, generally 0.1PA to several nA.
  • this will make it difficult for silicon-based OLEDs to achieve low grayscale display. Therefore, it is necessary to propose a solution to solve the difficult problem of low grayscale display while achieving high PPI.
  • FIG. 1 is a schematic top view structure of the display substrate
  • FIG. 2 is a pixel island as an example, showing the display substrate.
  • the display substrate may specifically include:
  • the base substrate 1 has a plurality of independently arranged pixel islands (eg pixel island R, pixel island G, pixel island B), and the pixel island (eg pixel island R, as shown in FIG. 2 ) includes a plurality of sub-pixels 2 distributed in an array ;
  • the embodiment of the present invention is described by taking each pixel island including a plurality of sub-pixels 2 distributed in an array as an example;
  • the pixel circuit 3 is located in the sub-pixel 2.
  • the pixel circuit 3 includes a driving transistor DT and a light-emitting device L.
  • the first pole of the driving transistor DT is electrically connected to the first power supply terminal VDD, and the second pole of the driving transistor DT is connected to the light-emitting device L.
  • the anode is electrically connected, and the cathode of the light emitting device L is electrically connected to the second power supply terminal VSS.
  • a plurality of light-emitting control circuits 4 are located at the gaps between adjacent pixel islands (as shown in FIG. 1, between the pixel islands R and B; as shown in FIG. 2, located outside the pixel island R), the light-emitting control circuits 4 It is electrically connected between the first power supply terminal VDD and the first pole of the driving transistor DT.
  • the above-mentioned display substrate provided by the embodiment of the present disclosure adopts the driving method of pixel island, which can ensure that the silicon-based OLED achieves high PPI; in addition, by increasing the light emission electrically connected between the first power supply terminal VDD and the first electrode of the driving transistor DT Control circuit 4, so that when displaying a low grayscale picture, the maximum VDD voltage corresponding to the low grayscale can be fixed, and by controlling the turn-on duration of the lighting control circuit 4 (pulse width modulation (pwm) method), different low grayscales can be realized.
  • pwm pulse width modulation
  • the problem that low gray-scale display is difficult due to the low pixel current of the silicon-based OLED can be solved; and the light-emitting control circuit 4 added in the present disclosure is disposed at the gap between adjacent pixel islands, so it will not increase
  • the area of the original sub-pixel allows a relatively large number of sub-pixels to be set in the pixel island, which lays the foundation for achieving high PPI. Therefore, the embodiments of the present disclosure can solve the problems that the current silicon-based OLED pixel current is small and the low gray scale display is difficult on the basis of realizing high PPI.
  • the first electrodes of all the driving transistors in at least one pixel island are electrically connected to the same light-emitting control circuit.
  • R is taken as an example, and the pixel island R includes 9 sub-pixels 2 as an example for illustration.
  • the first electrodes of the driving transistors DT in the 9 sub-pixels 2 are all electrically connected to the same light-emitting control circuit 4. In FIG. 2, only the upper left corner is shown.
  • the first pole of the driving transistor DT in one sub-pixel 2 is electrically connected to the light-emitting control circuit 4, and the first poles (represented by EM-net) of the driving transistor DT in the remaining 8 sub-pixels 2 do not have a schematic connection to the light-emitting control circuit. 4, but the first poles of all drive transistors DT in the pixel island R are electrically connected to the light-emitting control circuit 4 during actual production, that is, all sub-pixels in a pixel island share the same light-emitting control circuit 4;
  • the embodiments of the invention are described by taking as an example that the first electrodes of all the driving transistors DT in each pixel island (R, G, B) are electrically connected to the same light-emitting control circuit 4 .
  • the light-emitting control circuits electrically connected to the first electrodes of the driving transistors in different pixel islands are different. Specifically, as shown in FIG.
  • the light-emitting control circuit that is electrically connected to the electrodes, the light-emitting control circuit that is electrically connected to the first electrode of the driving transistor in the pixel island G, and the light-emitting control circuit that is electrically connected to the first electrode of the driving transistor in the pixel island B are different control circuits, as shown in FIG. 1 .
  • Each pixel island corresponds to a different light-emitting control circuit, so that the pixel island can be used as a unit to adjust the timing of low-gray-scale display, so as to realize the difficulty of low-gray-scale display.
  • the light-emitting control circuit 4 may include a first switch transistor T1, and the gate of the first switch transistor T1 is electrically connected to the light-emitting control terminal EM , the first pole of the first switching transistor T1 is electrically connected to the first power supply terminal VDD, and the second pole of the first switching transistor T1 is electrically connected to the first pole of the driving transistor DT.
  • the pixel includes a total of 256 gray scales from 0 to 255. For example, 0 to 50 is a low gray scale. Different gray scales display different driving voltages. The smaller the gray scale, the smaller the driving voltage.
  • the current is very small, generally 0.1PA to several nA, so it is difficult to realize different low-gray-scale displays by changing the driving voltage of the first power supply terminal VDD. Therefore, in the present disclosure, by adding the first switch transistor T1, during low-gray-scale display, the In the light-emitting stage, the first switching transistor T1 is turned on under the control of the EM signal of the light-emitting control terminal, and the driving voltage corresponding to the maximum grayscale 50 in the low grayscale of 0-50 is fixed, which is realized by adjusting the on-time length of the first switching transistor T1. Different grayscales are displayed in low grayscales, and the longer the on-time is, the larger the corresponding grayscales are.
  • the current required by the silicon-based OLED is very small, and the current range from L0 to L255 gray scale is 0.1PA ⁇ 5nA, which has exceeded the MOS tube in the silicon-based OLED.
  • Driving capability generally, the off-state current Ioff of the CMOS tube is in the order of E -13 to E -12 , which is greater than the current required by the silicon-based OLED. Therefore, the off-state current Ioff will make the OLED device turn on, and the on-state current Ion of the CMOS tube can be seen.
  • the above-mentioned display substrate provided by the embodiment of the present disclosure, as shown in FIG. 1 and FIG. 2 , further includes a plurality of resistors R1, and the resistors R1 are located at the gaps between adjacent pixel islands;
  • the first end of the resistor R1 is electrically connected to the anode of the light emitting device L, and the second end of the resistor R1 is grounded.
  • the resistor R1 can form a shunt circuit, so as to ensure that the current flowing into the light-emitting device L is within a normal range, that is, to further solve the problem of difficult low-gray-scale display, and improve the display contrast.
  • the anodes of all light-emitting devices in at least one pixel island are electrically connected to the same resistor.
  • the pixel island R taking the pixel island R as an example, And the pixel island R includes 9 sub-pixels 2 as an example for illustration.
  • the anodes of the light-emitting devices L in the 9 sub-pixels 2 are all electrically connected to the same resistor R1. In FIG. 2, only the light emission in the first sub-pixel 2 in the upper left corner is shown.
  • the anode of the device L is electrically connected to the resistor R1, and the anodes of the light-emitting devices L in the remaining 8 sub-pixels 2 (represented by VR-net) are not shown to be connected to the resistor R1, but the anodes of all the light-emitting devices L in the pixel island R are actually fabricated. are electrically connected to the resistor R1, that is, all sub-pixels in a pixel island share the same resistor R1; specifically, in the embodiment of the present invention, all the light-emitting devices L in each pixel island (R, G, B) The anodes are all electrically connected to the same resistor R1 as an example to illustrate.
  • the resistances of the anode electrical connection of the light-emitting devices in different pixel islands are different, specifically, as shown in FIG.
  • the resistance electrically connected to the anode of the light-emitting device in the pixel island G and the resistance of the anode of the light-emitting device in the pixel island B are different control circuits, that is, each pixel island in Figure 1 corresponds to a different resistance, and the resistance can be shunted, which can further It is difficult to realize low grayscale display.
  • the inventor of the present case learned through electrical simulation that when the resistance value of the resistor R1 is greater than 10K ⁇ , the low grayscale display can reach the desired value.
  • the magnitude of the current required, so the resistance of the resistor R1 is greater than 10K ⁇ .
  • the width of the gap between adjacent pixel islands is 10 ⁇ m-30 ⁇ m, which can ensure the realization of high PPI and facilitate the first Fabrication of switching transistors and resistors.
  • the display substrate may further include: a plurality of gate lines (G1, G2 . . . ) located on each pixel island, a plurality of data Lines (D1, D2...) and a plurality of detection lines (S1, S2...), each gate line may extend in the first direction, each data line and each detection line may extend in the second direction, and the first One direction and the second direction intersect. As shown in FIG. 2, the first direction and the second direction may be perpendicular.
  • the pixel circuit 3 further includes: a second switch transistor T2, a third switch transistor T3 and a capacitor C; wherein,
  • the gate of the second switch transistor T2 is electrically connected to the scan control terminal (the scan control terminal is correspondingly connected to the scan line, for example, the gate of the second switch transistor T2 in the first row of sub-pixels 2 is electrically connected to the scan line G1, and the second row of sub-pixels
  • the gate of the second switch transistor T2 in the pixel 2 is electrically connected to the scan line G2, and so on)
  • the first pole of the second switch transistor T2 is electrically connected to the data signal terminal (the data signal terminal is correspondingly connected to the data line, such as the first column
  • the first pole of the second switch transistor T2 in the pixel 2 is electrically connected to the data line D1, the first pole of the second switch transistor T2 in the second column of sub-pixels 2 is electrically connected to the data line D2, and so on), the second switch transistor T2
  • the second pole of is electrically connected to the gate of the driving transistor DT;
  • the gate of the third switching transistor T3 is electrically connected to the detection control terminal S (the detection control terminal S may be electrically connected to a gate line correspondingly, not shown in FIG. 2 ), and the first pole of the third switching transistor T3 is electrically connected to the detection signal terminal Electrical connection (the detection signal terminal is correspondingly connected to the detection line, for example, the first pole of the third switch transistor T3 in the first column of sub-pixels 2 is electrically connected to the detection line S1, and the first pole of the third switch transistor T3 in the second column of sub-pixels 2 is electrically connected to the detection line S1.
  • the detection line S2 is electrically connected, and so on), and the second pole of the third switching transistor T3 is electrically connected to the anode of the light-emitting device L;
  • the capacitor C is electrically connected between the gate and the first electrode of the driving transistor DT.
  • the detection signal terminals in the sub-pixels 2 in the same column are electrically connected to the same sensing line, and the detection signal terminals in the sub-pixels 2 in different columns are electrically connected.
  • the different sensing lines are electrically connected.
  • OLEDs try to use a simple pixel circuit driving method to ensure that the number of MOS tubes is minimal, and the size of the MOS tubes is as small as possible. Due to the reduction of the number and size of MOS transistors, a series of problems will be brought, such as the problem of the uniformity of the threshold voltage Vth of the MOS transistor, the problem of Vth offset caused by the fatigue of the MOS transistor, and the like. Therefore, in the embodiment of the present disclosure, a 3T1C pixel circuit solution with an external compensation function is adopted. As shown in FIG.
  • the detection lines (S1, S2%) can also be used to connect an external compensation circuit (not shown in the figure) , the detection line can output the collected potential as detection data to the external compensation circuit, so that the external compensation circuit can flexibly adjust the potential of the data signal provided by the data line according to the detection data, so as to realize the control of the driving signal output to the light-emitting device L.
  • External compensation avoids abnormality of the driving signal output to the light-emitting device L due to the threshold voltage drift of the driving transistor of the pixel circuit, and ensures the display effect.
  • the transistors in each sub-pixel may be metal oxide semiconductor field effect transistors (metal oxide semiconductor, MOS), and the light-emitting device may be an electroluminescent (electroluminescent, EL) device.
  • MOS metal oxide semiconductor field effect transistors
  • EL electroluminescent
  • the light-emitting devices in the same pixel island (eg, R) have the same light-emitting color.
  • the display substrate may have a plurality of pixel islands capable of displaying different colors.
  • a plurality of pixel islands are distributed in an array.
  • the display substrate may have a plurality of first colors capable of displaying red.
  • a first pixel island R, a second pixel island G and a third pixel island B can form a pixel group for emitting red light, blue light and green light to realize color display.
  • each driving transistor DT may output a driving signal (eg, driving current) to the connected light emitting device L in response to the data signal and the power signal provided by the connected first power supply terminal VDD, thereby driving the light emitting device L to emit light.
  • driving signal eg, driving current
  • the third switching transistor T3 can be turned on when the detection control terminal S connected to it provides a control signal, and the detection line S1 connected to the third switching transistor T3 can output a sensing signal to the anode of the light-emitting device L at this time, so as to realize the light-emitting Noise reduction of the anode of device L. After noise reduction, the driving signal cannot be output to the light emitting device L. At this time, the detection line S1 can collect the anode potential of the light emitting device L and output it to an external compensation circuit.
  • providing a signal may refer to providing a signal at an effective potential, and correspondingly, not providing a signal means providing a signal at an inactive potential.
  • the effective potential may be high potential relative to the inactive potential, and when the transistor is a P-type transistor, the effective potential may be low potential relative to the inactive potential.
  • the above-mentioned threshold voltage specifically refers to the threshold voltage Vth of the drive transistor DT.
  • all transistors are N-type transistors as an example for description, and of course, all transistors may also be P-type transistors.
  • a control signal at an effective potential is provided to the detection control terminal connected to the gate of the third switching transistor T3, the third switching transistor T3 is turned on, and the detection line S1 first passes through the third switching transistor T3 to the anode of the light-emitting device L.
  • a detection signal is provided to achieve noise reduction for the anode of the light-emitting device L, thereby ensuring that the light-emitting device L can remain in an off state when the anode potential of the light-emitting device L is collected, that is, to ensure that the anode potential of the light-emitting device L is consistent with the cathode potential, the light-emitting device L No current flows through L.
  • the third switching transistor T3 remains on, and the detection line S1 collects (ie extracts) the anode of the light emitting device L, that is, the potential (ie, the voltage V or the current I) of the second pole of the driving transistor DT.
  • This process may also be referred to as a detection process of the driving transistor DT.
  • the detection line S1 outputs the collected potential as detection data to an external external compensation circuit, so that the external compensation circuit can monitor the characteristic variation and uniformity of the potential (ie, I-V characteristic) of the driving transistor DT.
  • Vgs Vdata-Vref
  • Vdata refers to the potential of the data signal provided by the data line D1
  • Vref refers to the potential at the second pole, that is, the source of the driving transistor DT
  • the corresponding current I is I0.
  • Vgs0 Vdata-Vref+ ⁇ VTFT
  • ⁇ VTFT the compensation amount
  • an embodiment of the present disclosure also provides a method for driving the above-mentioned display substrate, as shown in FIG. 4 , which may include:
  • the detection control terminal S is a high-level signal
  • the third switch transistor T3 is controlled by the detection control terminal S low-level signal.
  • the detection line S1 connected to the third switching transistor T3 can output a sensing signal to the anode of the light emitting device L to initialize the second pole of the driving transistor DT and the anode of the light emitting device L.
  • each sub-pixel 2 the second switching transistors T2 included in the pixel 2 are all turned on.
  • the data line D1 can output a data signal to the gate of the driving transistor DT connected to each second switching transistor T2 through each of the second switching transistors T2 that are turned on, and then each of the driving transistors DT is turned on to connect the data signal to the threshold of the driving transistor DT.
  • a voltage is written to the gate of the drive transistor DT.
  • Capacitor C can be used to store data signals.
  • the high-level signal of the light-emitting control terminal EM controls the first switching transistor to turn on, and each driving transistor DT can respond to the data signal and all
  • the power supply signal provided by the connected first power supply terminal VDD outputs a driving signal (eg, driving current) to the connected light-emitting device L, thereby driving the light-emitting device L to emit light.
  • the voltage of the first power supply terminal VDD can be fixed to the voltage corresponding to 50 grayscale, and different grayscale display can be realized by adjusting the duty cycle (on-time) of the first switching transistor T1, thereby solving the problem of low grayscale
  • the order shows difficult questions.
  • the driving method for the display substrate provided by the embodiment of the present disclosure further includes a compensation stage.
  • a compensation stage For the external compensation principle for the poor display effect caused by the threshold voltage shift, please refer to the above display substrate. content, which will not be described in detail here.
  • the compensation stage can be performed before power-on or after power-off.
  • an embodiment of the present disclosure further provides a display device including the above-mentioned display substrate provided by an embodiment of the present disclosure.
  • the problem-solving principle of the display device is similar to that of the aforementioned display substrate. Therefore, the implementation of the display device can refer to the aforementioned implementation of the display substrate, and repeated details will not be repeated here.
  • the display device may be any product or component with a display function, such as a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, and a navigator.
  • a display function such as a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, and a navigator.
  • Other essential components of the display device should be understood by those of ordinary skill in the art, and will not be repeated here, nor should it be regarded as a limitation of the present disclosure.
  • a display substrate, a driving method thereof, and a display device provided by the embodiments of the present disclosure adopt the driving method of pixel island, which can ensure that the silicon-based OLED can achieve high PPI;

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Abstract

本公开实施例公开了一种显示基板及其驱动方法、显示装置,该显示基板包括:衬底基板,具有独立设置的多个像素岛,像素岛包括阵列分布的多个子像素;像素电路,位于子像素内,像素电路包括驱动晶体管和发光器件,驱动晶体管的第一极与第一电源端电连接,驱动晶体管的第二极与发光器件的阳极电连接,发光器件的阴极与第二电源端电连接;多个发光控制电路,位于相邻像素岛之间的间隙处,发光控制电路电连接于第一电源端和驱动晶体管的第一极之间。

Description

一种显示基板及其驱动方法、显示装置
相关申请的交叉引用
本申请要求在2020年10月21日提交中国专利局、申请号为202011134742.5、申请名称为“一种显示基板及其驱动方法、显示装置”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本公开涉及显示技术领域,特别涉及一种显示基板及其驱动方法、显示装置。
背景技术
有机发光二极管(organic light emitting diode,OLED)因其自发光、宽视角及响应速度快等优点被广泛应用于显示领域中。
发明内容
本公开实施例提供的一种显示基板,包括:
衬底基板,具有独立设置的多个像素岛,所述像素岛包括阵列分布的多个子像素;
像素电路,位于所述子像素内,所述像素电路包括驱动晶体管和发光器件,所述驱动晶体管的第一极与第一电源端电连接,所述驱动晶体管的第二极与所述发光器件的阳极电连接,所述发光器件的阴极与第二电源端电连接;
多个发光控制电路,位于相邻所述像素岛之间的间隙处,所述发光控制电路电连接于所述第一电源端和所述驱动晶体管的第一极之间。
可选地,在本公开实施例提供的上述显示基板中,至少一个所述像素岛内的所有驱动晶体管的第一极均电连接同一所述发光控制电路,不同所述像素岛内的驱动晶体管的第一极电连接的发光控制电路不同。
可选地,在本公开实施例提供的上述显示基板中,所述发光控制电路包括第一开关晶体管,所述第一开关晶体管的栅极与发光控制端电连接,所述第一开关晶体管的第一极与所述第一电源端电连接,所述第一开关晶体管的第二极与所述驱动晶体管的第一极电连接。
可选地,在本公开实施例提供的上述显示基板中,还包括多个电阻,所述电阻位于相邻所述像素岛之间的间隙处;
所述电阻的第一端与所述发光器件的阳极电连接,所述电阻的第二端接地。
可选地,在本公开实施例提供的上述显示基板中,至少一个所述像素岛内的所有发光器件的阳极均电连接同一所述电阻,不同所述像素岛内的发光器件的阳极电连接的电阻不同。
可选地,在本公开实施例提供的上述显示基板中,所述电阻的阻值大于10KΩ。
可选地,在本公开实施例提供的上述显示基板中,相邻所述像素岛之间的间隙宽度为10μm-30μm。
可选地,在本公开实施例提供的上述显示基板中,所述像素电路还包括:第二开关晶体管、第三开关晶体管和电容;其中,
所述第二开关晶体管的栅极与扫描控制端电连接,所述第二开关晶体管的第一极与数据信号端电连接,所述第二开关晶体管的第二极与所述驱动晶体管的栅极电连接;
所述第三开关晶体管的栅极与检测控制端电连接,所述第三开关晶体管的第一极与检测信号端电连接,所述第三开关晶体管的第二极与所述发光器件的阳极电连接;
所述电容电连接于所述驱动晶体管的栅极和第一极之间。
可选地,在本公开实施例提供的上述显示基板中,还包括多条感测线;同一列所述子像素中的检测信号端与同一条所述感测线电连接,不同列所述子像素中的检测信号端电连接不同的所述感测线。
可选地,在本公开实施例提供的上述显示基板中,同一所述像素岛内的各所述发光器件的发光颜色相同。
可选地,在本公开实施例提供的上述显示基板中,多个所述像素岛呈阵列分布,且多个所述像素岛中具有多个显示红色的第一像素岛、多个显示绿色的第二像素岛以及多个显示蓝色的第三像素岛。
相应地,本公开实施例还提供了一种显示装置,包括本公开实施例提供的上述显示基板。
相应地,本公开实施例还提供了一种本公开实施例提供的上述显示基板的驱动方法,包括:
重置阶段,对像素电路中的驱动晶体管与发光器件进行初始化;
数据写入阶段,将数据信号与所述驱动晶体管的阈值电压写入所述驱动晶体管的控制极;
发光阶段,控制所述驱动晶体管驱动所述发光器件发光。
可选地,在本公开实施例提供的上述驱动方法中,在所述发光阶段,当确定所述发光器件的发光灰阶为预设灰阶时,固定所述第一电源端的电压,通过调节所述第一开关晶体管的占空比实现不同灰阶显示。
附图说明
图1为本公开实施例提供的一种显示基板的俯视结构示意图;
图2为本公开实施例提供的一种显示基板中一个像素岛的结构示意图;
图3为本公开实施例提供的一种电位特性示意图;
图4为本公开实施例提供的一种显示基板的驱动方法的流程示意图;
图5为图4对应的一种显示基板工作时序示意图;
图6为图4对应的又一种显示基板工作时序示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚,下面将结合本公 开实施例的附图,对本公开实施例的技术方案进行清楚、完整地描述。显然,所描述的实施例是本公开的一部分实施例,而不是全部的实施例。并且在不冲突的情况下,本公开中的实施例及实施例中的特征可以相互组合。基于所描述的本公开的实施例,本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例,都属于本公开保护的范围。
除非另外定义,本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同,而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接,而是可以包括电性的连接,不管是直接的还是间接的。“内”、“外”、“上”、“下”等仅用于表示相对位置关系,当被描述对象的绝对位置改变后,则该相对位置关系也可能相应地改变。
需要注意的是,附图中各图形的尺寸和形状不反映真实比例,目的只是示意说明本公开内容。并且自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。
目前,对于具有像素岛区的显示基板一般可以应用于虚拟现实(virtual reality,VR)显示装置,或,增强现实(augmented reality,AR)显示装置中。以VR显示装置为例,显示装置中还可以设置有多个微透镜,各个像素岛区发出的不同颜色的光线可以经过微透镜呈现至一实像面上,完成显示。
具有像素岛区的VR或AR显示装置,可以达到视网膜(retina display)显示,如300PPI,换算为角分辨率(pixels per degree,PPD)为60PPD。假设按照用户双眼重迭时视场角为120度计算,则单眼所需的像素数量即需要达到7200*7200,即每行需要设置7200个像素,每列也需要设置7200个像素。假设像素中的发光器件为硅基OLED,即采用硅基材料制成,则基于成本和工艺影响,硅基OLED显示基板的尺寸一般小于或等于1.5inch,进而对显示基板的分辨率(pixel perinch,PPI)提出了更高的要求。
为了满足高PPI的需求,硅基OLED尽量采用简单的像素电路驱动方式,确保MOS管数量最小,并且MOS管尺寸需求尽量的小。由于MOS管数量的减小和尺寸减小,会带来一系列的问题,例如Mos管阈值电压Vth均匀性的问题,Mos管的疲劳导致的阈值电压Vth偏移问题等,因此像素电路一般采用具有外部补偿功能的3T1C像素电路方案。
硅基OLED的像素较小,所需电流较小,通常为几十PA到几十nA,且针对我们这种新型的像素岛显示模式,需要的是蒸镀RGB的OLED发光器件,而非传统WOLED的发光器件,因此硅基OLED所需的电流更小,一般为0.1PA到几nA。但是针对3T1C像素电路,这会使得硅基OLED在实现低灰阶显示时出现困难。因此有必要提出一种方案在实现高PPI的同时解决低灰阶显示困难的问题。
有鉴于此,本公开实施例提供的一种显示基板,如图1和图2所示,图1为显示基板的俯视结构示意图,图2为以一个像素岛为例,示出了显示基板的另一种结构示意图,该显示基板具体可以包括:
衬底基板1,具有独立设置的多个像素岛(例如像素岛R、像素岛G、像素岛B),像素岛(如像素岛R,如图2所示)包括阵列分布的多个子像素2;本发明实施例以每个像素岛均包括阵列分布的多个子像素2为例进行说明;
像素电路3,位于子像素2内,像素电路3包括驱动晶体管DT和发光器件L,驱动晶体管DT的第一极与第一电源端VDD电连接,驱动晶体管DT的第二极与发光器件L的阳极电连接,发光器件L的阴极与第二电源端VSS电连接。
多个发光控制电路4,位于相邻像素岛之间的间隙处(如图1所示,位于像素岛R和B之间;如图2所示,位于像素岛R外侧),发光控制电路4电连接于第一电源端VDD和驱动晶体管DT的第一极之间。
本公开实施例提供的上述显示基板,采用像素岛的驱动方式,可以保证硅基OLED实现高PPI;另外,通过增加电连接于第一电源端VDD和驱动晶体管DT的第一极之间的发光控制电路4,这样在显示低灰阶画面时,可以固定低灰阶中对应最大的VDD电压,通过控制发光控制电路4的开启时长(脉冲宽度 调制(pwm)的方法),来实现不同低灰阶显示,从而可以解决由于硅基OLED像素电流小,低灰阶显示困难的问题;并且,本公开增加的发光控制电路4是设置在相邻像素岛之间的间隙处的,因此不会增加原本子像素的面积,使得像素岛内可以设置相对较多数量的子像素,为实现高PPI奠定了基础。因此本公开实施例可以在实现高PPI的基础上,解决目前硅基OLED像素电流小,低灰阶显示困难的问题。
在具体实施时,在本公开实施例提供的上述显示基板中,至少一个像素岛内的所有驱动晶体管的第一极均电连接同一发光控制电路,具体地,如图2所示,以像素岛R为例,且以像素岛R内包括9个子像素2为例进行说明,9个子像素2中的驱动晶体管DT的第一极均电连接同一发光控制电路4,图2中仅示意左上角第一个子像素2内的驱动晶体管DT的第一极电连接发光控制电路4,其余8个子像素2内驱动晶体管DT的第一极(EM-net表示)没有具有示意出连接到该发光控制电路4,但是实际制作时像素岛R内所有驱动晶体管DT的第一极均是电连接到发光控制电路4的,即一个像素岛内的所有子像素共用同一个发光控制电路4;具体地,本发明实施例以每个像素岛(R、G、B)内的所有驱动晶体管DT的第一极均电连接同一发光控制电路4为例进行说明。
不同像素岛内的驱动晶体管的第一极电连接的发光控制电路不同,具体地,如图1所示,例如像素岛R、像素岛G和像素岛B,像素岛R内驱动晶体管的第一极电连接的发光控制电路、像素岛G内驱动晶体管的第一极电连接的发光控制电路以及像素岛B内驱动晶体管的第一极电连接的发光控制电路为不同的控制电路,即图1中各像素岛均对应不同的发光控制电路,这样可以以像素岛为单位,调节低灰阶显示时的时序,实现低灰阶显示困难的问题。
在具体实施时,在本公开实施例提供的上述显示基板中,如图2所示,发光控制电路4可以包括第一开关晶体管T1,第一开关晶体管T1的栅极与发光控制端EM电连接,第一开关晶体管T1的第一极与第一电源端VDD电连接,第一开关晶体管T1的第二极与驱动晶体管DT的第一极电连接。具体地,像素包括0-255共256个灰阶,例如0-50为低灰阶,不同灰阶显示对应的驱动电压不同, 灰阶越小,驱动电压越小,由于硅基OLED需要的像素电流特别小,一般为0.1PA到几nA,这样很难通过改变第一电源端VDD的驱动电压实现不同低灰阶显示,因此本公开通过增加第一开关晶体管T1,低灰阶显示时,在发光阶段,在发光控制端EM信号的控制下导通第一开关晶体管T1,固定0-50低灰阶中最大灰阶50对应的驱动电压,通过调节第一开关晶体管T1的导通时长来实现低灰阶中不同灰阶显示,导通时长越长,对应的灰阶越大。
在具体实施时,在采用像素岛驱动方式的新型显示模式中,硅基OLED需求的电流很小,L0到L255灰阶的电流范围为0.1PA~5nA,这已超出硅基OLED中MOS管的驱动能力,一般COMS管的关态电流Ioff都在E -13~E -12数量级,大于硅基OLED需求的电流,因此关态电流Ioff会使得OLED器件启亮,可见COMS管的开态电流Ion更大,即使增加了上述发光控制电路,还是无法保证流入发光器件的电流是想要的电流范围,即流入发光器件的低灰阶对应的电流还是偏大,不利于低灰阶显示,这样会降低显示面板的对比度等性能,因此在本公开实施例提供的上述显示基板中,如图1和图2所示,还包括多个电阻R1,电阻R1位于相邻像素岛之间的间隙处;
电阻R1的第一端与发光器件L的阳极电连接,电阻R1的第二端接地。
本公开通过在相邻像素岛之间的间隙处增加电阻R1,电阻R1可以形成分流电路,从而确保流入发光器件L的电流属于正常范围,即进一步解决低灰阶显示困难的问题,以及提高显示对比度。
在具体实施时,在本公开实施例提供的上述显示基板中,至少一个像素岛内的所有发光器件的阳极均电连接同一电阻,具体地,如图2所示,以像素岛R为例,且以像素岛R内包括9个子像素2为例进行说明,9个子像素2中的发光器件L的阳极均电连接同一电阻R1,图2中仅示意左上角第一个子像素2内的发光器件L的阳极电连接电阻R1,其余8个子像素2内发光器件L的阳极(VR-net表示)没有具有示意出连接到该电阻R1,但是实际制作时像素岛R内所有发光器件L的阳极均是电连接到该电阻R1的,即一个像素岛内的所有子像素共用同一个电阻R1;具体地,本发明实施例以每个像素岛(R、G、B)内的所有发 光器件L的阳极均电连接同一电阻R1为例进行说明。
不同像素岛内的发光器件的阳极电连接的电阻不同,具体地,如图1所示,例如像素岛R、像素岛G和像素岛B,像素岛R内发光器件的阳极电连接的电阻、像素岛G内发光器件的阳极电连接的电阻以及像素岛B内发光器件的阳极电连接的电阻为不同的控制电路,即图1中各像素岛均对应不同的电阻,电阻可以分流,可以进一步实现低灰阶显示困难的问题。
在具体实施时,在本公开实施例提供的上述显示基板中,如图2所示,本案的发明人通过电学仿真得知,电阻R1的阻值大于10KΩ时,低灰阶显示时可达到所需的电流量级,因此电阻R1的阻值大于10KΩ。
在具体实施时,在本公开实施例提供的上述显示基板中,如图1所示,相邻像素岛之间的间隙宽度为10μm-30μm,这样可以保证实现高PPI的基础上,方便第一开关晶体管和电阻的制作。
在具体实施时,在本公开实施例提供的上述显示基板中,如图2所示,显示基板还可以包括:位于每个像素岛的多条栅线(G1、G2……)、多条数据线(D1、D2……)和多条检测线(S1、S2……),每条栅线可以沿第一方向延伸,每条数据线和每条检测线可以沿第二方向延伸,且第一方向和第二方向交叉。如图2所示,该第一方向和第二方向可以垂直。
在具体实施时,在本公开实施例提供的上述显示基板中,如图2所示,像素电路3还包括:第二开关晶体管T2、第三开关晶体管T3和电容C;其中,
第二开关晶体管T2的栅极与扫描控制端电连接(扫描控制端对应连接扫描线,如第一行子像素2中第二开关晶体管T2的栅极与扫描线G1电连接,第二行子像素2中第二开关晶体管T2的栅极与扫描线G2电连接,依次类推),第二开关晶体管T2的第一极与数据信号端电连接(数据信号端对应连接数据线,如第一列子像素2中第二开关晶体管T2的第一极与数据线D1电连接,第二列子像素2中第二开关晶体管T2的第一极与数据线D2电连接,依次类推),第二开关晶体管T2的第二极与驱动晶体管DT的栅极电连接;
第三开关晶体管T3的栅极与检测控制端S电连接(检测控制端S可以单独 对应电连接一条栅线,图2中未示出),第三开关晶体管T3的第一极与检测信号端电连接(检测信号端对应连接检测线,如第一列子像素2中第三开关晶体管T3的第一极与检测线S1电连接,第二列子像素2中第三开关晶体管T3的第一极与检测线S2电连接,依次类推),第三开关晶体管T3的第二极与发光器件L的阳极电连接;
电容C电连接于驱动晶体管DT的栅极和第一极之间。
在具体实施时,在本公开实施例提供的上述显示基板中,如图2所示,同一列子像素2中的检测信号端与同一条感测线电连接,不同列子像素2中的检测信号端电连接不同的感测线。
在具体实施时,为了满足高PPI的需求,OLED尽量采用简单的像素电路驱动方式,确保MOS管数量最少,并且MOS管尺寸需求尽量的小。由于MOS管数量的减少和尺寸的减小,会带来一系列的问题,例如MOS管阈值电压Vth均匀性的问题,MOS管的疲劳导致的Vth偏移问题等。因此在本公开实施例中,采用具有外部补偿功能的3T1C像素电路方案,如图2所示,检测线(S1、S2……)还可以用于连接一外部补偿电路(图中未示出),检测线可以将采集到的电位作为检测数据输出至外部补偿电路,以供外部补偿电路根据该检测数据灵活调整数据线提供的数据信号的电位,进而实现对输出至发光器件L的驱动信号的外部补偿,避免因像素电路驱动晶体管的阈值电压漂移造成输出至发光器件L的驱动信号出现异常,保证显示效果。
可选的,各个子像素中的晶体管可以为金属氧化物半导体场效应管(metal oxide semiconductor,MOS),发光器件可以为电致发光(electroluminescent,EL)器件。
在具体实施时,在本公开实施例提供的上述显示基板中,如图1所示,同一像素岛(如R)内的各发光器件的发光颜色相同。且为了保证正常显示,显示基板可以具有多个能够显示不同颜色的像素岛。
如图1所示,多个像素岛(R、G、B)呈阵列分布,假设显示基板采用三原色(包括红色、绿色和蓝色)显示,则显示基板可以具有多个能够显示红色的 第一像素岛R,多个能够显示绿色的第二像素岛G,以及多个能够显示蓝色的第三像素岛B。且一个第一像素岛R、一个第二像素岛G和一个第三像素岛B可以组成一个像素组,用以发出红色光线、蓝色光线和绿色光线,实现彩色显示。
当某条(如第一条)栅线G1提供栅极驱动信号时,与该栅线G1连接的一行子像素2中,每个子像素2包括的第二开关晶体管T2均开启。数据线D1可以通过开启的各第二开关晶体管T2,向各第二开关晶体管T2连接的驱动晶体管DT的栅极输出数据信号,进而,各驱动晶体管DT开启。电容C可以用于存储数据信号。并且,每个驱动晶体管DT可以响应于数据信号和所连接的第一电源端VDD提供的电源信号,向所连接的发光器件L输出驱动信号(如,驱动电流),从而驱动发光器件L发光。第三开关晶体管T3可以在其所连接的检测控制端S提供控制信号时开启,第三开关晶体管T3所连接的检测线S1此时可以向发光器件L的阳极输出感测信号,以实现对发光器件L的阳极的降噪。在降噪之后,驱动信号无法输出至发光器件L,此时,检测线S1可以采集发光器件L的阳极电位并输出至外部补偿电路。
需要说明的是,提供信号可以是指提供处于有效电位的信号,相应的,不提供信号即是指提供处于无效电位的信号。在晶体管为N型晶体管时,有效电位相对于无效电位可以为高电位,在晶体管为P型晶体管时,有效电位相对于无效电位可以为低电位。另,上述阈值电压特指驱动晶体管DT的阈值电压Vth。
需要说明的是,本公开实施例图2中是以所有晶体管均为N型晶体管为例进行说明的,当然,也可以所有晶体管均为P型晶体管。
结合图2所示显示基板,对针对阈值电压漂移造成显示效果较差的外部补偿原理进行下述介绍:
在补偿阶段,向第三开关晶体管T3的栅极所连接的检测控制端提供处于有效电位的控制信号,第三开关晶体管T3开启,检测线S1先通过第三开关晶体管T3向发光器件L的阳极提供检测信号,以实现对发光器件L阳极的降噪, 进而保证在采集发光器件L的阳极电位时,发光器件L可以保持关闭状态,即保证发光器件L的阳极电位和阴极电位一致,发光器件L上没有电流经过。之后,第三开关晶体管T3保持开启状态,检测线S1采集(即抽取)发光器件L的阳极,即驱动晶体管DT的第二极的电位(即,电压V或电流I)。该过程也可以称为驱动晶体管DT的检测过程。检测线S1将采集到的电位作为检测数据输出至外接的外部补偿电路,以供外部补偿电路监测驱动晶体管DT的电位(即,I-V特性)特性变化和均一性。
如图3所示,在驱动晶体管DT的阈值电压Vth未漂移之前,存在初始(original)I-V曲线(如图3所示实线),此时,驱动晶体管DT的栅源电位Vgs一般满足:Vgs=Vdata-Vref,其中,Vdata是指数据线D1提供的数据信号的电位,Vref是指驱动晶体管DT的第二极,即源极处的电位,对应电流I为I0。一段时间后,因驱动晶体管DT的阈值电压Vth的漂移,原I-V曲线变更为图3虚线所示I-V曲线,此时,Vdata-Vref对应的电流I变为I0’,与初始I0存在差异。为了实现补偿,保证I0’等于I0,经测试,Vgs0需要满足:Vgs0=Vdata-Vref+△VTFT,△VTFT为补偿量。外部补偿电路在确定出补偿量后,可以基于补偿量对数据线D1输出的数据信号进行补偿。
基于同一发明构思,本公开实施例还提供了一种上述显示基板的驱动方法,如图4所示,可以包括:
S401、重置阶段,对像素电路中的驱动晶体管与发光器件进行初始化;
具体地,如图2所示,结合图5所示的工作时序,在重置阶段,检测控制端S为高电平信号,第三开关晶体管T3在检测控制端S低电平信号的控制下开启,第三开关晶体管T3所连接的检测线S1此时可以向发光器件L的阳极输出感测信号,以实现对驱动晶体管DT的第二极与发光器件L的阳极的初始化。
S402、数据写入阶段,将数据信号与驱动晶体管的阈值电压写入驱动晶体管的控制极;
具体地,如图2所示,结合图5所示的工作时序,在数据写入阶段,当栅线G1提供栅极驱动信号时,与该栅线G1连接的一行子像素2中,每个子像素2 包括的第二开关晶体管T2均开启。数据线D1可以通过开启的各第二开关晶体管T2,向各第二开关晶体管T2连接的驱动晶体管DT的栅极输出数据信号,进而,各驱动晶体管DT开启,将数据信号与驱动晶体管DT的阈值电压写入驱动晶体管DT的控制极。电容C可以用于存储数据信号。
S403、发光阶段,控制驱动晶体管驱动发光器件发光;
具体地,如图2所示,结合图5所示的工作时序,在发光阶段,发光控制端EM的高电平信号控制第一开关晶体管开启,每个驱动晶体管DT可以响应于数据信号和所连接的第一电源端VDD提供的电源信号,向所连接的发光器件L输出驱动信号(如,驱动电流),从而驱动发光器件L发光。
在具体实施时,在本公开实施例提供的上述驱动方法中,如图2所示,在发光阶段,当确定发光器件L的发光灰阶为预设灰阶时,例如预设灰阶为0-50较低灰阶,可以固定第一电源端VDD的电压为50灰阶对应的电压,通过调节第一开关晶体管T1的占空比(导通时长)实现不同灰阶显示,从而解决低灰阶显示困难的问题。
在具体实施时,在本公开实施例提供的上述显示基板的驱动方法中,如图6所示,还包括补偿阶段,对针对阈值电压漂移造成显示效果较差的外部补偿原理参见上述显示基板中的内容,在此不做详述。该补偿阶段可以是在开机前或关机后进行补偿。
基于同一发明构思,本公开实施例还提供了一种显示装置,包括本公开实施例提供的上述显示基板。该显示装置解决问题的原理与前述显示基板相似,因此该显示装置的实施可以参见前述显示基板的实施,重复之处在此不再赘述。
具体地,该显示装置可以为平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。对于该显示装置的其它必不可少的组成部分均为本领域的普通技术人员应该理解具有的,在此不做赘述,也不应作为对本公开的限制。
本公开实施例提供的一种显示基板及其驱动方法、显示装置,采用像素 岛的驱动方式,可以保证硅基OLED实现高PPI;另外,通过增加电连接于第一电源端VDD和驱动晶体管DT的第一极之间的发光控制电路4,这样在显示低灰阶画面时,可以固定低灰阶中对应最大的VDD电压,通过控制发光控制电路4的开启时长(脉冲宽度调制(pwm)的方法),来实现不同低灰阶显示,从而可以解决由于硅基OLED像素电流小,低灰阶显示困难的问题;并且,本公开增加的发光控制电路4是设置在相邻像素岛之间的间隙处的,因此不会增加原本子像素的面积,使得像素岛内可以设置相对较多数量的子像素,为实现高PPI奠定了基础。因此本公开实施例可以在实现高PPI的基础上,解决目前硅基OLED像素电流小,低灰阶显示困难的问题。
尽管已描述了本公开的优选实施例,但本领域内的技术人员一旦得知了基本创造性概念,则可对这些实施例作出另外的变更和修改。所以,所附权利要求意欲解释为包括优选实施例以及落入本公开范围的所有变更和修改。
显然,本领域的技术人员可以对本公开实施例进行各种改动和变型而不脱离本公开实施例的精神和范围。这样,倘若本公开实施例的这些修改和变型属于本公开权利要求及其等同技术的范围之内,则本公开也意图包含这些改动和变型在内。

Claims (14)

  1. 一种显示基板,其中,包括:
    衬底基板,具有独立设置的多个像素岛,所述像素岛包括阵列分布的多个子像素;
    像素电路,位于所述子像素内,所述像素电路包括驱动晶体管和发光器件,所述驱动晶体管的第一极与第一电源端电连接,所述驱动晶体管的第二极与所述发光器件的阳极电连接,所述发光器件的阴极与第二电源端电连接;
    多个发光控制电路,位于相邻所述像素岛之间的间隙处,所述发光控制电路电连接于所述第一电源端和所述驱动晶体管的第一极之间。
  2. 如权利要求1所述的显示基板,其中,至少一个所述像素岛内的所有驱动晶体管的第一极均电连接同一所述发光控制电路,不同所述像素岛内的驱动晶体管的第一极电连接的发光控制电路不同。
  3. 如权利要求2所述的显示基板,其中,所述发光控制电路包括第一开关晶体管,所述第一开关晶体管的栅极与发光控制端电连接,所述第一开关晶体管的第一极与所述第一电源端电连接,所述第一开关晶体管的第二极与所述驱动晶体管的第一极电连接。
  4. 如权利要求1所述的显示基板,其中,还包括多个电阻,所述电阻位于相邻所述像素岛之间的间隙处;
    所述电阻的第一端与所述发光器件的阳极电连接,所述电阻的第二端接地。
  5. 如权利要求4所述的显示基板,其中,至少一个所述像素岛内的所有发光器件的阳极均电连接同一所述电阻,不同所述像素岛内的发光器件的阳极电连接的电阻不同。
  6. 如权利要求4所述的显示基板,其中,所述电阻的阻值大于10KΩ。
  7. 如权利要求1所述的显示基板,其中,相邻所述像素岛之间的间隙宽度为10μm-30μm。
  8. 如权利要求1所述的显示基板,其中,所述像素电路还包括:第二开关晶体管、第三开关晶体管和电容;其中,
    所述第二开关晶体管的栅极与扫描控制端电连接,所述第二开关晶体管的第一极与数据信号端电连接,所述第二开关晶体管的第二极与所述驱动晶体管的栅极电连接;
    所述第三开关晶体管的栅极与检测控制端电连接,所述第三开关晶体管的第一极与检测信号端电连接,所述第三开关晶体管的第二极与所述发光器件的阳极电连接;
    所述电容电连接于所述驱动晶体管的栅极和第一极之间。
  9. 如权利要求1所述的显示基板,其中,还包括多条感测线;同一列所述子像素中的检测信号端与同一条所述感测线电连接,不同列所述子像素中的检测信号端电连接不同的所述感测线。
  10. 如权利要求1所述的显示基板,其中,同一所述像素岛内的各所述发光器件的发光颜色相同。
  11. 如权利要求1所述的显示基板,其中,多个所述像素岛呈阵列分布,且多个所述像素岛中具有多个显示红色的第一像素岛、多个显示绿色的第二像素岛以及多个显示蓝色的第三像素岛。
  12. 一种显示装置,其中,包括如权利要求1-11任一项所述的显示基板。
  13. 一种如权利要求1-11任一项所述的显示基板的驱动方法,其中,包括:
    重置阶段,对像素电路中的驱动晶体管与发光器件进行初始化;
    数据写入阶段,将数据信号与所述驱动晶体管的阈值电压写入所述驱动晶体管的控制极;
    发光阶段,控制所述驱动晶体管驱动所述发光器件发光。
  14. 如权利要求13所述的驱动方法,其中,在所述发光阶段,当确定所述发光器件的发光灰阶为预设灰阶时,固定所述第一电源端的电压,通过调节所述第一开关晶体管的占空比实现不同灰阶显示。
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