WO2022082991A1 - 一种透射电镜高分辨原位悬空式温差加压芯片及其制备方法 - Google Patents

一种透射电镜高分辨原位悬空式温差加压芯片及其制备方法 Download PDF

Info

Publication number
WO2022082991A1
WO2022082991A1 PCT/CN2020/138971 CN2020138971W WO2022082991A1 WO 2022082991 A1 WO2022082991 A1 WO 2022082991A1 CN 2020138971 W CN2020138971 W CN 2020138971W WO 2022082991 A1 WO2022082991 A1 WO 2022082991A1
Authority
WO
WIPO (PCT)
Prior art keywords
wafer
heating
chip
resolution
transmission electron
Prior art date
Application number
PCT/CN2020/138971
Other languages
English (en)
French (fr)
Inventor
廖洪钢
何娜娜
江友红
Original Assignee
厦门大学
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 厦门大学 filed Critical 厦门大学
Publication of WO2022082991A1 publication Critical patent/WO2022082991A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N23/00—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00
    • G01N23/02—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by transmitting the radiation through the material
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N23/00—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00
    • G01N23/20—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by using diffraction of the radiation by the materials, e.g. for investigating crystal structure; by using scattering of the radiation by the materials, e.g. for investigating non-crystalline materials; by using reflection of the radiation by the materials
    • G01N23/20008—Constructional details of analysers, e.g. characterised by X-ray source, detector or optical system; Accessories therefor; Preparing specimens therefor
    • G01N23/20025—Sample holders or supports therefor
    • G01N23/20033—Sample holders or supports therefor provided with temperature control or heating means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/02—Details
    • H01J37/20—Means for supporting or positioning the object or the material; Means for adjusting diaphragms or lenses associated with the support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/26—Electron or ion microscopes; Electron or ion diffraction tubes
    • H01J37/261—Details

Definitions

  • the invention relates to the field of in-situ characterization, in particular to a transmission electron microscope high-resolution in-situ suspended thermocompression chip and a preparation method thereof.
  • In situ TEM technology is widely used in various scientific fields due to its ultra-high spatial resolution (atomic level) and ultra-fast temporal resolution (millisecond level), which provides researchers with the opportunity to explore the microstructure of new materials.
  • New ideas and research methods The main performance is to build a visual window in the electron microscope, introduce external fields such as thermal field, optical field, electrochemical field, etc., to perform real-time dynamic in-situ testing of the sample.
  • researchers can capture the dynamic sensing of samples to the environment through in situ testing techniques, including important information such as size, morphology, crystal structure, atomic structure, chemical bonds, and thermal energy changes.
  • the morphological changes of materials at the atomic scale under the action of external fields have become the fundamental of materials research and development. It can be widely used in microstructure analysis, observation of nanomaterials research, etc., and has extremely high application value in biology, materials, and semiconductor electronic materials.
  • the current temperature difference chip still has defects such as low heating and cooling rate, insufficient temperature measurement and temperature control accuracy, low resolution, high sample drift rate, inability to realize temperature difference and pressure functions at the same time, and inconvenient sample placement. Some thermoelectric chips are improved.
  • the invention aims to provide a transmission electron microscope high-resolution in-situ suspended temperature difference pressure chip capable of simultaneously realizing the functions of temperature difference and pressure.
  • a transmission electron microscope high-resolution in-situ suspended thermocompression chip comprising a substrate covered with an insulating layer on both sides, a central viewing window in the middle of the substrate, the central viewing window being suspended in the air and covered with a layer of transparent film.
  • the support layer; the support layer in the central window has two heating wires symmetrically arranged left and right and two pressure circuits arranged symmetrically up and down, and the two pressure circuits are located in the gap between the two heating wires; each heating wire The wire is connected with four heating electrodes, and each heating electrode is connected to different positions of the heating wire through a heating circuit; each pressure circuit is connected with a pressure electrode, and each pressure electrode is connected with the corresponding Pressurized circuit connections.
  • a plurality of heat insulation holes are further provided in the gap between the two heating wires.
  • each pressing electrode is provided with a notch portion extending in the up-down direction, and the above-mentioned heat insulating holes are evenly distributed in the notch portion of the two pressing electrodes in the up-down direction.
  • the heat insulating hole is a square hole.
  • the four heating electrodes of each heating electrode form two sets of equivalent circuits, the two sets of equivalent circuits are controlled by separate current source meters and voltage source meters, and one of the two sets of equivalent circuits is responsible for power supply Heat, another set of loops is responsible for real-time monitoring of the resistance value of the heating wire after heating.
  • each pressurizing circuit is respectively provided with a set of equivalent circuits to realize the voltage difference.
  • the substrate is a silicon substrate
  • the insulating layer is a silicon nitride or silicon oxide insulating layer
  • the thickness of the silicon nitride or silicon oxide insulating layer is 0.5-5um
  • the thickness of the substrate is 50-500um.
  • the chip size of the high-resolution in-situ suspended thermocompression chip of the transmission electron microscope is 2mm*2mm-10mm*10mm or 4mm*8mm.
  • the invention also provides a preparation method of a high-resolution in-situ suspended thermocompression chip for transmission electron microscopy, comprising the following steps:
  • the silicon nitride or silicon oxide layer at the central viewing window is etched off the silicon nitride layer on the backside of wafer A-1, and then the wafer is placed backside up in acetone Soak, and finally rinse with acetone to remove the photoresist to obtain wafer A-2;
  • wafer A-2 Put the backside of wafer A-2 into a potassium hydroxide solution for wet etching until the film window appears, take out wafer A-2, rinse it with a large amount of deionized water, and dry it to obtain wafer A -3;
  • the pinhole pattern of the central window is transferred from the lithography mask to the front side of the wafer A-5, then developed in a positive gel developer, and then rinsed with deionized water. surface to obtain wafer A-6;
  • the silicon nitride or silicon oxide is etched at the small holes on the back of the wafer A-6, and then the front side of the wafer A-6 is put into acetone to soak, and finally the wafer A-6 is soaked with Rinse with acetone, remove the photoresist, and obtain wafer A-7;
  • the high-resolution in-situ suspended thermocompression chip for transmission electron microscopy provided by the present invention has the following advantages: At different temperatures, different voltages can also be applied to the samples, and solid materials can be studied under the stimulation of two external fields at different temperatures and voltages; and it has rapid temperature rise and fall, high resolution, accurate temperature measurement and temperature control, and simultaneous temperature difference and pressure. Features, convenient sample placement, and low sample drift rate.
  • Figure 1 shows a top view of a high-resolution in-situ floating thermocompression chip with a transmission electron microscope.
  • Figure 2 shows an enlarged view of the central window of a high-resolution in-situ suspended thermocompression chip for transmission electron microscopy.
  • FIG. 3 shows a front view of a high-resolution in-situ floating thermocompression chip with a transmission electron microscope.
  • this embodiment provides a high-resolution in-situ suspended thermocompression chip for transmission electron microscopy, including a substrate 1, the front and back of the substrate 1 are covered with an insulating layer 10.
  • the substrate in this embodiment is a silicon substrate, and the insulating layer is a silicon nitride or silicon oxide insulating layer.
  • the middle of the substrate 1 has a central window 11, the central window 11 is suspended, and the central window 11 is also covered with a support layer 10', and the support layer 10' is a silicon nitride layer or a silicon oxide layer.
  • the support layer in the central window 11 has two heating wires 12 symmetrically arranged left and right and two pressure circuits 13 arranged symmetrically up and down, and the two pressing circuits 13 are located in the gap between the two heating wires 12 .
  • the heating wire 12 is a spiral annular arc heating wire, and there are gaps between the arc heating wires, which are not connected to each other; each heating wire 12 is connected with four heating electrodes 121, and the four heating electrodes 121 are distributed on the base.
  • the eight heating electrodes 121 of the two heating wires 12 are respectively arranged on the left and right edges of the substrate 1 .
  • Each heating electrode 121 is connected to different positions of the heating wire 12 through a heating circuit 122, and the four heating electrodes make the heating wire form two sets of equivalent circuits.
  • the two sets of equivalent circuits use separate ammeters and voltages. Source meter control; one of the two groups of equivalent circuits is responsible for power supply and heating, and the other group of circuits is responsible for real-time monitoring of the resistance value of the heating wire after heating.
  • Each pressure circuit 13 is connected to a pressure electrode 131 , and the two pressure electrodes 131 of the two pressure circuits 13 are respectively disposed on the upper and lower edges of the substrate.
  • Each pressure electrode 131 is connected to the corresponding pressure circuit 13 through a pressure circuit.
  • a set of equivalent circuits are respectively provided in the two pressurizing circuits to realize the voltage difference.
  • a plurality of heat insulation holes 14 are further provided in the gap between the two heating wires 12 to reduce the mutual influence between the temperatures of the two heating wires 12 and improve the accuracy of temperature measurement and temperature control.
  • each pressurizing circuit 13 has a notch portion extending in the up-down direction, and the above-mentioned heat insulating holes 14 are evenly distributed in the notch portion of the two pressurizing circuits 13 in the up-down direction.
  • the heat insulating hole 14 is square.
  • the chip size of the high-resolution in-situ suspended thermocompression chip of the transmission electron microscope is 2mm*2mm-10mm*10mm; preferably, the chip size is 4mm*8mm.
  • the thickness of the silicon nitride or silicon oxide insulating layer is 0.5-5um, and the thickness of the substrate is 50-500um.
  • the central viewing window is a square central viewing window.
  • the size of the square center window is 0.5mm*0.5mm-1mm*1mm; more preferably, the size of the square center window is 0.8mm*0.8mm.
  • the outer diameter of the arc-shaped heating wire of the heating layer is 0.15-0.5 mm, and the thickness is 50-500 nm.
  • the heating wire is made of metal gold, platinum, palladium, rhodium, molybdenum, tungsten, platinum-rhodium alloy or non-metallic molybdenum carbide.
  • the size of the pressure circuit is 2um*150um-5um*300um, and the thickness is 50-500nm.
  • the pressurized circuit adopts metal gold, platinum, palladium, rhodium, molybdenum, tungsten, platinum-rhodium alloy or non-metallic molybdenum carbide.
  • This embodiment provides a method for preparing a high-resolution in-situ suspended thermocompression chip for transmission electron microscopy, including the following steps:
  • the photolithography process is exposure in the hard contact mode of an ultraviolet lithography machine;
  • the photoresist used in the photolithography process is AZ5214E;
  • the development time is 65s;
  • the exposure time is 20s;
  • the silicon nitride or silicon oxide layer at the central viewing window is etched off the silicon nitride layer on the backside of wafer A-1, and then the wafer is placed backside up in acetone Soak, and finally rinse with acetone to remove the photoresist to obtain wafer A-2;
  • Wafer A-3 Put the back side of wafer A-2 into potassium hydroxide solution for wet etching until only the film window remains on the front side, take out wafer A-2, rinse with a large amount of deionized water, and blow dry to obtain Wafer A-3;
  • the mass percentage concentration of the potassium hydroxide solution is 20%; the etching temperature is 70-90°C, and the etching time is 1.5-4h;
  • the etching temperature is 80°C; the etching time is 2h;
  • the lithography process is exposure in the hard contact mode of an ultraviolet lithography machine, and the photoresist used in the lithography process is AZ5214E; the development time is 50s;
  • the exposure time is 15s
  • the heating wire is an arc-shaped heating wire with an outer diameter of 0.15-0.5 mm and a thickness of 50-500 nm;
  • the material of the conductive layer is metal gold, platinum, palladium, rhodium, molybdenum, tungsten, platinum-rhodium alloy or non-metal molybdenum carbide; the thickness of the conductive layer is 50-500nm;
  • the photoresist used in the UV laser direct writing process is AZ5214E; the output power is 260W/us;
  • the silicon nitride or silicon oxide is etched at the small holes on the back of the wafer A-6, and then the front side of the wafer A-6 is put into acetone to soak, and finally the wafer A-6 is soaked with Rinse with acetone, remove the photoresist, and obtain wafer A-7;
  • the size of the small hole is 3um*30um-5um*50um;

Landscapes

  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Sampling And Sample Adjustment (AREA)

Abstract

一种透射电镜高分辨原位悬空式温差加压芯片及其制备方法，其中芯片包括双面覆盖有绝缘层（10）的基片（1），基片（1）的中部具有一中心视窗（11），中心视窗（11）悬空设置，且中心视窗（11）上还覆盖有一支撑层（10'）；中心视窗（11）内的支撑层（10'）上具有呈左右对称设置的两加热丝（12）以及呈上下对称设置的两加压电路（13），且两加压电路（13）位于两加热丝（12）之间的间隙中；每一加热丝（12）均连接有四个加热电极（121），每一加热电极（121）通过一加热线路（122）连接于加热丝（12）的不同位置上；每一加压电路（13）连接有一加压电极（131），每一加压电极（131）通过一加压线路与对应的加压电路（13）连接，芯片能够同时实现温差及加压功能。

Description

一种透射电镜高分辨原位悬空式温差加压芯片及其制备方法 技术领域
本发明涉及原位表征领域，具体是涉及透射电镜高分辨原位悬空式温差加压芯片及其制备方法。
背景技术
原位透射电镜技术以其超高空间分辨率(原子级)以及超快时间分辨率(毫秒级)的优势而被广泛应用于各个科学领域中，这为研究人员对新型材料微观结构的探索提供全新的思路和研究方法。主要表现为在电镜中搭建可视化的窗口，引入比如热场、光场、电化学场等外场作用，对样品进行实时动态的原位测试。研究学者可以通过原位测试技术捕获样品对环境的动态感应，包括尺寸、形态、晶体结构、原子结构、化学健、热能变化等重要信息。外场作用下材料在原子尺度的形态变化成为了材料研究和开发的根本。可以广泛用于显微结构分析、纳米材料研究的观测等，在生物、材料、半导体电子材料方面具有极高的应用价值。
目前的温差芯片还存在升降温速率低、测温控温准确性不足、分辨率较低、样品漂移率高、无法同时实现温差及加压功能、样品放置不方便等缺陷，因此有必要对现有的温差芯片进行改进。
发明内容
本发明旨在提供一种能够同时实现温差及加压功能的透射电镜高分辨原位悬空式温差加压芯片。
具体方案如下：
一种透射电镜高分辨原位悬空式温差加压芯片，包括双面覆盖有绝缘层的 基片，该基片的中部具有一中心视窗，该中心视窗悬空设置，且覆盖有一层透明薄膜制成的支撑层；该中心视窗内的支撑层上具有呈左右对称设置的两加热丝以及呈上下对称设置的两加压电路，且两加压电路位于两加热丝之间的间隙中；每一加热丝均连接有四个加热电极，每一加热电极通过一加热线路连接于加热丝的不同位置上；每一加压电路连接有一加压电极，每一加压电极通过一加压线路与对应的加压电路连接。
优选的，两加热丝之间的间隙中还设置有多个隔热孔。
优选的，每一加压电极的中部均有沿上下方向延伸设置的缺口部，上述的隔热孔沿上下方向均布于两加压电极的缺口部内。
优选的，该隔热孔为方形的孔洞。
优选的，每一加热电极的四个加热电极构成两组等效电路，两组等效电路分别使用单独的电流源表和电压源表控制，两组等效电路中的其中一组回路负责供电发热，另一组回路负责实时监控加热丝发热后的电阻值。
优选的，每一加压电路分别设置有一组等效电路，以实现电压差。
优选的，所述基片为硅基片，所述绝缘层为氮化硅或者氧化硅绝缘层，氮化硅或氧化硅绝缘层的厚度为0.5-5um，基片的厚度为50-500um。
优选的，该透射电镜高分辨原位悬空式温差加压芯片的芯片外形尺寸为2mm*2mm-10mm*10mm或者为4mm*8mm。
本发明还提供了一种透射电镜高分辨原位悬空式温差加压芯片的制备方法，包括以下步骤：
S1.准备两面带有氮化硅或氧化硅层的Si(100)晶圆A，氮化硅或氧化硅层 厚度5-200nm，硅片的厚度为50-500um；
S2.利用光刻工艺，将中心视窗图案从光刻掩膜版转移到上述晶圆A的任意一面，以此为背面，然后在正胶显影液中显影得到晶圆A-1；
S3.利用反应离子刻蚀工艺，在晶圆A-1的背面的氮化硅层上将中心视窗处的氮化硅或氧化硅层刻蚀掉，然后将晶圆背面朝上放入丙酮中浸泡，最后用丙酮冲洗，去掉光刻胶，得到晶圆A-2；
S4.将晶圆A-2的背面朝上放入氢氧化钾溶液中进行湿法刻蚀，直至薄膜窗口显现，取出晶圆A-2用大量去离子水冲洗后吹干，得到晶圆A-3；
S5.利用光刻工艺，将加热丝、加压电路、加热电极、加压电极、加热线路以及加压线路的图案从光刻掩膜版转移到晶圆A-3的正面，然后在正胶显影液中显影，再用去离子水冲洗清洗表面，得到晶圆A-4；
S6.利用电子束蒸发，在晶圆A-4的正面蒸镀一层导电材料，然后将晶圆A-4的正面朝上放入丙酮中浸泡剥离，最后用去离子水冲洗，去除光刻胶，留下步骤S5中图案所对应的导电层，得到晶圆A-5；
S7.利用紫外激光直写光刻工艺，将中心视窗的小孔图案从光刻掩膜版转移到晶圆A-5的正面，然后在正胶显影液中显影，再用去离子水冲洗清洗表面，得到晶圆A-6；
S8.利用反应离子刻蚀工艺，在晶圆A-6的背面的小孔处的氮化硅或氧化硅刻蚀，然后将晶圆A-6的正面朝上放入丙酮中浸泡，最后用丙酮冲洗，去掉光刻胶，得到晶圆A-7；
S9.将晶圆A-7进行激光划片，分成独立芯片。
本发明提供的透射电镜高分辨原位悬空式温差加压芯片与现有技术相比较具有以下优点：本发明提供的透射电镜高分辨原位悬空式温差加压芯片可对搭载的样品两端实施不同温度，还可以向样品施加不同电压，可对不同温度、电压两种外场刺激下的固体材料进行研究；且具有快速升降温、分辨率高、精准测温控温、同时实现温差及加压功能、放置样品方便、样品漂移率低的优点。
附图说明
图1示出了透射电镜高分辨原位悬空式温差加压芯片的俯视图。
图2示出了透射电镜高分辨原位悬空式温差加压芯片中心视窗的放大图。
图3示出了透射电镜高分辨原位悬空式温差加压芯片的正视图。
具体实施方式
为进一步说明各实施例，本发明提供有附图。这些附图为本发明揭露内容的一部分，其主要用以说明实施例，并可配合说明书的相关描述来解释实施例的运作原理。配合参考这些内容，本领域普通技术人员应能理解其他可能的实施方式以及本发明的优点。图中的组件并未按比例绘制，而类似的组件符号通常用来表示类似的组件。
现结合附图和具体实施方式对本发明进一步说明。
实施例1
如图1-图3所示的，本实施例提供了一种透射电镜高分辨原位悬空式温差加压芯片，包括一基片1，该基片1的正面和背面上均覆盖有一绝缘层10。其中，本实施例中的基片为硅基片，绝缘层为氮化硅或者氧化硅绝缘层。
该基片1的中部具有一中心视窗11，该中心视窗11悬空设置，且该中心视窗11上还覆盖有一支撑层10’，该支撑层10’为氮化硅层或者氧化硅层。
该中心视窗11内的支撑层上具有呈左右对称设置的两加热丝12以及呈上下对称设置的两加压电路13，且两加压电路13位于两加热丝12之间的间隙中。
其中，加热丝12为螺旋环形的弧形加热丝，弧形加热丝之间留有间隙，互不连接；每一加热丝12均连接有四个加热电极121，四个加热电极121分布在基片1的同侧边缘，两加热丝12的八个加热电极121分设于基片1的左右两侧边缘。每一加热电极121通过一加热线路122连接于加热丝12的不同位置上，四个加热电极以使该加热丝构成两组等效电路，两组等效电路分别使用单独的电流源表和电压源表控制；两组等效电路中的其中一组回路负责供电发热，另一组回路负责实时监控加热丝发热后的电阻值。
每一加压电路13连接有一加压电极131，两加压电路13的两加压电极131分设于基片的上下两侧边缘。每一加压电极131通过一加压线路与对应的加压电路13连接。优选的，两个加压电路分别设置有一组等效电路，以实现电压差。
在本实施例中，两加热丝12之间的间隙中还设置有多个隔热孔14，以降低两加热丝12温度之间的相互影响，提高测温控温的精确性。
优选的，每一加压电路13的中部均有沿上下方向延伸设置的缺口部，上述的隔热孔14沿上下方向均布于两加压电路13的缺口部内。
更优选的，该隔热孔14为方形。
在本实施例中，透射电镜高分辨原位悬空式温差加压芯片的芯片外形尺寸为2mm*2mm-10mm*10mm；优选的，芯片外形尺寸为4mm*8mm。
在本实施例中，氮化硅或氧化硅绝缘层的厚度为0.5-5um，基片的厚度为50-500um。
在本实施例中，中心视窗为方形中心视窗。优选的，方形中心视窗的大小 为0.5mm*0.5mm-1mm*1mm；更优选的，该方形中心视窗的大小为0.8mm*0.8mm。
在本实施例中，加热层的弧形加热丝的外径为0.15-0.5mm，厚度为50-500nm。优选的，加热丝采用的是金属金、铂、钯、铑、钼、钨、铂铑合金或非金属的碳化钼。
在本实施例中，加压电路尺寸为2um*150um-5um*300um，厚度为50-500nm。优选的，该加压电路采用的是金属金、铂、钯、铑、钼、钨、铂铑合金或非金属的碳化钼。
实施例2
本实施例提供了一种透射电镜高分辨原位悬空式温差加压芯片的制备方法，包括以下步骤：
S1.准备两面带有氮化硅或氧化硅层的Si(100)晶圆A，氮化硅或氧化硅层厚度0.5-5um，硅片的厚度为50-500um；
S2.利用光刻工艺，将中心视窗图案从光刻掩膜版转移到上述晶圆A的任意一面，以此为背面，然后在正胶显影液中显影得到晶圆A-1；
优选的，光刻工艺为在紫外光刻机的hard contact模式下曝光；光刻工艺中使用的光刻胶为AZ5214E；显影的时间为65s；
更优选的，曝光的时间为20s；
S3.利用反应离子刻蚀工艺，在晶圆A-1的背面的氮化硅层上将中心视窗处的氮化硅或氧化硅层刻蚀掉，然后将晶圆背面朝上放入丙酮中浸泡，最后用丙酮冲洗，去掉光刻胶，得到晶圆A-2；
S4.将晶圆A-2的背面朝上放入氢氧化钾溶液中进行湿法刻蚀，直至正面只留下薄膜窗口，取出晶圆A-2用大量去离子水冲洗后吹干，得到晶圆A-3；
优选的，所述氢氧化钾溶液的质量百分比浓度为20％；刻蚀的温度为70-90℃，刻蚀的时间为1.5-4h；
更优选的，刻蚀的温度为80℃；刻蚀的时间为2h；
S5.利用光刻工艺，将加热丝、加压电路、加热电极、加压电极、加热线路以及加压线路的图案从光刻掩膜版转移到晶圆A-3的正面，然后在正胶显影液中显影，再用去离子水冲洗清洗表面，得到晶圆A-4；
优选的，所述光刻工艺为在紫外光刻机的hard contact模式下曝光，光刻工艺所用光刻胶为AZ5214E；显影的时间为50s；
更优选的，曝光的时间为15s；
优选的，所述加热丝为弧形的加热丝，其外径为0.15-0.5mm，厚度为50-500nm；
S6.利用电子束蒸发，在晶圆A-4的正面蒸镀一层金属膜，然后将晶圆A-4的正面朝上放入丙酮中浸泡剥离，最后用去离子水冲洗，去除光刻胶，留下步骤S5中图案所对应的导电层，得到晶圆A-5；
优选的，所述导电层的材料为金属金、铂、钯、铑、钼、钨、铂铑合金或非金属的碳化钼；所述导电层的厚度为50-500nm；
S7.利用紫外激光直写光刻工艺，在晶圆A-5的正面构建中心视窗的小孔图案，然后在正胶显影液中显影，再用去离子水冲洗清洗表面，得到晶圆A-6；
优选的，所述紫外激光直写工艺的所用光刻胶为AZ5214E；输出功率为260W/us；
S8.利用反应离子刻蚀工艺，在晶圆A-6的背面的小孔处的氮化硅或氧化硅刻蚀，然后将晶圆A-6的正面朝上放入丙酮中浸泡，最后用丙酮冲洗，去掉 光刻胶，得到晶圆A-7；
优选的，所述小孔的尺寸为3um*30um-5um*50um；
S9.将晶圆A-7进行激光划片，分成独立芯片。
尽管结合优选实施方案具体展示和介绍了本发明，但所属领域的技术人员应该明白，在不脱离所附权利要求书所限定的本发明的精神和范围内，在形式上和细节上可以对本发明做出各种变化，均为本发明的保护范围。

Claims (9)

  1. 一种透射电镜高分辨原位悬空式温差加压芯片，其特征在于：包括双面覆盖有绝缘层的基片，该基片的中部具有一中心视窗，该中心视窗悬空设置，且覆盖有一层透明薄膜制成的支撑层；该中心视窗内的支撑层上具有呈左右对称设置的两加热丝以及呈上下对称设置的两加压电路，且两加压电路位于两加热丝之间的间隙中；每一加热丝均连接有四个加热电极，每一加热电极通过一加热线路连接于加热丝的不同位置上；每一加压电路连接有一加压电极，每一加压电极通过一加压线路与对应的加压电路连接。
  2. 根据权利要求1所述的透射电镜高分辨原位悬空式温差加压芯片，其特征在于：两加热丝之间的间隙中还设置有多个隔热孔。
  3. 根据权利要求2所述的透射电镜高分辨原位悬空式温差加压芯片，其特征在于：每一加压电路的中部均有沿上下方向延伸设置的缺口部，上述的隔热孔沿上下方向均布于两加压电路的缺口部内。
  4. 根据权利要求2所述的透射电镜高分辨原位悬空式温差加压芯片，其特征在于：该隔热孔为方形的孔洞。
  5. 根据权利要求1所述的透射电镜高分辨原位悬空式温差加压芯片，其特征在于：每一加热电极的四个加热电极构成两组等效电路，两组等效电路分别使用单独的电流源表和电压源表控制，两组等效电路中的其中一组回路负责供电发热，另一组回路负责实时监控加热丝发热后的电阻值。
  6. 根据权利要求1所述的透射电镜高分辨原位悬空式温差加压芯片，其特征在于：每一加压电路分别设置有一组等效电路，以实现电压差。
  7. 根据权利要求1所述的透射电镜高分辨原位悬空式温差加压芯片，其特征在于：所述基片为硅基片，所述绝缘层为氮化硅或者氧化硅绝缘层，氮化硅或氧 化硅绝缘层的厚度为0.5-5um，基片的厚度为50-500um。
  8. 根据权利要求1所述的透射电镜高分辨原位悬空式温差加压芯片，其特征在于：该透射电镜高分辨原位悬空式温差加压芯片的芯片外形尺寸为2mm*2mm-10mm*10mm或者为4mm*8mm。
  9. 一种透射电镜高分辨原位悬空式温差加压芯片的制备方法，其特征在于，包括以下步骤：
    S1.准备两面带有氮化硅或氧化硅层的Si(100)晶圆A，氮化硅或氧化硅层厚度0.5-5um，硅片的厚度为50-500um；
    S2.利用光刻工艺，将中心视窗图案从光刻掩膜版转移到上述晶圆A的任意一面，以此为背面，然后在正胶显影液中显影得到晶圆A-1；
    S3.利用反应离子刻蚀工艺，在晶圆A-1的背面的氮化硅层上将中心视窗处的氮化硅或氧化硅层刻蚀掉，然后将晶圆背面朝上放入丙酮中浸泡，最后用丙酮冲洗，去掉光刻胶，得到晶圆A-2；
    S4.将晶圆A-2的背面朝上放入氢氧化钾溶液中进行湿法刻蚀，直至正面只留下薄膜窗口，取出晶圆A-2用大量去离子水冲洗后吹干，得到晶圆A-3；
    S5.利用光刻工艺，将加热丝、加压电路、加热电极、加压电极、加热线路以及加压线路的图案从光刻掩膜版转移到晶圆A-3的正面，然后在正胶显影液中显影，再用去离子水冲洗清洗表面，得到晶圆A-4；
    S6.利用电子束蒸发，在晶圆A-4的正面蒸镀一层金属膜，然后将晶圆A-4的正面朝上放入丙酮中浸泡剥离，最后用去离子水冲洗，去除光刻胶，留下步骤S5中图案所对应的导电层，得到晶圆A-5；
    S7.利用紫外激光直写光刻工艺，在晶圆A-5的正面构建中心视窗的小孔 图案，然后在正胶显影液中显影，再用去离子水冲洗清洗表面，得到晶圆A-6；
    S8.利用反应离子刻蚀工艺，在晶圆A-6的背面的小孔处的氮化硅或氧化硅刻蚀，然后将晶圆A-6的正面朝上放入丙酮中浸泡，最后用丙酮冲洗，去掉光刻胶，得到晶圆A-7；
    S9.将晶圆A-7进行激光划片，分成独立芯片。
PCT/CN2020/138971 2020-10-20 2020-12-24 一种透射电镜高分辨原位悬空式温差加压芯片及其制备方法 WO2022082991A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202011121745.5 2020-10-20
CN202011121745.5A CN112129786A (zh) 2020-10-20 2020-10-20 一种透射电镜高分辨原位悬空式温差加压芯片及其制备方法

Publications (1)

Publication Number Publication Date
WO2022082991A1 true WO2022082991A1 (zh) 2022-04-28

Family

ID=73852659

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/138971 WO2022082991A1 (zh) 2020-10-20 2020-12-24 一种透射电镜高分辨原位悬空式温差加压芯片及其制备方法

Country Status (2)

Country Link
CN (1) CN112129786A (zh)
WO (1) WO2022082991A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117727711A (zh) * 2024-02-07 2024-03-19 厦门超新芯科技有限公司 一种高倾角的原位加热芯片

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112129793A (zh) * 2020-10-20 2020-12-25 厦门大学 一种透射电镜高分辨原位温差加压芯片及其制备方法
CN114018959B (zh) * 2021-11-09 2024-07-16 北京工业大学 透射电镜原位原子尺度电热耦合芯片及其制备方法
CN114264678A (zh) * 2021-12-30 2022-04-01 北京工业大学 原位透射电镜加热芯片及其制备方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150179397A1 (en) * 2007-05-09 2015-06-25 Protochips, Inc. Microscopy support structures
US20180266989A1 (en) * 2017-03-20 2018-09-20 National Technology & Engineering Solutions Of Sandia, Llc Active Mechanical-Environmental-Thermal MEMS Device for Nanoscale Characterization
CN109665485A (zh) * 2018-12-06 2019-04-23 苏州原位芯片科技有限责任公司 一种用于微观原位观察的mems加热芯片及其制作方法
CN109975348A (zh) * 2019-03-07 2019-07-05 北京工业大学 一种原位热电性能测试装置、制备方法及系统
CN210167322U (zh) * 2019-07-29 2020-03-20 中国科学院金属研究所 一种热场、电场、偏压复合外场仿真环境芯片
CN111312573A (zh) * 2020-03-12 2020-06-19 厦门超新芯科技有限公司 一种透射电镜高分辨原位液相加热芯片及其制备方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106206227B (zh) * 2016-08-02 2018-01-09 天津理工大学 一种具备场效应晶体管功能的透射电镜样品台载样区
CN109865541B (zh) * 2019-03-12 2020-07-03 厦门大学 一种扫描电镜原位电化学检测芯片及其制作方法
CN111370280B (zh) * 2020-03-12 2022-03-18 厦门超新芯科技有限公司 一种透射电镜高分辨原位气相加热芯片及其制备方法
CN213544440U (zh) * 2020-10-20 2021-06-25 厦门大学 一种透射电镜高分辨原位悬空式温差加压芯片

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150179397A1 (en) * 2007-05-09 2015-06-25 Protochips, Inc. Microscopy support structures
US20180266989A1 (en) * 2017-03-20 2018-09-20 National Technology & Engineering Solutions Of Sandia, Llc Active Mechanical-Environmental-Thermal MEMS Device for Nanoscale Characterization
CN109665485A (zh) * 2018-12-06 2019-04-23 苏州原位芯片科技有限责任公司 一种用于微观原位观察的mems加热芯片及其制作方法
CN109975348A (zh) * 2019-03-07 2019-07-05 北京工业大学 一种原位热电性能测试装置、制备方法及系统
CN210167322U (zh) * 2019-07-29 2020-03-20 中国科学院金属研究所 一种热场、电场、偏压复合外场仿真环境芯片
CN111312573A (zh) * 2020-03-12 2020-06-19 厦门超新芯科技有限公司 一种透射电镜高分辨原位液相加热芯片及其制备方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117727711A (zh) * 2024-02-07 2024-03-19 厦门超新芯科技有限公司 一种高倾角的原位加热芯片
CN117727711B (zh) * 2024-02-07 2024-05-10 厦门超新芯科技有限公司 一种高倾角的原位加热芯片

Also Published As

Publication number Publication date
CN112129786A (zh) 2020-12-25

Similar Documents

Publication Publication Date Title
WO2022082991A1 (zh) 一种透射电镜高分辨原位悬空式温差加压芯片及其制备方法
CN111312573B (zh) 一种透射电镜高分辨原位液相加热芯片及其制备方法
CN109865541B (zh) 一种扫描电镜原位电化学检测芯片及其制作方法
CN111370280B (zh) 一种透射电镜高分辨原位气相加热芯片及其制备方法
CN110736760B (zh) 一种透射电镜原位电化学检测芯片及其制作方法
CN105136822A (zh) 一种纳米材料透射电镜原位测试芯片、芯片制备方法及其应用
CN213544440U (zh) 一种透射电镜高分辨原位悬空式温差加压芯片
WO2022041597A1 (zh) 一种透射电镜高分辨原位流体扰流加热芯片
CN101957327A (zh) 用于检查样品的方法
CN107328808B (zh) 用于测试半导体薄膜塞贝克系数的基片及制备和测试方法
CN110501365A (zh) 一种原位加热芯片及其制作方法
US20210025936A1 (en) Evaluation Apparatus for Semiconductor Device
CN108447796A (zh) 一种半导体芯片结构参数分析方法
WO2022082989A1 (zh) 一种透射电镜高分辨原位温差加压芯片及其制备方法
WO2022040967A1 (zh) 一种透射电镜高分辨原位温差芯片及其制备方法
CN214150510U (zh) 一种透射电镜高分辨原位温差加压芯片
CN106206227B (zh) 一种具备场效应晶体管功能的透射电镜样品台载样区
CN107132497B (zh) 用于无损检测半导体薄膜霍尔效应的基片及其制备方法
CN106971952A (zh) 半导体器件失效分析样品及其制备方法、失效分析方法
CN111812125A (zh) 一种透射电镜高分辨原位液相变温芯片及其制备方法
CN113205989A (zh) 一种透射电镜高分辨原位温差芯片及其制备方法
JP2006234511A (ja) マイクロプローブの製造方法
WO2020182184A1 (zh) 一种透射电镜原位电化学检测芯片、原位液体池芯片、原位加热芯片及其制备方法
US20210033642A1 (en) Probe Module and Probe
WO2021179541A1 (zh) 一种透射电镜原位芯片及其制备方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20958565

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20958565

Country of ref document: EP

Kind code of ref document: A1