WO2022036993A1 - 一种智能功率模块 - Google Patents

一种智能功率模块 Download PDF

Info

Publication number
WO2022036993A1
WO2022036993A1 PCT/CN2020/141821 CN2020141821W WO2022036993A1 WO 2022036993 A1 WO2022036993 A1 WO 2022036993A1 CN 2020141821 W CN2020141821 W CN 2020141821W WO 2022036993 A1 WO2022036993 A1 WO 2022036993A1
Authority
WO
WIPO (PCT)
Prior art keywords
chip
bridge power
power chip
substrate
power module
Prior art date
Application number
PCT/CN2020/141821
Other languages
English (en)
French (fr)
Inventor
魏调兴
Original Assignee
广东美的白色家电技术创新中心有限公司
美的集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 广东美的白色家电技术创新中心有限公司, 美的集团股份有限公司 filed Critical 广东美的白色家电技术创新中心有限公司
Publication of WO2022036993A1 publication Critical patent/WO2022036993A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits

Definitions

  • the invention relates to the technical field of power drive control, in particular to an intelligent power module.
  • Intelligent Power Module is a power drive product that integrates power switching devices and drive circuits. It not only has the functions of detection and protection of faults such as undervoltage, overcurrent and overheating, but also can output error signals. to the control unit. Therefore, in the case of a load accident or improper use of the system, the intelligent power module itself can be guaranteed not to be damaged. Therefore, the intelligent power module occupies the market with its advantages of high reliability, low loss and low cost. It is especially suitable for inverters and various inverter power supplies for driving motors. An ideal power electronic device for home appliances.
  • the current smart power module generally includes an upper bridge power chip 11 composed of a freewheeling diode 101 and an upper bridge arm switch tube 102 , a freewheeling diode 103 and an upper bridge power chip 11 .
  • Multiple chips such as the lower bridge power chip 12 and the driving chip 13 composed of the lower bridge arm switch tube 104 occupy a large area, which is not conducive to the miniaturization of the intelligent power module.
  • the driving loop and the power loop will be long, resulting in large parasitic inductance, which affects the working performance of the intelligent power module.
  • the present invention provides an intelligent power module to solve the technical problem that the intelligent power module occupies a large area and is prone to generate parasitic inductance in the prior art.
  • a technical solution adopted by the present invention is to provide an intelligent power module, which includes a substrate, a circuit wiring layer arranged on the substrate, and an upper bridge power chip stacked on the circuit wiring layer, A lower bridge power chip and a driving chip, the lower bridge power chip is electrically connected with the upper bridge power chip, and the driving chip is electrically connected with the upper bridge power chip and the lower bridge power chip respectively.
  • the first of the upper-bridge power chip and the lower-bridge power chip, the second of the upper-bridge power chip and the lower-bridge power chip, and the driver chip are far away from the circuit.
  • the wiring layers are sequentially stacked in the direction of the wiring layers.
  • the orthographic projection of the driving chip on the substrate falls within the orthographic projection of the second one of the upper-bridge power chip and the lower-bridge power chip on the substrate.
  • the orthographic projection of the upper bridge power chip on the substrate at least partially overlaps the orthographic projection of the lower bridge power chip on the substrate.
  • the length direction of the upper bridge power chip and the length direction of the lower bridge power chip are arranged at an included angle.
  • the length direction of the first one of the upper bridge power chip and the lower bridge power chip is arranged along the length direction of the substrate, and the second one of the upper bridge power chip and the lower bridge power chip is arranged along the length direction of the substrate.
  • the length direction of the substrate is arranged along the width direction of the substrate.
  • the orthographic projection of a short side of the second one of the upper-bridge power chip and the lower-bridge power chip on the substrate falls within the upper-bridge power chip and the lower-bridge power chip.
  • the first one is within the orthographic projection on the substrate and is spaced apart from the orthographic projection of the long side of the first one of the upper-bridge power chip and the lower-bridge power chip on the substrate.
  • the orthographic projection of the driving chip on the substrate falls into the orthographic projection of the upper bridge power chip on the substrate and the orthographic projection of the lower bridge power chip on the substrate within the overlapping area.
  • the intelligent power module further includes a conductive carrier, which is arranged between the upper bridge power chip and the lower bridge power chip and is used to electrically connect the upper bridge power chip. chip and the lower bridge power chip.
  • the upper bridge power chip includes a first freewheeling diode and an upper bridge arm switch tube that are electrically connected
  • the lower bridge power chip includes a second freewheeling diode and a lower bridge arm switch tube that are electrically connected.
  • the upper bridge power chip and the lower bridge power chip are RC-IGBT chips, MOSFET chips or HEMT chips
  • the driving chips are HVIC chips.
  • the present invention can greatly reduce the area occupied by the intelligent power module by stacking the upper bridge power chip, the lower bridge power chip and the driving chip of the intelligent power module on the substrate, which is beneficial to the miniaturization of the intelligent power module, and can also The drive loop and power loop are shortened, thereby reducing parasitic inductance and ensuring the working performance of the intelligent power module.
  • FIG. 1 is a schematic structural diagram of an intelligent power module in the prior art
  • FIG. 2 is a schematic circuit diagram of an intelligent power module in the prior art
  • FIG. 3 is a schematic structural diagram of an embodiment of an intelligent power module of the present invention.
  • FIG. 4 is a schematic circuit diagram of an embodiment of an intelligent power module of the present invention.
  • first and second in this application are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implicitly indicating the number of indicated technical features.
  • a plurality of means at least two, such as two, three, etc., unless otherwise expressly and specifically defined.
  • the terms “comprising” and “having” and any variations thereof are intended to cover non-exclusive inclusion.
  • a process, method, system, product or device comprising a series of steps or units is not limited to the listed steps or units, but optionally also includes unlisted steps or units, or optionally also includes For other steps or units inherent to these processes, methods, products or devices.
  • an embodiment of the smart power module 10 of the present invention includes a substrate 100 , a circuit wiring layer 200 disposed on the substrate 100 , and an upper bridge power chip 300 and a lower bridge power chip 400 stacked on the circuit wiring layer 200 . and the driver chip 500 , the lower bridge power chip 400 is electrically connected to the upper bridge power chip 300 , and the driver chip 500 is electrically connected to the upper bridge power chip 300 and the lower bridge power chip 400 respectively.
  • the area occupied by the intelligent power module 10 can be greatly reduced, which is beneficial to the intelligent power
  • the miniaturization of the module 10 can also shorten the driving loop and the power loop, thereby reducing the parasitic inductance and ensuring the working performance of the intelligent power module 10 .
  • the first one of the upper bridge power chip 300 and the lower bridge power chip 400 , the second one of the upper bridge power chip 300 and the lower bridge power chip 400 , and the driving chip 500 are stacked in sequence in a direction away from the circuit wiring layer 200 . .
  • the number of the upper-bridge power chip 300 , the lower-bridge power chip 400 and the driving chip 500 is three respectively, and each corresponding upper-bridge power chip 300 , the lower-bridge power chip 400 and the driving chip 500 are far away from the circuit
  • the wiring layers 200 are stacked in sequence, and the three upper bridge power chips 300 are arranged on the bottom layer, which can be directly electrically connected to each other through the circuit wiring layer; and the three lower bridge power chips 400 are electrically connected through the conductive wires 430, and their layout is reasonable.
  • the connection structure between the three upper-bridge power chips 300 and the three lower-bridge power chips 400 can be simplified; by dividing the driving chips 500 into three, and comparing FIG. 2 and FIG.
  • the distance between the connection lines (not marked in the figure) of the upper bridge power chip 300 and the lower bridge power chip 400 can shorten the driving loop and reduce the parasitic inductance.
  • the driver chip 500 can also be disposed on the bottom layer, that is, the driver chip 500 is disposed on the circuit wiring layer 200 , the lower bridge power chip 400 is disposed on the driver chip 500 , and the upper bridge power chip 300 is disposed on the lower On the bridge power chip 400 , the connection method is similar to the above-mentioned embodiment in which the upper bridge power chip 300 is placed on the bottom layer, and details are not described herein again.
  • the orthographic projection of the driving chip 500 on the substrate 100 falls within the orthographic projection of the second one of the upper-bridge power chip 300 and the lower-bridge power chip 400 on the substrate 100, which can reduce the size of the upper-bridge power chip 300 and the space occupied by the second one of the lower bridge power chip 400 and the driver chip 500 at the same time, and is pre-planned for the connection line (ie, the conductive line 430 ) connecting the second one of the upper bridge power chip 300 and the second one of the lower bridge power chip 400 . Leave enough space.
  • the orthographic projection of the upper-bridge power chip 300 on the substrate 100 and the orthographic projection of the lower-bridge power chip 400 on the substrate 100 at least partially overlap, which can be a prediction for the first of the upper-bridge power chip 300 and the lower-bridge power chip 400 . Leave room for connection points to make connections to other chips.
  • the length direction of the upper bridge power chip 300 and the length direction of the lower bridge power chip 400 are arranged at an angle, for example, they may be arranged perpendicular to each other, so that the upper bridge power chip 300 and the lower bridge power chip 400 are two
  • the layout between them is more reasonable, and the space for the connection point is reserved while occupying a smaller area, which is conducive to the miniaturization of the intelligent power module, and makes the connection line between the upper bridge power chip 300 and the lower bridge power chip 400 .
  • the distance is shorter, thereby shortening the power loop and reducing the parasitic inductance.
  • the upper bridge power chip 300 is arranged in a rectangular shape, and the extension direction of the longer side of the upper bridge power chip 300 is defined as the length direction of the upper bridge power chip 300.
  • the definition of the length direction in the following is similar. It is not repeated here.
  • the length direction of the first one of the upper bridge power chip 300 and the lower bridge power chip 400 is arranged along the length direction of the substrate 100
  • the second one of the upper bridge power chip 300 and the lower bridge power chip 400 is arranged along the length direction of the substrate 100 .
  • the length direction is arranged along the width direction of the substrate 100 , which can make the matching layout of the upper bridge power chip 300 , the lower bridge power chip 400 and the substrate 100 more reasonable, and the size of the substrate 100 is smaller, which is conducive to the miniaturization of the intelligent power module.
  • the orthographic projection of a short side of the second one of the upper-bridge power chip 300 and the lower-bridge power chip 400 on the substrate 100 falls into the first of the upper-bridge power chip 300 and the lower-bridge power chip 400 It is within the orthographic projection on the substrate 100 and is spaced apart from the orthographic projection of the long side of the first of the upper-bridge power chip 300 and the lower-bridge power chip 400 on the substrate 100, which can ensure that the upper-bridge power chip 300 and the lower-bridge power chip 400 While the bridge power chips 400 are stacked to reduce the occupied area, space is reserved for the first one of the upper bridge power chip 300 and the lower bridge power chip 400 to connect with other chips.
  • the orthographic projection of the driving chip 500 on the substrate 100 falls within the overlapping area of the orthographic projection of the upper bridge power chip 300 on the substrate 100 and the orthographic projection of the lower bridge power chip 400 on the substrate 100, which can reduce
  • the space occupied by the small upper-bridge power chip 300, the lower-bridge power chip 400 and the driver chip 500 at the same time is pre-planned for the connection line (ie, the conductive wire 430) connecting the second one of the upper-bridge power chip 300 and the lower-bridge power chip 400. Leave enough space; and the distance between the driver chip 500 and the upper bridge power chip 300 and the lower bridge power chip 400 can be minimized at the same time, thereby reducing the distance between the driver chip 500 and the upper bridge power chip 300 and the lower bridge power chip 400 respectively.
  • the distance between the connecting lines can be shortened, and the driving loop can be shortened, so that the parasitic inductance can be reduced.
  • the smart power module 10 may further include a conductive carrier 600 , and the conductive carrier 600 is disposed between the upper-bridge power chip 300 and the lower-bridge power chip 400 for electrically connecting the upper-bridge power chip 300 and the lower-bridge
  • the power chip 400 is electrically connected through the conductive carrier sheet 600 , which can avoid the complicated connection and wiring through the connecting wire, and the problems such as short circuit easily occur during the wiring process, and the reliability is high.
  • the upper bridge power chip 300 includes a first freewheeling diode 310 and an upper bridge arm switch tube 320 that are electrically connected
  • the lower bridge power chip 400 includes a second freewheeling diode 410 that is electrically connected and a lower bridge arm switch tube 420
  • the upper bridge power chip 300 and the lower bridge power chip 400 can be RC-IGBT (Reverse-Conducting Insulated Gate Bipolar Transistor) chips, MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) chips or HEMT (High Electron Mobility Transistor) chips
  • the driver chip 500 may be an HVIC (High Voltage Integrated Circuit, high voltage integrated circuit) chip.
  • the cathode of the first freewheeling diode 310 is electrically connected to the collector of the upper bridge arm switch tube 320
  • the anode of the first freewheeling diode 310 is electrically connected to the emitter of the upper bridge arm switch tube 320
  • the three The collectors of the upper-arm switch tubes 320 are electrically connected through the circuit wiring layer 200 .
  • the cathode of the second freewheeling diode 410 is electrically connected to the collector of the lower arm switch tube 420
  • the anode of the second freewheeling diode 410 is electrically connected to the emitter of the lower arm switch tube 420
  • the collector of the lower arm switch tube 420 is electrically connected.
  • the electrodes are electrically connected to the emitters of the corresponding upper-arm switch tubes 320 through the conductive carrier 600
  • the emitters of the three lower-arm switch tubes 420 are electrically connected through conductive wires 430 .
  • the driving chip 500 is electrically connected to the gate of the upper-arm switch 320 and the gate of the lower-arm switch 420 , respectively.
  • the three upper arm switch tubes 320 are used as the upper arm switch tubes of the U phase, the V phase and the W phase, respectively, and the three lower arm switch tubes 420 are respectively used as the U phase, V phase and W phase.
  • Lower bridge arm switch tube is used as the upper arm switch tubes of the U phase, the V phase and the W phase.
  • the substrate 100 may be metal
  • the intelligent power module 10 further includes an insulating layer 700 disposed between the substrate 100 and the circuit wiring layer 200 .
  • the substrate 100 may also be a non-conductive material, and the circuit wiring layer 200 is directly disposed on the substrate 100 , which is not limited herein.
  • the intelligent power module 10 may further include a package body (not shown in the figure), the package body is used to package the upper bridge power chip 300 , the lower bridge power chip 400 , and the driving chip 500 on the substrate 100 .
  • the intelligent power module 10 may further include lead wires 210, which are connected to the circuit wiring layer 200 and extend out of the package for electrically connecting the intelligent power module 10 with other modules.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

本发明公开了一种智能功率模块, 该智能功率模块包括基板、设置于基板上的电路布线层以及层叠设置于电路布线层上的上桥功率芯片、下桥功率芯片和驱动芯片, 下桥功率芯片与上桥功率芯片电连接, 驱动芯片分别与上桥功率芯片和下桥功率芯片电连接。本发明通过将智能功率模块的上桥功率芯片、下桥功率芯片和驱动芯片层叠设置于基板上, 能够极大地减小智能功率模块占据的面积, 有利于智能功率模块的小型化, 并且还能够缩短驱动回路和功率回路, 进而减小寄生电感, 保证智能功率模块的工作性能。

Description

一种智能功率模块
本申请要求于2020年08月21日提交的申请号为2020108522363，发明名称为“一种智能功率模块”的中国专利申请的优选权，其通过引用方式全部并入本申请。
【技术领域】
本发明涉及功率驱动控制技术领域，特别涉及一种智能功率模块。
【背景技术】
智能功率模块(IPM，Intelligent Power Module)是一种将功率开关器件和驱动电路集成的功率驱动类产品，不仅具有欠电压、过电流和过热等故障的检测、保护功能，还可以将错误信号输出至控制单元。因此在系统发生负载事故或使用不当的情况下，也能够保证智能功率模块自身不受损坏。因此智能功率模块以其高可靠性、低损耗、低成本等优势占据市场，尤其适用于驱动电机的变频器及各种逆变电源，是变频调速、冶金机械、电力牵引、伺服驱动、变频家电的一种理想电力电子器件。
本申请的发明人在长期的研发中发现，如图1所示，目前智能功率模块一般包括由续流二极管101和上桥臂开关管102组成的上桥功率芯片11、由续流二极管103和下桥臂开关管104组成的下桥功率芯片12以及驱动芯片13等多个芯片，占据面积较大，不利于智能功率模块的小型化。并且如图2所示，由于多个芯片在平面上排布需要间隔一定距离，会造成驱动回路和功率回路较长，产生的寄生电感较大，影响智能功率模块的工作性能。
【发明内容】
本发明提供一种智能功率模块，以解决现有技术中智能功率模块占据面积较大，且易产生寄生电感的技术问题。
为解决上述技术问题，本发明采用的一个技术方案是提供一种智能功率模块，包括基板、设置于所述基板上的电路布线层以及层叠设置于所述电路布线层上的上桥功率芯片、下桥功率芯片和驱动芯片，所述下桥功率芯片与所述上桥功率芯片电连接，所述驱动芯片分别与所述上桥功率芯片和所述下桥功率芯片电连接。
在一具体实施例中，所述上桥功率芯片和下桥功率芯片中的第一者、所述上桥功率芯片和下桥功率芯片中的第二者以及所述驱动芯片在远离所述电路布线层的方向上依次层叠。
在一具体实施例中，所述驱动芯片在所述基板上的正投影落入所述上桥功率芯片和下桥功率芯片中的第二者在所述基板上的正投影内。
在一具体实施例中，所述上桥功率芯片在所述基板上的正投影与所述下桥功率芯片在所述基板上的正投影至少部分重叠。
在一具体实施例中，所述上桥功率芯片的长度方向与所述下桥功率芯片的长度方向之间呈夹角设置。
在一具体实施例中，所述上桥功率芯片和下桥功率芯片中的第一者的长度方向沿所述基板的长度方向设置，所述上桥功率芯片和下桥功率芯片中的第二者的长度方向沿所述基板的宽度方向设置。
在一具体实施例中，所述上桥功率芯片和下桥功率芯片中的第二者的一短边在所述基板上的正投影落入所述上桥功率芯片和下桥功率芯片中的第一者在所述基板上的正投影内，且与所述上桥功率芯片和下桥功率芯片中的第一者的长边在所述基板上的正投影间隔设置。
在一具体实施例中，所述驱动芯片在所述基板上的正投影落入所述上桥功率芯片在所述基板上的正投影与所述下桥功率芯片在所述基板上的正投影的重叠区域内。
在一具体实施例中，所述智能功率模块进一步包括导电载片，所述导电载片设置于所述上桥功率芯片与所述下桥功率芯片之间，用于电连接所述上桥功 率芯片与所述下桥功率芯片。
在一具体实施例中，所述上桥功率芯片包括电连接的第一续流二极管及上桥臂开关管，所述下桥功率芯片包括电连接的第二续流二极管及下桥臂开关管，所述上桥功率芯片和所述下桥功率芯片为RC-IGBT芯片、MOSFET芯片或HEMT芯片，所述驱动芯片为HVIC芯片。
本发明通过将智能功率模块的上桥功率芯片、下桥功率芯片和驱动芯片层叠设置于基板上，能够极大地减小智能功率模块占据的面积，有利于智能功率模块的小型化，并且还能够缩短驱动回路和功率回路，进而减小寄生电感，保证智能功率模块的工作性能。
【附图说明】
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图，其中：
图1是现有技术中智能功率模块的结构示意图；
图2是现有技术中智能功率模块的电路示意图；
图3是本发明智能功率模块实施例的结构示意图；
图4是本发明智能功率模块实施例的电路示意图。
【具体实施方式】
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，均属于本发明保护的范围。
本申请中的术语“第一”、“第二”仅用于描述目的，而不能理解为指示或 暗示相对重要性或者隐含指明所指示的技术特征的数量。本申请的描述中，“多个”的含义是至少两个，例如两个，三个等，除非另有明确具体的限定。此外，术语“包括”和“具有”以及它们任何变形，意图在于覆盖不排他的包含。例如包含了一系列步骤或单元的过程、方法、系统、产品或设备没有限定于已列出的步骤或单元，而是可选地还包括没有列出的步骤或单元，或可选地还包括对于这些过程、方法、产品或设备固有的其它步骤或单元。而术语“和/或”，仅仅是一种描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。另外，本文中字符“/”，一般表示前后关联对象是一种“或”的关系。
参见图3和图4，本发明智能功率模块10实施例包括基板100、设置于基板100上的电路布线层200以及层叠设置于电路布线层200上的上桥功率芯片300、下桥功率芯片400和驱动芯片500，下桥功率芯片400与上桥功率芯片300电连接，驱动芯片500分别与上桥功率芯片300和所下桥功率芯片400电连接。
本发明实施例通过将智能功率模块10的上桥功率芯片300、下桥功率芯片400和驱动芯片500层叠设置于基板100上，能够极大地减小智能功率模块10占据的面积，有利于智能功率模块10的小型化，并且还能够缩短驱动回路和功率回路，进而减小寄生电感，保证智能功率模块10的工作性能。
其中，上桥功率芯片300和下桥功率芯片400中的第一者、上桥功率芯片300和下桥功率芯片400中的第二者以及驱动芯片500在远离电路布线层200的方向上依次层叠。
在本实施例中，上桥功率芯片300、下桥功率芯片400以及驱动芯片500的数量分别为三个，每个对应的上桥功率芯片300、下桥功率芯片400以及驱动芯片500在远离电路布线层200的方向上依次层叠，将三个上桥功率芯片300设置在底层，能够直接通过电路布线层相互电连接；而三个下桥功率芯片400通过导电线430电连接，其布局合理，能够简化三个上桥功率芯片300、三个下桥功率芯片400各自之间的连接结构；通过将驱动芯片500分为三个，对比图2 和图4，能够减小驱动芯片500与对应的上桥功率芯片300、下桥功率芯片400的连接线(图中未标出)的距离，进而缩短驱动回路，减小寄生电感。
在其他实施例中，也可以将驱动芯片500设置于底层，即将驱动芯片500设置于电路布线层200上，下桥功率芯片400设置于驱动芯片500上，而将上桥功率芯片300设置于下桥功率芯片400上，其连接方式与上述上桥功率芯片300置于底层的实施例类似，在此不再赘述。
在本实施例中，驱动芯片500在基板100上的正投影落入上桥功率芯片300和下桥功率芯片400中的第二者在基板100上的正投影内，能够减小上桥功率芯片300和下桥功率芯片400中的第二者和驱动芯片500同时占据的空间，并为连接上桥功率芯片300和下桥功率芯片400中的第二者的连接线(即导电线430)预留足够空间。
其中，上桥功率芯片300在基板100上的正投影与下桥功率芯片400在基板100上的正投影至少部分重叠，能够为上桥功率芯片300和下桥功率芯片400中的第一者预留与其他芯片进行连接的连接点的空间。
在本实施例中，上桥功率芯片300的长度方向与下桥功率芯片400的长度方向之间呈夹角设置，例如可以呈彼此垂直设置，使得上桥功率芯片300与下桥功率芯片400两者之间的布局更加合理，在预留连接点空间的同时占据更小的面积位置，有利于智能功率模块的小型化，并且使得上桥功率芯片300与下桥功率芯片400之间的连接线的距离更短，从而缩短功率回路，减小寄生电感。
在本实施例中，上桥功率芯片300呈矩形设置，定义上桥功率芯片300中边长较长的一边的延伸方向为上桥功率芯片300的长度方向，下文中长度方向的定义与其类似，在此不再赘述。
在本实施例中，上桥功率芯片300和下桥功率芯片400中的第一者的长度方向沿基板100的长度方向设置，上桥功率芯片300和下桥功率芯片400中的第二者的长度方向沿基板100的宽度方向设置，能够使得上桥功率芯片300、下桥功率芯片400与基板100的配合布局更加合理，基板100尺寸更小，有利于 智能功率模块的小型化。
在本实施例中，上桥功率芯片300和下桥功率芯片400中的第二者的一短边在基板100上的正投影落入上桥功率芯片300和下桥功率芯片中400的第一者在基板100上的正投影内，且与上桥功率芯片300和下桥功率芯片400中的第一者的长边在基板100上的正投影间隔设置，能够保证上桥功率芯片300和下桥功率芯片400在层叠设置以减小占据面积的同时，为上桥功率芯片300和下桥功率芯片中400的第一者预留与其他芯片进行连接的连接点的空间。
在本实施例中，驱动芯片500在基板100上的正投影落入上桥功率芯片300在基板100上的正投影与下桥功率芯片400在基板100上的正投影的重叠区域内，能够减小上桥功率芯片300、下桥功率芯片400和驱动芯片500同时占据的空间，并为连接上桥功率芯片300和下桥功率芯片400中的第二者的连接线(即导电线430)预留足够空间；且能够使得驱动芯片500距离上桥功率芯片300和下桥功率芯片400之间的距离同时达到最小，进而减小驱动芯片500分别与上桥功率芯片300和下桥功率芯片400之间的连接线的距离，缩短驱动回路，从而能够减小寄生电感。
在本实施例中，智能功率模块10进一步可以包括导电载片600，导电载片600设置于上桥功率芯片300与下桥功率芯片400之间，用于电连接上桥功率芯片300与下桥功率芯片400，通过导电载片600进行电连接，能够避免通过连接线进行连接绕线复杂，走线过程中易发生短路等问题，可靠性高。
在本实施例中，上桥功率芯片300包括电连接的第一续流二极管310及上桥臂开关管320，下桥功率芯片400包括电连接的第二续流二极管410及下桥臂开关管420，上桥功率芯片300和下桥功率芯片400可以为RC-IGBT(Reverse-Conducting Insulated Gate Bipolar Transistor)芯片、MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor)芯片或HEMT(High Electron Mobility Transistor)芯片等，驱动芯片500可以为HVIC(High Voltage Integrated Circuit，高压集成电路)芯片。
在本实施例中，第一续流二极管310的负极与上桥臂开关管320的集电极电连接，第一续流二极管310的正极与上桥臂开关管320的发射极电连接，且三个上桥臂开关管320的集电极通过电路布线层200电连接。第二续流二极管410的负极与下桥臂开关管420的集电极电连接，第二续流二极管410的正极与下桥臂开关管420的发射极电连接，下桥臂开关管420的集电极通过导电载片600与对应的上桥臂开关管320的发射极电连接，且三个下桥臂开关管420的发射极通过导电线430电连接。
在本实施例中，驱动芯片500分别与上桥臂开关管320的栅极、下桥臂开关管420的栅极电连接。
在本实施例中，三个上桥臂开关管320分别作为U相、V相和W相的上桥臂开关管，三个下桥臂开关管420分别作为U相、V相和W相的下桥臂开关管。
在本实施例中，基板100可以为金属，智能功率模块10进一步包括绝缘层700，绝缘层700设置于基板100与电路布线层200之间。
在其他实施例中，基板100也可以为非导电材料，电路布线层200直接设置于基板100上，在此不做限制。
在本实施例中，智能功率模块10进一步可以包括封装体(图中未示出)，封装体用于将上桥功率芯片300、下桥功率芯片400、驱动芯片500封装于基板100上。
在本实施例中，智能功率模块10进一步可以包括引线210，引线210与电路布线层200连接，且伸出于封装体外，用于将智能功率模块10与其他模块电连接。
以上所述仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (19)

  1. 一种智能功率模块，其特征在于，包括基板、设置于所述基板上的电路布线层以及层叠设置于所述电路布线层上的上桥功率芯片、下桥功率芯片和驱动芯片，所述下桥功率芯片与所述上桥功率芯片电连接，所述驱动芯片分别与所述上桥功率芯片和所述下桥功率芯片电连接。
  2. 根据权利要求1所述的智能功率模块，其特征在于，所述上桥功率芯片和下桥功率芯片中的第一者、所述上桥功率芯片和下桥功率芯片中的第二者以及所述驱动芯片在远离所述电路布线层的方向上依次层叠。
  3. 根据权利要求2所述的智能功率模块，其特征在于，所述驱动芯片在所述基板上的正投影落入所述上桥功率芯片和下桥功率芯片中的第二者在所述基板上的正投影内。
  4. 根据权利要求2所述的智能功率模块，其特征在于，所述上桥功率芯片在所述基板上的正投影与所述下桥功率芯片在所述基板上的正投影至少部分重叠。
  5. 根据权利要求4所述的智能功率模块，其特征在于，所述上桥功率芯片的长度方向与所述下桥功率芯片的长度方向之间呈夹角设置。
  6. 根据权利要求5所述的智能功率模块，其特征在于，所述上桥功率芯片的长度方向与所述下桥功率芯片的长度方向之间呈彼此垂直设置。
  7. 根据权利要求4所述的智能功率模块，其特征在于，所述上桥功率芯片和下桥功率芯片中的第一者的长度方向沿所述基板的长度方向设置，所述上桥功率芯片和下桥功率芯片中的第二者的长度方向沿所述基板的宽度方向设置。
  8. 根据权利要求4所述的智能功率模块，其特征在于，所述上桥功率芯片和下桥功率芯片中的第二者的一短边在所述基板上的正投影落入所述上桥功率芯片和下桥功率芯片中的第一者在所述基板上的正投影内，且与所述上桥功率芯片和下桥功率芯片中的第一者的长边在所述基板上的正投影间隔设置。
  9. 根据权利要求4所述的智能功率模块，其特征在于，所述驱动芯片在所述基板上的正投影落入所述上桥功率芯片在所述基板上的正投影与所述下桥功率芯片在所述基板上的正投影的重叠区域内。
  10. 根据权利要求1所述的智能功率模块，其特征在于，所述驱动芯片设置于所述电路布线层上，所述下桥功率芯片设置于所述驱动芯片上，上桥功率芯片设置于所述下桥功率芯片上。
  11. 根据权利要求1所述的智能功率模块，其特征在于，所述智能功率模块进一步包括导电载片，所述导电载片设置于所述上桥功率芯片与所述下桥功率芯片之间，用于电连接所述上桥功率芯片与所述下桥功率芯片。
  12. 根据权利要求1所述的智能功率模块，其特征在于，所述上桥功率芯片包括电连接的第一续流二极管及上桥臂开关管，所述下桥功率芯片包括电连接的第二续流二极管及下桥臂开关管，所述上桥功率芯片和所述下桥功率芯片为RC-IGBT芯片、MOSFET芯片或HEMT芯片，所述驱动芯片为HVIC芯片。
  13. 根据权利要求12所述的智能功率模块，其特征在于，所述上桥功率芯片、所述下桥功率芯片以及所述驱动芯片的数量分别为三个，每个对应的所述上桥功率芯片、所述下桥功率芯片以及所述驱动芯片在远离所述电路布线层的方向上依次层叠，所述第一续流二极管的负极与所述上桥臂开关管的集电极电连接，所述第一续流二极管的正极与所述上桥臂开关管的发射极电连接，且三个所述上桥臂开关管的集电极通过所述电路布线层电连接，所述第二续流二极管的负极与所述下桥臂开关管的集电极电连接，所述第二续流二极管的正极与所述下桥臂开关管的发射极电连接，所述下桥臂开关管的集电极通过导电载片与对应的所述上桥臂开关管的发射极电连接，且三个所述下桥臂开关管的发射极通过导电线电连接。
  14. 根据权利要求13所述的智能功率模块，其特征在于，所述驱动芯片分别与所述上桥臂开关管的栅极、下桥臂开关管的栅极电连接。
  15. 根据权利要求13所述的智能功率模块，其特征在于，三个所述上桥臂 开关管分别作为U相、V相和W相的上桥臂开关管，三个所述下桥臂开关管分别作为U相、V相和W相的下桥臂开关管。
  16. 根据权利要求1所述的智能功率模块，其特征在于，所述基板为金属，所述智能功率模块进一步包括绝缘层，所述绝缘层设置于所述基板与所述电路布线层之间。
  17. 根据权利要求1所述的智能功率模块，其特征在于，所述基板为非导电材料。
  18. 根据权利要求1所述的智能功率模块，其特征在于，所述智能功率模块进一步包括封装体，所述封装体用于将所述上桥功率芯片、所述下桥功率芯片、所述驱动芯片封装于所述基板上。
  19. 根据权利要求18所述的智能功率模块，其特征在于，所述智能功率模块进一步包括引线，所述引线与所述电路布线层连接，且伸出于所述封装体外，用于将所述智能功率模块与其他模块电连接。
PCT/CN2020/141821 2020-08-21 2020-12-30 一种智能功率模块 WO2022036993A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202010852236.3 2020-08-21
CN202010852236.3A CN114078829A (zh) 2020-08-21 2020-08-21 一种智能功率模块

Publications (1)

Publication Number Publication Date
WO2022036993A1 true WO2022036993A1 (zh) 2022-02-24

Family

ID=80282477

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/141821 WO2022036993A1 (zh) 2020-08-21 2020-12-30 一种智能功率模块

Country Status (2)

Country Link
CN (1) CN114078829A (zh)
WO (1) WO2022036993A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115206958A (zh) * 2022-09-16 2022-10-18 四川奥库科技有限公司 一种基于dbc/dpc基板和引线框架的ipm封装系统及方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101223644A (zh) * 2005-07-15 2008-07-16 三垦电气株式会社 半导体装置
CN102709282A (zh) * 2011-04-28 2012-10-03 成都芯源系统有限公司 多芯片封装结构、变换器模块及封装方法
CN102760724A (zh) * 2011-04-29 2012-10-31 万国半导体股份有限公司 一种联合封装的功率半导体器件
US20140061884A1 (en) * 2011-03-07 2014-03-06 Texas Instruments Incorporated Stacked die power converter
US20150243589A1 (en) * 2010-06-18 2015-08-27 Yueh-Se Ho Combined packaged power semiconductor device
CN110060991A (zh) * 2019-04-26 2019-07-26 广东美的制冷设备有限公司 智能功率模块及空调器
CN110911357A (zh) * 2019-11-28 2020-03-24 广东美的制冷设备有限公司 智能功率模块及空调器

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101223644A (zh) * 2005-07-15 2008-07-16 三垦电气株式会社 半导体装置
US20150243589A1 (en) * 2010-06-18 2015-08-27 Yueh-Se Ho Combined packaged power semiconductor device
US20140061884A1 (en) * 2011-03-07 2014-03-06 Texas Instruments Incorporated Stacked die power converter
CN102709282A (zh) * 2011-04-28 2012-10-03 成都芯源系统有限公司 多芯片封装结构、变换器模块及封装方法
CN102760724A (zh) * 2011-04-29 2012-10-31 万国半导体股份有限公司 一种联合封装的功率半导体器件
CN110060991A (zh) * 2019-04-26 2019-07-26 广东美的制冷设备有限公司 智能功率模块及空调器
CN110911357A (zh) * 2019-11-28 2020-03-24 广东美的制冷设备有限公司 智能功率模块及空调器

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115206958A (zh) * 2022-09-16 2022-10-18 四川奥库科技有限公司 一种基于dbc/dpc基板和引线框架的ipm封装系统及方法

Also Published As

Publication number Publication date
CN114078829A (zh) 2022-02-22

Similar Documents

Publication Publication Date Title
US11270984B2 (en) Semiconductor module
JP4450530B2 (ja) インバータモジュール
EP4044250A1 (en) Insulated gate bipolar field-effect transistor, group, and power converter
CN109768694A (zh) 一种具有熔断器的功率模块
WO2022036993A1 (zh) 一种智能功率模块
CN109768039A (zh) 一种双面散热功率模块
CN213547390U (zh) 一种逆变驱动电路及变频装置
CN109585436A (zh) 一种穿插分支布局的功率模块
JPH10285950A (ja) ３レベル電力変換装置の主回路
CN110868086B (zh) 智能功率模块及空调器
CN205140970U (zh) 一种功率模块
CN210723007U (zh) 一种用于集成功率模块的引线框架
CN113314345A (zh) 一种新型电极电容及功率模组
CN114465495A (zh) 一种智能功率模块及家电设备
CN111817536A (zh) 一种智能功率模块
WO2020078082A1 (zh) 一种分边连接功率电极组合及功率模块
CN218827132U (zh) 一种增强型功率模块及功率模组
CN221614839U (zh) 功率半导体模块及半桥功率模块
JP6638477B2 (ja) 半導体装置
CN111162069B (zh) 一种智能功率模块及其制备方法
CN109585437A (zh) 一种多层功率模块
JP2014192976A (ja) 半導体装置
CN218548435U (zh) 一种半导体电路及智能功率模块
CN109768036A (zh) 一种具有回流导电层的功率模块
US20240136399A1 (en) Semiconductor device and power conversion device

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20950193

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20950193

Country of ref document: EP

Kind code of ref document: A1