WO2022011911A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2022011911A1
WO2022011911A1 PCT/CN2020/129981 CN2020129981W WO2022011911A1 WO 2022011911 A1 WO2022011911 A1 WO 2022011911A1 CN 2020129981 W CN2020129981 W CN 2020129981W WO 2022011911 A1 WO2022011911 A1 WO 2022011911A1
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WO
WIPO (PCT)
Prior art keywords
opening
layer
flexible substrate
display panel
thin film
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PCT/CN2020/129981
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English (en)
French (fr)
Inventor
赵慧慧
卜呈浩
Original Assignee
武汉华星光电半导体显示技术有限公司
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Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US17/264,811 priority Critical patent/US11678543B2/en
Publication of WO2022011911A1 publication Critical patent/WO2022011911A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/301—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements flexible foldable or roll-able electronic displays, e.g. thin LCD, OLED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates
    • H10K77/111—Flexible substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
    • H01L29/78648—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate arranged on opposing sides of the channel
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/311—Flexible OLED
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/549—Organic PV cells

Definitions

  • the present invention relates to the technical field of display panels, and in particular, to a display panel and a display device.
  • LTPO Low Temperature Polycrystalline Oxide
  • TFT Low Temperature Polycrystalline Oxide
  • the common LTPO product is the double-layer SD structure, and the double-layer SD structure usually has 17-18 Mask (mask).
  • the inorganic layer in the bending area is generally opened twice to form ODH (Organic Deep Hole) holes and then filled with organic materials, which requires higher process accuracy. High, it is easy to affect the product yield.
  • ODH Organic Deep Hole
  • Embodiments of the present invention provide a display panel and a display device to improve product yield while ensuring the bending performance of the bending region.
  • An embodiment of the present invention provides a display panel, including a first area and a bent second area connected to the first area, the display panel includes: a flexible substrate, wherein a bottom of the flexible substrate is provided with a first opening, the first opening is located in the second area; a first inorganic layer located on the side of the flexible substrate away from the first opening; located on the first inorganic layer and located on the first inorganic layer A first thin film transistor and a second thin film transistor in a region, wherein the first thin film transistor includes a silicon semiconductor layer, the second thin film transistor includes a metal oxide semiconductor layer; the second thin film transistor on the silicon semiconductor layer an inorganic layer, wherein the second inorganic layer is provided with a second opening, the second opening is located in the second region, the second opening and the first opening at least partially overlap; and the second opening is located in the first opening A thin film transistor, the second thin film transistor, and an organic layer on the second inorganic layer, the organic layer being located in the second opening.
  • the second inorganic layer includes a first gate insulating layer on the silicon semiconductor layer, and the second opening portion penetrates the first gate insulating layer.
  • the display panel further includes a signal line located in the second opening, and the bottom of the signal line is flush with the top of the silicon semiconductor layer.
  • the second inorganic layer further includes a second insulating layer on the first gate insulating layer, a first interlayer dielectric layer on the second insulating layer, and a second insulating layer on the second insulating layer.
  • the first thin film transistor also includes a second gate insulating layer on the first A first gate between the gate insulating layer and the second insulating layer and corresponding to the silicon semiconductor layer, located between the second insulating layer and the first interlayer dielectric layer and corresponding to the first gate electrode a first conductive layer of the first gate, and a first source and a first drain connected to the silicon semiconductor layer;
  • the metal oxide semiconductor layer of the second thin film transistor is located on the first layer between the interlayer dielectric layer and the third gate insulating layer, the second thin film transistor further includes a metal oxide layer located between the second insulating layer and the first interlayer dielectric layer and corresponding to the metal oxide a third gate electrode of the material semiconductor layer, a fourth gate electrode located between the third gate insulating layer and the second interlayer dielectric layer and corresponding to the metal oxide semiconductor layer, and connected to the The second source electrode and the second drain electrode
  • the top of the second opening away from the flexible substrate is larger than the bottom of the second opening.
  • the first opening is greater than or equal to the top of the second opening, or the first opening is greater than or equal to the bottom of the second opening and smaller than the second opening the top.
  • the bottom of the first opening away from the first inorganic layer is larger than the top of the first opening.
  • the inclination angle of the first opening is greater than the inclination angle of the second opening.
  • a depth of a central portion of the first opening is greater than a depth of a peripheral portion of the first opening, wherein the central portion overlaps the bottom of the second opening.
  • the plurality of the first openings are arranged on the flexible substrate at intervals.
  • the depth of the first opening located in the central portion is greater than the depth of the first opening located in the peripheral portion; or, the width of the first opening located in the central portion is greater than that of all the openings located in the peripheral portion. or the distribution density of the plurality of first openings located in the central portion is greater than the distribution density of the plurality of first openings located in the peripheral portion.
  • the depth of the second opening is 1.1 ⁇ m -1.4 ⁇ m
  • the inclination angle of the second opening is 30°-60°.
  • the second opening does not penetrate through the first inorganic layer.
  • the first opening and the second opening are symmetrical.
  • the flexible substrate includes a first flexible substrate, a second flexible substrate on the first flexible substrate, and the first flexible substrate and the second flexible substrate
  • the carrier layer between, the symmetry plane of the first opening and the second opening is located at the plane at 1/3 thickness of the second flexible substrate and at 1/2 thickness of the second flexible substrate Between the planes, the first opening is provided at the bottom of the first flexible substrate.
  • the second opening includes a first opening part away from the flexible substrate and a second opening part connected to the first opening part and close to the flexible substrate, the first opening part Symmetrically arranged with the second opening, the top of the first opening away from the flexible substrate is larger than the bottom of the first opening.
  • An embodiment of the present invention provides a display device including the above-mentioned display panel.
  • the second opening is provided in the second inorganic layer on the silicon semiconductor layer, and the flexible substrate is provided with a certain portion corresponding to the second opening.
  • the first opening is used, so that the bending performance of the bending area can be ensured, and the product yield can be improved at the same time.
  • FIG. 1 is a schematic cross-sectional view of a display panel according to an embodiment of the present invention
  • FIG. 2 is a schematic cross-sectional view of a second region of a display panel according to an embodiment of the present invention.
  • FIG. 3 is a schematic cross-sectional view of a second region of a display panel according to an embodiment of the present invention.
  • FIG. 4 is a schematic cross-sectional view of a second region of a display panel according to an embodiment of the present invention.
  • first and second are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implying the number of indicated technical features. Thus, features defined as “first”, “second” may expressly or implicitly include one or more of said features. In the description of the present invention, “plurality” means two or more, unless otherwise expressly and specifically defined.
  • the terms “installed”, “connected” and “connected” should be understood in a broad sense, unless otherwise expressly specified and limited, for example, it may be a fixed connection or a detachable connection Connection, or integral connection; it can be a mechanical connection, an electrical connection or can communicate with each other; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal communication of two elements or the interaction of two elements relation.
  • installed should be understood in a broad sense, unless otherwise expressly specified and limited, for example, it may be a fixed connection or a detachable connection Connection, or integral connection; it can be a mechanical connection, an electrical connection or can communicate with each other; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal communication of two elements or the interaction of two elements relation.
  • a first feature "on” or “under” a second feature may include the first and second features in direct contact, or may include the first and second features Not directly but through additional features between them.
  • the first feature being “above”, “over” and “above” the second feature includes the first feature being directly above and obliquely above the second feature, or simply means that the first feature is level higher than the second feature.
  • the first feature is “below”, “below” and “below” the second feature includes the first feature being directly below and diagonally below the second feature, or simply means that the first feature has a lower level than the second feature.
  • an embodiment of the present invention provides a display panel 1 , which includes a first area 11 and a bent second area 12 connected to the first area 11 , and the second area 12 is used for bending to the back of the display panel to narrow the lower bezel.
  • the display panel 1 includes a flexible substrate 2 , a first inorganic layer 3 , first and second thin film transistors 4 and 5 , a second inorganic layer 6 , and an organic layer 7 .
  • the display panel 1 is an OLED (Organic Light Emitting Diode) display panel
  • the first area 11 is a display area
  • the second area 12 is a non-display area.
  • the bottom of the flexible substrate 2 is provided with a first opening 211 , and the first opening 211 is located in the second area 12 .
  • the flexible substrate 2 includes a single-layer structure or a multi-layer structure.
  • the first inorganic layer 3 is located on the side of the flexible substrate 2 away from the first opening 211 .
  • the first thin film transistor 4 and the second thin film transistor 5 are located on the first inorganic layer 3 and located in the first region 11 .
  • the first thin film transistor 4 includes a silicon semiconductor layer 40
  • the second thin film transistor 5 includes a metal oxide semiconductor layer 50 .
  • the material of the silicon semiconductor layer 40 includes single crystal silicon or low temperature polysilicon
  • the material of the metal oxide semiconductor layer 50 includes indium gallium zinc oxide (IGZO) or zinc oxide (ZnO).
  • the second inorganic layer 6 is located on the silicon semiconductor layer 40 .
  • the second inorganic layer 6 is provided with a second opening 611 , the second opening 611 is located in the second region 12 , and the second opening 611 at least partially overlaps the first opening 211 .
  • the organic layer 7 is located on the first thin film transistor 4 , the second thin film transistor 5 and the second inorganic layer 6 .
  • the organic layer 7 extends from the first region 11 to the second region 12 and is located in the second opening 611 .
  • the first inorganic layer 3 and the second inorganic layer 6 are respectively disposed on both sides of the silicon semiconductor layer of the first thin film transistor 4, and the second opening 611 is arranged in the second inorganic layer 6, compared with forming two second openings in the first inorganic layer and the second inorganic layer in the prior art, the complexity of the process for forming the second opening can be reduced; and the The flexible substrate 2 is provided with the first opening 211 corresponding to the second opening 611 , and the second opening 611 is filled with an organic layer with better flexibility, so that the bending performance of the bending area can be improved while ensuring the bending performance. Product yield.
  • the second opening 611 does not penetrate the first inorganic layer 3 .
  • the first inorganic layer 3 includes a buffer layer 30 , a silicon nitride layer 31 on the buffer layer 30 , and a silicon oxide layer 32 on the silicon nitride layer 31 .
  • the thickness of the buffer layer 30 is 400 nm-600 nm
  • the thickness of the silicon nitride layer 31 is 40 nm-60 nm
  • the thickness of the silicon oxide layer 32 is 200 nm-400 nm.
  • the first inorganic layer 3 may only include a two-layer structure, such as a silicon nitride layer 31 and a silicon oxide layer 32 . In this way, one ODH mask can be saved, and water vapor can be prevented from invading from the second area 12 to the first area 11 , so as to prevent OLED failure caused by water vapor intrusion, thereby improving product yield.
  • the second inorganic layer 6 may have a single-layer structure or a multi-layer structure. Specifically, the second inorganic layer 6 in this embodiment includes a multi-layer structure.
  • the second inorganic layer 6 includes a first gate insulating layer 61 on the silicon semiconductor layer 40 , and the second opening 611 at least partially penetrates the first gate insulating layer 61 .
  • the second opening 611 partially penetrates the first gate insulating layer 61 , and the thickness of the first gate insulating layer 61 under the second opening 611 is 1 nm-50 nm. In this way, the remaining first gate insulating layer 61 can prevent water vapor from invading from the second region 12 to the first region 11 , and can protect the first inorganic layer 3 from damage in subsequent processes.
  • the display panel 1 further includes a signal line 8 located in the second opening 611 , and the bottom of the signal line 8 is flush with the top of the silicon semiconductor layer 40 .
  • the signal line 8 extends along part or all of the inner wall of the second opening 611 .
  • the second inorganic layer 6 further includes a second insulating layer 62 on the first gate insulating layer 61 , a first interlayer dielectric layer 63 on the second insulating layer 62 , A third gate insulating layer 64 on the first interlayer dielectric layer 63 , and a second interlayer dielectric layer 65 on the third gate insulating layer 64 .
  • the first thin film transistor 4 also includes a first gate 41 located between the first gate insulating layer 61 and the second insulating layer 62 and corresponding to the silicon semiconductor layer 40, The first conductive layer 42 between the insulating layer 62 and the first interlayer dielectric layer 63 and corresponding to the first gate electrode 41 , and the first source electrode 43 and the first source electrode 43 connected to the silicon semiconductor layer 40 . A drain 44. Wherein, the first conductive layer 42 can form a capacitor with the first gate 41 .
  • the metal oxide semiconductor layer 50 of the second thin film transistor 5 is located between the first interlayer dielectric layer 63 and the third gate insulating layer 64, and the second thin film transistor 5 further includes Between the second insulating layer 62 and the first interlayer dielectric layer 63 and corresponding to the third gate electrode 51 of the metal oxide semiconductor layer 50, the third gate insulating layer 64 and the third gate electrode 51 are located between the second insulating layer 62 and the first interlayer dielectric layer 63. between the second interlayer dielectric layers 65 and corresponding to the fourth gate electrode 52 of the metal oxide semiconductor layer 50 , and the second source electrode 53 and the second drain electrode connected to the metal oxide semiconductor layer 50 Pole 54.
  • the second opening 611 penetrates through the second insulating layer 62 , the first interlayer dielectric layer 63 , the third gate insulating layer 64 , and the second interlayer dielectric layer 65 and At least part of the first gate insulating layer 61 , the depth of the second opening 611 is 1.1 ⁇ m-1.4 ⁇ m, the first source electrode 43 and the first drain electrode 44 , and the second source electrode 53 and the second drain electrode 54 are in the same layer.
  • the top of the second opening 611 away from the flexible substrate 2 is larger than the bottom of the second opening 611 . In this way, the hole opening process is facilitated, and it is easy to bend, and the signal line 8 extending along the inner wall of the opening 611 is not easily broken.
  • the first opening 211 is greater than or equal to the top of the second opening 611 , or the first opening 211 is greater than or equal to the bottom of the second opening 611 and smaller than the second opening The top of the 611.
  • the bottom of the first opening 211 away from the first inorganic layer 3 is larger than the top of the first opening 211 .
  • the bending axis can be limited within the limited range of the first opening 211, thereby ensuring the stability of the bending.
  • the inclination angle ⁇ of the first opening 211 is greater than the inclination angle ⁇ of the second opening 611 .
  • the inclination angle ⁇ of the one opening refers to the angle formed between the side wall of the first opening 211 and the flexible substrate 2 without the first opening 211 in the cross-sectional view.
  • the inclination angle ⁇ of the two openings refers to the angle formed between the sidewall of the second opening 611 and the first gate insulating layer 61 without the second opening 611 in the cross-sectional view.
  • the inclination angle ⁇ of the second opening 611 is 30°-60°
  • the inclination angle ⁇ of the first opening 211 is an acute angle greater than 30°, such as 45°, 60° or 85°. In this way, it can be ensured that the bending axis is limited within the range defined by the first opening 211, thereby ensuring the stability of the bending.
  • the depth of the central portion of the first opening 211 is greater than the depth of the peripheral portion of the first opening 211 , wherein the central portion overlaps the bottom of the second opening 611 . In this way, it can be ensured that the bending axis is limited within the range defined by the bottom of the second opening 611 .
  • the multiple first openings 211 are provided on the flexible substrate 2 at intervals. That is, the bottom of the flexible substrate 2 may be patterned to form a plurality of openings.
  • the depth of the first opening 211 located in the central portion is greater than the depth of the first opening 211 located in the peripheral portion; or, the width of the first opening 211 located in the central portion is greater than all the openings located in the peripheral portion.
  • the width of the first opening 211; or the distribution density of the plurality of first openings 211 in the central portion is greater than the distribution density of the plurality of first openings 211 in the peripheral portion.
  • the plurality of first openings 211 located in the central portion overlap with the bottoms of the second openings 611 . In this way, it can be ensured that the bending axis is limited within the range defined by the bottom of the second opening 611 .
  • the first opening 211 and the second opening 611 are symmetrical in the horizontal direction, that is, the extension line of the side wall of the first opening 211 is the same as the second opening 211 .
  • the extension line of the side wall of the opening 611 is on a straight line.
  • the flexible substrate 2 includes a first flexible substrate 21, a second flexible substrate 22 located on the first flexible substrate 21, and a second flexible substrate 22 located on the first flexible substrate 21 and the second flexible substrate 21.
  • the carrier layer 23 between the substrates 22, the symmetry planes of the first opening 211 and the second opening 611 are located at the plane at 1/3 of the thickness of the second flexible substrate 22 and the second flexible substrate Between the planes at 1/2 thickness of the bottom 22 , the first opening 211 is provided at the bottom of the first flexible substrate 21 .
  • the first flexible substrate 21 is thicker than the second flexible substrate 22, the thickness of the first flexible substrate 21 without the first opening 211 is 3 ⁇ m-10 ⁇ m, the first flexible substrate 21 The thickness of the first flexible substrate 21 on an opening 211 is 1 ⁇ m-5 ⁇ m. In this way, the neutral plane (the plane with 0 stress) can be brought close to or located on the signal line 8 .
  • the second opening 611 includes a first opening portion 613 away from the flexible substrate 2 and a second opening portion 613 connected to the first opening portion 613 and close to the flexible substrate 2 .
  • the openings 614 , the first openings 613 and the second openings 614 are symmetrically arranged, and the top of the first opening 613 away from the flexible substrate 2 is larger than the bottom of the first opening 613 .
  • the first opening portion 613 and the second opening portion 614 are symmetrical along the horizontal direction, and are formed by a photomask. In this way, the opening process can be facilitated, the bending axis can be limited within the limited range of the second opening 611, and the bending stability can be ensured.
  • the organic layer 7 is continuous, including a first portion located in the first region 11 and a second portion located in the second region 12, and the second portion is located in the second region 12.
  • the opening 611 covers the signal line 8 .
  • the display panel 1 further includes a second metal layer 90 on the organic layer 7 , a second organic layer 93 on the second metal layer 90 , and a light-emitting layer.
  • the light-emitting layer includes a first electrode 91 , a second electrode 92 located on the first electrode 91 , and a light-emitting material 94 located between the first electrode 91 and the second electrode 92 .
  • the first electrode 91 is electrically connected to the first drain electrode 44 of the first thin film transistor 4 through the second metal layer 90 .
  • the first inorganic layer 3 and the second inorganic layer 6 are respectively disposed on both sides of the silicon semiconductor layer of the first thin film transistor 4, and the second opening 611 is arranged in the second inorganic layer 6, compared with forming two second openings in the first inorganic layer and the second inorganic layer in the prior art, the complexity of the process for forming the second opening can be reduced; and the The flexible substrate 2 is provided with the first opening 211 corresponding to the second opening 611 , and the second opening 611 is filled with an organic layer with better flexibility, so that the bending performance of the bending area can be improved while ensuring the bending performance. Product yield.
  • Embodiments of the present invention also provide a display device including the above-mentioned display panel 1 .
  • the display device may be a product or component with a display function, such as a display module, a fixed terminal such as a desktop computer and a TV, a mobile terminal such as a smart phone and a personal digital assistant, or a wearable device such as a smart watch and a head-mounted device. .

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Abstract

一种显示面板（1），包括：柔性基板（2），其中，所述柔性基板（2）的底部设有第一开口（211）；第一无机层（3）；第一薄膜晶体管（4）和第二薄膜晶体管（5），其中，所述第一薄膜晶体管（4）包括硅半导体层（40），所述第二薄膜晶体管（5）包括金属氧化物半导体层（50）；第二无机层（6），其中，所述第二无机层（6）设有第二开口（611），所述第二开口（611）与所述第一开口（211）至少部分重叠。

Description

显示面板及显示装置 技术领域
本发明涉及显示面板技术领域，尤其涉及一种显示面板及显示装置。
 背景技术
LTPO（Low Temperature Polycrystalline Oxide，低温多晶氧化物）是一种低功耗显示技术，LTPO TFT具有比LTPS TFT（low temperature poly-silicon thin film transistor，低温多晶硅薄膜晶体管）更低的驱动功率，越来越受到人们的追捧。
目前常见的LTPO产品为双层SD 结构，使用双层SD结构通常有17-18 Mask（掩膜）。在现有的制程中，为了加强弯折区的弯折性能，一般是对弯折区的无机层进行两次开孔以形成ODH（Organic Deep Hole）孔再填充有机材料，对工艺精度要求较高，容易影响产品良率。
 技术问题
本发明实施例提供一种显示面板及显示装置，以在保证弯折区的弯折性能的同时提高产品良率。
 技术解决方案
本发明实施例提供了一种显示面板，包括第一区和连接于所述第一区的弯折的第二区，所述显示面板包括：柔性基板，其中，所述柔性基板的底部设有第一开口，所述第一开口位于所述第二区内；位于所述柔性基板远离所述第一开口一侧上的第一无机层；位于所述第一无机层上并位于所述第一区内的第一薄膜晶体管和第二薄膜晶体管，其中，所述第一薄膜晶体管包括硅半导体层，所述第二薄膜晶体管包括金属氧化物半导体层；位于所述硅半导体层上的第二无机层，其中所述第二无机层设有第二开口，所述第二开口位于所述第二区内，所述第二开口与所述第一开口至少部分重叠；以及位于所述第一薄膜晶体管、所述第二薄膜晶体管和所述第二无机层上的有机层，所述有机层位于所述第二开口内。
根据本发明一实施例，所述第二无机层包括位于所述硅半导体层上的第一栅极绝缘层，所述第二开口部分贯穿所述第一栅极绝缘层。
根据本发明一实施例，所述显示面板还包括位于所述第二开口内的信号线，所述信号线的底部与所述硅半导体层的顶部齐平。
根据本发明一实施例，所述第二无机层还包括位于所述第一栅极绝缘层上的第二绝缘层、位于所述第二绝缘层上的第一层间介电层、位于所述第一层间介电层上的第三栅极绝缘层，以及位于所述第三栅极绝缘层上的第二层间介电层；所述第一薄膜晶体管还包括位于所述第一栅极绝缘层和所述第二绝缘层之间且对应于所述硅半导体层的第一栅极、位于所述第二绝缘层和所述第一层间介电层之间且对应于所述第一栅极的第一导电层，以及连接于所述硅半导体层的第一源极和第一漏极；所述第二薄膜晶体管的所述金属氧化物半导体层位于所述第一层间介电层和所述第三栅极绝缘层之间，所述第二薄膜晶体管还包括位于所述第二绝缘层和所述第一层间介电层之间且对应于所述金属氧化物半导体层的第三栅极、位于所述第三栅极绝缘层和所述第二层间介电层之间且对应于所述金属氧化物半导体层的第四栅极，以及连接于所述金属氧化物半导体层的第二源极和第二漏极，其中，所述第一源极和所述第一漏极，以及所述第二源极和所述第二漏极同层。
根据本发明一实施例，所述第二开口远离所述柔性基板的顶部大于所述第二开口的底部。
根据本发明一实施例，所述第一开口大于或等于所述第二开口的顶部，或者，所述第一开口大于或等于所述第二开口的所述底部且小于所述第二开口的所述顶部。
根据本发明一实施例，所述第一开口远离所述第一无机层的底部大于所述第一开口的顶部。
根据本发明一实施例，所述第一开口的倾斜角大于所述第二开口的倾斜角。
根据本发明一实施例，所述第一开口的中心部分的深度大于所述第一开口的周围部分的深度，其中，所述中心部分与所述第二开口的所述底部重叠。
根据本发明一实施例，所述第一开口有多个，多个所述第一开口相互间隔设置在所述柔性基板上。
根据本发明一实施例，位于中心部分的所述第一开口的深度大于位于周围部分的所述第一开口的深度；或者，位于中心部分的所述第一开口的宽度大于位于周围部分的所述第一开口的宽度；或者位于中心部分的多个所述第一开口的分布密度大于位于周围部分的多个所述第一开口的分布密度。
根据本发明一实施例，所述第二开口的深度为1.1μm -1.4μm，所述第二开口的倾斜角为30°-60°。
根据本发明一实施例，所述第二开口不贯穿所述第一无机层。
根据本发明一实施例，所述第一开口和所述第二开口是对称的。
根据本发明一实施例，所述柔性基板包括第一柔性衬底、位于所述第一柔性衬底上的第二柔性衬底和位于所述第一柔性衬底和所述第二柔性衬底之间的承载层，所述第一开口和所述第二开口的对称面位于所述第二柔性衬底的1/3厚度处的平面和所述第二柔性衬底的1/2厚度处的平面之间，所述第一开口设于所述第一柔性衬底的底部。
根据本发明一实施例，所述第二开口包括远离所述柔性基板的第一开口部和连接于所述第一开口部并靠近所述柔性基板的第二开口部，所述第一开口部和所述第二开口部对称设置，所述第一开口部的远离所述柔性基板的顶部大于所述第一开口部的底部。
本发明一实施例提供一种显示装置，包括如上所述的显示面板。
 有益效果
本发明的实施例提供的显示面板及显示装置中，所述第二开口设置在所述硅半导体层上的所述第二无机层中，并且所述柔性基板对应所述第二开口设置有所述第一开口，从而能够保证弯折区的弯折性能的同时提高产品良率。
 附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其它有益效果显而易见。
图1为本发明一实施例提供的一种显示面板的剖视示意图；
图2为本发明一实施例提供的显示面板的第二区的剖视示意图；
图3为本发明一实施例提供的显示面板的第二区的剖视示意图；
图4为本发明一实施例提供的显示面板的第二区的剖视示意图。
 本发明的实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
在本发明的描述中，需要理解的是，术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本发明和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本发明的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本发明的描述中，“多个”的含义是两个或两个以上，除非另有明确具体的限定。
在本发明的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接或可以相互通讯；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本发明中的具体含义。
在本发明中，除非另有明确的规定和限定，第一特征在第二特征之“上”或之“下”可以包括第一和第二特征直接接触，也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且，第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方，或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正下方和斜下方，或仅仅表示第一特征水平高度小于第二特征。
下文的公开提供了许多不同的实施方式或例子用来实现本发明的不同结构。为了简化本发明的公开，下文中对特定例子的部件和设置进行描述。当然，它们仅仅为示例，并且目的不在于限制本发明。此外，本发明可以在不同例子中重复参考数字和/或参考字母，这种重复是为了简化和清楚的目的，其本身不指示所讨论各种实施方式和/或设置之间的关系。此外，本发明提供了的各种特定的工艺和材料的例子，但是本领域普通技术人员可以意识到其他工艺的应用和/或其他材料的使用。
下面结合附图和实施例对本发明作进一步说明。
如图1所示，本发明的一实施例提供一种显示面板1，包括第一区11和连接于所述第一区11的弯折的第二区12，第二区12用于弯折到显示面板的背面，以缩窄下边框。所述显示面板1包括柔性基板2、第一无机层3、第一薄膜晶体管4和第二薄膜晶体管5、第二无机层6，和有机层7。可选地，所述显示面板1是OLED（有机发光二极管）显示面板，所述第一区11为显示区，所述第二区12为非显示区。
所述柔性基板2的底部设有第一开口211，所述第一开口211位于所述第二区12内。可选地，所述柔性基板2包括单层结构或者多层结构。
所述第一无机层3位于所述柔性基板2远离所述第一开口211一侧上。
所述第一薄膜晶体管4和第二薄膜晶体管5位于所述第一无机层3上并位于所述第一区11。其中，所述第一薄膜晶体管4包括硅半导体层40，所述第二薄膜晶体管5包括金属氧化物半导体层50。可选地，所述硅半导体层40的材料包括单晶硅或者低温多晶硅，所述金属氧化物半导体层50的材料包括铟镓锌氧化物（IGZO）或者氧化锌（ZnO）。
所述第二无机层6位于所述硅半导体层40上。其中，所述第二无机层6设有第二开口611，所述第二开口611位于所述第二区12内，所述第二开口611与所述第一开口211至少部分重叠。
所述有机层7位于所述第一薄膜晶体管4、所述第二薄膜晶体管5和所述第二无机层6上。所述有机层7从所述第一区11延伸到第二区12，且位于所述第二开口611内。
本发明的实施例提供的显示面板1中，所述第一无机层3和所述第二无机层6分别设置在所述第一薄膜晶体管4的硅半导体层的两侧，所述第二开口611设置在所述第二无机层6中，相对于现有技术中在第一无机层和第二无机层中形成两个第二开口，能够减少形成第二开口的工艺复杂程度；并且所述柔性基板2对应所述第二开口611设置有所述第一开口211，并且在所述第二开口611内填充柔性更好的有机层，从而能够在保证弯折区的弯折性能的同时提高产品良率。
在一实施例中，请参阅图1，所述第二开口611不贯穿所述第一无机层3。所述第一无机层3包括缓冲层30、位于所述缓冲层30上的氮化硅层31和位于所述氮化硅层31上的氧化硅层32。其中，所述缓冲层30的厚度为400nm-600nm，所述氮化硅层31的厚度为40nm-60nm，所述氧化硅层32的厚度为200 nm -400nm。在其他实施例中，所述第一无机层3可仅包括两层结构，如氮化硅层31及氧化硅层32。这样，可以节省一道ODH光罩，并且可以阻挡水汽从所述第二区12入侵至所述第一区11，防止水汽入侵导致的OLED失效，从而提升产品良率。
所述第二无机层6可以是单层结构或者多层结构。具体地，本实施例中的所述第二无机层6包括多层结构。所述第二无机层6包括位于所述硅半导体层40上的第一栅极绝缘层61，所述第二开口611至少部分贯穿所述第一栅极绝缘层61。可选地，第二开口611部分贯穿所述第一栅极绝缘层61，所述第二开口611下方的所述第一栅极绝缘层61的厚度为1nm-50nm。这样，保留的所述第一栅极绝缘层61可以阻挡水汽从所述第二区12入侵至所述第一区11，并且可以保护所述第一无机层3在后续制程中受到损伤。
可选地，所述显示面板1还包括位于所述第二开口611内的信号线8，所述信号线8的底部与所述硅半导体层40的顶部齐平。可选地，所述信号线8沿所述第二开口611的部分或全部内壁延伸。
可选地，所述第二无机层6还包括位于所述第一栅极绝缘层61上的第二绝缘层62、位于所述第二绝缘层62上的第一层间介电层63、位于所述第一层间介电层63上的第三栅极绝缘层64，以及位于所述第三栅极绝缘层64上的第二层间介电层65。
所述第一薄膜晶体管4还包括位于所述第一栅极绝缘层61和所述第二绝缘层62之间且对应于所述硅半导体层40的第一栅极41、位于所述第二绝缘层62和所述第一层间介电层63之间且对应于所述第一栅极41的第一导电层42，以及连接于所述硅半导体层40的第一源极43和第一漏极44。其中，所述第一导电层42可与所述第一栅极41形成电容。
所述第二薄膜晶体管5的所述金属氧化物半导体层50位于所述第一层间介电层63和所述第三栅极绝缘层64之间，所述第二薄膜晶体管5还包括位于所述第二绝缘层62和所述第一层间介电层63之间且对应于所述金属氧化物半导体层50的第三栅极51、位于所述第三栅极绝缘层64和所述第二层间介电层65之间且对应于所述金属氧化物半导体层50的第四栅极52，以及连接于所述金属氧化物半导体层50的第二源极53和第二漏极54。其中，所述第二开口611贯穿所述第二绝缘层62、所述第一层间介电层63、所述第三栅极绝缘层64，以及所述第二层间介电层65和至少部分所述第一栅极绝缘层61，所述第二开口611的深度为1.1μm-1.4μm，所述第一源极43和所述第一漏极44，以及所述第二源极53和所述第二漏极54同层。
在一实施例中，所述第二开口611远离所述柔性基板2的顶部大于所述第二开口611的底部。这样，便于开孔工艺的进行，并且易于弯折，而且沿所述开口611内壁延伸的所述信号线8不易断裂。
可选地，所述第一开口211大于或等于所述第二开口611的顶部，或者，所述第一开口211大于或等于所述第二开口611的所述底部且小于所述第二开口611的所述顶部。
可选地，所述第一开口211远离所述第一无机层3的底部大于所述第一开口211的顶部。这样，能够将弯折的轴线限制在所述第一开口211的限定的范围内，保证了弯折的稳定性。
可选地，所述第一开口211的倾斜角α大于所述第二开口611的倾斜角β。其中，所述一开口的倾斜角α是指在截面图中，所述第一开口211的侧壁与未设置所述第一开口211的所述柔性基板2形成的夹角。所述二开口的倾斜角β是指在截面图中，所述第二开口611的侧壁与未设置所述第二开口611的所述第一栅极绝缘层61形成的夹角。可选地，所述第二开口611的倾斜角β为30°-60 °，所述第一开口211的倾斜角α为大于30°的锐角如45°、60°或者85°。这样，可以保证弯折的轴线被限定在所述第一开口211限定的范围内，保证了弯折的稳定性。
可选地，所述第一开口211的中心部分的深度大于所述第一开口211的周围部分的深度，其中，所述中心部分与所述第二开口611的所述底部重叠。这样，可以保证弯折的轴线被限制在所述第二开口611的所述底部限定的范围内。
可选地，请参阅图2，所述第一开口211有多个，多个所述第一开口211相互间隔设置在所述柔性基板2上。即，所述柔性基板2的底部可以被图案化以形成多个开口。
可选地，位于中心部分的所述第一开口211的深度大于位于周围部分的所述第一开口211的深度；或者，位于中心部分的所述第一开口211的宽度大于位于周围部分的所述第一开口211的宽度；或者位于中心部分的多个所述第一开口211的分布密度大于位于周围部分的多个所述第一开口211的分布密度。其中，位于所述中心部分的多个所述第一开口211与所述第二开口611的所述底部重叠。这样，可以保证弯折的轴线被限制在所述第二开口611的所述底部限定的范围内。
在一实施例中，请参阅图3，所述第一开口211和所述第二开口611在水平方向上是对称的，即所述第一开口211的侧壁的延长线与所述第二开口611的侧壁的延长线在一条直线上。
可选地，所述柔性基板2包括第一柔性衬底21、位于所述第一柔性衬底21上的第二柔性衬底22和位于所述第一柔性衬底21和所述第二柔性衬底22之间的承载层23，所述第一开口211和所述第二开口611的对称面位于所述第二柔性衬底22的1/3厚度处的平面和所述第二柔性衬底22的1/2厚度处的平面之间，所述第一开口211设于所述第一柔性衬底21的底部。可选地，所述第一柔性衬底21厚于所述第二柔性衬底22，没有设置所述第一开口211的所述第一柔性衬底21的厚度为3μm -10μm，所述第一开口211上的所述第一柔性衬底21的厚度为1μm -5μm。这样，可以使得中性面（应力为0的面）接近或者位于所述信号线8上。
在一实施例中，请参阅图4，所述第二开口611包括远离所述柔性基板2的第一开口部613和连接于所述第一开口部613并靠近所述柔性基板2的第二开口部614，所述第一开口部613和所述第二开口部614对称设置，所述第一开口部613的远离所述柔性基板2的顶部大于所述第一开口部613的底部。可选地，所述第一开口部613和所述第二开口部614沿水平方向对称，并且通过一道光罩形成。这样，可以方便开孔工艺的进行，能够将弯折的轴线限制在所述第二开口611的限定的范围内，保证了弯折的稳定性。
在一实施例中，所述有机层7是连续的，包括位于所述第一区11内的第一部分和位于所述第二区12的第二部分，所述第二部分位于所述第二开口611内并覆盖所述信号线8。
在一实施例中，所述显示面板1还包括位于所述有机层7上的第二金属层90、位于所述第二金属层90上的第二有机层93以及发光层。所述发光层包括第一电极91、位于所述第一电极91上的第二电极92，以及位于所述第一电极91和所述第二电极92之间的发光材料94。所述第一电极91通过所述第二金属层90电性连接于所述第一薄膜晶体管4的所述第一漏极44。
本发明的实施例提供的显示面板1中，所述第一无机层3和所述第二无机层6分别设置在所述第一薄膜晶体管4的硅半导体层的两侧，所述第二开口611设置在所述第二无机层6中，相对于现有技术中在第一无机层和第二无机层中形成两个第二开口，能够减少形成第二开口的工艺复杂程度；并且所述柔性基板2对应所述第二开口611设置有所述第一开口211，并且在所述第二开口611内填充柔性更好的有机层，从而能够在保证弯折区的弯折性能的同时提高产品良率。
本发明的实施例还提供一种显示装置，包括如上所述的显示面板1。其中，显示装置可以是具有显示功能的产品或者部件，例如显示模组，固定终端如台式电脑、电视机，移动终端如智能手机、个人数字助理，或者可穿戴设备如智能手表、头戴式设备。
以上对本发明实施例进行了详细介绍，本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例的技术方案的范围。

Claims (20)

  1. 一种显示面板，包括第一区和连接于所述第一区的弯折的第二区，其中，所述显示面板包括：
    柔性基板，其中，所述柔性基板的底部设有第一开口，所述第一开口位于所述第二区内；
    位于所述柔性基板远离所述第一开口一侧上的第一无机层；
    位于所述第一无机层上并位于所述第一区内的第一薄膜晶体管和第二薄膜晶体管，其中，所述第一薄膜晶体管包括硅半导体层，所述第二薄膜晶体管包括金属氧化物半导体层；
    位于所述硅半导体层上的第二无机层，其中所述第二无机层设有第二开口，所述第二开口位于所述第二区内，所述第二开口与所述第一开口至少部分重叠；以及
    位于所述第一薄膜晶体管、所述第二薄膜晶体管和所述第二无机层上的有机层，所述有机层位于所述第二开口内。
  2. 如权利要求1所述的显示面板，其中，所述第二无机层包括位于所述硅半导体层上的第一栅极绝缘层，所述第二开口部分贯穿所述第一栅极绝缘层。
  3. 如权利要求2所述的显示面板，其中，还包括位于所述第二开口内的信号线，所述信号线的底部与所述硅半导体层的顶部齐平。
  4. 如权利要求3所述的显示面板，其中，所述第二无机层还包括位于所述第一栅极绝缘层上的第二绝缘层、位于所述第二绝缘层上的第一层间介电层、位于所述第一层间介电层上的第三栅极绝缘层，以及位于所述第三栅极绝缘层上的第二层间介电层；
    所述第一薄膜晶体管还包括位于所述第一栅极绝缘层和所述第二绝缘层之间且对应于所述硅半导体层的第一栅极、位于所述第二绝缘层和所述第一层间介电层之间且对应于所述第一栅极的第一导电层，以及连接于所述硅半导体层的第一源极和第一漏极；
    所述第二薄膜晶体管的所述金属氧化物半导体层位于所述第一层间介电层和所述第三栅极绝缘层之间，所述第二薄膜晶体管还包括位于所述第二绝缘层和所述第一层间介电层之间且对应于所述金属氧化物半导体层的第三栅极、位于所述第三栅极绝缘层和所述第二层间介电层之间且对应于所述金属氧化物半导体层的第四栅极，以及连接于所述金属氧化物半导体层的第二源极和第二漏极，其中，所述第一源极和所述第一漏极，以及所述第二源极和所述第二漏极同层。
  5. 如权利要求1所述的显示面板，其中，所述第二开口远离所述柔性基板的顶部大于所述第二开口的底部。
  6. 如权利要求5所述的显示面板，其中，所述第一开口大于或等于所述第二开口的顶部，或者，所述第一开口大于或等于所述第二开口的所述底部且小于所述第二开口的所述顶部。
  7. 如权利要求5所述的显示面板，其中，所述第一开口远离所述第一无机层的底部大于所述第一开口的顶部。
  8. 如权利要求7所述的显示面板，其中，所述第一开口的倾斜角大于所述第二开口的倾斜角。
  9. 如权利要求5所述的显示面板，其中，所述第一开口的中心部分的深度大于所述第一开口的周围部分的深度，其中，所述中心部分与所述第二开口的所述底部重叠。
  10. 如权利要求5所述的显示面板，其中，所述第一开口有多个，多个所述第一开口相互间隔设置在所述柔性基板上。
  11. 如权利要求10所述的显示面板，其中，位于中心部分的所述第一开口的深度大于位于周围部分的所述第一开口的深度；或者，位于中心部分的所述第一开口的宽度大于位于周围部分的所述第一开口的宽度；或者位于中心部分的多个所述第一开口的分布密度大于位于周围部分的多个所述第一开口的分布密度。
  12. 如权利要求5所述的显示面板，其中，所述第二开口的深度为1.1μm -1.4μm，所述第二开口的倾斜角为30°-60°。
  13. 如权利要求1所述的显示面板，其中，所述第二开口不贯穿所述第一无机层。
  14. 如权利要求1所述的显示面板，其中，所述第一开口和所述第二开口是对称的。
  15. 如权利要求14所述的显示面板，其中，所述柔性基板包括第一柔性衬底、位于所述第一柔性衬底上的第二柔性衬底和位于所述第一柔性衬底和所述第二柔性衬底之间的承载层，所述第一开口和所述第二开口的对称面位于所述第二柔性衬底的1/3厚度处的平面和所述第二柔性衬底的1/2厚度处的平面之间，所述第一开口设于所述第一柔性衬底的底部。
  16. 如权利要求1所述的显示面板，其中，所述第二开口包括远离所述柔性基板的第一开口部和连接于所述第一开口部并靠近所述柔性基板的第二开口部，所述第一开口部和所述第二开口部对称设置，所述第一开口部的远离所述柔性基板的顶部大于所述第一开口部的底部。
  17. 一种显示装置，包括一种显示面板，所述显示面板包括第一区和连接于所述第一区的弯折的第二区，其中，所述显示面板包括：
    柔性基板，其中，所述柔性基板的底部设有第一开口，所述第一开口位于所述第二区内；
    位于所述柔性基板远离所述第一开口一侧上的第一无机层；
    位于所述第一无机层上并位于所述第一区内的第一薄膜晶体管和第二薄膜晶体管，其中，所述第一薄膜晶体管包括硅半导体层，所述第二薄膜晶体管包括金属氧化物半导体层；
    位于所述硅半导体层上的第二无机层，其中所述第二无机层设有第二开口，所述第二开口位于所述第二区内，所述第二开口与所述第一开口至少部分重叠；以及
    位于所述第一薄膜晶体管、所述第二薄膜晶体管和所述第二无机层上的有机层，所述有机层位于所述第二开口内。
  18. 如权利要求17所述的显示装置，其特征在于其中，所述第二开口不贯穿所述第一无机层。
  19. 如权利要求17所述的显示装置，其特征在于其中，所述第二开口远离所述柔性基板的顶部大于所述第二开口的底部。
  20. 如权利要求17所述的显示装置，其特征在于其中，所述第一开口和所述第二开口是对称的。
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