WO2023241297A9 - 显示面板及其制造方法、显示装置 - Google Patents

显示面板及其制造方法、显示装置 Download PDF

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Publication number
WO2023241297A9
WO2023241297A9 PCT/CN2023/094861 CN2023094861W WO2023241297A9 WO 2023241297 A9 WO2023241297 A9 WO 2023241297A9 CN 2023094861 W CN2023094861 W CN 2023094861W WO 2023241297 A9 WO2023241297 A9 WO 2023241297A9
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WIPO (PCT)
Prior art keywords
layer
orthographic projection
edge
light
distance
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PCT/CN2023/094861
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English (en)
French (fr)
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WO2023241297A1 (zh
Inventor
王尚
孙超超
彭乐
郑柏成
曹世杰
尹钢
孙尧芳
苗文磊
Original Assignee
京东方科技集团股份有限公司
绵阳京东方光电科技有限公司
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Publication of WO2023241297A1 publication Critical patent/WO2023241297A1/zh
Publication of WO2023241297A9 publication Critical patent/WO2023241297A9/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/16—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
    • H10K71/166—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering using selective deposition, e.g. using a mask

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a display panel, a manufacturing method thereof, and a display device.
  • OLED organic light emitting diode display panels
  • LCD Liquid Crystal Display
  • the mask is placed as close as possible to the substrate for the production of the light-emitting functional layer to ensure the accuracy of the evaporation position. In this way, although the accuracy of the evaporation position is improved and the display effect of the display device is improved, some new problems will also arise.
  • the purpose of this disclosure is to provide a display panel, a manufacturing method thereof, and a display device, which can improve the yield while ensuring the display effect.
  • a display panel including:
  • a driving backplane having a display area and a peripheral area located at the periphery of the display area;
  • the first electrode layer is located on one side of the driving backplane and includes a transfer electrode whose orthographic projection is located in the peripheral area;
  • a pixel definition layer located on the side of the first electrode layer facing away from the driving backplane
  • the light-emitting functional layer is located on the side of the pixel definition layer away from the driving backplane.
  • the orthographic projection of the light-emitting functional layer covers the display area, and the edge of the orthographic projection of the light-emitting functional layer is located in the peripheral area. , the orthographic projection of the transfer electrode is located outside the orthographic projection of the light-emitting functional layer;
  • the second electrode layer is located on the side of the light-emitting functional layer facing away from the driving backplane, and is connected to the transfer electrode.
  • the light-emitting functional layer includes:
  • a first common film layer is located on the side of the pixel definition layer away from the driving backplane.
  • the orthographic projection of the first common film layer covers the display area, and the orthographic projection of the first common film layer The edge is located in the peripheral area, and the orthographic projection of the transfer electrode is located outside the orthographic projection of the first common film layer;
  • the luminescent material layer is located on the side of the first common film layer away from the driving backplane, and includes a plurality of luminescent material units orthogonally projected in the display area;
  • a second common film layer is located on the side of the luminescent material layer away from the driving backplane.
  • the orthographic projection of the second common film layer covers the display area, and the orthographic projection of the second common film layer The edge is located in the peripheral area, and the orthographic projection of the transfer electrode is located outside the orthographic projection of the second common film layer.
  • the transfer electrode has a first edge close to the display area and a second edge away from the display area;
  • the distance between the edge of the orthographic projection of the light-emitting functional layer and the orthographic projection of the first edge is greater than or equal to 20 microns.
  • the distance between the edge of the orthographic projection of the light-emitting functional layer and the edge of the display area is greater than or equal to 60 micrometers and less than or equal to 180 micrometers.
  • a distance between an orthographic projection of the first edge and an edge of the display area is greater than or equal to 160 micrometers and less than or equal to 200 micrometers.
  • the edge of the orthographic projection of the pixel definition layer is located between the orthographic projections of the first edge and the second edge.
  • a distance between an edge of the orthographic projection of the pixel definition layer and an orthographic projection of the first edge is greater than or equal to 20 microns.
  • the transfer electrode has a first edge close to the display area
  • the distance between the edge of the orthographic projection of the light-emitting functional layer and the edge of the display area is a first distance, the distance between the orthographic projection of the first edge and the edge of the display area is the second distance;
  • the second distance is greater than the first distance, and a ratio between the second distance and the first distance is greater than or equal to 1.1 and less than or equal to 1.5.
  • the distance between the edge of the orthographic projection of the pixel definition layer and the edge of the display area is a third distance
  • the third distance is greater than the second distance, and the ratio between the third distance and the second distance is greater than or equal to 1.1 and less than or equal to 1.5.
  • a method for manufacturing a display panel includes:
  • the driving backplane having a display area and a peripheral area located at the periphery of the display area;
  • a first electrode layer is produced on one side of the driving backplane, and the first electrode layer includes a transfer electrode whose orthographic projection is located in the peripheral area;
  • a light-emitting functional layer is made on the side of the pixel definition layer away from the driving backplane through at least one mask.
  • the orthographic projection of the light-emitting functional layer covers the display area, and the orthographic projection of the light-emitting functional layer The edge is located in the peripheral area, and the orthographic projection of the transfer electrode is located outside the orthographic projection of the light-emitting functional layer;
  • a second electrode layer is formed on the side of the light-emitting functional layer facing away from the driving backplane.
  • the second electrode layer at least covers the light-emitting functional layer and is connected to the transfer electrode.
  • the step of using a mask to create a light-emitting functional layer on the side of the pixel definition layer facing away from the driving backplane includes:
  • a first mask is provided on the side of the pixel definition layer away from the driving backplane, and a first common film layer is produced through the first mask.
  • the first mask has a first evaporation layer. hole, the front projection of the first evaporation hole covers the display area, and the edge of the front projection of the first evaporation hole is located in the peripheral area, and the front projection of the transfer electrode is located in the first Outside the orthographic projection of the evaporation hole;
  • a second mask is provided on the side of the first common film layer facing away from the driving backplane, and a luminescent material layer is made through the second mask.
  • the second mask has a plurality of second Evaporation holes, and orthographic projections of a plurality of second evaporation holes are located in the display area;
  • a third mask is provided on the side of the luminescent material layer away from the driving backplane, and a second common film layer is produced through the third mask.
  • the third mask has a third evaporation layer. hole, the third steamed The orthographic projection of the plating hole covers the display area, and the edge of the orthographic projection of the third evaporation hole is located in the peripheral area, and the orthographic projection of the transfer electrode is located outside the orthographic projection of the third evaporation hole.
  • a display device including the display panel described in the first aspect.
  • the distance between the first mask and the substrate is shortened to ensure the accuracy of the evaporation position.
  • the orthographic projection of the transfer electrode is located in front of the light-emitting functional layer.
  • the phenomenon of electrostatic charge released at the edge of the hole is weakened when the membrane is used, thereby reducing the damage of the relevant film layer by electrostatic charge and improving the yield of the display panel.
  • FIG. 1 is a schematic cross-sectional structural diagram of a display panel provided by an embodiment of the present disclosure.
  • FIG. 2 is a schematic cross-sectional structural diagram of a display panel when manufacturing a light-emitting functional layer according to an embodiment of the present disclosure.
  • Figure 3 is a schematic cross-sectional structural diagram of a display panel provided by the related art.
  • FIG. 4 is a schematic top structural view of a display panel provided by the related art.
  • FIG. 5 is a schematic top structural view of a display panel provided by an embodiment of the present disclosure.
  • FIG. 6 is a schematic flowchart of a method for manufacturing a display panel according to an embodiment of the present disclosure.
  • Embodiments of the present disclosure provide a display panel, as shown in Figure 1 .
  • the display panel includes a driving backplane BM and a light emitting layer EE.
  • the driving backplane BM has a display area AA and a peripheral area WA located outside the display area AA.
  • the driving backplane BM includes a plurality of pixel circuits located in the display area AA; the light-emitting layer EE is located on one side of the driving backplane BM, and includes a plurality of light-emitting devices orthogonally projected in the display area AA.
  • the multiple pixel circuits are integrated with the multiple light-emitting devices.
  • One correspondence, and a light-emitting device is connected to a corresponding pixel circuit, so that the corresponding light-emitting device can be controlled to emit light under the driving of the pixel circuit, so as to realize the display of images on the display panel.
  • the orthographic projection involved in this disclosure refers to the orthographic projection on the driving backplane BM.
  • the driving backplane BM includes a substrate BP and a driving layer DR, and the driving layer DR is located between the substrate BP and the light-emitting layer EE.
  • the driving layer DR can be formed in the substrate BP, that is, the driving backplane BM can be a silicon substrate BP; or the driving layer DR can be provided independently of the substrate BP.
  • the material of the substrate BP can be soda-lime glass. (so-lime glass), quartz glass, sapphire glass and other glass materials, or it can be stainless steel, aluminum, nickel and other metal materials.
  • the material of the substrate BP may be polymethyl methacrylate (PMMA), polyvinyl alcohol (Polyvinyl alcohol (PVA), polyvinyl phenol (PVP), polyether sulfone (PES), polyimide, polyamide, polyacetal, polycarbonate (PC), poly(para) Polyethylene terephthalate (PET), polyethylene naphthalate (PEN) or combinations thereof.
  • PMMA polymethyl methacrylate
  • PMMA polymethyl methacrylate
  • PVA Polyvinyl alcohol
  • PVP polyvinyl phenol
  • PES polyether sulfone
  • polyimide polyamide
  • PC polycarbonate
  • PET poly(para) Polyethylene terephthalate
  • PEN polyethylene naphthalate
  • the substrate BP may be a composite of multiple layers of materials in addition to a single layer of material.
  • the substrate BP includes a base film layer, a pressure-sensitive adhesive layer, a first polyimide layer and a second polyimide layer that are stacked in sequence.
  • a pixel circuit may include multiple transistors and storage capacitors.
  • the transistor may be a thin film transistor, and the thin film transistor may be selected from a top gate thin film transistor, a bottom gate thin film transistor, or a double gate thin film transistor; the storage capacitor may be a bipolar plate capacitor or a three-level capacitor.
  • the material of the active layer of the thin film transistor can be amorphous silicon semiconductor material, low temperature polysilicon semiconductor material, metal oxide semiconductor material, organic semiconductor material or other types of semiconductor materials; the thin film transistor can be an N-type thin film transistor or a P-type thin film transistor. .
  • the types of any two transistors may be the same or different.
  • some transistors in a pixel circuit may be N-type transistors and some transistors may be P-type transistors.
  • the material of the active layer of some transistors in a pixel circuit may be a low-temperature polysilicon semiconductor material, and the material of the active layer of some of the transistors may be a metal oxide semiconductor material.
  • the driving layer DR includes an insulating buffer layer BUF, a transistor layer, an interlayer dielectric layer ILD, a source-drain metal layer SD and a planar layer sequentially distributed in the direction away from the substrate BP. PLN.
  • the material of the interlayer dielectric layer ILD and the material of the flat layer PLN can be organic insulating materials to ensure a flat surface.
  • the interlayer dielectric layer ILD is provided with a first via hole, so that the transistor layer is connected to the source or drain of the source-drain metal layer SD through the first via hole;
  • the flat layer PLN is provided with a plurality of second via holes, and a plurality of pixel circuits
  • the plurality of second via holes and the plurality of light-emitting devices correspond one to one, and a light-emitting device is connected to the corresponding pixel circuit through the corresponding second via hole.
  • the material of the insulating buffer layer BUF can be inorganic insulating materials such as silicon oxide and silicon nitride.
  • the insulating buffer layer BUF can be a layer of inorganic materials or a multi-layer stacked inorganic material layer.
  • the source-drain metal layer SD can be used to form power lines, data lines, connection Lines and other source-drain metal layer SD wiring can also be used to form another plate for forming a storage capacitor.
  • the source and drain metal layer SD may be one source and drain metal layer, or may be two or three source and drain metal layers.
  • the source-drain metal layer SD included in the driving layer DR includes a source-drain metal layer.
  • the transistor layer includes a semiconductor layer ACT, a gate insulating layer GI, and a gate metal layer Ga stacked between the substrate BP and the interlayer dielectric layer ILD.
  • the positional relationship of each film layer included in the transistor layer can be determined according to the film The film structure of the transistor is determined.
  • the transistor layer includes a semiconductor layer ACT, a gate insulating layer GI, and a gate metal layer Ga that are sequentially stacked in a direction away from the substrate BP.
  • the thin film transistor thus formed is a top layer.
  • the transistor layer includes a gate metal layer Ga, a gate insulating layer GI, and a semiconductor layer ACT that are sequentially stacked in a direction away from the substrate BP.
  • the thin film transistor thus formed is a bottom-gate thin film transistor.
  • the semiconductor layer ACT may be used to form an active part of each transistor included in the pixel circuit.
  • Each active part includes a channel region and two connection parts (ie, source and drain) located on both sides of the channel region. pole).
  • the channel region can maintain semiconductor characteristics, and the semiconductor materials corresponding to the two connection parts are partially or completely conductive.
  • the semiconductor layer ACT may be one semiconductor layer or two semiconductor layers.
  • the semiconductor layer ACT includes a low temperature polysilicon semiconductor layer.
  • the gate metal layer Ga can be used to form metal wiring such as scan lines, and can also be used to form a plate of a storage capacitor.
  • the gate metal layer Ga may be one gate metal layer, or two or three gate metal layers.
  • the gate metal layer Ga includes a gate metal layer.
  • the gate insulating layer GI in the transistor layer can be adaptively increased or decreased.
  • the transistor layer included in the driving layer DR includes a low-temperature polysilicon semiconductor layer ACT, a gate insulating layer GI, and a gate metal layer Ga that are sequentially stacked on the substrate BP.
  • the driving layer DR further includes a passivation layer disposed between the source-drain metal layer SD and the planar layer PLN, so as to protect the source-drain metal layer SD through the arrangement of the passivation layer.
  • the driving layer DR also includes a shielding layer disposed between the insulating buffer layer BUF and the substrate BP.
  • the shielding layer can overlap with at least part of the channel region of the transistor to shield the light irradiating the transistor, so that the electrical conductivity of the transistor can be reduced. Characteristics are stable.
  • the light-emitting device may be an organic electroluminescent diode, a micro-luminescent diode, a quantum dot-organic electroluminescent diode, a quantum dot light-emitting diode, or other types of light-emitting devices.
  • the light-emitting device is an organic electroluminescent diode
  • the display panel is an OLED display panel.
  • the light-emitting layer EE includes a first electrode layer An, a pixel definition layer PDL, a light-emitting functional layer EL and a second electrode layer COM that are sequentially stacked in a direction away from the driving backplane BM.
  • the first electrode layer An includes a spacer A plurality of first electrodes are distributed and orthogonally projected in the display area AA.
  • the light-emitting functional layer EL includes a light-emitting unit corresponding to the plurality of first electrodes.
  • the second electrode layer COM includes a first electrode corresponding to the plurality of first electrodes. Two electrodes, the first electrode, the light-emitting unit and the second electrode constitute a light-emitting device.
  • the pixel definition layer PDL has a plurality of pixel openings corresponding to a plurality of first electrodes.
  • the first electrodes include exposed areas exposed at corresponding pixel openings. The exposed areas form the light-emitting areas of the corresponding light-emitting devices.
  • the light-emitting functional layer EL may include a light-emitting material layer ELa, and one or more of a hole injection layer, a hole transport layer, an electron blocking layer, a hole blocking layer, an electron transport layer and an electron injection layer.
  • the first mask OM has a first evaporation hole corresponding to the entire display area AA, and any film layer can be produced in the entire display area AA through the first evaporation hole on the first mask OM.
  • the orthographic projection of the common film layer included in the luminescent functional layer EL covers the display area AA, and the edge of the orthographic projection is located in the peripheral area WA, that is, the orthographic projection of the luminescent functional layer EL covers the display area AA, and the orthographic projection of the luminescent functional layer EL The edge is located in the outer area of WA.
  • the second mask can also be used to evaporate directly into the pixel opening. , the embodiment of the present disclosure does not limit this.
  • the luminescent material layer ELa can be produced through a second mask.
  • the second mask has a plurality of second evaporation holes corresponding to the plurality of pixel openings, and the luminescent material unit can be evaporated in each pixel opening through the second evaporation hole on the second mask.
  • the luminescent material unit includes a red unit, a green unit, and a blue unit.
  • the luminescent material layer ELa can also be produced using the above-mentioned first mask, in which case the luminescent material layer is a white material layer.
  • the display panel may further include a thin film encapsulation layer TEF,
  • the thin film encapsulation layer TEF is provided on the side of the light-emitting layer EE facing away from the substrate BP, and may include alternately stacked inorganic encapsulation layers and organic encapsulation layers.
  • the thin film encapsulation layer TEF includes a first inorganic encapsulation layer, an organic encapsulation layer and a second inorganic encapsulation layer sequentially stacked on the side of the light-emitting layer EE facing away from the substrate BP.
  • the inorganic encapsulation layer can effectively block external moisture and oxygen, preventing water and oxygen from invading the organic light-emitting functional layer EL and causing material degradation; the organic encapsulation layer is located between two adjacent inorganic encapsulation layers to achieve planarization and weaken the inorganic encapsulation stress between layers.
  • the orthographic projection of the edge of the inorganic encapsulation layer may extend from the display area AA to the peripheral area WA, and the orthographic projection of the edge of the organic encapsulation layer may be located between the edge of the display area AA and the edge of the inorganic encapsulation layer.
  • the light-emitting layer EE also includes a transfer electrode PA whose front projection is located in the peripheral area WA, and the second electrode layer COM is electrically connected to the transfer electrode PA, thereby facilitating the second electrode layer and external circuit continuity.
  • the transfer electrode PA can be made in the same layer as the first electrode, that is, the first electrode layer An not only includes the first electrode, but also includes the transfer electrode PA. Of course, the transfer electrode PA can also be located on a different film layer from the first electrode.
  • the first electrode and the transfer electrode PA can be formed by whole-layer evaporation and then etching, or they can also be formed by patterned evaporation.
  • the front projection of the first electrode is located in the display area AA, and the front projection of the transfer electrode PA is located in the peripheral area WA.
  • the inventor found after detailed research that when making the light-emitting functional layer EL, some of the common film layers are as shown in Figure 3
  • the first mask OM with the first evaporation hole is usually used. Since the first mask OM is close to the substrate BP, and the part of the first mask OM close to the edge of the hole is
  • the transfer electrode PA has an overlapping area in the thickness direction of the substrate BP, thus forming an equivalent capacitance to realize charge accumulation.
  • the edge of the hole in the first mask OM will release electrostatic charges, thereby damaging the relevant film layers (such as the insulating buffer layer BUF, the gate insulating layer GI, and the interdielectric layer ILD, passivation layer PVX, etc.), and cracks are formed in the relevant film layers. In this way, it is easy to induce The infiltration of water vapor along the cracks will lead to the failure of the EL function layer and reduce the yield of the display panel.
  • the orthographic projection of the transfer electrode PA is located outside the orthographic projection of the light-emitting functional layer EL, that is, the edge of the orthographic projection of the transfer electrode PA is located within the orthographic projection of the first mask OM.
  • the distance between the first mask OM and the substrate BP is shortened to ensure the accuracy of the evaporation position.
  • the orthographic projection of the transfer electrode PA is located on the light-emitting functional layer EL
  • the overlapping area between the portion of the first mask OM close to the edge of the hole and the transfer electrode PA in the thickness direction of the driving backplane BM can be effectively reduced, which can weaken the formation of equivalent capacitance in order to When removing the first mask OM, the phenomenon of electrostatic charge released at the edge of the hole is weakened, thereby reducing the electrostatic charge damaging the relevant film layer and improving the yield of the display panel.
  • the light-emitting functional layer EL includes: a first common film layer ELb, a light-emitting material layer ELa and a third Two common film layers ELc, the first common film layer ELb is located on the side of the pixel definition layer away from the driving backplane BM; the luminescent material layer ELa is located on the side of the first common film layer ELb away from the driving backplane BM, and includes the orthographic projection on A plurality of light-emitting material units in the display area AA; the second common film layer ELc is located on the side of the light-emitting layer EE material layer away from the driving backplane BM.
  • the first common film layer ELb can be one or more of a hole injection layer, a hole transport layer, and an electron blocking layer
  • the second common film layer ELc can be a hole blocking layer, an electron transport layer, and an electron injection layer. one or more of the layers.
  • the first common film layer ELb may be evaporated using the first mask OM
  • the second common film layer ELc may be evaporated using the second mask
  • the first common film layer ELb may be evaporated using the second mask OM.
  • the two masks are evaporated, and the second common film layer ELc is evaporated using the first mask OM; the first common film layer ELb and the second common film layer ELc can also be evaporated using the first mask OM.
  • evaporation For the case where the first common film layer ELb and the second common film layer ELc include multiple film layers, some of the multiple film layers may be evaporated using the first mask OM, and the remaining part of the film layers may be evaporated using the first mask OM. Use a second mask for evaporation.
  • the first common film layer ELb and the second common film layer ELc are both evaporated using the first mask OM.
  • the orthographic projection of the first common film layer ELb covers the display area AA, and the first common film layer ELb
  • the edge of the orthographic projection of ELb is located in the peripheral area WA
  • the orthographic projection of the transfer electrode PA is located in the first common film Except for the orthographic projection of layer ELb;
  • the orthographic projection of the second common film layer ELc covers the display area AA, and the edge of the orthographic projection of the second common film layer ELc is located in the peripheral area WA, and the orthographic projection of the transfer electrode PA is located in the second common film Outside the orthographic projection of layer ELc.
  • the gap between the portion of the first mask OM close to the hole edge and the transfer electrode PA on the driving backplane BM can be effectively reduced.
  • the overlapping area in the thickness direction can weaken the formation of equivalent capacitance, thereby weakening the phenomenon of electrostatic charge being released at the edge of the hole when the first mask OM is removed, and improving the yield of the display panel.
  • the transfer electrode PA has a first edge PA1 close to the display area AA and a second edge PA2 away from the display area AA, and the orthographic projection of the light-emitting functional layer EL
  • the distance between the edge and the orthographic projection of the first edge PA1 is greater than or equal to 20 microns.
  • the length by which the hole edge of the first mask OM protrudes from the first edge PA1 is greater than or equal to 20 microns, thereby further reducing the portion of the first mask OM close to the hole edge.
  • the overlapping area with the transfer electrode PA in the thickness direction of the driving backplane BM further weakens or even avoids the formation of equivalent capacitance near the hole edge of the first mask OM, thereby further improving the yield of the display panel.
  • the distance between the edge of the orthographic projection of the light-emitting functional layer EL and the orthographic projection of the first edge PA1 is 20 microns, 30 microns, 40 microns, 50 microns, etc., that is, at When making the light-emitting functional layer EL, the length of the hole edge of the first mask OM protruding from the first edge PA1 is 20 microns, 30 microns, 40 microns, 50 microns, etc.
  • the first common film layer ELb and the second common film layer ELc are both evaporated using the first mask OM.
  • the edge of the orthographic projection of the first common film layer ELb and the edge of the second common film layer ELc The distance between the edge of the orthographic projection and the orthographic projection of the first edge PA1 (difference between L2 and L1) is both greater than or equal to 20 microns. That is to say, when making the first common film layer ELb and dropping the common film layer, the length by which the edge of the hole of the first mask OM protrudes from the first edge PA1 is greater than or equal to 20 microns.
  • the lengths by which the edge of the hole of the first mask OM protrudes from the first edge PA1 are 20 microns, 30 microns, 40 microns, 50 microns, etc. .
  • the distance between the edge of the orthographic projection of the light-emitting functional layer EL and the orthographic projection of the first edge PA1 the distance between the edge of the orthographic projection of the light-emitting functional layer EL and the orthographic projection of the first edge PA1 The larger the distance, the larger the gap between the transfer electrode PA and the display area AA, so that the width of the peripheral area WA of the display panel becomes larger. In this way, in order to avoid the peripheral area WA of the display panel being relatively
  • the distance between the edge of the front projection of the light-emitting functional layer EL and the front projection of the first edge PA1 may be less than a certain distance. For example, the distance between the edge of the front projection of the light-emitting functional layer EL and the front projection of the first edge PA1 is less than 140 microns.
  • the distance L1 between the edge of the front projection of the light-emitting functional layer EL and the edge of the display area AA is greater than or equal to 60 micrometers and less than or equal to 180 micrometers.
  • the distance L1 between the edge of the front projection of the light-emitting functional layer EL and the edge of the display area AA is 120 microns.
  • the edge of the orthographic projection of the light-emitting functional layer EL extends beyond the edge of the display area AA and prevent the light-emitting functional layer EL from being in the display area
  • the edge of AA has uneven thickness; and by limiting the maximum distance between the edge of the orthographic projection of the luminescent functional layer EL and the edge of the display area AA, it is necessary to ensure that the orthographic projection of the transfer electrode PA is located on the luminescent functional layer EL In addition to the front projection, this avoids the problem of a wide frame of the display panel caused by a large gap between the front projection of the second edge PA2 of the transfer electrode PA and the display area AA.
  • the distance L2 between the front projection of the first edge PA1 and the edge of the display area AA is greater than or equal to 160 micrometers and less than or equal to 200 micrometers.
  • the distance L2 between the front projection of the first edge PA1 and the edge of the display area AA is 180 microns.
  • the display panel has a narrow frame; and by limiting the maximum distance between the front projection of the first edge PA1 and the edge of the display area AA, it is possible to ensure that the light-emitting functional layer EL has sufficient space for installation, thereby ensuring that the light-emitting functional layer EL is in the display area
  • the thickness of AA is uniform at the edge, and at the same time, the orthographic projection of the light-emitting functional layer EL is located outside the orthographic projection of the transfer electrode PA.
  • the pixel definition layer may not cover the transfer electrode PA, or may only cover a part of the transfer electrode PA. Of course, it may also completely cover the transfer electrode PA.
  • the second electrode layer COM can directly cover the transfer electrode PA to realize the connection between the second electrode layer COM and the transfer electrode PA;
  • the second electrode layer COM may be connected to the transfer electrode PA through a via hole penetrating the pixel definition layer.
  • the pixel definition layer covers a part of the transfer electrode PA, that is, as As shown in FIG. 5 , the edge of the orthographic projection of the pixel definition layer is located between the orthographic projections of the first edge PA1 and the second edge PA2 .
  • the distance between the edge of the orthographic projection of the pixel definition layer and the orthographic projection of the first edge PA1 is greater than or equal to 20 microns.
  • the transfer electrode PA has a first edge PA1 close to the display area AA, and the distance between the edge of the orthographic projection of the light-emitting functional layer EL and the edge of the display area AA is the first distance L1, and the first edge
  • the distance between the orthographic projection of PA1 and the edge of the display area AA is the second distance L2; the second distance L2 is greater than the first distance L1, and the ratio between the second distance L2 and the first distance L1 is greater than or equal to 1.1 and less than or equal to 1.5.
  • the distance between the orthographic projection of the hole edge of the first mask OM and the edge of the display area AA is the first distance L1.
  • the length of the extended transfer electrode PA is at least 0.1 times the first distance L1, thereby ensuring that the distance between the portion of the first mask OM close to the edge of the hole and the transfer electrode PA in the thickness direction of the driving backplane BM is reduced.
  • the overlapping area thereby weakens or even avoids the formation of equivalent capacitance near the edge of the hole of the first mask OM, so as to further improve the yield of the display panel.
  • the ratio of the second distance L2 to the first distance L1 is less than or equal to 1.5, when the first distance L1 is determined, the situation of the second distance L2 being larger is avoided, thereby avoiding the peripheral area WA of the display panel.
  • the larger width ensures the narrow bezel of the display panel.
  • the distance between the edge of the orthographic projection of the pixel definition layer and the edge of the display area AA is the third distance L3,
  • the third distance L3 is greater than the second distance L2, and the ratio between the third distance L3 and the second distance L2 is greater than or equal to 1.1 and less than or equal to 1.5.
  • An embodiment of the present disclosure also provides a method for manufacturing a display panel, which method can be used to manufacture the display panel described in the above embodiment. As shown in Figure 6, the method includes the following steps S610 to S650.
  • Step S610 Make a driving backplane.
  • the driving backplane has a display area and a peripheral area located at the periphery of the display area.
  • Step S620 Make a first electrode layer on one side of the driving backplane.
  • the first electrode layer includes a transfer electrode whose orthographic projection is located in the peripheral area.
  • Step S630 Create a pixel definition layer on the side of the first electrode layer away from the driving backplane.
  • Step S640 Create a luminescent functional layer on the side of the pixel definition layer away from the driving backplane through at least one mask.
  • the orthographic projection of the luminescent functional layer covers the display area, and the edge of the orthographic projection of the luminescent functional layer is located in the peripheral area. Transfer The orthographic projection of the electrode is located outside the orthographic projection of the light-emitting functional layer.
  • Step S650 Make a second electrode layer on the side of the light-emitting functional layer away from the driving backplane.
  • the second electrode layer at least covers the light-emitting functional layer and is connected to the transfer electrode.
  • the distance between the first mask and the substrate is shortened to ensure the accuracy of the evaporation position.
  • the orthographic projection of the transfer electrode is located in front of the light-emitting functional layer.
  • the phenomenon of electrostatic charge released at the edge of the hole is weakened when the membrane is used, thereby reducing the damage of the relevant film layer by electrostatic charge and improving the yield of the display panel.
  • the manufacturing process can be carried out by combining the specific structure of the driving backplane described in the above-mentioned embodiments and referring to the manufacturing process of each film layer of the driving backplane in the related art, which is not limited in the embodiments of the present disclosure.
  • the production can be carried out in combination with the positional relationship between the transfer electrode and the first electrode described in the above-mentioned embodiment, that is, the production method, and the embodiment of the present disclosure is not limited to this.
  • the film layer structure of the light-emitting functional layer described in the above embodiment can be produced.
  • a common mask can be used to make each film layer of the light-emitting functional layer, or multiple masks can be used to make each film layer of the light-emitting functional layer.
  • a first mask is set on the side of the pixel definition layer away from the driving backplane, and the first mask is passed through the first mask.
  • the first common film layer is made from a plate, the first mask has a first evaporation hole, the orthographic projection of the first evaporation hole covers the display area, and the edge of the orthographic projection of the first evaporation hole is located in the peripheral area, and the transfer electrode The orthographic projection is located outside the orthographic projection of the first evaporation hole; a second mask is set on the side of the first common film layer away from the driving backplane, and the luminescent material layer is made through the second mask.
  • the second mask has a plurality of second evaporation holes, and the orthographic projections of the plurality of second evaporation holes are located in the display area; a third mask is set on the side of the luminescent material layer away from the driving backplane, and passes through the third mask Make a second common film layer, the third mask has a third evaporation hole, the orthographic projection of the third evaporation hole covers the display area, and the edge of the orthographic projection of the third evaporation hole is located in the peripheral area, and the transfer electrode The orthographic projection is located outside the orthographic projection of the third evaporation hole.
  • the first mask and the third mask may be the same mask, but they are called different names when used to produce the first common film layer and the second common film layer.
  • the first mask and the third mask can also be Different masks are considered, and the embodiments of the present disclosure do not limit this.
  • An embodiment of the present disclosure also provides a display device, including the display panel described in the above embodiment.
  • the display device using the display panel can improve the display effect and improve the yield rate, thereby avoiding the risk of market withdrawal.

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Abstract

本公开提供了一种显示面板及其制造方法，显示装置，涉及显示技术领域。该显示面板包括：驱动背板，具有显示区和外围区；第一电极层，包括正投影位于外围区的转接电极；像素定义层，位于第一电极层背离驱动背板的一侧；发光功能层，位于像素定义层背离驱动背板的一侧，转接电极的正投影位于发光功能层的正投影以外；第二电极层，位于发光功能层背离驱动背板的一侧。本公开实施方式中，在制作发光功能层时，能够有效减小第一掩膜版上靠近孔边缘的部分与转接电极在厚度方向上的重叠区域，如此能够弱化等效电容的形成，以在去除第一掩膜版时弱化孔边缘释放静电荷的现象，从而提高显示面板的良率。 (图1)

Description

显示面板及其制造方法、显示装置
交叉引用
本公开要求于2022年06月14日提交的申请号为202210672172.8名称为“显示面板及其制造方法、显示装置”的中国专利申请的优先权，该中国专利申请的全部内容通过引用全部并入本文。
技术领域
本公开涉及显示技术领域，具体而言，涉及一种显示面板及其制造方法、显示装置。
背景技术
在显示技术中，有机发光二极管显示面板(Organic Light Emitting Diode，OLED)以其轻薄、主动发光、快响应速度、广视角、色彩丰富及高亮度、低功耗、耐高低温等众多优点而被业界公认为是继液晶显示器(Liquid Crystal Display，LCD)之后的第三代显示技术。
为了提升显示装置的显示效果，现有显示面板的制造过程中，对于发光功能层的制作，会将掩膜版尽可能的靠近基板，以保证蒸镀位置的准确性。如此，虽然提升了蒸镀位置的准确性，提高了显示装置的显示效果，但是也会产生一些新的问题。
需要说明的是，在上述背景技术部分公开的信息仅用于加强对本公开的背景的理解，因此可以包括不构成对本领域普通技术人员已知的现有技术的信息。
发明内容
本公开的目的在于提供一种显示面板及其制造方法、显示装置，能够在保证显示效果的同时，提高良率。
根据本公开的第一方面，提供了一种显示面板，包括：
驱动背板，具有显示区和位于所述显示区外围的外围区；
第一电极层，位于所述驱动背板的一侧，且包括正投影位于所述外围区的转接电极；
像素定义层，位于所述第一电极层背离所述驱动背板的一侧；
发光功能层，位于所述像素定义层背离所述驱动背板的一侧，所述发光功能层的正投影覆盖所述显示区，且所述发光功能层的正投影的边缘位于所述外围区，所述转接电极的正投影位于所述发光功能层的正投影以外；
第二电极层，位于所述发光功能层背离所述驱动背板的一侧，且与所述转接电极连接。
根据本公开任一所述的显示面板，所述发光功能层包括：
第一共用膜层，位于所述像素定义层背离所述驱动背板的一侧，所述第一共用膜层的正投影覆盖所述显示区，且所述第一共用膜层的正投影的边缘位于所述外围区，所述转接电极的正投影位于所述第一共用膜层的正投影以外；
发光材料层，位于所述第一共用膜层背离所述驱动背板的一侧，且包括正投影位于所述显示区的多个发光材料单元；
第二共用膜层，位于所述发光材料层背离所述驱动背板的一侧，所述第二共用膜层的正投影覆盖所述显示区，且所述第二共用膜层的正投影的边缘位于所述外围区，所述转接电极的正投影位于所述第二共用膜层的正投影以外。
根据本公开任一所述的显示面板，所述转接电极具有靠近所述显示区的第一边缘和远离所述显示区的第二边缘；
所述发光功能层的正投影的边缘与所述第一边缘的正投影之间的距离大于或等于20微米。
根据本公开任一所述的显示面板，所述发光功能层的正投影的边缘与所述显示区的边缘之间的距离大于或等于60微米且小于或等于180微米。
根据本公开任一所述的显示面板，所述第一边缘的正投影与所述显示区的边缘之间的距离大于或等于160微米且小于或等于200微米。
根据本公开任一所述的显示面板，所述像素定义层的正投影的边缘位于所述第一边缘、所述第二边缘的正投影之间。
根据本公开任一所述的显示面板，所述像素定义层的正投影的边缘与所述第一边缘的正投影之间的距离大于或等20微米。
根据本公开任一所述的显示面板，所述转接电极具有靠近所述显示区的第一边缘；
所述发光功能层的正投影的边缘与所述显示区的边缘之间的距离为第一 距离，所述第一边缘的正投影与所述显示区的边缘之间的距离为第二距离；
所述第二距离大于所述第一距离，所述第二距离与所述第一距离之间的比值大于或等于1.1且小于或等于1.5。
根据本公开任一所述的显示面板，所述像素定义层的正投影的边缘与所述显示区的边缘之间的距离为第三距离；
所述第三距离大于所述第二距离，所述第三距离与所述第二距离之间的比值大于或等于1.1且小于或等于1.5。
根据本公开的第二方面，提高了一种显示面板的制造方法，所述方法包括：
制作一驱动背板，所述驱动背板具有显示区和位于所述显示区外围的外围区；
在所述驱动背板的一侧制作第一电极层，所述第一电极层包括正投影位于所述外围区的转接电极；
在所述第一电极层背离所述驱动背板的一侧制作像素定义层；
通过至少一个掩膜版在所述像素定义层背离所述驱动背板的一侧制作发光功能层，所述发光功能层的正投影覆盖所述显示区，且所述发光功能层的正投影的边缘位于所述外围区，所述转接电极的正投影位于所述发光功能层的正投影以外；
在所述发光功能层背离所述驱动背板的一侧制作第二电极层，所述第二电极层至少覆盖所述发光功能层，且与所述转接电极连接。
根据本公开任一所述的方法，所述通过掩膜版在所述像素定义层背离所述驱动背板的一侧制作发光功能层，包括：
在所述像素定义层背离所述驱动背板的一侧设置第一掩膜版，并通过所述第一掩膜版制作第一共用膜层，所述第一掩膜版具有第一蒸镀孔，所述第一蒸镀孔的正投影覆盖所述显示区，且所述第一蒸镀孔的正投影的边缘位于所述外围区，所述转接电极的正投影位于所述第一蒸镀孔的正投影以外；
在所述第一共用膜层背离所述驱动背板的一侧设置第二掩膜版，并通过所述第二掩膜版制作发光材料层，所述第二掩膜版具有多个第二蒸镀孔，且多个所述第二蒸镀孔的正投影位于所述显示区；
在所述发光材料层背离所述驱动背板的一侧设置第三掩膜版，并通过所述第三掩膜版制作第二共用膜层，所述第三掩膜版具有第三蒸镀孔，所述第三蒸 镀孔的正投影覆盖所述显示区，且所述第三蒸镀孔的正投影的边缘位于所述外围区，所述转接电极的正投影位于所述第三蒸镀孔的正投影以外。
根据本公开的第三方面，提高了一种显示装置，包括上述第一方面所述的显示面板。
本公开实施方式至少包括以下技术效果：
本公开实施方式中，在制作发光功能层时，拉近第一掩膜版与基板之间的距离，以保证蒸镀位置的准确性，同时由于转接电极的正投影位于发光功能层的正投影以外，从而能够有效减小第一掩膜版上靠近孔边缘的部分与转接电极在驱动背板的厚度方向上的重叠区域，如此能够弱化等效电容的形成，以在去除第一掩膜版时弱化孔边缘释放静电荷的现象，从而减弱静电荷击伤相关膜层的情况，提高显示面板的良率。
应当理解的是，以上的一般描述和后文的细节描述仅是示例性和解释性的，并不能限制本公开。
附图说明
此处的附图被并入说明书中并构成本说明书的一部分，示出了符合本公开的实施例，并与说明书一起用于解释本公开的原理。显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本公开实施方式提供的一种显示面板的剖面结构示意图。
图2为本公开实施方式提供的一种制作发光功能层时显示面板的剖面结构示意图。
图3为相关技术提供的一种显示面板的剖面结构示意图。
图4为相关技术提供的一种显示面板的俯视结构示意图。
图5为本公开实施方式提供的一种显示面板的俯视结构示意图。
图6为本公开实施方式提供的一种显示面板的制造方法的流程示意图。
具体实施方式
现在将参考附图更全面地描述示例实施方式。然而，示例实施方式能够以 多种形式实施，且不应被理解为限于在此阐述的实施方式；相反，提供这些实施方式使得本公开将全面和完整，并将示例实施方式的构思全面地传达给本领域的技术人员。图中相同的附图标记表示相同或类似的结构，因而将省略它们的详细描述。此外，附图仅为本公开的示意性图解，并非一定是按比例绘制。
虽然本说明书中使用相对性的用语，例如“上”“下”来描述图标的一个组件对于另一组件的相对关系，但是这些术语用于本说明书中仅出于方便，例如根据附图中所述的示例的方向。能理解的是，如果将图标的装置翻转使其上下颠倒，则所叙述在“上”的组件将会成为在“下”的组件。当某结构在其它结构“上”时，有可能是指某结构一体形成于其它结构上，或指某结构“直接”设置在其它结构上，或指某结构通过另一结构“间接”设置在其它结构上。
用语“一个”、“一”、“该”、“所述”和“至少一个”用以表示存在一个或多个要素/组成部分/等；用语“包括”和“具有”用以表示开放式的包括在内的意思并且是指除了列出的要素/组成部分/等之外还可存在另外的要素/组成部分/等；用语“第一”、“第二”和“第三”等仅作为标记使用，不是对其对象的数量限制。
本公开实施方式提供了一种显示面板，如图1所示，该显示面板包括驱动背板BM和发光层EE，驱动背板BM具有显示区AA和位于显示区AA外围的外围区WA，驱动背板BM包括位于显示区AA的多个像素电路；发光层EE位于驱动背板BM的一侧，且包括正投影位于显示区AA的多个发光器件，多个像素电路与多个发光器件一一对应，且一发光器件与对应的一像素电路连接，如此能够在像素电路的驱动下控制对应的发光器件发光，以实现显示面板上画面的显示。
其中，本公开所涉及的正投影均是指在驱动背板BM上的正投影。驱动背板BM包括基板BP和驱动层DR，驱动层DR位于基板BP和发光层EE之间。驱动层DR可以形成在基板BP内，也即是驱动背板BM可以为硅基板BP；或者驱动层DR独立于基板BP设置，此时在一些实施方式中，基板BP的材料可以为钠钙玻璃(so-lime glass)、石英玻璃、蓝宝石玻璃等玻璃材料，或者可以为不锈钢、铝、镍等金属材料。在另一些实施方式中，基板BP的材料可以为聚甲基丙烯酸甲酯(Polymethyl methacrylate，PMMA)、聚乙烯醇(Polyvinyl  alcohol，PVA)、聚乙烯基苯酚(Polyvinyl phenol，PVP)、聚醚砜(Polyether sulfone，PES)、聚酰亚胺、聚酰胺、聚缩醛、聚碳酸酯(Poly carbonate，PC)、聚对苯二甲酸乙二酯(Polyethylene terephthalate，PET)、聚萘二甲酸乙二酯(Polyethylene naphthalate，PEN)或其组合。
可选地，基板BP除了可以为单层材料外，还可以为多层材料的复合。举例而言，在一些实施方式中，基板BP包括依次层叠设置的底膜层、压敏胶层、第一聚酰亚胺层和第二聚酰亚胺层。
本公开实施方式中，一个像素电路可以包括有多个晶体管和存储电容。
其中，晶体管可以为薄膜晶体管，薄膜晶体管可以选自顶栅型薄膜晶体管、底栅型薄膜晶体管或者双栅型薄膜晶体管；存储电容可以为双极板电容或者三级班电容。薄膜晶体管的有源层的材料可以为非晶硅半导体材料、低温多晶硅半导体材料、金属氧化物半导体材料、有机半导体材料或者其他类型的半导体材料；薄膜晶体管可以为N型薄膜晶体管或者P型薄膜晶体管。
可以理解的是，一个像素电路包括的多个晶体管中，任意两个晶体管之间的类型可以相同或者不相同。示例性地，在一些实施方式中，一个像素电路中的部分晶体管可以为N型晶体管且部分晶体管可以为P型晶体管。再示例性地，在另一些实施方式中，一个像素电路中的部分晶体管的有源层的材料可以为低温多晶硅半导体材料，且部分晶体管的有源层的材料可以为金属氧化物半导体材料。
本公开实施方式中，如图1或图2所示，驱动层DR包括在背离基板BP的方向依次分布的绝缘缓冲层BUF、晶体管层、层间电介质层ILD、源漏金属层SD和平坦层PLN。
其中，层间电介质层ILD的材料、平坦层PLN的材料均可以为有机绝缘材料，以保证具有一个平整的表面。层间电介质层ILD设有第一过孔，以便晶体管层通过第一过孔与源漏金属层SD的源极或漏极连接；平坦层PLN设有多个第二过孔，多个像素电路、多个第二过孔、多个发光器件一一对应，一发光器件通过对应的第二过孔与对应的像素电路连接。
其中，绝缘缓冲层BUF的材料可以为氧化硅、氮化硅等无机绝缘材料，绝缘缓冲层BUF可以为一层无机材料层，也可以为多层层叠的无机材料层。
在一些实施方式中，源漏金属层SD可以用于形成电源线、数据线、连接 线等源漏金属层SD走线，还可以用于形成用于形成存储电容的另一极板。源漏金属层SD可以为一层源漏金属层，也可以为两层或者三层源漏金属层。示例性地，驱动层DR包括的源漏金属层SD包括一层源漏金属层。
本公开实施方式中，晶体管层包括层叠于基板BP和层间电介质层ILD之间的半导体层ACT、栅极绝缘层GI、栅金属层Ga，晶体管层包括的各膜层的位置关系可以根据薄膜晶体管的膜层结构确定。
在一些实施方式中，如图1或图2所示，晶体管层包括在背离基板BP的方向依次层叠的半导体层ACT、栅极绝缘层GI和栅金属层Ga，如此所形成的薄膜晶体管为顶栅型薄膜晶体管。在另一些实施方式中，晶体管层包括在背离基板BP的方向依次层叠的栅金属层Ga、栅极绝缘层GI和半导体层ACT，如此所形成的薄膜晶体管为底栅型薄膜晶体管。
在一些实施方式中，半导体层ACT可以用于形成像素电路包括的各晶体管的有源部，各有源部包括沟道区和位于沟道区两侧的两个连接部(即源极和漏极)。其中，沟道区可以保持半导体特性，两个连接部对应的半导体材料被局部或者全部导体化。半导体层ACT可以为一层半导体层，也可以为两层半导体层。示例性地，半导体层ACT包括低温多晶硅半导体层。
在一些实施方式中，栅金属层Ga可以用于形成扫描线等金属走线，还可以用于形成存储电容的一个极板。栅金属层Ga可以为一层栅金属层，也可以为两层或者三层栅金属层。示例性地，栅金属层Ga包括一层栅金属层。
可以理解的是，当栅金属层Ga或者半导体层ACT等具有多层结构时，晶体管层中的栅极绝缘层GI可以进行适应性地增减。示例性地，在一些实施方式中，驱动层DR包括的晶体管层包括依次层叠设置于基板BP的低温多晶硅半导体层ACT、栅极绝缘层GI、一层栅金属层Ga。
可选地，驱动层DR还包括设于源漏金属层SD和平坦层PLN之间的钝化层，以通过钝化层的设置实现对源漏金属层SD的保护。
可选地，驱动层DR还包括设于绝缘缓冲层BUF与基板BP之间的遮挡层，遮挡层可以与至少部分晶体管的沟道区交叠，以遮蔽照射向晶体管的光线，使得晶体管的电学特性稳定。
本公开实施方式中，发光器件可以为有机电致发光二极管、微发光二极管、量子点-有机电致发光二极管、量子点发光二极管或者其他类型的发光器件。
示例性地，在一些实施方式中，发光器件为有机电致发光二极管，则该显示面板为OLED显示面板。如下，以发光器件为有机电致发光二极管为例，对发光器件的一种可行结构进行示例性的介绍。
如图1所示，发光层EE包括沿背离驱动背板BM的方向依次层叠的第一电极层An、像素定义层PDL、发光功能层EL和第二电极层COM，第一电极层An包括间隔分布且正投影位于显示区AA的多个第一电极，发光功能层EL包括与多个第一电极一一对应的发光单元，第二电极层COM包括与多个第一电极一一对应的第二电极，第一电极、发光单元、第二电极构成一发光器件。
其中，像素定义层PDL具有与多个第一电极一一对应的多个像素开口，第一电极包括在对应的像素开口处裸露的裸露区，该裸露区形成相应发光器件的发光区。
其中，发光功能层EL可以包括发光材料层ELa，以及空穴注入层、空穴传输层、电子阻挡层、空穴阻挡层、电子传输层和电子注入层中的一种或者多种。
对于空穴注入层、空穴传输层、电子阻挡层、空穴阻挡层、电子传输层和电子注入层中任一种膜层，由于该任一膜层可作为多个发光器件的共用膜层，因此可采用蒸镀孔能够完全覆盖显示区的掩膜版制作。具体地，第一掩膜版OM具有对应于整个显示区AA的第一蒸镀孔，可通过第一掩膜版OM上的第一蒸镀孔在整个显示区AA制作该任一膜层。如此，发光功能层EL包括的共用膜层的正投影覆盖显示区AA，且正投影的边缘位于外围区WA，即发光功能层EL的正投影覆盖显示区AA，且发光功能层EL的正投影的边缘位于外围区WA。当然，发光功能层EL包括多个共用膜层时，对于其中的部分共用膜层，除了采用第一掩膜版OM进行蒸镀外，也可采用第二掩膜版直接蒸镀在像素开口内，本公开实施方式对此不做限定。
对于发光材料层ELa，可通过第二掩膜版制作。具体的，第二掩膜版具有与多个像素开口一一对应的多个第二蒸镀孔，可通过第二掩膜版上的第二蒸镀孔在各像素开口内蒸镀发光材料单元，此时发光材料单元包括红色单元、绿色单元、蓝色单元。当然，发光材料层ELa也可以采用上述所述的第一掩膜版制作，此时发光材料层为白色材料层。
在一些实施方式中，如图1所示，显示面板还可以包括薄膜封装层TEF， 薄膜封装层TEF设于发光层EE背离基板BP的一侧，可以包括交替层叠设置的无机封装层和有机封装层。示例性地，薄膜封装层TEF包括依次层叠于发光层EE背离基板BP一侧的第一无机封装层、有机封装层和第二无机封装层。
无机封装层可以有效的阻隔外界的水分和氧气，避免水氧入侵有机发光功能层EL而导致材料降解；有机封装层位于相邻的两层无机封装层之间，以便实现平坦化和减弱无机封装层之间的应力。
其中，无机封装层的边缘的正投影可以由显示区AA延伸至外围区WA，有机封装层的边缘的正投影可以位于显示区AA的边缘和无机封装层的边缘之间。
本公开实施方式中，如图1或图2所示，发光层EE还包括正投影位于外围区WA的转接电极PA，第二电极层COM与转接电极PA电连接，从而便于第二电极层与外接电路的导通。
其中，转接电极PA可以与第一电极同层制作，也即是第一电极层An除了包括第一电极外，还包括转接电极PA。当然，转接电极PA也可以与第一电极位于不同的膜层。
其中，以转接电极PA与第一电极同层制作为例，第一电极、转接电极PA可以通过整层蒸镀再刻蚀的方式形成，也可以通过图案化蒸镀的方式形成，当然还可以通过其他方式形成，只要保证第一电极的正投影位于显示区AA，转接电极PA的正投影位于外围区WA即可。
结合上述所述的发光功能层EL的膜层结构，在制作发光功能层EL时，相关技术中，发明人经细致研究后发现：在制作发光功能层EL的部分共用膜层时，如图3和图4所示，通常会采用具有第一蒸镀孔的第一掩膜版OM，由于第一掩膜版OM距离基板BP较近，且第一掩膜版OM上靠近孔边缘的部分与转接电极PA在基板BP的厚度方向上存在交叠区域，因而会形成等效电容，实现电荷的累积。在移去第一掩膜版OM时，随着第一掩膜版OM与转接电极PA之间距离的增大，等效电容存储净电荷的能力逐渐减弱，且在第一掩膜版OM与转接电极PA之间距离的增大到一定数值时，第一掩膜版OM的孔边缘会释放静电荷，从而击伤相关膜层(比如绝缘缓冲层BUF、栅极绝缘层GI、层间电介质层ILD、钝化层PVX等)，并在相关膜层形成裂缝。如此，容易引 起水汽沿裂缝的浸入，进而导致发光功能层EL失效等，降低显示面板的良率。
而本公开中，在发光功能层EL的共用膜层采用第一掩膜版OM进行蒸镀时，为了避免第一掩膜版OM上靠近孔边缘的部分与转接电极PA之间形成等效电容，如图5所示，转接电极PA的正投影位于发光功能层EL的正投影以外，也即是转接电极PA的正投影的边缘位于第一掩膜版OM的正投影内。
如此，在制作发光功能层EL时，拉近第一掩膜版OM与基板BP之间的距离，以保证蒸镀位置的准确性，同时由于转接电极PA的正投影位于发光功能层EL的正投影以外，从而能够有效减小第一掩膜版OM上靠近孔边缘的部分与转接电极PA在驱动背板BM的厚度方向上的重叠区域，如此能够弱化等效电容的形成，以在去除第一掩膜版OM时弱化孔边缘释放静电荷的现象，从而减弱静电荷击伤相关膜层的情况，提高显示面板的良率。
结合上述所述的发光功能层EL包括共用膜层的情况，在一些实施方式中，如图1或图2所示，发光功能层EL包括：第一共用膜层ELb、发光材料层ELa和第二共用膜层ELc，第一共用膜层ELb位于像素定义层背离驱动背板BM的一侧；发光材料层ELa位于第一共用膜层ELb背离驱动背板BM的一侧，且包括正投影位于显示区AA的多个发光材料单元；第二共用膜层ELc位于发光层EE料层背离驱动背板BM的一侧。
其中，第一共用膜层ELb可以是空穴注入层、空穴传输层、电子阻挡层中的一种或多种，第二共用膜层ELc可以是空穴阻挡层、电子传输层和电子注入层中的一种或多种。
结合上述所述，可以是第一共用膜层ELb采用第一掩膜版OM进行蒸镀，第二共用膜层ELc采用第二掩膜版进行蒸镀；可以是第一共用膜层ELb采用第二掩膜版进行蒸镀，第二共用膜层ELc采用第一掩膜版OM进行蒸镀；也可以是第一共用膜层ELb、第二共用膜层ELc均采用第一掩膜版OM进行蒸镀。而对于第一共用膜层ELb、第二共用膜层ELc包括多种膜层的情况，也可以是多种膜层中的部分膜层采用第一掩膜版OM进行蒸镀，剩余部分膜层采用第二掩膜版进行蒸镀。
示例地，第一共用膜层ELb、第二共用膜层ELc均采用第一掩膜版OM进行蒸镀，此时第一共用膜层ELb的正投影覆盖显示区AA，且第一共用膜层ELb的正投影的边缘位于外围区WA，转接电极PA的正投影位于第一共用膜 层ELb的正投影以外；第二共用膜层ELc的正投影覆盖显示区AA，且第二共用膜层ELc的正投影的边缘位于外围区WA，转接电极PA的正投影位于第二共用膜层ELc的正投影以外。
如此，在制作第一共用膜层ELb，以及在制作第二共用膜层ELc时，均能够有效减小第一掩膜版OM上靠近孔边缘的部分与转接电极PA在驱动背板BM的厚度方向上的重叠区域，如此能够弱化等效电容的形成，从而弱化在去除第一掩膜版OM时孔边缘释放静电荷的现象，提高显示面板的良率。
在一些实施方式中，如图1、图2或图5所示，转接电极PA具有靠近显示区AA的第一边缘PA1和远离显示区AA的第二边缘PA2，发光功能层EL的正投影的边缘与第一边缘PA1的正投影之间的距离(L2与L1的差值)大于或等于20微米。
如此，在制作发光功能层EL时，第一掩膜版OM的孔边缘伸出第一边缘PA1的长度大于或等于20微米，从而能够进一步减小第一掩膜版OM上靠近孔边缘的部分与转接电极PA在驱动背板BM的厚度方向上的重叠区域，进而弱化甚至避免第一掩膜版OM的孔边缘附近等效电容的形成，以进一步提高显示面板的良率。示例的，发光功能层EL的正投影的边缘与第一边缘PA1的正投影之间的距离(L2与L1的差值)为20微米、30微米、40微米、50微米等，也即是在制作发光功能层EL时，第一掩膜版OM的孔边缘伸出第一边缘PA1的长度为20微米、30微米、40微米、50微米等。
继续上述举例，第一共用膜层ELb、第二共用膜层ELc均采用第一掩膜版OM进行蒸镀，此时第一共用膜层ELb的正投影的边缘、第二共用膜层ELc的正投影的边缘与第一边缘PA1的正投影之间的距离(L2与L1的差值)均大于或等于20微米。也即是在制作第一共用膜层ELb、滴入共用膜层时，第一掩膜版OM的孔边缘伸出第一边缘PA1的长度均大于或等于20微米。示例地，在制作第一共用膜层ELb、滴入共用膜层时，第一掩膜版OM的孔边缘伸出第一边缘PA1的长度均为20微米、30微米、40微米、50微米等。
需要说明的是，在调整发光功能层EL的正投影的边缘与第一边缘PA1的正投影之间的距离时，发光功能层EL的正投影的边缘与第一边缘PA1的正投影之间的距离越大，则转接电极PA与显示区AA之间的间隙越大，从而使得显示面板的外围区WA的宽度越大。如此，为了避免显示面板的外围区WA较 宽，发光功能层EL的正投影的边缘与第一边缘PA1的正投影之间的距离可以小于一定距离。示例地，发光功能层EL的正投影的边缘与第一边缘PA1的正投影之间的距离小于140微米。
可选地，发光功能层EL的正投影的边缘与显示区AA的边缘之间的距离L1大于或等于60微米且小于或等于180微米。示例地，发光功能层EL的正投影的边缘与显示区AA的边缘之间的距离L1为120微米。
如此，通过限定发光功能层EL的正投影的边缘与显示区AA的边缘之间的最小距离，能够保证发光功能层EL的边缘伸出显示区AA边缘的长度，避免发光功能层EL在显示区AA的边缘出现厚度不均的情况；而通过限定发光功能层EL的正投影的边缘与显示区AA的边缘之间的最大距离，由于需要保证转接电极PA的正投影位于发光功能层EL的正投影以外，从而避免了转接电极PA的第二边缘PA2的正投影与显示区AA之间的间隙较大，而导致显示面板的边框较宽的问题。
可选地，第一边缘PA1的正投影与显示区AA的边缘之间的距离L2大于或等于160微米且小于或等于200微米。示例地，第一边缘PA1的正投影与显示区AA的边缘之间的距离L2为180微米。
如此，通过限定第一边缘PA1的正投影与显示区AA的边缘之间的最小距离，能够避免转接电极PA的第一边缘PA1的正投影与显示区AA之间的间隙较大，从而实现显示面板的窄边框化；而通过限定第一边缘PA1的正投影与显示区AA的边缘之间的最大距离，能够保证发光功能层EL具有足够的设置空间，从而保证发光功能层EL在显示区AA的边缘处厚度均匀，同时实现发光功能层EL的正投影位于转接电极PA的正投影以外。
进一步地，本公开实施方式中，像素定义层可以不覆盖转接电极PA，也可以只覆盖转接电极PA的一部分，当然也可以完全覆盖转接电极PA。
当像素定义层不覆盖转接电极PA，或者只覆盖转接电极PA的一部分时，第二电极层COM可直接覆盖转接电极PA，以实现第二电极层COM与转接电极PA的连接；当像素定义层完全覆盖转接电极PA，或者只覆盖转接电极PA的一部分时，第二电极层COM可通过贯穿像素定义层的过孔与转接电极PA连接。
其中，如图1或图2所示，像素定义层覆盖转接电极PA的一部分，即如 图5所示，像素定义层的正投影的边缘位于第一边缘PA1、第二边缘PA2的正投影之间。
可选地，像素定义层的正投影的边缘与第一边缘PA1的正投影之间的距离(L3与L2的差值)大于或等20微米。
在另一些实施方式中，转接电极PA具有靠近显示区AA的第一边缘PA1，发光功能层EL的正投影的边缘与显示区AA的边缘之间的距离为第一距离L1，第一边缘PA1的正投影与显示区AA的边缘之间的距离为第二距离L2；第二距离L2大于第一距离L1，第二距离L2与第一距离L1之间的比值大于或等于1.1且小于或等于1.5。
结合对发光功能层EL的制作可知第一掩膜版OM的孔边缘的正投影到显示区AA的边缘之间的距离为第一距离L1，如此，能够保证第一掩膜版OM的孔边缘伸出转接电极PA的长度最小为第一距离L1的0.1倍，从而能够保证减小第一掩膜版OM上靠近孔边缘的部分与转接电极PA在驱动背板BM的厚度方向上的重叠区域，进而弱化甚至避免第一掩膜版OM的孔边缘附近等效电容的形成，以进一步提高显示面板的良率。另外，由于第二距离L2与第一距离L1的比值小于或等于1.5，从而在第一距离L1确定的情况下，避免了第二距离L2较大的情况，进而避免了显示面板的外围区WA的宽度较大的情况，保证了显示面板的窄边框化。
进一步地，结合上述实施例所述的像素定义层对转接电极PA的覆盖情况，可选地，像素定义层的正投影的边缘与显示区AA的边缘之间的距离为第三距离L3，第三距离L3大于第二距离L2，以及第三距离L3与第二距离L2之间的比值大于或等于1.1且小于或等于1.5。
本公开实施方式还提供了一种显示面板的制造方法，该方法可用于制造上述实施方式所述的显示面板。如图6所示，该方法包括如下步骤S610～步骤S650。
步骤S610、制作一驱动背板，驱动背板具有显示区和位于显示区外围的外围区。
步骤S620、在驱动背板的一侧制作第一电极层，第一电极层包括正投影位于外围区的转接电极。
步骤S630、在第一电极层背离驱动背板的一侧制作像素定义层。
步骤S640、通过至少一个掩膜版在像素定义层背离驱动背板的一侧制作发光功能层，发光功能层的正投影覆盖显示区，且发光功能层的正投影的边缘位于外围区，转接电极的正投影位于发光功能层的正投影以外。
步骤S650、在发光功能层背离驱动背板的一侧制作第二电极层，第二电极层至少覆盖发光功能层，且与转接电极连接。
本公开实施方式中，在制作发光功能层时，拉近第一掩膜版与基板之间的距离，以保证蒸镀位置的准确性，同时由于转接电极的正投影位于发光功能层的正投影以外，从而能够有效减小第一掩膜版上靠近孔边缘的部分与转接电极在驱动背板的厚度方向上的重叠区域，如此能够弱化等效电容的形成，以在去除第一掩膜版时弱化孔边缘释放静电荷的现象，从而减弱静电荷击伤相关膜层的情况，提高显示面板的良率。
上述步骤S610中，可结合上述实施方式所述的驱动背板的具体结构，以及参考相关技术中驱动背板的各膜层的制作工艺进行制作，本公开实施方式对此不做限定。上述步骤S620中，可结合上述实施方式所述的转接电极、第一电极的位置关系，即制作方式进行制作，本公开实施方式对此不做限定。
上述步骤S640中，可结合上述实施方式所述的发光功能层的膜层结构进行制作。在制作发光功能层时，可以采用一个通用的掩膜版制作发光功能层的各膜层，也可以采用多个掩膜版制作发光功能层的各膜层。
以发光功能层包括层叠设置的第一共用膜层、发光材料层和第二共用膜层为例，在像素定义层背离驱动背板的一侧设置第一掩膜版，并通过第一掩膜版制作第一共用膜层，第一掩膜版具有第一蒸镀孔，第一蒸镀孔的正投影覆盖显示区，且第一蒸镀孔的正投影的边缘位于外围区，转接电极的正投影位于第一蒸镀孔的正投影以外；在第一共用膜层背离驱动背板的一侧设置第二掩膜版，并通过第二掩膜版制作发光材料层，第二掩膜版具有多个第二蒸镀孔，且多个第二蒸镀孔的正投影位于显示区；在发光材料层背离驱动背板的一侧设置第三掩膜版，并通过第三掩膜版制作第二共用膜层，第三掩膜版具有第三蒸镀孔，第三蒸镀孔的正投影覆盖显示区，且第三蒸镀孔的正投影的边缘位于外围区，转接电极的正投影位于第三蒸镀孔的正投影以外。
其中，第一掩膜版和第三掩膜版可以为同一掩膜版，只是在用于制作第一共用膜层、第二共用膜层时的不同叫法。当然，第一掩膜版和第三掩膜版也可 以为不同的掩膜版，本公开实施方式对此不做限定。
需要说明的是，尽管在附图中以特定顺序描述了本公开中显示面板的制造方法的各个步骤，但是，这并非要求或者暗示必须按照该特定顺序来执行这些步骤，或是必须执行全部所示的步骤才能实现期望的结果。附加的或备选的，可以省略某些步骤，将多个步骤合并为一个步骤执行，以及/或者将一个步骤分解为多个步骤执行等。
本公开实施方式还提供了一种显示装置，包括上述实施方式所述的显示面板。
结合上述实施方式所述的显示面板，对于使用该显示面板的显示装置，能够在提高显示效果的同时，提高良率，从而避免市退风险。
本领域技术人员在考虑说明书及实践这里公开的发明后，将容易想到本公开的其它实施方案。本申请旨在涵盖本公开的任何变型、用途或者适应性变化，这些变型、用途或者适应性变化遵循本公开的一般性原理并包括本公开未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的，本公开的真正范围和精神由所附的权利要求指出。

Claims (12)

  1. 一种显示面板，其中，包括：
    驱动背板，具有显示区和位于所述显示区外围的外围区；
    第一电极层，位于所述驱动背板的一侧，且包括正投影位于所述外围区的转接电极；
    像素定义层，位于所述第一电极层背离所述驱动背板的一侧；
    发光功能层，位于所述像素定义层背离所述驱动背板的一侧，所述发光功能层的正投影覆盖所述显示区，且所述发光功能层的正投影的边缘位于所述外围区，所述转接电极的正投影位于所述发光功能层的正投影以外；
    第二电极层，位于所述发光功能层背离所述驱动背板的一侧，且与所述转接电极连接。
  2. 如权利要求1所述的显示面板，其中，所述发光功能层包括：
    第一共用膜层，位于所述像素定义层背离所述驱动背板的一侧，所述第一共用膜层的正投影覆盖所述显示区，且所述第一共用膜层的正投影的边缘位于所述外围区，所述转接电极的正投影位于所述第一共用膜层的正投影以外；
    发光材料层，位于所述第一共用膜层背离所述驱动背板的一侧，且包括正投影位于所述显示区的多个发光材料单元；
    第二共用膜层，位于所述发光材料层背离所述驱动背板的一侧，所述第二共用膜层的正投影覆盖所述显示区，且所述第二共用膜层的正投影的边缘位于所述外围区，所述转接电极的正投影位于所述第二共用膜层的正投影以外。
  3. 如权利要求1或2所述的显示面板，其中，所述转接电极具有靠近所述显示区的第一边缘和远离所述显示区的第二边缘；
    所述发光功能层的正投影的边缘与所述第一边缘的正投影之间的距离大于或等于20微米。
  4. 如权利要求3所述的显示面板，其中，所述发光功能层的正投影的边缘与所述显示区的边缘之间的距离大于或等于60微米且小于或等于180微米。
  5. 如权利要求3所述的显示面板，其中，所述第一边缘的正投影与所述显示区的边缘之间的距离大于或等于160微米且小于或等于200微米。
  6. 如权利要求3所述的显示面板，其中，所述像素定义层的正投影的边缘位于所述第一边缘、所述第二边缘的正投影之间。
  7. 如权利要求6所述的显示面板，其中，所述像素定义层的正投影的边缘与所述第一边缘的正投影之间的距离大于或等20微米。
  8. 如权利要求1或2所述的显示面板，其中，所述转接电极具有靠近所述显示区的第一边缘；
    所述发光功能层的正投影的边缘与所述显示区的边缘之间的距离为第一距离，所述第一边缘的正投影与所述显示区的边缘之间的距离为第二距离；
    所述第二距离大于所述第一距离，所述第二距离与所述第一距离之间的比值大于或等于1.1且小于或等于1.5。
  9. 如权利要求8所述的显示面板，其中，所述像素定义层的正投影的边缘与所述显示区的边缘之间的距离为第三距离；
    所述第三距离大于所述第二距离，所述第三距离与所述第二距离之间的比值大于或等于1.1且小于或等于1.5。
  10. 一种显示面板的制造方法，其中，所述方法包括：
    制作一驱动背板，所述驱动背板具有显示区和位于所述显示区外围的外围区；
    在所述驱动背板的一侧制作第一电极层，所述第一电极层包括正投影位于所述外围区的转接电极；
    在所述第一电极层背离所述驱动背板的一侧制作像素定义层；
    通过至少一个掩膜版在所述像素定义层背离所述驱动背板的一侧制作发光功能层，所述发光功能层的正投影覆盖所述显示区，且所述发光功能层的正投影的边缘位于所述外围区，所述转接电极的正投影位于所述发光功能层的正 投影以外；
    在所述发光功能层背离所述驱动背板的一侧制作第二电极层，所述第二电极层至少覆盖所述发光功能层，且与所述转接电极连接。
  11. 如权利要求10所述的方法，其中，通过掩膜版在所述像素定义层背离所述驱动背板的一侧制作发光功能层，包括：
    在所述像素定义层背离所述驱动背板的一侧设置第一掩膜版，并通过所述第一掩膜版制作第一共用膜层，所述第一掩膜版具有第一蒸镀孔，所述第一蒸镀孔的正投影覆盖所述显示区，且所述第一蒸镀孔的正投影的边缘位于所述外围区，所述转接电极的正投影位于所述第一蒸镀孔的正投影以外；
    在所述第一共用膜层背离所述驱动背板的一侧设置第二掩膜版，并通过所述第二掩膜版制作发光材料层，所述第二掩膜版具有多个第二蒸镀孔，且多个所述第二蒸镀孔的正投影位于所述显示区；
    在所述发光材料层背离所述驱动背板的一侧设置第三掩膜版，并通过所述第三掩膜版制作第二共用膜层，所述第三掩膜版具有第三蒸镀孔，所述第三蒸镀孔的正投影覆盖所述显示区，且所述第三蒸镀孔的正投影的边缘位于所述外围区，所述转接电极的正投影位于所述第三蒸镀孔的正投影以外。
  12. 一种显示装置，其中，包括上述权利要求1-9任一所述的显示面板。
PCT/CN2023/094861 2022-06-14 2023-05-17 显示面板及其制造方法、显示装置 WO2023241297A1 (zh)

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