WO2021261867A1 - Film mince d'hydrocarbure à constante diélectrique élevée, et dispositif semi-conducteur l'utilisant - Google Patents

Film mince d'hydrocarbure à constante diélectrique élevée, et dispositif semi-conducteur l'utilisant Download PDF

Info

Publication number
WO2021261867A1
WO2021261867A1 PCT/KR2021/007769 KR2021007769W WO2021261867A1 WO 2021261867 A1 WO2021261867 A1 WO 2021261867A1 KR 2021007769 W KR2021007769 W KR 2021007769W WO 2021261867 A1 WO2021261867 A1 WO 2021261867A1
Authority
WO
WIPO (PCT)
Prior art keywords
thin film
layer
ultra
source
hydrocarbon
Prior art date
Application number
PCT/KR2021/007769
Other languages
English (en)
Korean (ko)
Inventor
이종훈
김의태
정홍식
서준기
임동혁
이석우
Original Assignee
울산과학기술원
충남대학교 산학협력단
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 울산과학기술원, 충남대학교 산학협력단 filed Critical 울산과학기술원
Publication of WO2021261867A1 publication Critical patent/WO2021261867A1/fr

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02115Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material being carbon, e.g. alpha-C, diamond or hydrogen doped carbon
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/26Deposition of carbon only
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/52Controlling or regulating the coating process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76831Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823871Complementary field-effect transistors, e.g. CMOS interconnection or wiring or contact manufacturing related aspects

Definitions

  • the technical field of the present invention relates to a method for manufacturing a high dielectric useful for manufacturing highly integrated devices due to high dielectric constant, low leakage current, and high insulation strength, a high dielectric manufactured by the method, and a semiconductor device using the high dielectric will be.
  • Carbon thin films have attracted a lot of attention in technical and industrial applications due to their excellent electrical and mechanical properties.
  • the carbon-based material constituting the carbon thin film may be classified into diamond, graphene, and amorphous carbon according to bonding.
  • Diamond has no electrical conductivity because carbon atoms are connected by sp3 bonds, but has very high hardness, and graphene has excellent conductivity because it consists only of sp2 bonds.
  • amorphous carbon has both sp3 bonds and sp2 bonds, conductivity is lower than that of graphene.
  • the bonding of carbon materials can be controlled by controlling the deposition temperature during the manufacture of the carbon thin film.
  • CVD chemical vapor deposition
  • high-quality graphene and carbon nanotubes can be manufactured at a high temperature of up to about 1000°C.
  • the deposition temperature is lowered to about 700° C. during deposition by the chemical vapor deposition method, a nano-graphite structure is formed, and at room temperature, amorphous carbon is formed.
  • the amorphous hydrocarbon film has been used as an etch mask from the advantage that it is easy to form a thin film with a uniform thickness, or has been used as a low-k insulator such as an interlayer material of a semiconductor metal wiring to prevent thin film defects and increase interlayer adhesion.
  • nano graphite and amorphous carbon contain a significant proportion of dangling bonds, which mean fixed free radicals, they react with hydrogen and/or HC radicals under appropriate conditions to form a hydrocarbon structure.
  • dangling bonds which mean fixed free radicals
  • attempts to develop and apply materials with new properties by utilizing dangling bonds in nano graphite or amorphous carbon have been limited.
  • the integration of high-density semiconductor devices requires a high dielectric having a high dielectric constant, low leakage current, and high dielectric strength.
  • the gate length of a MOSFET transistor has rapidly decreased from 10 ⁇ m to 10 nm in the past several decades, and thus the effectiveness of the SiO 2 thin film used as an insulating film has reached its limit.
  • Materials having a higher dielectric constant than SiO 2 are commonly referred to as high-k materials. Accordingly, the development of a new high-k material having a higher dielectric constant than that of SiO 2 is active.
  • Hf- or Zr-based oxides have recently attracted attention for a node of 100 nm or less.
  • research is being conducted in several directions, such as finding a material to replace the Hf source (eg, Al, Zr, Ta, STO, BST, etc.), or depositing another material by adding another material to the Hf source. .
  • the high-k layer of the metal oxide includes a large number of bulk traps such as oxygen vacancies, increasing C-V hysteresis, and causing instability of the threshold voltage.
  • the equivalent oxide thickness is required to be 1 nm or less, and electron tunneling of Hf- or Zr-based oxides may occur under these conditions.
  • Hf- or Zr-based oxides are easy to crystallize, they exhibit high leakage currents and deteriorate the interfacial properties. Accordingly, development of a new high-k material is required for a technology having a node of 10 nm or less.
  • an object of the present invention is to provide a method of manufacturing a high dielectric useful for manufacturing a highly integrated device due to a high dielectric constant, low leakage current, and high insulation strength.
  • Another object of the present invention is to provide a high dielectric manufactured by the above method and a semiconductor device using the high dielectric.
  • the present invention comprises the steps of placing a substrate in a plasma reactor; injecting hydrocarbon gas and hydrogen gas together into the reactor; and generating plasma in the reactor; it relates to a method for manufacturing a high dielectric hydrocarbon thin film, comprising: controlling the temperature range in the reactor so that the dielectric constant is 20 or more as an amorphous structure.
  • the dielectric constant is significantly higher than that of SiO 2 as well as conventional Hf- or Zr-based oxides, but the leakage current is very low, and it shows high insulation strength characteristics at the 10 nm node It can be more usefully used for the following semiconductors.
  • the high dielectric hydrocarbon thin film of the present invention does not require a catalyst layer, it can be deposited directly on a required substrate without requiring a transfer process, thereby improving the performance of a semiconductor device due to excellent interfacial properties.
  • FIG. 1 shows a schematic diagram and a TEM image of a thin film produced according to the deposition temperature.
  • FIG. 3 shows an XPS spectrum and an EXAFS spectrum of a thin film prepared at 400°C.
  • MIS semiconductor-high dielectric hydrocarbon thin film-metal
  • FIG. 5 is a graph showing the electrical characteristics of the high dielectric hydrocarbon thin film prepared according to an embodiment of the present invention.
  • FIG. 6 is a cross-sectional view illustrating a semiconductor structure using a high dielectric hydrocarbon thin film.
  • FIG. 7 is a diagram illustrating a Fermi level of the semiconductor structure of FIG. 6 .
  • FIG. 8 is a cross-sectional view illustrating a semiconductor device according to an embodiment of the present invention using a high dielectric hydrocarbon thin film.
  • FIG. 9 is a cross-sectional view illustrating a semiconductor device according to an embodiment of the present invention using a high dielectric hydrocarbon thin film.
  • FIG. 10 is a cross-sectional view illustrating a semiconductor device according to an embodiment of the present invention using a high dielectric hydrocarbon thin film.
  • the plasma reactor is to induce a reaction of a reaction gas by generating plasma in the reactor, for example, plasma-assisted chemical vapor deposition (PE-CVD) or inductively coupled plasma chemical vapor deposition (ICP-CVD), electron
  • PE-CVD plasma-assisted chemical vapor deposition
  • ICP-CVD inductively coupled plasma chemical vapor deposition
  • ECR-CVD cyclotron resonance chemical vapor deposition
  • Plasma generates a large amount of highly reactive radicals from the reaction gas, so that a thin film can be formed even at a low temperature.
  • ICP-CVD has been described as an example, but is not limited thereto.
  • any of the substrates generally used for the production of thin films may be used.
  • silicon, glass, metal, or a metal oxide substrate may be used, and a separate catalyst layer is not required.
  • the substrate includes not only a substrate for manufacturing a semiconductor device, but also a substrate on which an active layer is formed.
  • Hydrocarbon gas and hydrogen gas are injected into the reactor as reaction gases.
  • Any hydrocarbon gas may be used as long as it can form a hydrocarbon thin film by plasma, and methane, ethane, propane, ethylene, acetylene, propylene, and benzene that can be used for graphene production by chemical vapor deposition at high temperatures usually One or more selected from may be used. However, other hydrocarbon gases are not excluded.
  • hydrocarbon thin film is formed on the substrate.
  • a mixture of hydrocarbon gas and hydrogen gas is used as a reaction gas to induce bonding of hydrogen and dangling bonds that increase in the thin film as the thin film manufacturing temperature is lowered.
  • an inert gas such as argon or helium may be further included as a transport gas.
  • the volume ratio of hydrocarbon gas and hydrogen gas is preferably about 1:2 to 1:50. If the ratio of hydrogen gas is too low, a hydrocarbon thin film with a rough surface is formed, and if it is too high, the hydrocarbon thin film is not formed well.
  • the properties of the thin film produced were changed according to the temperature.
  • Graphene is formed at a high temperature, and as the temperature is lowered, nano graphite containing nano graphene crystals is formed in the amorphous hydrocarbon thin film, and when the thin film manufacturing temperature is further lowered, the high dielectric hydrocarbon thin film of the present invention is formed.
  • a low-k hydrocarbon thin film was formed.
  • the high dielectric properties of the hydrocarbon thin film prepared at 200° C. to 600° C. are shown, but since it may vary depending on the equipment and reaction conditions used at the reaction temperature, it is meaningless to limit the value to a specific value. Conditions that may affect the reaction temperature include a volume ratio of hydrocarbon gas and hydrogen gas, reaction pressure, and plasma intensity.
  • the pressure in the reactor is preferably 0.5 Torr to 5 Torr so that plasma discharge can be smoothly performed.
  • the pressure is too high, it is difficult to maintain the plasma, so that the hydrocarbon thin film deposition efficiency is lowered, and when the pressure is too low, the process efficiency is lowered.
  • the present invention also relates to a high dielectric hydrocarbon thin film produced by the method.
  • the thickness of the high dielectric hydrocarbon thin film produced by the method of the present invention can be easily controlled by adjusting the reaction time under the corresponding conditions.
  • the high dielectric hydrocarbon thin film prepared by the thin film of the present invention has a smooth surface structure without pinholes.
  • the high dielectric hydrocarbon thin film manufactured by the method of the present invention has a dielectric constant of 20 or more, and in one embodiment below, it exhibits a very high dielectric characteristic of 90, so it is expected to be usefully applied to semiconductors having a node of 10 nm or less. do.
  • the equivalent oxide film thickness is 0.2 nm
  • the leakage current at 1 V is 0.25 A/cm 2 or less
  • the insulation strength is 5 MV/cm or more
  • HfO 2 , ZrO 2 known as a conventional high-k oxide
  • Hf- or Zr-based oxides such as HfAlO x , ZrAlO x , etc.
  • the present invention relates to a semiconductor device using the high dielectric hydrocarbon thin film.
  • the high-k hydrocarbon thin film may be used as an ultra-thin insertion layer requiring a high-k dielectric in more detail.
  • the semiconductor device of the present invention may be a memory device or a logic device.
  • a hydrocarbon thin film was deposited on a Si wafer or Si/SiO 2 /Ag substrate by inductively-coupled plasma chemical vapor deposition (ICP-CVD) using CH 4 gas and hydrogen gas under the following conditions. Specifically, 1 sccm of CH 4 gas and 100 sccm of hydrogen and Ar mixed gas (hydrogen 10%) were injected into the reactor, the pressure was fixed at 1 Torr, and the plasma power was set at 600 W. The deposition time was varied from 30 seconds to 1 hour.
  • ICP-CVD inductively-coupled plasma chemical vapor deposition
  • FIG. 1 is a TEM image of a thin film deposited at 950° C., showing that carbon atoms have a highly ordered hexagonal arrangement.
  • the inner figure shows a fast Fourier transformed (FFT) digital diffractogram and shows a hexagonal pattern, which is a typical characteristic of high-quality graphene.
  • FFT fast Fourier transformed
  • the resulting thin film When the deposition temperature was lowered to 700° C., the resulting thin film exhibited a nano graphite morphology (see FIG. 1 c ) in which hexagonal lattice nanocrystals were partially present in an amorphous matrix.
  • FFT shows a diffused ring morphology with dark spots (indicated by circles). The spacing between the dots is 0.246 nm, which corresponds to carbon allotrope hexagonite.
  • the thin film lost nanocrystallinity, exhibited an amorphous structure, and showed a halo FFT pattern (see Fig. 1 d and e).
  • the Raman spectrum shown in a of FIG. 2 also showed a typical aspect of the amorphous carbon structure.
  • FIG. 2 b and c are electron energy-loss spectroscopy (EELS) spectra of a low-loss region and a carbon K-edge region, respectively, and the bonding pattern of the hydrocarbon thin film according to the deposition temperature can be confirmed.
  • EELS electron energy-loss spectroscopy
  • FIG. 2 b graphene showed two characteristic peaks.
  • the strong peak at 5 eV is a ⁇ plasmon peak related to the ⁇ * transition by sp2 bonding of carbon, and the broad peak around 15.5 eV is ( ⁇ + ⁇ ) is a plasmon peak.
  • the position of the ( ⁇ + ⁇ ) plasmon peak is proportional to the density of valence electrons, that is, the mass density of the carbon thin film.
  • the presence of ⁇ bonds in the thin film can also be confirmed in the EELS spectrum of the carbon K-edge region shown in FIG. 2c .
  • the first peak is observed at 281 eV in the thin films prepared at 50 °C and 400 °C, which corresponds to a transition (1s ⁇ * transition) from the 1s state to the ⁇ * state above the Fermi level. From the strong peak observed in the corresponding region, it can be confirmed that a significant amount of sp2 bonds exist in the amorphous thin film.
  • the second peak was observed very broadly in the region of 290 eV to 305 eV, which corresponds to the 1s ⁇ * transition.
  • the chemical bonding properties of the hydrocarbon thin film prepared at 400° C. were confirmed by X-ray photoelectron spectroscopy (XPS) and extended X-ray absorption fine structure (EXAFS).
  • 3a is the XPS spectrum, 285.3 eV corresponding to the aliphatic hydrocarbon C x H y is observed, and the position of the corresponding peak does not change as the etching is performed using Ar + plasma, so it can be confirmed that the composition of the hydrocarbon thin film is uniform.
  • the peak position shifted from 285.0 eV to 284.4 eV according to the etching of the surface.
  • the graphene surface exposed to air can adsorb various types of hydrocarbons, resulting in a high binding energy of 285.0 eV.
  • graphene itself shows the binding energy of 284.4 eV.
  • 3b is an EXAFS spectrum at the 1s core level
  • c is an EXAFS spectrum near the Fermi level.
  • the strong peak of 285.1 eV in FIG. 2 b corresponds to the 285.3 eV peak of the XPS spectrum.
  • the position of the peak was redshifted to 284.7 eV, indicating that hydrogen was desorbed from the aliphatic hydrocarbon C x H y .
  • the desorbed sample shows that the density of the expanded state increases and the intensity in the region near the Fermi level increases.
  • An MIS device having the structure of FIG. 4 using the hydrocarbon thin film according to the present invention as a dielectric layer was manufactured, and the electrical properties of the hydrocarbon thin film were evaluated.
  • the hydrocarbon thin film was directly grown on a substrate or transferred to prepare an MIS device. More specifically, in order to grow directly on the Si wafer, the Si wafer was immersed in a 10% hydrofluoric acid solution to remove the native oxide film and then washed. After the cleaned substrate was introduced into the ICP-CVD reactor, a hydrocarbon thin film was deposited at 200° C., 250° C., 300° C., 350° C. and 400° C. for 30 minutes, respectively, according to the conditions described in Example 1. For the transfer of the hydrocarbon thin film, the Si/SiO2/Ag substrate was introduced into the ICP-CVD reactor, and then the hydrocarbon thin film was deposited for 5 minutes under the same conditions as for direct growth.
  • the Ag catalyst layer was etched by immersion in FeCl 3 aqueous solution to separate the hydrocarbon/PMMA film.
  • the separated hydrocarbon/PMMA film was transferred onto a Si wafer and then immersed in acetone to remove PMMA.
  • an MIS device was manufactured by forming an Au electrode having a diameter of 100 ⁇ m on a hydrocarbon thin film directly grown or transferred on a Si wafer.
  • the thickness of the hydrocarbon thin film measured from cross-sectional TEM and AFM (Asylum Research, MFP-3D) in this MIS device was 2.6 nm, 2.4 nm, and 3.1 nm at growth temperatures of 200°C, 250°C, 300°C, 350°C, and 400°C, respectively. , 5.0 nm and 6.5 nm.
  • AFM images of hydrocarbons grown on the Si wafer itself without the Ag catalyst layer showed a uniform, pinhole-free, smooth surface.
  • the rms roughness of the hydrocarbon thin film prepared by each method was 3.06 nm and 1.61 nm, respectively.
  • 5 is a graph showing electrical characteristics measured for the manufactured MIS device.
  • 5A is a C-V curve of a hydrocarbon thin film directly grown on a Si wafer, where ⁇ is a value measured from -4V to +4V, and ⁇ is a value measured from +4V to -4V.
  • An important characteristic of the C-V curve is that the hysteresis in the C-V loop for all samples is close to zero with less than 5 mV, which meets the criteria for high-k gate dielectrics (about 30 mV or less).
  • the rapid transition from accumulation and depletion and a very small hysteresis value mean that the thin film and the charge density trapped at the Si interface between the thin film and the thin film are very small.
  • the hydrocarbon thin film transferred to Si exhibited significant hysteresis, and the transition from accumulation and depletion was relatively slow. This is estimated to be due to deterioration of the interface properties during the transfer process and contamination during the etching process of the Ag catalyst thin film during transfer.
  • the flat band voltage of the hydrocarbon thin film slightly shifted toward the -voltage due to the fixed positive charge, whereas the C-V curve showed an ideal shape. The difference in the flat band voltage between the samples was not large, and all of them were in the range of -0.3V to 0.4V.
  • the dielectric constant (k) of the hydrocarbon thin film can be calculated from the following equation.
  • C E/T: where C is the integrated capacitance, E is the dielectric constant of the hydrocarbon thin film, and T is the thickness of the hydrocarbon thin film.
  • 5B is a graph showing the dielectric constant of a thin film prepared at each temperature.
  • the dielectric constant of a hydrocarbon thin film grown directly on a Si wafer is up to 90, and the dielectric constant of Hf- and Zr-based oxides known as high-k gate oxides. It was better than the constant 20 to 30.
  • the dielectric constant gradually increased and showed a maximum of 90 at 350°C, and when the temperature was further increased to 400°C, the dielectric constant decreased to 13.
  • the hydrocarbon thin film transferred on the Si wafer has similar tendencies to the direct grown hydrocarbon thin film and the thin film growth temperature.
  • the dielectric constant also gradually increased, reaching a maximum of 61 at 500 ° C.
  • a high-k dielectric One of the important characteristics of a high-k dielectric is that the leakage current density should be low and the insulation strength should be high.
  • 5c is an I-V curve
  • the thin films prepared at 300° C. and 350° C. with dielectric constants of 82 and 90, respectively had a leakage current of 0.15 A/cm 2 at 1 V for equivalent oxide thicknesses of 0.15 nm and 0.2 nm.
  • the leakage current showed the lowest value in the thin film deposited at 400°C, and the thickness was about 6.5 nm, the thickest among the thin films. All the samples did not show breakdown up to 5V, so it was found that the dielectric strength had a high value of at least 10MV/cm or more.
  • Such leakage current and dielectric strength are at least equal to or superior to those of conventional high-k oxides.
  • FIG. 6 is a cross-sectional view illustrating a semiconductor structure using a high dielectric hydrocarbon thin film
  • FIG. 7 is a view illustrating a Fermi level of the semiconductor structure of FIG. 6 .
  • a semiconductor structure including a semiconductor material layer 160M, a metal material layer 170M, and an ultra-thin insertion layer 180 is shown.
  • the ultra-thin insertion layer 180 is disposed at the interface between the semiconductor material layer 160M and the metal material layer 170M.
  • the effective metal work function ⁇ is fixed at a level different from that of the ideal vacuum work function, so that the non-ideal Schottky There is a problem in that a barrier (Schottky barrier) is formed. This has a problem in that electron injection efficiency is reduced at the interface between the semiconductor material layer 160M and the metal material layer 170M, and thus the performance of the device is deteriorated.
  • the ultra-thin insertion layer 180 is conformally formed at the interface between the semiconductor material layer 160M and the metal material layer 170M, and the Fermi level fixing phenomenon is eliminated, thereby providing ideal and efficient electron injection efficiency. can be achieved
  • the ultra-thin insertion layer 180 may be formed to have an atomic layer thickness, and may be formed using the high dielectric hydrocarbon thin film described above. That is, the ultra-thin insertion layer 180 may have low leakage current density and high insulation strength.
  • the ultra-thin insertion layer 180 is formed of an insulating material or an atomic layer thickness, it has been confirmed by the inventors that electrical connection is possible due to electron movement due to a tunneling phenomenon.
  • the ultra-thin insertion layer 180 may serve to heal the dangling bonds DB included in the semiconductor material layer 160M.
  • FIG. 8 is a cross-sectional view illustrating a semiconductor device according to an embodiment of the present invention using a high dielectric hydrocarbon thin film.
  • a semiconductor device including a substrate 110 , a device isolation layer 120 , a gate structure GS, a source/drain region 160 , a contact structure 170 , and an ultra-thin insertion layer 180 ( 10) is provided.
  • the substrate 110 may be a semiconductor substrate.
  • the substrate 110 may include a semiconductor such as silicon (Si) or germanium (Ge), or a compound semiconductor such as SiGe, SiC, GaAs, InAs, InP, etc. .
  • the substrate 110 may have a silicon on insulator (SOI) structure.
  • the device isolation layer 120 may be formed of a single insulating layer, or may include an external insulating layer and an internal insulating layer.
  • the outer insulating layer and the inner insulating layer may be formed of different materials.
  • the outer insulating film may be formed of an oxide film
  • the inner insulating film may be formed of a nitride film.
  • the configuration of the device isolation layer 120 is not limited thereto. Due to the device isolation layer 120 , an active region may be defined in the substrate 110 .
  • the gate structure GS may include a gate dielectric layer 130 , a gate electrode 140 , and a spacer 150 .
  • the gate dielectric layer 130 may be formed of a low-k material layer or a high-k material layer.
  • the gate dielectric layer 130 may be made of, for example, a material selected from a silicon oxide layer, a silicon oxynitride layer, a hafnium oxide layer, a zirconium oxide layer, a tantalum oxide layer, and a titanium oxide layer, but is not limited thereto.
  • the gate electrode 140 may be formed of a single gate layer or may be formed of multiple layers.
  • the gate electrode 140 may include at least one material selected from a semiconductor doped with an impurity, a metal, a conductive metal nitride, and a metal silicide.
  • Spacers 150 may be formed on sidewalls of the gate dielectric layer 130 and the gate electrode 140 .
  • the spacer 150 may be formed of at least one of silicon oxide, silicon nitride, and silicon oxynitride.
  • the spacer 150 may be formed of a double layer or a triple layer.
  • the source/drain regions 160 are formed in the substrate 110 on both sides of the gate structure GS, and a channel region interposed between the source/drain regions 160 is defined under the gate structure GS. do.
  • the contact structure 170 may be electrically connected to the source/drain region 160 .
  • the contact structure 170 may be referred to as a source/drain contact.
  • the contact structure 170 may be formed of one selected from a conductive metal layer, a metal nitride layer, a metal oxide layer, a metal oxynitride layer, and a polysilicon layer doped with impurities.
  • the ultra-thin insertion layer 180 may be formed using the high dielectric hydrocarbon thin film described above. That is, the ultra-thin insertion layer 180 may have low leakage current density and high insulation strength. Although the ultra-thin insertion layer 180 is an insulating material, as its thickness is formed to the thickness of an atomic layer, electrons may move due to a tunneling phenomenon, so that the source/drain region 160 and the contact structure 170 are electrically connected to each other. make the connection possible.
  • FIG. 9 is a cross-sectional view illustrating a semiconductor device according to an embodiment of the present invention using a high dielectric hydrocarbon thin film.
  • a substrate 110 including a fin-type active region AR, a device isolation layer 120 , a source/drain region 160 , a contact structure 170 , and an ultra-thin film insertion layer 180 .
  • a semiconductor device 20 is provided.
  • Materials constituting the substrate 110 and the device isolation layer 120 may be substantially the same as those described above with reference to FIG. 8 . However, it may include a plurality of fin-type active regions AR protruding from the substrate 110 and extending in the first direction. The device isolation layer 120 may expose an upper region of the fin-type active region AR.
  • Source/drain regions 160 may be respectively interposed on the fin-type active region AR on both sides of the gate structure (not shown). The source/drain regions 160 may be spaced apart from each other with the gate structure therebetween. The source/drain region 160 may be a selective epitaxial growth layer formed by using the fin-type active region AR as a seed.
  • a material constituting the contact structure 170 may be substantially the same as described above with reference to FIG. 8 .
  • the contact structure 170 may contact the plurality of source/drain regions 160 .
  • the ultra-thin insertion layer 180 may be formed using the high dielectric hydrocarbon thin film described above. That is, the ultra-thin insertion layer 180 may have low leakage current density and high insulation strength. Although the ultra-thin insertion layer 180 is an insulating material, as its thickness is formed to the thickness of an atomic layer, electrons may move due to a tunneling phenomenon, so that the source/drain region 160 and the contact structure 170 are electrically connected to each other. make the connection possible.
  • FIG. 10 is a cross-sectional view illustrating a semiconductor device according to an embodiment of the present invention using a high dielectric hydrocarbon thin film.
  • a gate electrode 140 including a substrate 110 including a fin-type active region, an isolation layer 120 , a gate dielectric layer 130 , a main gate electrode 140M and a sub-gate electrode 140S. , a spacer 150 , a contact structure 170 , and a semiconductor device 30 including an ultra-thin insertion layer 180 is provided.
  • Materials constituting the substrate 110 and the device isolation layer 120 may be substantially the same as those described above with reference to FIG. 8 . However, it may include a plurality of fin-type active regions protruding from the substrate 110 and extending in the first direction. The device isolation layer 120 may expose an upper region of the fin-type active region.
  • the plurality of semiconductor patterns NS may be disposed to be spaced apart from the top surface of the substrate 110 in a vertical direction on the fin-type active region.
  • the plurality of semiconductor patterns NS may have a shape of, for example, a nanosheet.
  • the gate electrode 140 surrounds the plurality of semiconductor patterns NS and may extend on the fin-type active region and the device isolation layer 120 .
  • the gate electrode 140 may include a main gate electrode 140M and a plurality of sub-gate electrodes 140S.
  • the gate dielectric layer 130 may be disposed between the gate electrode 140 and the plurality of semiconductor patterns NS.
  • the gate dielectric layer 130 may be conformally disposed on top surfaces and sidewalls of the plurality of semiconductor patterns NS.
  • a material constituting the gate dielectric layer 130 may be substantially the same as described above with reference to FIG. 8 .
  • the source/drain region 160 may be a selective epitaxial growth layer formed using the fin-type active region as a seed.
  • a material constituting the contact structure 170 may be substantially the same as described above with reference to FIG. 8 .
  • the contact structure 170 may contact the plurality of source/drain regions 160 .
  • the ultra-thin insertion layer 180 may be formed using the high dielectric hydrocarbon thin film described above. That is, the ultra-thin insertion layer 180 may have low leakage current density and high insulation strength. Although the ultra-thin insertion layer 180 is an insulating material, as its thickness is formed to the thickness of an atomic layer, electrons may move due to a tunneling phenomenon, so that the source/drain region 160 and the contact structure 170 are electrically connected to each other. make the connection possible.

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Inorganic Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)

Abstract

Un dispositif semi-conducteur, selon l'idée technique de la présente invention, comprend : un substrat définissant une région active ; un film diélectrique de grille disposé sur la région active ; une électrode de grille disposée sur le film diélectrique de grille ; des régions de source/drain disposées sur des régions actives des deux côtés de l'électrode de grille ; des structures de contact connectées électriquement aux régions de source/drain ; et des couches d'insertion de films ultra-minces formées sur les interfaces entre les régions de source/drain et les structures de contact, les couches d'insertion de films ultra-minces comprenant des films minces d'hydrocarbure à constante diélectrique élevée.
PCT/KR2021/007769 2020-06-22 2021-06-21 Film mince d'hydrocarbure à constante diélectrique élevée, et dispositif semi-conducteur l'utilisant WO2021261867A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020200076059A KR102387925B1 (ko) 2020-06-22 2020-06-22 고유전 탄화수소 박막 및 이를 이용한 반도체 소자
KR10-2020-0076059 2020-06-22

Publications (1)

Publication Number Publication Date
WO2021261867A1 true WO2021261867A1 (fr) 2021-12-30

Family

ID=79176920

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2021/007769 WO2021261867A1 (fr) 2020-06-22 2021-06-21 Film mince d'hydrocarbure à constante diélectrique élevée, et dispositif semi-conducteur l'utilisant

Country Status (2)

Country Link
KR (1) KR102387925B1 (fr)
WO (1) WO2021261867A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021261868A1 (fr) * 2020-06-22 2021-12-30 울산과학기술원 Condensateur utilisant un film mince d'hydrocarbure à constante diélectrique élevée et dispositif semi-conducteur l'utilisant
WO2021261866A1 (fr) * 2020-06-22 2021-12-30 울산과학기술원 Film mince d'hydrocarbure hautement diélectrique et dispositif à semi-conducteur l'utilisant

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010087189A (ko) * 2000-02-17 2001-09-15 조셉 제이. 스위니 비정질 탄소층 증착 방법
KR20030002993A (ko) * 2001-06-29 2003-01-09 학교법인 포항공과대학교 저유전체 박막의 제조방법
JP2015050434A (ja) * 2013-09-04 2015-03-16 古河電気工業株式会社 窒化物半導体装置
JP2015142078A (ja) * 2014-01-30 2015-08-03 富士電機株式会社 炭化ケイ素半導体装置およびその製造方法
KR20170091434A (ko) * 2016-02-01 2017-08-09 삼성전자주식회사 집적회로 소자 및 그 제조 방법
WO2021261866A1 (fr) * 2020-06-22 2021-12-30 울산과학기술원 Film mince d'hydrocarbure hautement diélectrique et dispositif à semi-conducteur l'utilisant

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010087189A (ko) * 2000-02-17 2001-09-15 조셉 제이. 스위니 비정질 탄소층 증착 방법
KR20030002993A (ko) * 2001-06-29 2003-01-09 학교법인 포항공과대학교 저유전체 박막의 제조방법
JP2015050434A (ja) * 2013-09-04 2015-03-16 古河電気工業株式会社 窒化物半導体装置
JP2015142078A (ja) * 2014-01-30 2015-08-03 富士電機株式会社 炭化ケイ素半導体装置およびその製造方法
KR20170091434A (ko) * 2016-02-01 2017-08-09 삼성전자주식회사 집적회로 소자 및 그 제조 방법
WO2021261866A1 (fr) * 2020-06-22 2021-12-30 울산과학기술원 Film mince d'hydrocarbure hautement diélectrique et dispositif à semi-conducteur l'utilisant

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
KIM DONG-OK; HONG HYO-KI; SEO DONG-BUM; TRUNG TRAN NAM; HWANG CHAN-CUK; LEE ZONGHOON; KIM EUI-TAE: "Novel high-k gate dielectric properties of ultrathin hydrocarbon films for next-generation metal-insulator-semiconductor devices", CARBON, ELSEVIER OXFORD, GB, vol. 158, 7 November 2019 (2019-11-07), GB , pages 513 - 518, XP086014599, ISSN: 0008-6223, DOI: 10.1016/j.carbon.2019.11.019 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021261868A1 (fr) * 2020-06-22 2021-12-30 울산과학기술원 Condensateur utilisant un film mince d'hydrocarbure à constante diélectrique élevée et dispositif semi-conducteur l'utilisant
WO2021261866A1 (fr) * 2020-06-22 2021-12-30 울산과학기술원 Film mince d'hydrocarbure hautement diélectrique et dispositif à semi-conducteur l'utilisant

Also Published As

Publication number Publication date
KR102387925B1 (ko) 2022-04-19
KR20210157798A (ko) 2021-12-29

Similar Documents

Publication Publication Date Title
WO2021261866A1 (fr) Film mince d'hydrocarbure hautement diélectrique et dispositif à semi-conducteur l'utilisant
CN110911492B (zh) 电子器件和制造该电子器件的方法
WO2021261867A1 (fr) Film mince d'hydrocarbure à constante diélectrique élevée, et dispositif semi-conducteur l'utilisant
CN103000669A (zh) 类金刚石衬底上源漏掩埋型石墨烯晶体管器件和制作方法
US11854895B2 (en) Transistors with channels formed of low-dimensional materials and method forming same
US20230275125A1 (en) Transistor and method for fabricating the same
US20180040476A1 (en) Low-temperature atomic layer deposition of boron nitride and bn structures
WO2021261868A1 (fr) Condensateur utilisant un film mince d'hydrocarbure à constante diélectrique élevée et dispositif semi-conducteur l'utilisant
Xiao et al. High Performance (V th~ 0 V, SS~ 69 mV/dec, I On/I Off~ 10 10) Thin-Film Transistors Using Ultrathin Indium Oxide Channel and SiO 2 Passivation
Zhang et al. The role of hybrid dielectric interfaces in improving the performance of multilayer InSe transistors
WO2021251800A1 (fr) Pellicule hautement diélectrique et semi-conducteur ou dispositif de condensateur la comprenant
US11417729B2 (en) Transistors with channels formed of low-dimensional materials and method forming same
WO2024058355A1 (fr) Dispositif à semi-conducteur présentant une couche diélectrique de grille à couche mince de carbone fluoré amorphe avec diélectrique élevé et son procédé de fabrication
WO2024058354A1 (fr) Structure semi-conductrice comprenant une couche de film ultra-mince de carbone fluoré amorphe hautement diélectrique, dispositif à semi-conducteur et son procédé de fabrication
WO2024058356A1 (fr) Condensateur utilisant un film mince de carbone fluoré amorphe hautement diélectrique, son procédé de fabrication et semi-conducteur l'utilisant
WO2020141850A1 (fr) Film mince d'hydrocarbures, procédé de préparation de film mince d'hydrocarbures et dispositif à semi-conducteurs comprenant un film mince d'hydrocarbures
KR102559901B1 (ko) 비정질 탄화수소 박막의 패시베이션에 의한 전하 채널층의 전하이동도 향상 방법
KR102314727B1 (ko) 탄화수소 박막, 탄화수소 박막의 제조방법 및 탄화수소 박막을 포함하는 반도체 소자
US20230290856A1 (en) Transistor and method for fabricating the same
CN108417488B (zh) 一种复合绝缘结构、晶体管以及复合绝缘结构和晶体管的制作方法
CN115831761A (zh) 二维半导体场效应晶体管及其制备方法和应用
Heo et al. Graphene Based Tunable Schottky Diode for High Performance Devices
KR20140129954A (ko) 하프늄나이트라이드 증착 방법 및 이를 이용한 반도체 소자

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 21829375

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 21829375

Country of ref document: EP

Kind code of ref document: A1