WO2021203473A1 - 一种显示面板及显示装置 - Google Patents

一种显示面板及显示装置 Download PDF

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Publication number
WO2021203473A1
WO2021203473A1 PCT/CN2020/085813 CN2020085813W WO2021203473A1 WO 2021203473 A1 WO2021203473 A1 WO 2021203473A1 CN 2020085813 W CN2020085813 W CN 2020085813W WO 2021203473 A1 WO2021203473 A1 WO 2021203473A1
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Prior art keywords
layer
substrate
display panel
active layer
gate
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PCT/CN2020/085813
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English (en)
French (fr)
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薛炎
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深圳市华星光电半导体显示技术有限公司
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Priority to US16/762,929 priority Critical patent/US20220109125A1/en
Publication of WO2021203473A1 publication Critical patent/WO2021203473A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/4238—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs

Definitions

  • the present invention relates to the field of display technology, in particular to a display panel and a display device.
  • the display device can convert computer data into various characters, numbers, symbols or intuitive images for display, and can use keyboard and other input tools to input commands or data into the computer, and add, delete, modify, and change the display at any time with the help of system hardware and software content.
  • Display devices are classified into plasma, liquid crystal, light emitting diode, and cathode ray tube types according to the display device used.
  • Organic Light-Emitting Display Device (Full English Name: Organic Light-Emitting Diode, abbreviated as OLED) is also known as organic electro-laser display device, organic light-emitting semiconductor.
  • OLED Organic Light-Emitting Diode
  • the working principle of OLED is: when the power is supplied to the appropriate voltage, the positive electrode holes and the negative electrode charges will be combined in the light-emitting layer, and under the action of the Coulomb force, they will recombine with a certain probability to form excitons in the excited state (electron-hole Yes), and this excited state is unstable in a normal environment.
  • the excitons of the excited state recombine and transfer energy to the luminescent material, making it transition from the ground state energy level to the excited state, and the excited state energy is through the radiative relaxation process It produces photons, releases light energy, and produces light. According to its different formulas, it produces three primary colors of red, green and blue RGB, which constitute the basic colors.
  • OLED has the advantages of low voltage demand, high power saving efficiency, fast response, light weight, thin thickness, simple structure, low cost, wide viewing angle, almost infinitely high contrast, low power consumption, and extremely high response speed. It has become today's One of the most important display technologies.
  • the array substrate 100 in the existing display panel includes: a substrate 101, a buffer layer 102, an active layer 103, a gate insulating layer 104 and a gate layer 105.
  • a side channel 106 and a main channel 107 are defined in the array substrate 100.
  • the edge ramp of the active layer 103 is defined as a side channel 106
  • the center of the active layer 103 is defined as a main channel 107.
  • the gate insulating layer 104 located above the active layer 103 has a stepped structure at the edge of the active layer 103 (that is, the side channel 106), which easily causes the gate insulating layer 104 to be thinner at the edge of the active layer 103.
  • a thicker film is formed at the center of the active layer 103 (that is, the main channel 107), so that the thickness of the gate insulating layer 104 in the main channel 107 area and the side channel 106 area is different, so the gate layer 105 is opposite to the main channel 106.
  • the control ability of the active layer 103 in the channel 107 region and the active layer 103 in the side channel 106 region are different.
  • the gate layer 105 affects the active layer 103 and the side channel in the main channel 107 region.
  • the stress of the active layer 103 in the channel 106 area is different.
  • the IV curve shows the separation of the main channel 107 and the side channel 106, which is manifested as a hump phenomenon, which affects the display effect and has low reliability. Therefore, it is necessary to find a new type of display panel to solve the above-mentioned problems.
  • the purpose of the present invention is to provide a display panel and a display device, which can solve the problem of separation of the main channel and the side channel in the IV curve existing in the existing display panel, the phenomenon of hump, which affects the display effect, and has low reliability. problem.
  • the present invention provides a display panel, which includes: a substrate; an active layer provided on the substrate; a gate insulating layer partially covering the active layer; a gate layer provided On the gate insulating layer; wherein the projection area of the gate layer on the substrate is located in the projection area of the active layer on the substrate.
  • the shape of the projection of the active layer on the substrate is consistent with the shape of the projection of the gate layer on the substrate.
  • the projection of the gate layer on the substrate is a first serpentine line
  • the projection of the active layer on the substrate is a second serpentine line.
  • the length of the first serpentine line is less than or equal to the length of the second serpentine line.
  • the width of the first serpentine line is less than or equal to the width of the second serpentine line.
  • the display panel further includes: a buffer layer disposed between the substrate and the active layer.
  • the display panel further includes: an interlayer insulating layer, which is disposed on the gate layer and extends to cover the substrate; a source and drain layer, which is disposed on the interlayer insulating layer, and It is connected to the active layer through a via hole; and a passivation layer is arranged on the source and drain layer and extends to cover the interlayer insulating layer.
  • the display panel further includes: a first electrode disposed on the passivation layer and connected to the source and drain layer through a through hole; a pixel definition layer is disposed on the two electrodes of the first electrode.
  • a first electrode disposed on the passivation layer and connected to the source and drain layer through a through hole; a pixel definition layer is disposed on the two electrodes of the first electrode.
  • the display panel further includes: an encapsulation layer disposed on the second electrode.
  • the present invention also provides a display device including the display panel involved in the present invention.
  • the present invention relates to a display panel and a display device.
  • the projection area of the gate layer on the substrate is located in the projection area of the active layer on the substrate, eliminating
  • the active layer side channel in the existing display panel prevents the separation of the main channel and the side channel of the IV curve caused by the inconsistent film thickness of the gate insulating layer in the side channel and the main channel region, resulting in a hump. Phenomenon, the display effect of the display panel is improved, and the reliability of the display panel is low.
  • FIG. 1 is a schematic diagram of the structure of an array substrate of a conventional display panel.
  • FIG. 2 is a schematic diagram of the structure of the display panel of the present invention.
  • FIG. 3 is a projected overlay view of the active layer and the gate layer of the present invention on the substrate.
  • Fig. 4 is a projection pattern of the active layer of the present invention on the substrate.
  • Fig. 5 is a projection pattern of the gate layer of the present invention on the substrate.
  • Source and drain layer 8. Passivation layer
  • the first electrode 10. Pixel definition layer
  • the second serpentine line 51 The first serpentine line.
  • the component can be directly placed on the other component; there may also be an intermediate component on which the component is placed , And the intermediate component is placed on another component.
  • a component is described as “installed to” or “connected to” another component, both can be understood as directly “installed” or “connected”, or a component is “installed to” or “connected to” through an intermediate component Another component.
  • this embodiment provides a display device including a display panel 200.
  • the display panel 200 includes: a substrate 1, a buffer layer 2, an active layer 3, a gate insulating layer 4, a gate layer 5, an interlayer insulating layer 6, a source and drain layer 7, a passivation layer 8, and a first electrode 9.
  • the substrate 1 may be a flexible substrate, which has the effect of blocking water and oxygen.
  • the substrate 1 may have better impact resistance and can effectively protect the display panel 100.
  • the material of the substrate 1 includes one or more of glass, silicon dioxide, polyethylene, polypropylene, polystyrene, polylactic acid, polyethylene terephthalate, polyimide, or polyurethane.
  • the buffer layer 2 is disposed on the substrate 1 and mainly serves as a buffer and protection function.
  • the material of the buffer layer 2 includes one or more of silicon dioxide SiO 2 and silicon nitride SiN x.
  • the active layer 3 is disposed on the buffer layer 2.
  • the material of the active layer 31 is an oxide semiconductor.
  • indium gallium zinc oxide IGZO is preferred.
  • the gate insulating layer 4 partially covers the active layer 3, and it is mainly used to prevent the contact between the gate layer 5 and the active layer 3 from causing a short circuit.
  • the material of the gate insulating layer 4 can be one or more of SiO 2 and SiNx.
  • the gate layer 5 is disposed on the gate insulating layer 4, and its material is metal, such as copper Cu or molybdenum Mo.
  • the projection area of the gate layer 5 on the substrate 1 is located in the projection area of the active layer 3 on the substrate 1. Therefore, the projection of the gate layer 5 on the substrate 1 can be completely dropped into the projection of the active layer 3 on the substrate 1 to eliminate the active current in the existing display panel.
  • Layer 3 side channel thereby avoiding the separation of the IV curve main channel and the side channel caused by the inconsistent film thickness of the gate insulating layer 4 in the side channel and the main channel region, resulting in a hump phenomenon, and improving the display of the display panel 100 As a result, the reliability of the display panel 100 is improved and the reliability is low.
  • the projected pattern of the active layer 3 on the substrate 1 is the same as the projected pattern of the gate layer 5 on the substrate 1
  • the shape is consistent. That is, the two are similar patterns.
  • the projection of the gate layer 5 on the substrate 1 in this embodiment is a first serpentine line 51, and the active layer 3 is on the The projection on the substrate 1 is a second serpentine line 31.
  • the length of the first serpentine line 51 is less than or equal to the length of the second serpentine line 31.
  • the length of the first serpentine line 51 is the expanded length of the first serpentine line 51
  • the length of the second serpentine line 31 is the expanded length of the second serpentine line 31.
  • the line width of the second serpentine line 31 is a
  • the line width of the first serpentine line 51 is b
  • the width b of the first serpentine line 51 is less than or equal to the width a of the second serpentine line 31. Therefore, it can be ensured that the projection area of the gate layer 5 on the substrate 1 is located within the projection area of the active layer 3 on the substrate 1, eliminating the active layer in the existing display panel.
  • the interlayer insulating layer 6 is disposed on the gate layer 4 and extends to cover the buffer layer 2.
  • the material of the interlayer insulating layer 6 can be one or more of SiO 2 and SiNx.
  • the source and drain layer 7 is disposed on the interlayer insulating layer 6 and connected to the active layer 3 through via holes.
  • the source and drain layer 7 is made of metal, such as copper Cu or molybdenum Mo. Therefore, the source and drain layer 7 can obtain electrical signals from the active layer 3 to provide electrical signals for the light emission of the display panel 200.
  • the passivation layer 8 is disposed on the source and drain layer 7 and extends to cover the interlayer insulating layer 6.
  • the passivation layer 8 can protect the lower film layer; on the other hand, it can have a flattening effect and provide a flat surface for the preparation of the upper film layer.
  • the first electrode 9 is disposed on the passivation layer 8 and is connected to the source-drain layer 7 through the through hole; thus, the first electrode 9 can obtain electricity from the active layer 3 through the source-drain layer 7
  • the signal provides an electrical signal for the light emission of the display panel 200. Since ITO, as a nano-indium tin metal oxide, has good conductivity and light transmittance, the material of the first electrode 9 in this embodiment is preferably ITO.
  • the pixel definition layer 10 is disposed on the passivation layer on both sides of the first electrode 9; the pixel definition layer 10 is mainly used to prevent the occurrence of light crosstalk between adjacent pixels.
  • the light-emitting layer 11 is disposed on the first electrode 9, and the material of the light-emitting layer 11 includes organic electroluminescent material.
  • the second electrode 12 is disposed on the light-emitting layer 11. Since ITO, as a nano-indium tin metal oxide, has good conductivity and light transmittance, the material of the second electrode 12 in this embodiment is preferably ITO.
  • the encapsulation layer 13 is disposed on the second electrode 12.
  • the encapsulation layer 13 mainly plays a role of blocking water and oxygen, preventing internal components of the display panel 200 from being corroded and aging by external water and oxygen, and reducing the service life of the display panel 200.
  • the encapsulation layer 13 may include a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer.
  • the first inorganic light-emitting layer and the second inorganic encapsulation layer mainly play a role of blocking water and oxygen, and the organic encapsulation layer mainly buffers and releases the stress received by the encapsulation layer 13 to increase the bendability of the display panel 200.

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Abstract

一种显示面板（200）及显示装置，调整有源层（3）在基板（1）上的投影图形，使得栅极层（5）在基板（1）上的投影区域位于有源层（3）在基板（1）上的投影区域内，消除现有的显示面板（200）中存在的有源层（3）侧沟道，避免栅极绝缘层（4）在侧沟道和主沟道区域成膜厚度不一致导致的I-V曲线主沟道和侧沟道分离，出现驼峰的现象。

Description

一种显示面板及显示装置 技术领域
本发明涉及显示技术领域，具体涉及一种显示面板及显示装置。
 背景技术
显示装置可以把计算机的数据变换成各种文字、数字、符号或直观的图像显示出来，并且可以利用键盘等输入工具把命令或数据输入计算机，借助系统的硬件和软件随时增添、删改、变换显示内容。显示装置根据所用之显示器件分为等离子、液晶、发光二极管和阴极射线管等类型。
有机发光显示装置(英文全称：Organic Light-Emitting Diode, 简称OLED) 又称为有机电激光显示装置、有机发光半导体。OLED的工作原理是：当电力供应至适当电压时，正极空穴与阴极电荷就会在发光层中结合，在库伦力的作用下以一定几率复合形成处于激发态的激子（电子-空穴对），而此激发态在通常的环境中是不稳定的，激发态的激子复合并将能量传递给发光材料，使其从基态能级跃迁为激发态，激发态能量通过辐射驰豫过程产生光子，释放出光能，产生光亮，依其配方不同产生红、绿和蓝RGB三基色，构成基本色彩。
OLED具有电压需求低、省电效率高、反应快、重量轻、厚度薄，构造简单，成本低、广视角、几乎无穷高的对比度、较低耗电、极高反应速度等优点，已经成为当今最重要的显示技术之一。
 技术问题
如图1所示，现有的显示面板中的阵列基板100包括：基板101、缓冲层102、有源层103、栅极绝缘层104以及栅极层105。
如图1所示，阵列基板100中定义有侧沟道106和主沟道107。其中有源层103的边缘坡道处定义为侧沟道106，有源层103的中心处定义为主沟道107。位于有源层103上方的栅极绝缘层104在有源层103边缘处（即侧沟道106）具有台阶结构，容易造成栅极绝缘层104在有源层103的边缘处成膜较薄，在有源层103中心处（即主沟道107）成膜较厚，使得栅极绝缘层104在主沟道107区域与侧沟道106区域覆盖厚度不一样，因此栅极层105对主沟道107区域的有源层103以及侧沟道106区域的有源层103的控制能力不同，当TFT持续受到电学应力时，栅极层105对主沟道107区域的有源层103及侧沟道106区域的有源层103的应力不同，在提供相同的电压驱动TFT时，I-V曲线出现主沟道107和侧沟道106分离，表现为驼峰现象，影响显示效果，可靠性较低。因此，需要寻求一种新型的显示面板以解决上述问题。
 技术解决方案
本发明的目的是提供一种显示面板及显示装置，其能够解决现有的显示面板中存在的I-V曲线出现主沟道和侧沟道分离，出现驼峰的现象，影响显示效果，可靠性低等问题。
为了解决上述问题，本发明提供了一种显示面板，其包括：基板；有源层，设置于所述基板上；栅极绝缘层，部分覆盖于所述有源层上；栅极层，设置于所述栅极绝缘层上；其中，所述栅极层在所述基板上的投影区域位于所述有源层在所述基板上的投影区域内。
进一步的，其中所述有源层在所述基板上的投影的图形形状与所述栅极层在所述基板上的投影的图形形状一致。
进一步的，其中所述栅极层在所述基板上的投影为第一蛇形线，所述有源层在所述基板上的投影为第二蛇形线。
进一步的，其中所述第一蛇形线的长度小于或等于第二蛇形线的长度。
进一步的，其中所述第一蛇形线的宽度小于或等于第二蛇形线的宽度。
进一步的，其中所述显示面板还包括：缓冲层，设置于所述基板与所述有源层之间。
进一步的，其中所述显示面板还包括：层间绝缘层，设置于所述栅极层上，且延伸覆盖至所述基板上；源漏极层，设置于所述层间绝缘层上，且通过过孔连接至所述有源层上；以及钝化层，设置于所述源漏极层上，且延伸覆盖至所述层间绝缘层上。
进一步的，其中所述显示面板还包括：第一电极，设置于所述钝化层上，且通过通孔连接至所述源漏极层上；像素定义层，设置于所述第一电极两侧的钝化层上；发光层，设置于所述第一电极上；以及第二电极，设置于所述发光层上。
进一步的，其中所述显示面板还包括：封装层，设置于所述第二电极上。
为了解决上述问题，本发明还提供了一种显示装置，包括本发明所涉及的显示面板。
 有益效果
本发明涉及一种显示面板及显示装置，通过调整有源层在基板上的投影图形，使得所述栅极层在基板上的投影区域位于所述有源层在基板上的投影区域内，消除现有的显示面板中存在的有源层侧沟道，进而避免栅极绝缘层在侧沟道和主沟道区域成膜厚度不一致导致的I-V曲线主沟道和侧沟道分离，出现驼峰的现象，提高显示面板的显示效果，提高显示面板的可靠性低。
 附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为现有显示面板的阵列基板结构示意图。
图2为本发明的显示面板的结构示意图。
图3为本发明的有源层及栅极层在基板上的投影叠图。
图4为本发明的有源层在基板上的投影图形。
图5为本发明的栅极层在基板上的投影图形。
图中部件标识如下：
100、现有技术的阵列基板
101、基板                       102、缓冲层
103、有源层                     104、栅极绝缘层
105、栅极层                     106、侧沟道
107、主沟道
200、显示面板
1、基板                         2、缓冲层
3、有源层                       4、栅极绝缘层
5、栅极层                       6、层间绝缘层
7、源漏极层                     8、钝化层
9、第一电极                     10、像素定义层
11、发光层                      12、第二电极
13、封装层
31、第二蛇形线                  51、第一蛇形线。
 本发明的实施方式
以下结合说明书附图详细说明本发明的优选实施例，以向本领域中的技术人员完整介绍本发明的技术内容，以举例证明本发明可以实施，使得本发明公开的技术内容更加清楚，使得本领域的技术人员更容易理解如何实施本发明。然而本发明可以通过许多不同形式的实施例来得以体现，本发明的保护范围并非仅限于文中提到的实施例，下文实施例的说明并非用来限制本发明的范围。
本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是附图中的方向，本文所使用的方向用语是用来解释和说明本发明，而不是用来限定本发明的保护范围。
在附图中，结构相同的部件以相同数字标号表示，各处结构或功能相似的组件以相似数字标号表示。此外，为了便于理解和描述，附图所示的每一组件的尺寸和厚度是任意示出的 ，本发明并没有限定每个组件的尺寸和厚度。
当某些组件，被描述为“在”另一组件“上”时，所述组件可以直接置于所述另一组件上；也可以存在一中间组件，所述组件置于所述中间组件上，且所述中间组件置于另一组件上。当一个组件被描述为“安装至”或“连接至”另一组件时，二者可以理解为直接“安装”或“连接”，或者一个组件通过一中间组件“安装至”或“连接至”另一个组件。
如图2所示，本实施例提供了一种显示装置，包括显示面板200。所述显示面板200包括：基板1、缓冲层2、有源层3、栅极绝缘层4、栅极层5、层间绝缘层6、源漏极层7、钝化层8、第一电极9、像素定义层10、发光层11、第二电极12以及封装层13。
基板1可以采用柔性基板，具有阻隔水氧作用，基板1可具有较好的抗冲击能力，可以有效保护显示面板100。基板1的材质包括玻璃、二氧化硅、聚乙烯、聚丙烯、聚苯乙烯、聚乳酸、聚对苯二甲酸乙二醇酯、聚酰亚胺或聚氨酯中的一种或多种。
缓冲层2设置于所述基板1上，主要是充当缓冲及保护作用。缓冲层2的材质包括二氧化硅SiO 2、硅的氮化物SiN x中的一种或多种。
有源层3设置于所述缓冲层2上。有源层31的材质为氧化物半导体，本实施例优选铟镓锌氧化物IGZO。
栅极绝缘层4部分覆盖于所述有源层3上，其主要是用于防止栅极层5与有源层3之间接触产生短路现象。栅极绝缘层4的材质可以采用SiO 2、SiNx中的一种或多种。
栅极层5设置于所述栅极绝缘层4上，其材质为金属，如铜Cu或钼Mo。
如图2、图3、图4、图5所示，所述栅极层5在所述基板1上的投影区域位于所述有源层3在所述基板1上的投影区域内。由此，可以通过将所述栅极层5在所述基板1上的投影完全落入所述有源层3在所述基板1上的投影中，消除现有的显示面板中存在的有源层3侧沟道，进而避免栅极绝缘层4在侧沟道和主沟道区域成膜厚度不一致导致的I-V曲线主沟道和侧沟道分离，出现驼峰的现象，提高显示面板100的显示效果，提高显示面板100的可靠性低。
如图2、图3、图4、图5所示，其中所述有源层3在所述基板1上的投影的图形形状与所述栅极层5在所述基板1上的投影的图形形状一致。即，两者为相似图形。
如图2、图3、图4、图5所示，本实施例中所述栅极层5在所述基板1上的投影为第一蛇形线51，所述有源层3在所述基板1上的投影为第二蛇形线31。
所述第一蛇形线51的长度小于或等于第二蛇形线31的长度。其中所述第一蛇形线51的长度为第一蛇形线51展开长度，所述第二蛇形线31的长度为第二蛇形线31展开长度。其中第二蛇形线31的线宽为a,第一蛇形线51的线宽为b，所述第一蛇形线51的宽度b小于或等于第二蛇形线31的宽度a。由此，可以保证所述栅极层5在所述基板1上的投影区域位于所述有源层3在所述基板1上的投影区域内，消除现有的显示面板中存在的有源层3侧沟道，进而避免栅极绝缘层4在侧沟道和主沟道区域成膜厚度不一致导致的I-V曲线主沟道和侧沟道分离，出现驼峰的现象，提高显示面板100的显示效果，提高显示面板100的可靠性低。
层间绝缘层6设置于所述栅极层4上，且延伸覆盖至所述缓冲层2上。层间绝缘层6的材质可以采用SiO 2、SiNx中的一种或多种。
源漏极层7设置于所述层间绝缘层6上，且通过过孔连接至所述有源层3上。源漏极层7的材质为金属，如铜Cu或钼Mo。由此源漏极层7可以从有源层3中获得电信号，为显示面板200的发光提供电信号。
钝化层8设置于所述源漏极层7上，且延伸覆盖至所述层间绝缘层6上。一方面，所述钝化层8可以对其下膜层起到保护作用，另一方面，可以起到平坦作用，为其上膜层的制备提供平整的表面。
第一电极9设置于所述钝化层8上，且通过通孔连接至所述源漏极层7上；由此第一电极9可以通过源漏极层7从有源层3中获得电信号，为显示面板200的发光提供电信号。由于ITO作为纳米铟锡金属氧化物，具有很好的导电性和透光性，因此，本实施例中的第一电极9的材质优选ITO。
像素定义层10设置于所述第一电极9两侧的钝化层上；所述像素定义层10主要是用于防止相邻像素之间产生光串扰现象。
发光层11设置于所述第一电极9上，发光层11的材质包括有机电致发光材料。
第二电极12设置于所述发光层11上。由于ITO作为纳米铟锡金属氧化物，具有很好的导电性和透光性，因此，本实施例中的第二电极12的材质优选ITO。
封装层13设置于所述第二电极12上。所述封装层13主要是起阻水氧作用，防止显示面板200内部器件被外界水氧侵蚀老化，降低显示面板200的使用年限。具体的，所述封装层13可以包括第一无机封装层、有机封装层和第二无机封装层。其中第一无机发光层和第二无机封装层主要是起阻水氧作用，其中的有机封装层主要是对封装层13受到的应力进行缓冲及释放，增加显示面板200的可弯折性能。
以上对本申请所提供的显示面板及显示装置进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。

Claims (18)

  1. 一种显示面板，其中包括：
    基板；
    有源层，设置于所述基板上；
    栅极绝缘层，部分覆盖于所述有源层上；
    栅极层，设置于所述栅极绝缘层上；
    其中，所述栅极层在所述基板上的投影区域位于所述有源层在所述基板上的投影区域内。
  2. 根据权利要求1所述的显示面板，其中所述有源层在所述基板上的投影的图形形状与所述栅极层在所述基板上的投影的图形形状一致。
  3. 根据权利要求1所述的显示面板，其中所述栅极层在所述基板上的投影为第一蛇形线，所述有源层在所述基板上的投影为第二蛇形线。
  4. 根据权利要求3所述的显示面板，其中所述第一蛇形线的长度小于或等于第二蛇形线的长度。
  5. 根据权利要求3所述的显示面板，其中所述第一蛇形线的宽度小于或等于第二蛇形线的宽度。
  6. 根据权利要求1所述的显示面板，其中还包括：
    缓冲层，设置于所述基板与所述有源层之间。
  7. 根据权利要求1所述的显示面板，其中还包括：
    层间绝缘层，设置于所述栅极层上，且延伸覆盖至所述基板上；
    源漏极层，设置于所述层间绝缘层上，且通过过孔连接至所述有源层上；以及
    钝化层，设置于所述源漏极层上，且延伸覆盖至所述层间绝缘层上。
  8. 根据权利要求7所述的显示面板，其中还包括：
    第一电极，设置于所述钝化层上，且通过通孔连接至所述源漏极层上；
    像素定义层，设置于所述第一电极两侧的钝化层上；
    发光层，设置于所述第一电极上；以及
    第二电极，设置于所述发光层上。
  9. 根据权利要求8所述的显示面板，其中还包括：
    封装层，设置于所述第二电极上。
  10. 一种显示装置，包括权利要求1所述的显示面板，所述显示面板包括：
    基板；
    有源层，设置于所述基板上；
    栅极绝缘层，部分覆盖于所述有源层上；
    栅极层，设置于所述栅极绝缘层上；
    其中，所述栅极层在所述基板上的投影区域位于所述有源层在所述基板上的投影区域内。
  11. 根据权利要求10所述的显示装置，其中所述有源层在所述基板上的投影的图形形状与所述栅极层在所述基板上的投影的图形形状一致。
  12. 根据权利要求10所述的显示装置，其中所述栅极层在所述基板上的投影为第一蛇形线，所述有源层在所述基板上的投影为第二蛇形线。
  13. 根据权利要求12所述的显示装置，其中所述第一蛇形线的长度小于或等于第二蛇形线的长度。
  14. 根据权利要求12所述的显示装置，其中所述第一蛇形线的宽度小于或等于第二蛇形线的宽度。
  15. 根据权利要求10所述的显示装置，所述显示面板还包括：
    缓冲层，设置于所述基板与所述有源层之间。
  16. 根据权利要求10所述的显示装置，所述显示面板还包括：
    层间绝缘层，设置于所述栅极层上，且延伸覆盖至所述基板上；
    源漏极层，设置于所述层间绝缘层上，且通过过孔连接至所述有源层上；以及
    钝化层，设置于所述源漏极层上，且延伸覆盖至所述层间绝缘层上。
  17. 根据权利要求16所述的显示装置，所述显示面板还包括：
    第一电极，设置于所述钝化层上，且通过通孔连接至所述源漏极层上；
    像素定义层，设置于所述第一电极两侧的钝化层上；
    发光层，设置于所述第一电极上；以及
    第二电极，设置于所述发光层上。
  18. 根据权利要求17所述的显示装置，所述显示面板还包括：
    封装层，设置于所述第二电极上。
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