WO2021196404A1 - 一种低相差数控射频衰减器 - Google Patents

一种低相差数控射频衰减器 Download PDF

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WO2021196404A1
WO2021196404A1 PCT/CN2020/095235 CN2020095235W WO2021196404A1 WO 2021196404 A1 WO2021196404 A1 WO 2021196404A1 CN 2020095235 W CN2020095235 W CN 2020095235W WO 2021196404 A1 WO2021196404 A1 WO 2021196404A1
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transistor
attenuation
amplitude
radio frequency
module
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PCT/CN2020/095235
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English (en)
French (fr)
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柴远
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南京汇君半导体科技有限公司
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/24—Frequency-independent attenuators
    • H03H11/245—Frequency-independent attenuators using field-effect transistor

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  • the invention relates to the field of electronic circuit design, in particular to a low-phase difference digitally controlled radio frequency attenuator.
  • the attenuator is one of the key modules in the active phased array system. Together with the phase shifter, the attenuator changes the direction and shape of the beam by controlling the amplitude and phase relationship between the antenna elements. Especially in order to achieve low sidelobe and multi-polarization performance, it is necessary to adopt techniques such as amplitude weighting, and the attenuator must have sufficient amplitude variation range, accurate amplitude stepping and low additional phase deviation. Under existing semiconductor processes such as CMOS and SiGe, step attenuators usually have distributed, switched-path, and switched T-shaped/ ⁇ -shaped structures.
  • the distributed structure has a small range of amplitude variation and a large chip footprint; the path-switching structure has a large minimum loss and also has the disadvantage of large area; the switch T-shaped/ ⁇ -shaped structure has the characteristics of low insertion loss and large attenuation range.
  • the existing attenuator structure is difficult to meet the higher requirements for attenuation bits and accuracy in future high-speed wireless communications and high-performance radar applications.
  • Monolithic microwave integrated circuits usually use high-electron mobility transistor (HEMT) processes, such as gallium arsenide (GaAs) and gallium nitride (GaN), but their process costs are relatively high and cannot be compared with low cost.
  • HEMT high-electron mobility transistor
  • GaAs gallium arsenide
  • GaN gallium nitride
  • CMOS digital logic circuit is integrated, so it is difficult to be widely used in the civilian market such as 5G mobile communications, automotive radar, and civil satellite communications.
  • the CMOS process is excellent in terms of integration and cost. The progress of its process makes it more and more important in the field of civil radio frequency and millimeter wave.
  • CMOS transistors have poor high-frequency switching performance, which seriously affects the performance of the switch T-shaped/ ⁇ -shaped attenuator.
  • the patent with publication number CN103441747B discloses a low-loss, low-phase-shift, high-integration five-digit stepping ultra-wideband digitally controlled attenuator, based on silicon-based RF CMOS technology, and an 8dB attenuation module with a transmission line TLO and ⁇ structure , Inductance L1, T-Bridge T-type combination structure of 0 ⁇ 7dB combined attenuation module, inductance L2, ⁇ structure of 16dB attenuation module, transmission line TL1 sequential cascaded single signal path, using MOS tube as the control switch, by Five independent control terminals control the work of three attenuation modules, and use the inductance network for phase compensation.
  • the attenuation range of 0 ⁇ 31dB is stepped with 1dB length, which can achieve a total of 32 states of low loss and low phase shift signal amplitude attenuation .
  • this attenuator has the defects of low accuracy and small attenuation range.
  • the patent with publication number CN108023572A discloses a low-phase difference CMOS differential digitally controlled attenuator, including six differential attenuation units and ten inductors for matching between stages and output. There are 64 attenuation states, and the attenuation step is 0.5dB. , The maximum attenuation is 31.5dB, and the capacitor network is used for phase compensation, which effectively reduces the additional phase shift.
  • the attenuator still has the following shortcomings: only the capacitor network is used for phase compensation, which makes the additional phase deviation higher and the attenuation range smaller.
  • the present invention discloses a low phase difference digitally controlled radio frequency attenuator, which adopts a small amplitude attenuation module and a large stepping module Phase cascading extends the maximum attenuation range to 0-35.5dB while maintaining an attenuation step of 0.5dB, achieving a large attenuation range, high amplitude control accuracy, low additional phase deviation and wide working bandwidth, and has a lower power Consumption and smaller area.
  • a low-phase difference digitally controlled radio frequency attenuator including a small amplitude attenuation module mainly composed of attenuator units, an inter-stage matching and bias network mainly composed of baluns and capacitors, and a large stepping module mainly composed of semiconductor array units ,
  • the output matching network mainly composed of transformers, the inter-stage matching and biasing network also includes a current source; among them,
  • the low-amplitude attenuation module is connected to the input signal of the radio frequency attenuator, and is used to perform small-amplitude attenuation on the input signal of the radio frequency attenuator;
  • the input end of the inter-stage matching and biasing network is connected to the output end of the small amplitude attenuation module, which is used to realize the input broadband matching and DC bias of the large amplitude stepping module;
  • the large-scale stepping module is connected to the output end of the inter-stage matching and biasing network, and is used for large-scale attenuation of the signal input by the module;
  • the output matching network is connected to the output terminal of the large stepping module, and its output is the output terminal of the radio frequency attenuator.
  • the large amplitude stepping module includes six digital control signals and a parallel combination of six-level amplitude control units, wherein the digital control signals are connected to the amplitude control unit in a one-to-one correspondence; except for the last-level amplitude control unit, the amplitude control unit includes 33 semiconductors.
  • other levels of amplitude control units include 2 n-1 semiconductor array units, where n ⁇ [1, 5], the input terminals of all the first inverters of each level of amplitude control unit are connected to each other and connected correspondingly Digital control signal.
  • the semiconductor array unit is a common-gate transistor array unit fabricated by CMOS technology, and the common-gate transistor array unit has the same structure, including a first transistor, a second transistor, a third transistor, a fourth transistor, and a first transistor.
  • An inverter and a second inverter wherein the sources of the first transistor and the third transistor are connected to the positive end of the input signal of the large stepping module, and the sources of the second transistor and the fourth transistor are connected to the The negative terminal of the input signal of the amplitude stepping module, the gates of the second transistor and the third transistor are connected to the output terminal of the first inverter, and the gates of the first transistor and the fourth transistor are connected to the second inverter
  • the drains of the first transistor and the second transistor are connected to the positive terminal of the output signal of the large-scale stepping module, and the drains of the third transistor and the fourth transistor are connected to the negative terminal of the output signal of the large-scale stepping module. end.
  • the digital control signal is connected to the input terminal of the first inverter of each array unit, thereby controlling the large-scale stepping module to realize the adjustment of the current amplitude.
  • the connection scheme of the transistors in the array unit through the vector synthesis of the transistor output currents in the on and off states, it solves the problem of the leakage current of the logic-off transistors, and theoretically can fully realize the linearity under the wide bandwidth.
  • Amplitude control does not introduce additional phase deviation; on the other hand, it can ensure that the number of transistors in the on and off states of the transistor array is the same under any digital control signal, the total bias current is the same, and the parasitic parameters seen at the input and output ends Consistent, theoretically completely eliminate the change of port impedance under different amplitude states.
  • the signal attenuation range of the large-scale stepping module is 0-30dB, and the attenuation step length is 6dB.
  • the inter-stage matching and biasing network includes a first balun, a first capacitor, a second capacitor and a bias current source, and the first input terminal of the first balun is connected to the small amplitude attenuation module Output signal, the second input terminal is grounded, the first output terminal of the first balun is connected to the positive terminal of the input signal of the large-scale stepping module, and the second output terminal is connected to the negative terminal of the input signal of the large-scale stepping module,
  • the first capacitor and the second capacitor are connected in parallel with the input terminal and the output terminal of the first balun, respectively, and the bias current source output is connected to the center tap of the first balun output coil.
  • the low-amplitude attenuation module includes several cascaded attenuator units and digital control signals corresponding to each attenuator unit one-to-one, and the digital control signals are used to control the attenuator unit to be in a through state or an attenuation state.
  • the first attenuator unit includes a fifth transistor, a first resistor, and a second resistor.
  • the gate of the fifth transistor is connected to the seventh digital control signal through the first resistor in series, and the source of the fifth transistor is connected to the second resistor in series.
  • the drain of the fifth transistor is connected to the input signal of the radio frequency attenuator, when the seventh digital control signal is set to 1, the first attenuator unit is in the attenuation state, and when the seventh digital control signal is set to 0, the first attenuator The unit is in a through state.
  • the signal attenuation range of the small amplitude attenuation module is 0-5.5dB, and the attenuation step length is 0.5dB.
  • the number of the attenuator units is four, and the attenuation ranges are respectively 0-0.5dB, 0-1dB, 0-2dB, and 0-2dB.
  • the semiconductor array unit is an array unit manufactured by using BiCMOS process, SOI process, or III-IV group element compound semiconductor process.
  • the present invention expands the maximum attenuation range to 0-35.5dB through the cascade connection of the small amplitude attenuation module and the large amplitude stepping module, while maintaining the 0.5dB attenuation step, realizing a large attenuation range, high amplitude control accuracy, Low additional phase deviation and wide working bandwidth, with lower power consumption and smaller area;
  • the present invention adopts CMOS transistor array unit, and by vector synthesis of transistor output currents in the on and off states, the problem of leakage current in the logic-off transistor is solved, and the linear amplitude control under wide bandwidth is realized without Introduce additional phase deviation; at the same time, it can ensure that under any digital control signal, the number of transistors in the on and off states of the transistor array is the same, the total bias current is the same, and the parasitic parameters seen at the input and output are the same, eliminating different amplitudes The change of port impedance in the state;
  • the large-scale stepping module in the present invention has an active structure, which can provide gain in the high-frequency microwave frequency band and part of the millimeter wave frequency band, so that the radio frequency attenuator has lower insertion loss as a whole.
  • Figure 1 is a schematic diagram of the overall structure of the present invention.
  • Figure 2 is an example of the circuit structure diagram of the large-scale stepping module and its input/output matching and bias network in Figure 1;
  • FIG. 3 is a schematic diagram of the circuit structure of the semiconductor array unit in FIG. 2;
  • Figure 4 is an example of the structure diagram of the small amplitude attenuation module in Figure 1;
  • FIG. 5 is a schematic diagram of the circuit structure of FIG. 4;
  • the present invention provides a low-phase difference digitally controlled radio frequency attenuator.
  • Its structure includes a large amplitude stepping module 100, an output matching network 200 composed of a transformer, and a small amplitude stepping module composed of multiple attenuator units. 300.
  • An inter-stage matching and biasing network 400 composed of a balun, a capacitor, and a current source.
  • the large stepping module 100 in the present invention is composed of 64 common-gate transistor array units in parallel.
  • Each common-gate transistor array unit includes a first transistor 101, a second transistor 102, and a second transistor.
  • the first transistor 101 and the fourth transistor 104 are mutually differential pairs, and their gates are connected to each other as an AC ground and connected to the output terminal of the inverter 106;
  • the second transistor 102 and the third transistor 103 are mutually differential pairs, and their gates are connected to each other. It is an AC ground and is connected to the output terminal of the inverter 105.
  • the switching logic of the first transistor 101 and the second transistor 102 are opposite, and the drains are connected to each other to combine the output current of one turn-on transistor and the leakage current of the other turn-off transistor, and connect to the positive of the output signal of the large stepping module 100.
  • Terminal V A, OUT +, the switching logic of the third transistor 103 and the fourth transistor 104 are opposite, the drains are connected to each other, and the output current of one turn-on transistor and the leakage current of the other turn-off transistor are combined and connected to the large step Enter the negative terminal V A, OUT -of the output signal of the module 100.
  • the first transistor, the second transistor, the third transistor and the fourth transistor have the same size.
  • the digital control signal is connected to the input terminal of the first inverter of each array unit, thereby controlling the large-scale stepping module 100 to adjust the current amplitude.
  • the connection scheme of the transistors in the array unit on the one hand, through the vector synthesis of the transistor output currents in the two states of on and off, it solves the problem of the leakage current of the logic-off transistors. Theoretically, it can completely realize the wide bandwidth.
  • Linear amplitude control does not introduce additional phase deviation; on the other hand, it can ensure that the number of transistors in the on and off states of the transistor array is the same under any digital control signal, the total bias current is the same, and the parasitic seen at the input and output ends The parameters are the same, and theoretically, the change of port impedance under different amplitude states is completely eliminated.
  • Fig. 3 is the main circuit structure and parasitic parameters of any unit in the common-gate transistor array used in the present invention to explain the working principle of the amplitude control switch.
  • the first transistor 101 and the fourth transistor 104 form the first differential pair
  • the second transistor 102 and the third transistor 103 form the second differential pair.
  • the switching logic of the two differential pairs is opposite, and there is always one pair working in a common-gate amplification state.
  • the output differential current I ON ; the other differential pair is in the off state, but due to the influence of the parasitic parameters C ds , C gs , C gd, etc. of the layout of the high-frequency transistor, the drain still outputs the leakage current I OFF .
  • the differential current output from the output terminal of the array unit is I ON -I OFF .
  • the control logic of the array unit is opposite to that shown in the figure, the output differential current-(I ON -I OFF ).
  • Two array units with opposite control logic can synthesize zero current, offset the influence of leakage current I OFF , realize complete shutdown, and eliminate the influence of parasitic parameters on undesirable switching characteristics.
  • one pair is always in the on state and the other pair is in the off state. Therefore, regardless of the control logic, its DC power consumption and input and output impedance remain constant.
  • the large stepping module 100 preferably uses N-type transistors of CMOS technology, but it is also feasible to use P-type transistors.
  • the amplitude control principle of the present invention is also applicable to other semiconductor processes, such as BiCMOS (Bipolar-CMOS) process, SOI (Silicon-on-Insulator) process, III-IV group element compound semiconductor process (gallium nitride (GaN), arsenic Gallium (GaAs), indium phosphide (InP), etc.).
  • BiCMOS Bipolar-CMOS
  • SOI Silicon-on-Insulator
  • III-IV group element compound semiconductor process gallium nitride (GaN), arsenic Gallium (GaAs), indium phosphide (InP), etc.
  • the common-gate transistor array units in the large-scale stepping module 100 of the present invention are divided into 6 groups according to different weights, forming 6 amplitude control units.
  • the first amplitude control unit 110 includes a common-gate transistor array unit, and the switch is controlled by a first digital control signal V D0 ;
  • the second amplitude control unit 111 includes two common-gate transistor array units with two first inverters. The input terminals are connected to each other, and the switch is controlled by the second digital control signal V D1 ;
  • the third amplitude control unit 112 includes four common-gate transistor array units, the four first inverter input terminals of which are connected to each other, and are controlled by the third digital control unit 112.
  • the signal V D2 controls the switch.
  • the fourth amplitude control unit 113 includes eight common-gate transistor array units, the eight first inverter input terminals of which are connected to each other, and the switch is controlled by the fourth digital control signal V D3.
  • the fifth amplitude control unit 114 includes sixteen common-gate transistor array units, the sixteen first inverter input terminals of which are connected to each other, and the switch is controlled by the fifth digital control signal V D4 .
  • the sixth amplitude control unit 115 It includes thirty-three common-gate transistor array units, the thirty-three first inverter input ends of which are connected to each other, and the switch is controlled by the sixth digital control signal V D5.
  • the output current amplitude is 32 (I ON -I OFF ), and the amplitude attenuation is 6dB; the fifth digital control signal V D4 and the fourth digital control signal When V D3 is changed to 0, the output current amplitude is 16 (I ON -I OFF ), and the amplitude attenuation is 12 dB; the fifth digital control signal V D4 , the fourth digital control signal V D3 and the third digital control signal V D2 When it is changed to 0, the output current amplitude is 8 (I ON -I OFF ), and the amplitude attenuation is 18dB; when the fifth to second digital control signals V D4 , V D3 , V D2 and V D1 are changed to 0, The output current amplitude is 4 (I ON -I OFF ), and the amplitude attenuation is 24dB; when the digital control signals V D4 , V D3 , V D2 , V D1 and V
  • the above six amplitude states theoretically have no phase deviation, and the power consumption is consistent with the input and output impedance.
  • the first to sixth digital control signals are all set to 0, they are also in the maximum amplitude state. Compared with when they are all set to 1, the output signal phase is different by 180°.
  • the amplitude control logic is the inverse of the above logic, and 6dB steps are also achieved. In, 0-30dB maximum attenuation range.
  • the output matching network 200 of the large-scale stepping module 100 in this example is a differential output, using a transformer/balun-based matching network or a transmission line/inductance-capacitor matching network, which is matched according to application requirements
  • the input terminal of the standard load or the subsequent stage circuit simultaneously realizes the power supply of the large-scale stepping module 100.
  • the output matching network 200 can be changed to a single-ended output, which can be realized by a balun/transformer, an LC impedance matching network, a transmission line, and the like.
  • the large stepping module 100 is an active structure, and can provide gain in the high-frequency microwave frequency band and part of the millimeter wave frequency band, so that the radio frequency attenuator has a lower insertion loss as a whole. At the same time, the attenuation function is also realized without power supply, and the insertion loss is also lower at this time.
  • Figure 4 shows the structure of a small-amplitude attenuation module.
  • the small-amplitude attenuation module 300 is composed of four-stage attenuation units cascaded, including a 0.5-dB attenuation unit 301, a 1-dB attenuation unit 302, and two 2 -dB attenuation unit 303 and 304, realize 0.5dB step, 0-5.5dB attenuation range.
  • FIG. 5 shows a circuit implementation of the small amplitude attenuation module 300.
  • the 0.5-dB attenuation unit 301 includes a fifth transistor 311, a first resistor 312, and a second resistor 313.
  • the gate of the fifth transistor 311 is connected in series with the first resistor.
  • 312 is connected to the seventh digital control signal V D6 , the source is connected to the ground through a series second resistor 313, and the drain is connected to the input signal V IN of the radio frequency attenuator in series with a line resistor.
  • the seventh digital control signal V D6 is set to 0
  • the first attenuator unit is in a through state
  • the seventh digital control signal V D6 is set to 1, it is in an attenuated state.
  • the 1-dB attenuation unit and the 2-dB attenuation unit can adopt the same circuit structure, design method and control logic.
  • the 1-dB attenuation unit 302 includes a sixth transistor 314, a third resistor 315, and a fourth resistor 316.
  • the gate of the sixth transistor 314 is connected to the eighth digital control signal V D7 through the third resistor 315 in series, and the drain is connected in series.
  • the line resistance is connected to the drain of the fifth transistor 311;
  • the 2-dB attenuation unit 303 includes a seventh transistor 317, a fifth resistor 318, and a sixth resistor 319.
  • the gate of the seventh transistor 317 is connected to the ninth transistor through a fifth resistor 318 in series.
  • the digital control signal V D8 the drain series circuit resistance is connected to the drain of the sixth transistor 314;
  • the 2-dB attenuation unit 304 includes an eighth transistor 320, a seventh resistor 321 and an eighth resistor 322, and the gate of the eighth transistor 320
  • the electrode is connected to the tenth digital control signal V D9 through a seventh resistor 321 in series, and the drain is connected to the drain of the seventh transistor 317 in series;
  • the drain of the eighth transistor 320 is connected to the line resistor in series with the small amplitude attenuation module 300's output signal V M connection. Since each attenuation unit has a small attenuation range, it is easy to achieve port broadband matching, small additional phase deviation and small area.
  • the seventh to tenth digital control signals V D6 , V D7 , V D8 and V D9 respectively control the four attenuator units to achieve 0.5dB steps and a maximum attenuation range of 0-5.5dB. Since the required maximum attenuation range is only 0-5.5dB, this example chooses the cascading scheme of four simplified T-shaped attenuator units, which maintains the advantages of small insertion loss, no power consumption, and small area, and avoids the introduction of relatively large Large additional phase deviation and insertion loss. It should be noted that other circuit implementation methods for the attenuation unit are also feasible, such as a traditional T-shaped or ⁇ -shaped attenuator structure.
  • the present invention proposes a radio frequency attenuator structure in which a small amplitude attenuation module 300 and a large stepping module 100 are cascaded.
  • the maximum attenuation range is extended to 0-35.5dB while maintaining an attenuation step of 0.5dB to achieve It has a large attenuation range, high amplitude control accuracy, low additional phase deviation and wide working bandwidth, and has lower power consumption and smaller area.
  • 0.5dB steps are selected according to requirements. Other minimum steps such as 0.25dB or 1dB are also feasible and can be achieved by modifying the component value or the number of cascaded attenuator units.
  • the inter-stage matching and biasing network 400 of the present invention includes a first balun 401, a first capacitor 402, a second capacitor 403, and a current source 404.
  • the input terminal of the first balun 401 is connected to the small amplitude attenuation
  • the output signal V M of the module 300 is connected to the input signal V A, IN + and V A, IN -of the large-scale stepping module 100
  • the first capacitor 402 and the second capacitor 403 are respectively connected in parallel with the first balun
  • the input and output of the 401 has a common-gate structure, which makes it easy to achieve broadband matching at its input end.
  • the current source output is connected to the center tap of the output coil of the first balun 401 to provide a bias for the large-scale stepping module 100. It should be noted that the large stepping module of the present invention can also realize the attenuation function without power supply, and only the minimum insertion loss/maximum gain is different at this time.

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Abstract

本发明公开了一种低相差数控射频衰减器，应用于电子电路设计领域，包括主要由衰减器单元构成的小幅度衰减模块、主要由巴伦和电容构成的级间匹配和偏置网络、主要由半导体阵列单元构成的大幅度步进模块、主要由变压器构成的输出匹配网络，级间匹配和偏置网络还包括电流源；输出匹配网络根据应用需求匹配到标准负载或后级电路的输入端，同时可实现对大幅度步进模块的电源供电。本发明适用于CMOS工艺，同样适用于其他硅基半导体工艺，通过共栅极差分晶体管消除了晶体管开关状态不理想的影响，通过数字信号控制，将最大衰减范围扩展至0-35.5dB，同时保持0.5dB的衰减步进，实现大衰减范围、高幅度控制精度和低附加相位偏差等效果。

Description

一种低相差数控射频衰减器 技术领域
本发明涉及电子电路设计领域，尤其涉及一种低相差数控射频衰减器。
背景技术
通信技术迅速发展，5G和物联网(IoT)已开始进入实用，对信道容量和数据传输速率的要求不断提高。由于低频频谱资源拥挤，高速无线通信网络将主要部署在高频微波波段和毫米波频段。为了提高高频无线电波的传播距离，同时实现灵活的信号覆盖，有源相控阵技术被大量引入。在雷达技术领域，相控阵雷达能够实现高输出功率、快速精确的波束指向转换和多目标跟踪等功能，因此得到广泛应用。相比于无源相控阵，有源相控阵技术更适合近年来对更高发射信号功率、小重量、快速开关、共形、高可靠性等的要求，单片微波集成电路(monolithic-microwave-integrated-circuit)的低成本和高可靠性优势进一步推动了有源相控阵技术的应用。
衰减器是有源相控阵系统中的关键模块之一，它与移相器一起，通过控制天线单元间的幅度和相位关系改变波束的指向和形状。尤其是为了实现低副瓣和多极化性能，需要采用幅度加权等技术，衰减器必须具有足够的幅度变化范围、精确的幅度步进和低附加相位偏差。在现有的CMOS和SiGe等半导体工艺下，步进式衰减器通常有分布式、路径切换式(switched-path)和开关T形/π形几种结构。其中，分布式结构幅度变化范围小、芯片占用面积大；路径切换式结构最小损耗较大，且同样具有面积大的缺点；开关T形/π形结构具有低插入损耗和大衰减范围的特点，但在进行较大幅度衰减时，会引入明显的附加相位偏差。因此，现有的衰减器结构，难以满足未来高速无线通信和高性能雷达应用对衰减位数和精度的更高要求。
单片微波集成电路通常采用高电子迁移率晶体管(high--electron mobility transistor，HEMT)工艺，例如砷化镓(GaAs)和氮化镓(GaN)，但它们工艺成本较高，且无法与低成本的CMOS数字逻辑电路相集成，因此难以大范围应用于5G移动通信、汽车雷达和民用卫星通信等民用市场。另一方面，CMOS工艺在集成度和成本等方面表现优异，其工艺的进步使其在民用射频和毫米波领域的地位越来越重要。但是，CMOS晶体管在高频开关性能较差，严重影响开关T形/π形衰减器的性能。
公开号为CN103441747B的专利中公开了一种低差损低相移高集成度五位步进式超宽带数控衰减器中，基于硅基RF CMOS工艺，由传输线TLO、π型结构的8dB衰减模块、电感L1、T型-桥T型组合结构的0～7dB组合衰减模块、电感L2、π型结构的16dB衰减模块、传输线TL1顺序级联的单一信号通路构成，采用MOS管作为控制开关，由五个独立控制端控制三个衰减模块工作，利用电感网络进行相位补偿，以1dB长度步进在的0～31dB的衰减范围内，可实现共32种状态低差损低相移的信号幅度衰减。但该衰减器存在精度较低、衰减范围较小的缺陷。
公开号为CN108023572A的专利中公开了一种低相差CMOS差分数控衰减器，包括六个差分衰减单元和十个用于级间与输出匹配的电感，共有64个衰减态，衰减步进为0.5dB，最大衰减量为31.5dB，采用电容网络进行相位补偿，有效降低了附加相移。该衰减器仍然存在以下缺点：仅采用电容网络进行相位补偿，使得附加相位偏差较高，衰减范围较小。
发明内容
技术目的：针对现有技术中衰减器精度较低、衰减范围小、附加相位偏差较高的缺陷，本发明公开了一种低相差数控射频衰减器，通过小幅度衰减模块与大幅度步进模块相级联，将最大衰减范围扩展至0-35.5dB，同时保持0.5dB的衰减步进，实现了大衰减范围、高幅度控制精度、低附加相位偏差以及宽工作带宽，并有较低的功耗和较小的面积。
技术方案：为实现上述技术目的，本发明提供以下技术方案。
一种低相差数控射频衰减器，包括主要由衰减器单元构成的小幅度衰减模块、主要由巴伦和电容构成的级间匹配和偏置网络、主要由半导体阵列单元成的大幅度步进模块、主要由变压器构成的输出匹配网络，级间匹配和偏置网络还包括电流源；其中，
所述小幅度衰减模块连接所述射频衰减器的输入信号，用于对所述射频衰减器的输入信号进行小幅度衰减；
所述级间匹配和偏置网络的输入端连接小幅度衰减模块的输出端，用于实现大幅度步进模块的输入宽带匹配和直流偏置；
所述大幅度步进模块连接级间匹配和偏置网络的输出端，用于将该模块输入的信号进行大幅度衰减；
所述输出匹配网络连接大幅度步进模块的输出端，其输出为射频衰减器的输出端。
作为优选，所述大幅度步进模块包括六路数字控制信号和并联组合的六级幅度控制单元，其中，数字控制信号与幅度控制单元一一对应连接；除最后一级幅度控制单元包括33个半导体阵列单元外，其它各级幅度控制单元包括2 n-1个半导体阵列单元，其中，n∈[1，5]，各级幅度控制单元的所有第一反相器的输入端相互连接并连接对应的数字控制信号。
作为优选，所述半导体阵列单元为采用CMOS工艺制作的共栅极晶体管阵列单元，共栅极晶体管阵列单元的结构相同，包括第一晶体管、第二晶体管、第三晶体管、第四晶体管、第一反相器和第二反相器，其中，所述第一晶体管和第三晶体管的源极连接大幅度步进模块输入信号的正端，所述第二晶体管和第四晶体管的源极连接大幅度步进模块输入信号的负端，所述第二晶体管和第三晶体管的栅极连接第一反相器的输出端，所述第一晶体管和第四晶体管的栅极连接第二反相器的输出端，所述第一晶体管和第二晶体管的漏极连接大幅度步进模块输出信号的正端，所述第三晶体管和第四晶体管的漏极连接大幅度步进模块输出信号的负端。
数字控制信号连接每一个阵列单元的第一反相器输入端，进而控制所述的大幅度步进模块实现电流幅度的调节。阵列单元中晶体管的连接方案，一方面通过将开、关两种状态下的晶体管输出电流做矢量合成，解决了逻辑关断的晶体管存在漏电流的问题，理论上能够完全实现宽带宽下的线性幅度控制且不引入附加相位偏差；另一方面，能够保证在任意数字控制信号下，晶体管阵列中开、关状态的晶体管数量一致，总偏置电流一致，输入端和输出端看到的寄生参数一致，理论上完全消除了不同幅度状态下端口阻抗的变化。
作为优选，所述大幅度步进模块信号衰减范围为0-30dB，衰减步进长度为6dB。
作为优选，所述级间匹配和偏置网络包括第一巴伦、第一电容、第二电容和偏置电流源，所述第一巴伦的第一输入端连接所述小幅度衰减模块的输出信号，第二输入端接地，第一巴伦的第一输出端连接所述大幅度步进模块的输入信号正端，第二输出端连接所述大幅度步进模块的输入信号负端，所述第一电容和第二电容分别并联在第一巴伦的输入端和输出端，所述偏置电流源输出连接所述的第一巴伦输出线圈的中心抽头。
作为优选，所述小幅度衰减模块包括若干个级联的衰减器单元和与各个衰减器单元一一对应的数字控制信号，所述数字控制信号用于控制衰减器单元处于直通状态或衰减状态。
作为优选，所述第一衰减器单元包括第五晶体管、第一电阻和第二电阻，第五晶体管栅极通过串联第一电阻连接第七数字控制信号，第五晶体管源极通过串联第二电阻连接到地，第五晶体管漏极连接所述射频衰减器的输入信号，第七数字控制信号置1时，第一衰减器单元处于衰减状态，第七数字控制信号置0时，第一衰减器单元处于直通状态。
作为优选，所述小幅度衰减模块信号衰减范围为0-5.5dB，衰减步进长度为0.5dB。
作为优选，所述衰减器单元的数量为四个，衰减范围分别为0-0.5dB、0-1dB、0-2dB、0-2dB。
作为优选，所述半导体阵列单元为采用BiCMOS工艺、SOI工艺或III-IV族元素化合物半导体工艺制作的阵列单元。
有益效果：
1、本发明通过小幅度衰减模块与大幅度步进模块相级联，将最大衰减范围扩展至0-35.5dB，同时保持0.5dB的衰减步进，实现了大衰减范围、高幅度控制精度、低附加相位偏差以及宽工作带宽，并有较低的功耗和较小的面积；
2、本发明采用CMOS晶体管阵列单元，通过将开、关两种状态下的晶体管输出电流做矢量合成，解决了逻辑关断的晶体管存在漏电流的问题，实现宽带宽下的线性幅度控制且不引入附加相位偏差；同时，能够保证在任意数字控制信号下，晶体管阵列中开、关状态的晶体管数量一致，总偏置电流一致，输入端和输出端看到的寄生参数一致，消除了不同幅度状态下端口阻抗的变化；
3、本发明中的大幅度步进模块为有源结构，在高频微波频段和部分毫米波频段可以提供增益，使得射频衰减器整体具有较低的插入损耗。
附图说明
图1为本发明的总结构示意图；
图2为图1中大幅度步进模块及其输入/输出匹配和偏置网络的电路结构图示例；
图3为图2中半导体阵列单元电路结构示意图；
图4为图1中小幅度衰减模块的结构图示例；
图5为图4的电路结构示意图；
其中，311-第五晶体管，312-第一电阻，313-第二电阻，314-第六晶体管，315-第三电阻，316-第四电阻，317-第七晶体管，318-第五电阻，319-第六电阻，320-第八晶 体管，321-第七电阻，322-第八电阻。
具体实施方式
为了进一步的说明本发明公开的技术方案，下面结合说明书附图和具体实施例作详细的阐述。本领域的技术人员应得知，在不违背本发明精神前提下所做出的优选和改进均落入本发明的保护范围，对于本领域的惯用技术在本具体实施例中不做详细记载和说明。
如图1所示，本发明提供的一种低相差数控射频衰减器，其结构包括大幅度步进模块100、由变压器构成的输出匹配网络200、多个衰减器单元构成的小幅度步进模块300、由巴伦和电容以及电流源构成的级间匹配和偏置网络400。
如图2所示，本发明中的大幅度步进模块100由64个共栅极晶体管阵列单元并联组合而成，每个共栅极晶体管阵列单元包括第一晶体管101、第二晶体管102、第三晶体管103、第四晶体管104、第一反相器105和第二反相器106。第一晶体管101和第四晶体管104互为差分对，栅极相互连接为交流地，并连接反相器106的输出端；第二晶体管102、第三晶体管103互为差分对，栅极相互连接为交流地，并连接反相器105的输出端。第一晶体管101和第二晶体管102的开关逻辑相反，漏极相互连接，合成一个导通晶体管的输出电流和另一个关断晶体管的漏电流，并连接到大幅度步进模块100输出信号的正端V A，OUT+，第三晶体管103和第四晶体管104的开关逻辑相反，漏极相互连接，合成一个导通晶体管的输出电流和另一个关断晶体管的漏电流，并连接到大幅度步进模块100输出信号的负端V A，OUT-。其中，第一晶体管、第二晶体管、第三晶体管和第四晶体管尺寸相同。数字控制信号连接每一个阵列单元的第一反相器输入端，进而控制所述的大幅度步进模块100实现电流幅度的调节。阵列单元中晶体管的连接方案，一方面通过将开、关这两种状态下的晶体管输出电流做矢量合成，解决了逻辑关断的晶体管存在漏电流的问题，理论上能够完全实现宽带宽下的线性幅度控制且不引入附加相位偏差；另一方面，能够保证在任意数字控制信号下，晶体管阵列中开、关状态的晶体管数量一致，总偏置电流一致，输入端和输出端看到的寄生参数一致，理论上完全消除了不同幅度状态下端口阻抗的变化。
图3为本发明采用的共栅极晶体管阵列中任意一个单元的主要电路结构和寄生参数，用以解释幅度控制开关的工作原理。第一晶体管101、第四晶体管104组成第一个差分对，第二晶体管102、第三晶体管103组成第二个差分对，两个差分对开关逻辑相 反，总有一对工作在共栅极放大状态，输出差分电流I ON；另一对差分对处于关断状态，但是，由于高频晶体管版图的寄生参数C ds、C gs、C gd等的影响，其漏极仍然输出漏电流I OFF。经过电流合成，阵列单元的输出端输出的差分电流为I ON-I OFF。同理，如果阵列单元的控制逻辑与图中所示相反，则输出差分电流-(I ON-I OFF)。两个控制逻辑相反的阵列单元即能够合成零电流，抵消了漏电流I OFF的影响，实现完全的关断，消除了寄生参数对不理想开关特性的影响。晶体管阵列单元中总是一对处于导通状态，另一对处于关断状态，因此无论控制逻辑如何，其直流功耗和输入输出阻抗保持恒定。
需要说明的是，如图2和图3所示，大幅度步进模块100优选了CMOS工艺的N型晶体管，但是采用P型晶体管同样可行。本发明的幅度控制原理同样适用于其他半导体工艺，如BiCMOS(Bipolar-CMOS)工艺、SOI(Silicon-on-Insulator)工艺、III-IV族元素化合物半导体工艺(氮化镓(GaN)、砷化镓(GaAs)、磷化铟(InP)等)等。
如图2所示，本发明中的大幅度步进模块100中共栅极晶体管阵列单元按不同权重分为6组，构成6个幅度控制单元。第一幅度控制单元110包括一个共栅极晶体管阵列单元，由第一数字控制信号V D0控制开关；第二幅度控制单元111包括两个共栅极晶体管阵列单元，其两个第一反相器输入端相互连接，由第二数字控制信号V D1控制开关；第三幅度控制单元112包括四个共栅极晶体管阵列单元，其四个第一反相器输入端相互连接，由第三数字控制信号V D2控制开关，所述第四幅度控制单元113包括八个共栅极晶体管阵列单元，其八个第一反相器输入端相互连接，由第四数字控制信号V D3控制开关，所述第五幅度控制单元114包括十六个共栅极晶体管阵列单元，其十六个第一反相器输入端相互连接，由第五数字控制信号V D4控制开关，所述第六幅度控制单元115包括三十三个共栅极晶体管阵列单元，其三十三个第一反相器输入端相互连接，由第六数字控制信号V D5控制开关。六组幅度控制单元的数字控制信号V D5、V D4、V D3、V D2、V D1和V D0全部置1时为幅度最大状态，输出电流幅度为64(I ON-I OFF)。
在此基础上，第五数字控制信号V D4改为置0时，输出电流幅度为32(I ON-I OFF)，幅度衰减量为6dB；第五数字控制信号V D4和第四数字控制信号V D3改为置0时，输出电流幅度为16(I ON-I OFF)，幅度衰减量为12dB；第五数字控制信号V D4、第四数字控制信号V D3和第三数字控制信号V D2改为置0时，输出电流幅度为8(I ON-I OFF)，幅度衰减量为18dB；第五至第二数字控制信号V D4、V D3、V D2和V D1改为置0时，输出电流幅度为4(I ON-I OFF)，幅度衰减量为24dB；数字控制信号V D4、V D3、V D2、V D1和V D0改为置0时，输出电流幅度为2(I ON -I OFF)，幅度衰减量为30dB。由于消除了不理想开关的影响，且晶体管阵列单元功耗和阻抗恒定，以上六种幅度状态理论上没有相位偏差，且功耗和输入输出阻抗一致。同理，第一至第六数字控制信号全部置0时同样是幅度最大状态，与其全部置1时相比输出信号相位相差180°，此时幅度控制逻辑为上述逻辑取反，同样实现6dB步进，0-30dB最大衰减范围。作为对比，传统的开关T形/π形衰减器，或可变增益放大器(Variable Gain Amplifier)在实现较大的衰减范围时，附加相移明显，且随频率升高而增大。需要说明的是，本发明的幅度控制原理理论上可以实现任何最大衰减dB数为6的倍数的衰减量，但是过大的最大衰减范围会成倍增加晶体管数目。
如图2所示，本实例中大幅度步进模块100的输出匹配网络200为差分输出，采用基于变压器/巴伦的匹配网络，或基于传输线/电感-电容的匹配网络，根据应用需求匹配到标准负载或后级电路的输入端，同时实现对大幅度步进模块100的电源供电。需要说明的是，根据应用情况，输出匹配网络200可以改为单端输出，可以由巴伦/变压器、LC阻抗匹配网络、传输线等实现。
大幅度步进模块100为有源结构，在高频微波频段和部分毫米波频段可以提供增益，使得射频衰减器整体具有较低的插入损耗。同时在不供电的情况下也实现衰减功能，此时同样具有较低的插入损耗。
图4给出了一种小幅度衰减模块的结构，本实例中，小幅度衰减模块300由四级衰减单元级联组成，包括0.5-dB衰减单元301，1-dB衰减单元302，两个2-dB衰减单元303和304，实现0.5dB步进，0-5.5dB衰减范围。
图5给出了一种小幅度衰减模块300的电路实现方式，0.5-dB衰减单元301包括第五晶体管311、第一电阻312和第二电阻313，第五晶体管311栅极通过串联第一电阻312连接第七数字控制信号V D6，源极通过串联第二电阻313连接到地，漏极串接线路电阻与所述射频衰减器的输入信号V IN连接。第七数字控制信号V D6置0时第一衰减器单元处于直通状态，第七数字控制信号V D6置1时处于衰减状态，通过选择第五晶体管311的尺寸和第二电阻313的大小实现0-0.5dB衰减范围。1-dB衰减单元和2-dB衰减单元可以采用相同的电路结构、设计方法和控制逻辑。同理，1-dB衰减单元302包括第六晶体管314、第三电阻315和第四电阻316，第六晶体管314栅极通过串联第三电阻315连接第八数字控制信号V D7，漏极串接线路电阻与所述第五晶体管311漏极连接；2-dB衰减单元303包括第七晶体管317、第五电阻318和第六电阻319，第七晶体管317栅 极通过串联第五电阻318连接第九数字控制信号V D8，漏极串接线路电阻与所述第六晶体管314漏极连接；2-dB衰减单元304包括第八晶体管320、第七电阻321和第八电阻322，第八晶体管320栅极通过串联第七电阻321连接第十数字控制信号V D9，漏极串接线路电阻与所述第七晶体管317漏极连接；第八晶体管320漏极串接线路电阻与所述小幅度衰减模块300的输出信号V M连接。由于每一个衰减单元衰减范围小，因此容易实现端口宽带匹配、小附加相位偏差和较小的面积。
第七至第十数字控制信号V D6、V D7、V D8和V D9分别控制四个衰减器单元，实现了0.5dB步进，0-5.5dB最大衰减范围。由于需要的最大衰减范围仅有0-5.5dB，本实例选取了级联四个简化T形衰减器单元的方案，保持了其插入损耗小、无功耗和面积小的优点，避免了引入较大的附加相位偏差和插入损耗。需要说明的是，衰减单元采用其他电路实现方法同样可行，例如传统T形或π形衰减器结构。
本发明提出了小幅度衰减模块300与大幅度步进模块100相级联的射频衰减器结构，通过这种方法，最大衰减范围扩展至0-35.5dB，同时保持0.5dB的衰减步进，实现了大衰减范围、高幅度控制精度、低附加相位偏差以及宽工作带宽，并有较低的功耗和较小的面积。需要说明的是，本设计实例根据需求优选了0.5dB步进，其他最小步进例如0.25dB或1dB同样可行，可通过修改级联衰减器单元的元件值或级联个数实现。
如图2所示，本发明中级间匹配和偏置网络400包括第一巴伦401、第一电容402、第二电容403和电流源404，第一巴伦401输入端连接所述小幅度衰减模块300的输出信号V M，输出端连接所述大幅度步进模块100的输入信号V A，IN+和V A，IN-，第一电容402和第二电容403分别并联在第一巴伦401的输入端和输出端。大幅度步进模块100为共栅结构，容易实现其输入端的宽带匹配。电流源输出连接第一巴伦401输出线圈的中心抽头，为大幅度步进模块100提供偏置。需要说明的是，本发明的大幅度步进模块也可以在不供电的情况下实现衰减功能，此时仅最小插入损耗/最大增益有所不同。
以上所述仅是本发明的优选实施方式，应当指出：对于本技术领域的普通技术人员来说，在不脱离本发明原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。

Claims (10)

  1. 一种低相差数控射频衰减器，其特征在于：包括主要由衰减器单元构成的小幅度衰减模块(300)、主要由巴伦和电容构成的级间匹配和偏置网络(400)、主要由半导体阵列单元构成的大幅度步进模块(100)、主要由变压器构成的输出匹配网络(200)，级间匹配和偏置网络(400)还包括电流源；其中，
    所述小幅度衰减模块(300)连接所述射频衰减器的输入信号，用于对所述射频衰减器的输入信号进行小幅度衰减；
    所述级间匹配和偏置网络(400)的输入端连接小幅度衰减模块(300)的输出端，用于实现大幅度步进模块(100)的输入宽带匹配和直流偏置；
    所述大幅度步进模块(100)连接级间匹配和偏置网络(400)的输出端，用于将该模块输入的信号进行大幅度衰减；
    所述输出匹配网络(200)连接大幅度步进模块(100)的输出端，其输出端为射频衰减器的输出端。
  2. 根据权利要求1所述的一种低相差数控射频衰减器，其特征在于：所述大幅度步进模块(100)包括六路数字控制信号和并联组合的六级幅度控制单元，其中，数字控制信号与幅度控制单元一一对应连接；除最后一级幅度控制单元包括33个半导体阵列单元外，其它各级幅度控制单元包括2 n-1个半导体阵列单元，其中，n∈[1，5]，各级幅度控制单元的所有第一反相器(105)的输入端相互连接并连接对应的数字控制信号。
  3. 根据权利要求2所述的一种低相差数控射频衰减器，其特征在于：所述半导体阵列单元为采用CMOS工艺制作的共栅极晶体管阵列单元，共栅极晶体管阵列单元的结构相同，包括第一晶体管(101)、第二晶体管(102)、第三晶体管(103)、第四晶体管(104)、第一反相器(105)和第二反相器(106)，其中，所述第一晶体管(101)和第三晶体管(103)的源极连接大幅度步进模块(100)输入信号的正端
    Figure PCTCN2020095235-appb-100001
    所述第二晶体管(102)和第四晶体管(104)的源极连接大幅度步进模块(100)输入信号的负端
    Figure PCTCN2020095235-appb-100002
    所述第二晶体管(102)和第三晶体管(103)的栅极连接第一反相器(105)的输出端，所述第一晶体管(101)和第四晶体管(104)的栅极连接第二反相器(106)的输出端，所述第一晶体管(101)和第二晶体管(102)的漏极连接大幅度步进模块(100)输出信号的正端
    Figure PCTCN2020095235-appb-100003
    所述第三晶体管(103)和第四晶体管(104)的漏极连接大幅度步进模块(100)输出信号的负端
    Figure PCTCN2020095235-appb-100004
  4. 根据权利要求2所述的一种低相差数控射频衰减器，其特征在于：所述大幅度 步进模块(100)信号衰减范围为0-30dB，衰减步进长度为6dB。
  5. 根据权利要求1所述的一种低相差数控射频衰减器，其特征在于：所述级间匹配和偏置网络(400)包括第一巴伦(401)、第一电容(402)、第二电容(403)和偏置电流源(404)，所述第一巴伦(401)的第一输入端连接所述小幅度衰减模块(300)的输出信号(V M)，第二输入端接地，第一巴伦(401)的第一输出端连接所述大幅度步进模块(100)的输入信号正端
    Figure PCTCN2020095235-appb-100005
    第二输出端连接所述大幅度步进模块(100)的输入信号负端
    Figure PCTCN2020095235-appb-100006
    所述第一电容(402)和第二电容(403)分别并联在第一巴伦(401)的输入端和输出端，所述偏置电流源(404)输出连接所述的第一巴伦(401)输出线圈的中心抽头。
  6. 根据权利要求1所述的一种低相差数控射频衰减器，其特征在于：所述小幅度衰减模块(300)包括若干个级联的衰减器单元和与各个衰减器单元一一对应的数字控制信号，所述数字控制信号用于控制衰减器单元处于直通状态或衰减状态。
  7. 根据权利要求6所述的一种低相差数控射频衰减器，其特征在于：所述第一衰减器单元(301)包括第五晶体管(311)、第一电阻(312)和第二电阻(313)，第五晶体管(311)栅极通过串联第一电阻(312)连接第七数字控制信号(V D6)，第五晶体管(311)源极通过串联第二电阻(313)连接到地，第五晶体管(311)漏极连接所述射频衰减器的输入信号(V IN)，第七数字控制信号(V D6)置1时，第一衰减器单元(301)处于衰减状态，第七数字控制信号(V D6)置0时，第一衰减器单元(301)处于直通状态。
  8. 根据权利要求6所述的一种低相差数控射频衰减器，其特征在于：所述小幅度衰减模块(300)信号衰减范围为0-5.5dB，衰减步进长度为0.5dB。
  9. 根据权利要求6所述的一种低相差数控射频衰减器，其特征在于：所述衰减器单元的数量为四个，衰减范围分别为0-0.5dB、0-1dB、0-2dB、0-2dB。
  10. 根据权利要求1所述的一种低相差数控射频衰减器，其特征在于：所述半导体阵列单元为采用BiCMOS工艺、SOI工艺或III-IV族元素化合物半导体工艺制作的阵列单元。
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