WO2021098195A1 - 一种高频开关型移相器 - Google Patents

一种高频开关型移相器 Download PDF

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WO2021098195A1
WO2021098195A1 PCT/CN2020/095234 CN2020095234W WO2021098195A1 WO 2021098195 A1 WO2021098195 A1 WO 2021098195A1 CN 2020095234 W CN2020095234 W CN 2020095234W WO 2021098195 A1 WO2021098195 A1 WO 2021098195A1
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phase shift
transistor
inductor
degree phase
phase
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PCT/CN2020/095234
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French (fr)
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赵涤燹
顾鹏
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南京汇君半导体科技有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00—Auxiliary devices
    • H01P1/18—Phase-shifters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00—Auxiliary devices
    • H01P1/18—Phase-shifters
    • H01P1/19—Phase-shifters using a ferromagnetic device

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  • the invention relates to a high-frequency switch type phase shifter technology, which belongs to the technical field of electronic circuit design, and is particularly suitable for the design of phase shifters in a phased array system.
  • High-frequency communication can provide a wide bandwidth, but also introduces high loss.
  • Phased array technology can make up for the loss of high-frequency transmission and achieve flexible signal coverage, so it has gradually become a key technology in applications such as satellite communications and millimeter wave 5G communications.
  • the phased array technology uses a multi-antenna array to superimpose the emitted electromagnetic waves in space to achieve high transmission power; by adjusting the phase of the signals emitted by each antenna, the beam direction can be adjusted to achieve efficient and flexible signal coverage. Therefore, the phase shifter used to adjust the phase becomes the key module of the phased array system.
  • the phase shifter in the phased array system should achieve the following points: (1) Broadband phase shift to ensure accurate beam pointing adjustments in the working frequency band; (2) Low loss and low power consumption to reduce The power consumption of the large-scale phased array system; (3) Low phase shift additional loss to reduce the amplitude deviation of each channel phase shift; (4) Simple and fast control method to reduce control delay and improve system response speed.
  • CMOS process Compared with the expensive GaAs process, CMOS process has the advantages of low cost, low power consumption, high yield, large-scale production, and easy integration with CMOS digital circuits. It is especially suitable for low-cost and low-power applications in mobile communications. Therefore, it is very important to study the design of phase shifter based on CMOS technology.
  • the switch-type phase shifter realizes a wide range of phase adjustment by cascading multi-stage phase shifting units.
  • a single phase shift unit switches the phase shift state through a transistor switch, so that the signal passes through the reference path or the phase shift path.
  • the traditional inductor-capacitor-inductor T-type phase shifting structure can realize the phase shifting function at lower frequencies, its performance can no longer meet the design requirements of high-frequency phase shifters.
  • the traditional T-shaped phase shifting structure can achieve narrow-band phase shifting, but there will be a significant phase shift deviation at the deviation from the center frequency, which can no longer meet the broadband phase shifting requirements of the millimeter wave frequency band;
  • the traditional T-shaped phase shifting structure usually introduces a large additional loss between the reference path and the phase-shifting path, resulting in different amplitude values in different phase states, which will complicate the amplitude calibration of the phased array system;
  • traditional The high phase shift unit (for example, 90 degree unit) often uses two single-pole double-throw switches to switch the phase shift state, which will lead to increased insertion loss, which is not conducive to the low-power design of large-scale phased array systems.
  • the present invention provides a switch type phase shifter suitable for CMOS process, 5-bit direct digital control, and 180-degree phase modulation range.
  • the present invention proposes a switched inductance phase shift structure and an optimized T-shaped structure. Based on the two structures, the selection and arrangement strategy of the phase shift unit is further proposed, which can finally achieve low loss, low phase shift additional attenuation, and broadband phase shift effects. .
  • a high-frequency switch type phase shifter including a 90-degree phase-shifting unit, a 22-degree phase-shifting unit, a 5-degree phase-shifting unit, an 11-degree phase-shifting unit, and a 45-degree phase-shifting unit that are sequentially connected.
  • the 5-degree phase-shifting unit is Switching inductance structure, 90 degree phase shifting unit, 22 degree phase shifting unit, 11 degree phase shifting unit and 45 degree phase shifting unit are all optimized T-shaped structures.
  • the optimized T-shaped phase shift structure is composed of a first transistor, a second transistor, a third transistor, a first inductor, a second inductor, a third inductor, and a first capacitor, wherein: the source of the first transistor The drain and drain are connected across the input and output ends, the gate is connected to the first digital signal; the gate of the second transistor is connected to the first digital signal, and the gate of the third transistor is connected to the second digital signal; the third inductor is connected in parallel to the third The source and drain of the transistor, the first capacitor is connected in parallel with the source and drain of the second transistor, the common terminal of the source of the third transistor and the third inductor is grounded, and the drain of the third transistor is common to the third inductor Terminate the common terminal of the source of the second transistor and the first capacitor; the first inductor and the second inductor are connected in parallel with the source and drain of the first transistor after being connected in series, and the common terminal of the first inductor and the second inductor is connected to the The
  • the switch inductor phase shift structure is composed of a fourth transistor and a fourth inductor, wherein: the source and drain of the fourth transistor are connected across the input and output ends, and the gate is connected to the third digital signal; fourth The inductance is connected in parallel with the source and drain of the fourth transistor.
  • the second digital signal is the inverse of the first digital signal.
  • first inductor and the second inductor in each of the optimized T-shaped phase-shifting structures have the same inductance, and are symmetrical about the vertical center of the optimized T-shaped phase-shifting structure during layout.
  • the present invention proposes a switch inductor phase shift structure, which can reduce the insertion loss
  • the present invention proposes an optimized T-shaped phase shift structure.
  • inductors inductors 106, 206, 406, 506 are introduced to increase the phase shift bandwidth
  • capacitors capacitors 107, 207, 407, 507 Used to reduce the additional loss of phase shifting
  • the present invention proposes a strategy for selecting and arranging phase shifting units, which can improve the impedance matching performance of the phase shifting units and reduce the insertion loss.
  • Figure 1 is a schematic diagram of the circuit structure of a high-frequency switching phase shifter.
  • Figure 2 is a schematic diagram of the switch inductor phase shift structure.
  • Figure 3 is a schematic diagram of the optimized T-type phase shifting structure.
  • Figure 4 is a graph of the phase shift test results of a 5-bit switch type phase shifter under CMOS technology.
  • Fig. 5 is a test result of the phase shift accuracy of the 5-bit switch type phase shifter under CMOS technology.
  • Fig. 6 is a graph showing the amplitude deviation test result of a 5-bit switch type phase shifter under CMOS technology.
  • the application fields of the phase shifter of the present invention include: satellite communications, 5G communications, phased array systems and the like.
  • the present invention proposes the above-mentioned switch inductor phase shift structure and the optimized T-type phase shift structure; based on these two structures, it is further proposed The selection and arrangement strategy of the phase shift unit can finally achieve low loss, low phase shift additional attenuation, and broadband phase shift effect.
  • the invention has a pure passive circuit structure, no DC power consumption, and supports positive and negative bidirectional phase shifting; it adopts direct digital control and has the advantages of low time delay and fast response compared with analog voltage control based on digital-to-analog conversion (DAC) .
  • DAC digital-to-analog conversion
  • the invention is suitable for the design of the phase shifter of the phased array system.
  • a high-frequency switch type phase shifter provided by the present invention includes a 90-degree phase-shifting unit 100, a 22-degree phase-shifting unit 200, a 5-degree phase-shifting unit 300, and an 11-degree phase-shifting unit connected in sequence. 400, 45 degree phase shift unit 500.
  • the 5-degree phase-shifting unit 300 adopts a switched-inductance phase-shifting structure;
  • the 90-degree phase-shifting unit 100, the 22-degree phase-shifting unit 200, the 11-degree phase-shifting unit 400, and the 45-degree phase-shifting unit 500 adopt the optimized T-type phase shifter structure.
  • the subscripts of the digital signals V 90 , V 22 , V 11 , and V 45 only refer to the corresponding phase shift degrees.
  • the digital signal The "-" in it means that the corresponding digital signal is inverted.
  • Fig. 2 shows the switch inductor phase shift structure, and the 5-degree phase shift unit 300 adopts this structure.
  • the switch inductor phase shift structure is composed of a transistor 301 and an inductor 302.
  • the transistor 301 is connected across the input and output terminals and is controlled by the digital signal V 5 as a direct path of the signal;
  • the inductor 302 is connected across the input and output terminals as a phase shift path of the signal.
  • the switch inductor phase shift structure uses a single series transistor, which can effectively reduce the insertion loss; and this structure uses a small number of devices, which can reduce the layout area of the phase shifter.
  • FIG. 3 shows the optimized T-shaped phase shifting structure.
  • the 22-degree phase shifting unit 200, the 11-degree phase shifting unit 400, and the 45-degree phase shifting unit 500 adopt the same structure.
  • the specific device parameter values are different.
  • Transistor 101 is connected across the input and output terminals and is controlled by digital signal V 90 as a direct path for the input signal; transistor 102, transistor 103, inductor 104, inductor 105, capacitor 107 connected in parallel with transistor 102, and inductor connected in parallel with transistor 103 106 constitutes a phase shift path of the input signal.
  • the transistor 102 is controlled by the digital signal V 90
  • the transistor 103 is controlled by the digital signal control.
  • the transistor 101 and the transistor 102 are turned on, the transistor 103 is turned off, and the inductance 106 resonates with the parasitic capacitance of the turned off transistor 103.
  • the input signal passes directly to the output terminal.
  • the transistor 101 and the transistor 102 are turned off, and the transistor 103 is turned on.
  • the inductor 104, the inductor 105, the parasitic capacitance of the transistor 102, the capacitor 107, the transistor 103, and the inductor 106 form a T-shaped phase shift network. Due to the existence of parasitic capacitance, when the transistor is switched between on and off, additional loss will be introduced for the phase shifting unit.
  • the optimized T-shaped phase shifting structure reduces the additional loss of phase shifting by jointly adjusting the transistor 102 and the capacitor 107 connected in parallel with the transistor 102. Due to the natural narrowband characteristics of the inductor-capacitor-inductor network, the phase shift bandwidth will be limited.
  • the optimized T-shaped phase shift structure increases the phase shift bandwidth by adjusting the transistor 103 and the inductance 107 connected in parallel with the transistor 106.
  • Fig. 4 is the test result of the phase shift performance of the 5-bit 180-degree phase shifter of the present invention. Its operating frequency is 24-30 GHz, which realizes the 5-bit control and 180-degree phase shifting operation. The 32 phase states are basically No overlap. It can be seen that this phase shifter achieves the effect of broadband phase shifting.
  • Fig. 5 is the test result of the phase shift accuracy of the 5-bit 180-degree phase shifter of the present invention.
  • the root mean square error of the phase shift is less than 6 degrees.
  • the root mean square error of the phase shift is about 3.5 degrees, indicating that the phase shifter has achieved high-precision phase shift.
  • Fig. 6 is the amplitude deviation test result of the 5-bit 180-degree phase shifter of the present invention.
  • the amplitude root mean square error is less than 0.6 dB.
  • the amplitude root mean square error is less than 0.1dB, which is about 0.07dB, which means that the phase shifter greatly reduces the additional loss of phase shifting.

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Abstract

本发明公开了一种高频开关型移相器，由5度移相单元、11度移相单元、22度移相单元、45度移相单元、90度移相单元构成，可以覆盖180度移相范围。所述的5度移相单元由开关电感移相结构实现，所述的11度移相单元、22度移相单元、45度移相单元、90度移相单元由优化T型移相结构实现。针对传统结构在高频移相时的高损耗、高移相附加衰减、窄带等缺陷，本发明提出了上述的开关电感移相结构和优化T型移相结构；基于该两种结构，进一步提出了移相单元的选取和排列策略，最终可实现低损耗、低移相附加衰减、宽带的移相效果。本发明为纯无源电路结构，无直流功耗，并支持正反双向移相；采用直接数字控制，相比基于数模转换(DAC)的模拟电压控制，具有时延低、反应快的优势。本发明适用于相控阵系统的移相器设计。

Description

一种高频开关型移相器 技术领域
本发明涉及一种高频开关型移相器技术，属于电子电路设计技术领域，尤其适用于相控阵系统中的移相器设计。
背景技术
近年来，随着通信技术的飞速发展，通信频率开始走向6GHz以上的高频。高频通信可以提供宽的带宽，但也引入了高的损耗。相控阵技术可以弥补高频传输的损耗，并且实现灵活的信号覆盖，因而逐渐成为卫星通信、毫米波5G通信等应用中的关键技术。
相控阵技术通过使用多天线阵列，将发射的电磁波在空间中叠加，可以实现高的发射功率；通过调节各天线发射信号的相位，可以调节波束指向，实现高效、灵活的信号覆盖。因此，用于调节相位的移相器成为相控阵系统的关键模块。
相控阵系统中的移相器应实现以下几点：(1)宽带移相，以确保在工作频段内均能实现精准的波束指向调节；(2)低损耗、低功耗，以降低大规模相控阵系统的功耗；(3)低移相附加损耗，以减少各通道移相时的幅度偏差；(4)控制方法简单快捷，以降低控制延迟，提高系统反应速度。
相比于成本高昂的GaAs工艺，CMOS工艺具有低成本、低功耗、高良率、可大规模生产、易与CMOS数字电路集成等优势，特别适用于移动通信中低成本、低功耗的应用，因此研究基于CMOS工艺的移相器设计有着非常重要的意义。
开关型移相器通过级联多级移相单元来实现大范围的相位调节。单个移相单元通过晶体管开关来切换移相状态，使得信号从参考路径或移相路径通过。尽管传统的电感-电容-电感的T型移相结构能够在较低频率实现移相功能，但其性能已不能满足高频移相器的设计要求。
第一，传统的T型移相结构能够实现窄带的移相，但在偏离中心频率处将出现明显的移相偏差，已不能满足毫米波频段的宽带移相要求；第二，传统的T型移相结构通常会在参考路径和移相路径之间引入较大的附加损耗，导致不同相位状态下的幅度取值不同，这将使得相控阵系统的幅度校准变得复杂；第三，传统的高移相单元(如，90度单元)常使用两个单刀双掷开关来切换移相状态，这将导致插入损耗升高，不利于大规模相控阵系统的低功耗设计。
发明内容
针对上述不足，本发明提供一种适用于CMOS工艺的，5比特直接数字控制的，180度调相范围的开关型移相器。本发明提出了开关电感移相结构和优化T型结构，基于该两种结 构，进一步提出了移相单元的选取和排列策略，最终可实现低损耗、低移相附加衰减、宽带的移相效果。
为了实现上述目的，本发明采用如下技术方案：
一种高频开关型移相器，包括依次连接的90度移相单元、22度移相单元、5度移相单元、11度移相单元以及45度移相单元，5度移相单元为开关电感结构，90度移相单元、22度移相单元、11度移相单元以及45度移相单元均为优化T型结构。
进一步的，所述的优化T型移相结构由第一晶体管、第二晶体管、第三晶体管、第一电感、第二电感、第三电感和第一电容构成，其中：第一晶体管的源极与漏极跨接在输入与输出端，栅极接第一数字信号；第二晶体管的栅极接第一数字信号，第三晶体管的栅极接第二数字信号；第三电感并联在第三晶体管的源极与漏极，第一电容并联在第二晶体管的源极与漏极，第三晶体管的源极和第三电感的公共端接地，第三晶体管的漏极和第三电感的公共端接第二晶体管的源极和第一电容的公共端；第一电感、第二电感串接后并联在第一晶体管的源极与漏极，第一电感、第二电感的公共端接第二晶体管的漏极和第一电容的公共端。
进一步的，所述的开关电感移相结构由第四晶体管、第四电感构成，其中：第四晶体管的源极与漏极跨接在输入与输出端，栅极接第三数字信号；第四电感并联在第四晶体管的源极与漏极。
进一步的，所述的第二数字信号是第一数字信号取反。
进一步的，每个所述的优化T型移相结构中的第一电感与第二电感的感值相同，且在版图布局时关于优化T型移相结构的垂直中心对称。
有益效果
本发明相比现有技术，其显著的效果在于：
第一，本发明提出了一种开关电感移相结构，可降低插入损耗；
第二，本发明提出了一种优化T型移相结构，一方面引入电感(电感106、206、406、506)用于增加移相宽带，另一方面引入电容(电容107、207、407、507)用于降低移相附加损耗；
第三，本发明提出了一种移相单元的选取和排列策略，可以提升移相单元的阻抗匹配性能并降低插入损耗。
附图说明
图1是一种高频开关型移相器电路结构示意图。
图2是开关电感移相结构示意图。
图3是优化T型移相结构示意图。
图4是CMOS工艺下5比特开关型移相器的移相测试结果图。
图5是CMOS工艺下5比特开关型移相器的移相精度测试结果图。
图6是CMOS工艺下5比特开关型移相器的幅度偏差测试结果图。
具体实施方式
为了进一步地说明本发明公开的技术方案，下面结合说明书附图和具体实施例作详细的阐述。本领域的技术人员应得知，在不违背本发明精神前提下所做出的优选和改进均落入本发明的保护范围，对于本领域的惯用技术在本具体实施例中不做详细记载和说明。
本发明的移相器涉及的应用领域包括：卫星通信、5G通信、相控阵系统等。针对传统结构在高频移相时的高损耗、高移相附加衰减、窄带等缺陷，本发明提出了上述的开关电感移相结构和优化T型移相结构；基于该两种结构，进一步提出了移相单元的选取和排列策略，最终可实现低损耗、低移相附加衰减、宽带的移相效果。本发明为纯无源电路结构，无直流功耗，并支持正反双向移相；采用直接数字控制，相比基于数模转换(DAC)的模拟电压控制，具有时延低、反应快的优势。本发明适用于相控阵系统的移相器设计。
如图1所示，本发明提供的一种高频开关型移相器，包括依次连接的90度移相单元100、22度移相单元200、5度移相单元300、11度移相单元400、45度移相单元500。其中，5度移相单元300采用开关电感移相结构；90度移相单元100、22度移相单元200、11度移相单400、45度移相单元500采用优化T型移相器结构。这里需要说明的是，数字信号V 90、V 22、V 11、V 45的下标仅指代对应的移相度数，数字信号
Figure PCTCN2020095234-appb-000001
中的“-”表示对应数字信号取反。
图2给出了所述的开关电感移相结构，5度移相单元300采用这种结构。所述的开关电感移相结构由晶体管301、电感302构成。所述的晶体管301跨接在输入与输出端，由数字信号V 5控制，作为信号的直通路径；所述的电感302跨接在输入与输出端，作为信号的移相路径。通过调整电感302的电感值和品质因数，可以实现5度相位切换，同时保证相位切换时移相器的损耗保持一致，即移相附加损耗为零。开关电感移相结构使用了单个串联晶体管，可以有效地降低插入损耗；且此结构使用的器件数较少，可降低移相器的版图面积。
图3给出了所述的优化T型移相结构，以90度移相单元100为例，22度移相单元200、11度移相单元400、45度移相单元500采用相同的结构，但具体的器件参数取值有所不同。晶体管101跨接在输入输出两端，由数字信号V 90控制，作为输入信号的直通路径；晶体管102、晶体管103、电感104、电感105、与晶体管102并联的电容107、与晶体管103并联的电感106构成输入信号的移相路径。晶体管102由数字信号V 90控制，晶体管103由数字信号
Figure PCTCN2020095234-appb-000002
控制。当数字信号V 90为高电平时，晶体管101、晶体管102导通，晶体管103关断，电感106 与关断的晶体管103的寄生电容谐振，此时输入信号直通到输出端。当数字信号V 90为低电平时，晶体管101、晶体管102关断，晶体管103导通，电感104、电感105、晶体管102的寄生电容、电容107、晶体管103、电感106构成T型移相网络。由于寄生电容的存在，晶体管在开和关之间切换时将为移相单元引入移相附加损耗。优化T型移相结构通过联合调节晶体管102和与晶体管102并联的电容107来降低移相附加损耗。由于电感-电容-电感网络天然的窄带特性，移相带宽将受到限制。优化T型移相结构通过调节晶体管103和与晶体管106并联的电感107来增加移相带宽。
图4为本发明的5比特180度移相器的移相性能测试结果，其工作频率为24-30GHz，实现了5比特控制的、180度移相范围的移相操作，32个相位状态基本无重叠。可知本移相器实现了宽带移相的效果。
图5为本发明的5比特180度移相器的移相精度测试结果，在24-30GHz工作频段内，移相的均方根误差小于6度。在中心频率27GHz处，移相均方根误差约为3.5度，表明本移相器实现了高精度的移相。
图6为本发明的5比特180度移相器的幅度偏差测试结果，在24-30GHz工作频段内，幅度均方根误差小于0.6dB。在中心频率27GHz处，幅度均方根误差小于0.1dB，约为0.07dB，意味着本移相器大大降低了移相附加损耗。

Claims (5)

  1. 一种高频开关型移相器，其特征在于，包括依次连接的90度移相单元(100)、22度移相单元(200)、5度移相单元(300)、11度移相单元(400)以及45度移相单元(500)，5度移相单元(300)为开关电感结构，90度移相单元(100)、22度移相单元(200)、11度移相单元(400)以及45度移相单元(500)均为优化T型结构。
  2. 根据权利要求1所述的一种高频开关型移相器，其特征在于，所述的优化T型移相结构由第一晶体管(101、201、401、501)、第二晶体管(102、202、402、502)、第三晶体管(103、203、403、503)、第一电感(104、204、404、504)、第二电感(105、205、405、505)、第三电感(106、206、406、506)和第一电容(107、207、407、507)构成，其中：第一晶体管(101、201、401、501)的源极与漏极跨接在输入与输出端，栅极接第一数字信号(V 90、V 22、V 11、V 45)；第二晶体管(102、202、402、502)的栅极接第一数字信号(V 90、V 22、V 11、V 45)，第三晶体管(103、203、403、503)的栅极接第二数字信号
    Figure PCTCN2020095234-appb-100001
    第三电感(106、206、406、506)并联在第三晶体管(103、203、403、503)的源极与漏极，第一电容(107、207、407、507)并联在第二晶体管(102、202、402、502)的源极与漏极，第三晶体管(103、203、403、503)的源极和第三电感(106、206、406、506)的公共端接地，第三晶体管(103、203、403、503)的漏极和第三电感(106、206、406、506)的公共端接第二晶体管(102、202、402、502)的源极和第一电容(107、207、407、507)的公共端；第一电感(104、204、404、504)、第二电感(105、205、405、505)串接后并联在第一晶体管(101、201、401、501)的源极与漏极，第一电感(104、204、404、504)、第二电感(105、205、405、505)的公共端接第二晶体管(102、202、402、502)的漏极和第一电容(107、207、407、507)的公共端。
  3. 根据权利要求1所述的一种高频开关型移相器，其特征在于，所述的开关电感移相结构由第四晶体管(301)、第四电感(302)构成，其中：第四晶体管(301)的源极与漏极跨接在输入与输出端，栅极接第三数字信号(V 5)；第四电感(302)并联在第四晶体管(301)的源极与漏极。
  4. 根据权利要求2所述的一种高频开关型移相器，其特征在于，所述的第二数字信号
    Figure PCTCN2020095234-appb-100002
    Figure PCTCN2020095234-appb-100003
    是第一数字信号(V 90、V 22、V 11、V 45)取反。
  5. 根据权利要求2所述的一种高频开关型移相器，其特征在于，每个所述的优化T型移相结构中的第一电感(104、204、404、504)与第二电感(105、205、405、505)的感值相同，且在版图布局时关于优化T型移相结构的垂直中心对称。
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