WO2021192017A1 - Light filtering device, optical microscope, and defect observation apparatus - Google Patents

Light filtering device, optical microscope, and defect observation apparatus Download PDF

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Publication number
WO2021192017A1
WO2021192017A1 PCT/JP2020/012940 JP2020012940W WO2021192017A1 WO 2021192017 A1 WO2021192017 A1 WO 2021192017A1 JP 2020012940 W JP2020012940 W JP 2020012940W WO 2021192017 A1 WO2021192017 A1 WO 2021192017A1
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WO
WIPO (PCT)
Prior art keywords
shutter
filtering device
opening
rack
optical filtering
Prior art date
Application number
PCT/JP2020/012940
Other languages
French (fr)
Japanese (ja)
Inventor
吉村　保廣
青野　宇紀
祐子 大谷
哲 高田
Original Assignee
株式会社日立ハイテク
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立ハイテク filed Critical 株式会社日立ハイテク
Priority to PCT/JP2020/012940 priority Critical patent/WO2021192017A1/en
Priority to JP2022509817A priority patent/JP7385003B2/en
Priority to KR1020227030668A priority patent/KR20220136419A/en
Priority to TW110107649A priority patent/TW202204883A/en
Publication of WO2021192017A1 publication Critical patent/WO2021192017A1/en

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    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B26/00—Optical devices or arrangements for the control of light using movable or deformable optical elements
    • G02B26/02—Optical devices or arrangements for the control of light using movable or deformable optical elements for controlling the intensity of light
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B3/00—Devices comprising flexible or deformable elements, e.g. comprising elastic tongues or membranes
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/956—Inspecting patterns on the surface of objects
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B21/00—Microscopes
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B21/00—Microscopes
    • G02B21/0004—Microscopes specially adapted for specific applications
    • G02B21/0016—Technical microscopes, e.g. for inspection or measuring in industrial production processes
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B21/00—Microscopes
    • G02B21/0004—Microscopes specially adapted for specific applications
    • G02B21/002—Scanning microscopes
    • G02B21/0024—Confocal scanning microscopes (CSOMs) or confocal "macroscopes"; Accessories which are not restricted to use with CSOMs, e.g. sample holders
    • G02B21/0036—Scanning details, e.g. scanning stages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

Definitions

  • the present invention relates to an optical filtering device, an optical microscope and a defect observation device.
  • Defect observation devices include scanning electron microscopes (SEMs) that review and classify various defects, foreign substances, etc. (hereinafter referred to as “defects, etc.”) that occur on the surface of wafers that are semiconductor substrates in semiconductor manufacturing lines, etc. It has.
  • SEMs scanning electron microscopes
  • the defect observation device is further equipped with an optical microscope.
  • the defect observation device has a function of controlling an optical microscope, efficiently and automatically detecting defects on the wafer surface, and performing coordinate alignment. By controlling the SEM, the shape of minute defects detected by an optical microscope can be observed in detail and the components can be analyzed. It is desirable that the optical microscope can be used as a dark field optical microscope (DFOM: Dark Field Optical Microscope).
  • the defect observation device has a function of automatically outputting SEM images, classification data such as defects, elemental analysis data, etc., and can also create a defect map from the output data. Further, the defect observation device can also observe, classify, and analyze defects and the like based on the created defect map. For this reason, the defect observation device is also called a review SEM. It is also called a defect review SEM (Defect Review-SEM) or a wafer inspection SEM.
  • the optical microscope and the SEM have a common stage, and the wafer placed on this stage is observed with an optical microscope, the position of the detected defect or the like is specified, and the defect or the like is identified. It can be observed by SEM. For example, according to a defect map having an accuracy of several tens of ⁇ m, a defect or the like can be searched for in a range of several hundred nm using a dark field microscope of a defect observation device, and the position of the defect or the like can be identified with an accuracy of several ⁇ m or less. can.
  • Patent Document 1 in a defect observation device including a first imaging unit (optical microscope) and a second imaging unit (SEM), the next imaging of the first imaging unit from among a plurality of imaging means of the first imaging unit is described. Defects detected by the first imaging unit by setting the imaging conditions of the means or the second imaging unit, setting the integrated frame number, acceleration voltage, probe current, imaging magnification or imaging field as the imaging conditions of the second imaging unit. A coordinate correction formula is calculated based on the position information of the above and the information obtained by image acquisition by the first imaging unit, and a defect is imaged using the second imaging unit based on the corrected position information. There is.
  • Patent Document 2 describes holes that are arranged two-dimensionally on an SOI wafer, a shutter pattern that is an optically opaque thin film that covers the holes and is arranged two-dimensionally on an SOI wafer, and is formed on an SOI wafer.
  • An optical filtering device comprising a shutter array with an insulator is disclosed.
  • SOI is an abbreviation for Silicon on Insulator
  • the SOI wafer has a structure in which an oxide insulating film (BOX layer: Burid Oxide layer) and a surface Si film (SOI portion) are formed on a Si substrate. It is a thing.
  • a pupil filter according to the type of defect or the like is required, and a minute shutter having a dimension of 1 mm or less corresponding to various types of defects or the like is required. It is considered that various spatial filters can be formed by opening and closing such a shutter.
  • defects and wafer roughness which is detection noise, are discriminated by utilizing the spatial characteristics and polarization characteristics of various defect scattered lights on the pupil surface.
  • the possibilities were increased by spatial filters and polarizing filters.
  • the shape of the spatial filter that is advantageous for detection differs depending on the type of defect, etc.
  • multiple types of spatial filter and filter switching mechanism are required to improve the detection sensitivity of multiple types of defects. This is because the opening / closing location of the shutter can be selected by using the filter switching mechanism, and a plurality of types of spatial filters can be configured.
  • An object of the present invention is to prevent fatigue destruction of the shutter of a shutter array device (optical filtering device) used in an optical microscope, which is a component of a defect observation device, and to prolong the life of the shutter array device.
  • the optical filtering device of the present invention includes a shutter having a shaft portion and a structure that can be opened and closed, and a substrate having a shutter opening, and has a configuration in which a voltage is applied between the shutter and the substrate.
  • a shutter having a shaft portion and a structure that can be opened and closed
  • a substrate having a shutter opening
  • the present invention it is possible to prevent fatigue destruction of the shutter of the optical filtering device used in the optical microscope, which is a component of the defect observation device, and extend the life of the shutter array device.
  • FIG. 3A is a schematic enlarged view showing a state in which the shutters constituting the shutter array device of FIG. 3A are closed except for a part.
  • FIG. 3 is a schematic enlarged view showing a state in which all the shutters constituting the shutter array device of FIG. 3A are closed.
  • It is a figure which shows the spatial filter corresponding to the state of the shutter array device of FIG. 3A.
  • FIG. 4A is a cross-sectional view taken along the line BB of FIG. 4A.
  • FIG. 4A is a cross-sectional view taken along the line AA of FIG. 4A. It is a top view of the rack of FIG. 4A.
  • FIG. It is a top view which shows the shutter array of Example 4.
  • FIG. It is sectional drawing which shows the shutter array of Example 5.
  • FIG. 1 is a schematic configuration diagram showing a defect observation device.
  • the defect observation device 10 includes a scanning electron microscope 1002 (SEM), an optical microscope 1003 (defect detection unit), a control unit 1006, a terminal 1007, a recording device 1008, and a network 1009. ing.
  • the scanning electron microscope 1002 is installed in the vacuum chamber 1005 together with the stage 1004. Wafer 1001 is placed on the stage 1004. Wafer 1001 can be moved with a stage 1004 that is movable about the X and Y axes. This makes it possible to observe an arbitrary surface of the wafer 1001 with a scanning electron microscope 1002 and an optical microscope 1003.
  • the optical microscope 1003 includes a laser light source 1010, an objective lens 1013, an imaging lens 1015, and an imaging element 1016.
  • the objective lens 1013 is installed in the vacuum chamber 1005. Therefore, the vacuum sealing window 1014 is provided so that the light that has passed through the objective lens 1013 reaches the image sensor 1016.
  • a microlens array 1103, a shutter array device 1101 and a microlens array 1102 are installed between the vacuum sealing window 1014 and the imaging lens 1015 in this order from the vacuum sealing window 1014 side.
  • the light beam emitted from the laser light source 1010 passes through the vacuum sealing window 1011 and is configured to irradiate the upper surface of the wafer 1001 through the mirror 1012.
  • the light reflected on the upper surface of the wafer 1001 passes through the objective lens 1013 and the vacuum sealing window 1014 in order, passes through the microlens array 1103, the shutter array device 1101 and the microlens array 1102 in order, and is imaged by the imaging lens 1015. Then, it is detected by the image pickup element 1016.
  • the image sensor 1016 a two-dimensional CCD sensor, a line CCD sensor, a TDI sensor group in which a plurality of TDIs are arranged in parallel, a photodiode array, and the like are used.
  • CCD is an abbreviation for Charge-Coupled Device.
  • TDI is an abbreviation for Time Delay Integration.
  • the scanning electron microscope 1002 and the optical microscope 1003 are fixed so as to maintain an accurate distance.
  • the control unit 1006 includes a stage control circuit 1018, an SEM imaging system control circuit 1019, an image processing circuit 1020, an external input / output interface 1021, a central processing unit 1022 (CPU), and a memory 1023.
  • the stage control circuit 1018, the SEM imaging system control circuit 1019, and the image processing circuit 1020 are connected to the external input / output interface 1021, the central calculation unit 1022, and the memory 1023 via the bus 1024.
  • the stage control circuit 1018, the SEM imaging system control circuit 1019, and the image processing circuit 1020 are circuits for moving the wafer 1001, observing defects on the surface of the wafer 1001, and other operations.
  • the image processing circuit 1020 integrates the signals of the image acquired by the image sensor 1016, performs data conversion and the like, discriminates the type of defects and the like, and identifies the positions and dimensions thereof. Information on the results of discrimination, identification, etc. will be referred to as "defect information" in the present specification.
  • the defect information is input to the recording device 1008 or the memory 1023.
  • the memory 1023 is mainly used for temporary storage.
  • the recording device 1008 can be used to store and store the acquired defect information.
  • the stage control circuit 1018 controls the stage 1004 and the SEM imaging system control circuit 1019 controls the scanning electron microscope 1002 based on the defect information. Then, the control unit 1006 observes some or all of the defects detected by the optical microscope 1003 in detail, classifies the defects and the like, analyzes the cause of the defects, and the like. Further, the control unit 1006 also controls the focus and output of the SEM image, controls the analysis, analyzes the data obtained by the scanning electron microscope 1002, and corrects the positions of defects and the like obtained by the optical microscope 1003. Further, the control unit 1006 can also perform display on the terminal 1007, data transfer via the network 1009, and the like.
  • the terminal 1007 conditions for observing defects and the like are set. Further, in the terminal 1007, parameters for controlling the scanning electron microscope 1002, the optical microscope 1003, and the stage 1004 are set. Further, in the terminal 1007, settings related to the opening / closing operation of the shutter (described later) of the shutter array device 1101 are also made. Further, in the terminal 1007, the angle (opening angle) when the shutter is opened can be adjusted to an appropriate value. In this case, a method of adjusting the voltage applied to the shutter array device 1101 may be adopted while checking the image obtained by the image sensor 1016 into a pupil image on the terminal 1007. As a result, it is possible to prevent failures such as adhesion to the substrate and damage to the shaft portion of the shutter caused by excessive opening of the shutter.
  • a force acts as an elastic body that tries to return to the closed state against the stress in the open state of the shutter.
  • the opening angle is determined by the balance between this force and the electrostatic force for opening the shutter generated by applying the voltage. Therefore, the opening angle can be adjusted by adjusting the above voltage.
  • the upper limit of the shutter opening angle is determined by the above voltage.
  • FIG. 2 is a schematic configuration diagram showing an optical microscope which is a defect detection unit of a defect observation device.
  • the optical microscope 20 includes an image sensor 100 (sensor), an imaging lens 101, and an objective lens 102.
  • Microlens arrays 106 and 107 are installed between the imaging lens 101 and the objective lens 102.
  • a shutter array device 200 (optical filtering device) is installed between the microlens arrays 106 and 107.
  • the microlens arrays 106, 107 and the shutter array device 200 are installed near the pupil surface of the optical microscope 20.
  • the objective lens 102 is configured such that the light beam 300 radiated from the laser light source 103 to the wafer 104 is reflected on the surface of the wafer 104 and the reflected light 301 is incident on the wafer 104.
  • the light that has passed through the objective lens 102 passes through the pupil surface (Fourier transform surface) and the imaging lens 101, reaches the image pickup element 100, and is detected as an electrical signal.
  • the light beam 300 emitted from the laser light source 103 passes through the vacuum sealing window 351 and is reflected by the mirror 352 to irradiate the wafer 104.
  • the defect 108 When the defect 108 is present on the wafer 104, the light ray 300 that hits the defect 108 is reflected, and a reflected light 301 different from the usual one is generated.
  • the reflected light 301 can be detected by the image pickup device 100, and the data corresponding to the image of the defect 108 can be acquired by the image processing circuit 1020 of FIG. By moving the stage 105, the defect 108 existing on the surface of the wafer 104 can be found.
  • FIG. 3A is a schematic enlarged view showing a shutter array device and a microlens array.
  • the shutter array device 200 is installed between the microlens arrays 106 and 107. All shutters 220 of the shutter array device 200 are open. Therefore, the reflected light 302 passing through the shutter array device 200 converges and focuses at the shutter opening 304 to become the light 303.
  • FIG. 3B shows a state in which a part of the shutter 220 other than the shutter 220 is closed. Further, FIG. 3C shows a state in which all shutters 210 are closed. As described above, the plurality of shutters 210 and 220 have a configuration in which each of the shutters 210 and 220 can be opened and closed independently.
  • 3D, 3E and 3F show spatial filters corresponding to the states shown in FIGS. 3A, 3B and 3C, respectively.
  • 3D, 3E and 3F are views viewed from above or below the shutter 220.
  • the shutter closed state 211 is shown in black, and the shutter open state 221 is shown in white.
  • a plurality of types of spatial filters can be configured by individually ON / OFF controlling each pixel of the shutter array device 200.
  • the shutters 210 and 220 of the shutter array device 200 and the lenses of the microlens arrays 106 and 107 are arranged in 3 rows and 3 columns, but this is an example and is necessary. Depending on the situation, a larger matrix may be formed.
  • FIG. 4A is a perspective view showing the shutter array device of the first embodiment.
  • the shutter array device 200 shown in this figure has a shutter array 205, an electrode array 206, and a rack 260 (pedestal).
  • the shutter array 205 and the electrode array 206 have a substrate 201 and are fixed to the rack 260.
  • the shutter array 205 and the electrode array 206 each have a rectangular parallelepiped shape, and are installed on a slope having a concavo-convex structure provided on the rack 260.
  • the shutter array 205 and the electrode array 206 are installed on the slope of the rack 260.
  • the shutter array 205 and the electrode array 206 are configured to be inclined with respect to the bottom surface of the rack 260.
  • the substrate 201 is divided by the substrate division slit 202.
  • the shutter array 205 and the electrode array 206 are adhesively fixed on the adhesive surface 250 with a conductive adhesive to ensure electrical continuity.
  • the shutter array 205 and the electrode array 206 are adhesively fixed to the rack wiring 261 provided on the rack 260 and the adhesive surface 251 with a conductive adhesive, respectively, to ensure electrical continuity.
  • a conductive adhesive film, solder, or the like may be used, or a metal bond or the like using Au-Au, Cu-Cu, Cu-Sn, or the like may be used.
  • shutters 212 (opening and closing plates) are arranged in a matrix of 3 rows and 3 columns, and 3 electrode arrays 206 are arranged on both sides thereof, but the present invention is limited thereto.
  • the shutter 212 may be arranged in a matrix of 30 rows and 30 columns together with a large number of electrode arrays 206.
  • a plurality of shutters 212 are arranged so as to be adjacent to each other.
  • the shutter array 205 and the electrode array 206 have a rectangular parallelepiped shape in which one dimension (length, width, height, respectively) is approximately 1 mm ⁇ 3 mm ⁇ 1 mm.
  • FIG. 4B shows one shutter array
  • the shutter array 205 has an insulating layer 270 provided between one shutter support portion 203 in which three shutters 212 are arranged in a row, three substrates 201, and the shutter support portions 203 and the substrate 201. And have.
  • Substrate dividing slits 202a and 202b are provided between adjacent substrates 201.
  • the substrate 201 is divided by the substrate dividing slits 202a and 202b.
  • the insulating layer 270 is integrated in the same manner as the shutter support portion 203.
  • the insulating layer 270 insulates the shutter support portion 203 and the substrate 201 so that different voltages can be applied to each of them.
  • the shutter 212, the shutter support portion 203, and the substrate 201 are made of silicon (Si).
  • the insulating layer 270 is made of silica (SiO 2 ).
  • FIG. 4C shows one electrode array
  • the electrode array 206 has three electrode plates 207 that do not have a shutter and three substrates 201.
  • Substrate dividing slits 202a and 202b are provided between adjacent substrates 201.
  • the substrate 201 is divided by the substrate dividing slits 202a and 202b.
  • the electrode plate 207 is also divided by slits 204a and 204b.
  • the electrode array 206 is not provided with an insulating layer.
  • the substrate 201 and the electrode plate 207 are electrically connected to each other.
  • the substrate 201 and the electrode plate 207 are divided into three by the substrate dividing slits 202a and 202b and the slits 204a and 204b, and different voltages can be applied to these three.
  • the adjacent substrates 201 are connected with an insulating adhesive.
  • the electrode plate 207 can be used as a terminal for connecting the substrate 201 and the outside.
  • a wire 240 is connected to the end of the shutter support portion 203.
  • a wire 241 is connected to the electrode plate 207.
  • the wires 240 and 241 are fixed by wire bonding or the like. As a result, the voltage can be set to ON or OFF and applied for the opening / closing operation of the shutter 212.
  • FIG. 5 shows a BB cross section of FIG. 4A.
  • the rack 260 is provided with a plurality of rack openings 263 perpendicular to the bottom surface of the rack 260. Then, the shutter array 205 is installed so that the shutter opening 264 communicates with each rack opening 263. The shutter opening 264 is provided perpendicular to the upper surface of the shutter support 203.
  • the width of the rack opening 263 is 700 ⁇ m.
  • the width of the rack opening 263 is preferably 100 to 1000 ⁇ m.
  • the shutter 212 is parallel to the upper surface of the shutter support portion 203 in the closed state (shutter closed 223).
  • the shutter angle 280 opening angle
  • a rack insulating layer 262 is provided on the upper surface of the rack 260, and rack wiring 261 is formed on the surface of the rack insulating layer 262.
  • the rack wiring 261 and the rack insulating layer 262 are also provided between the shutter array 205 and the rack 260 and between the electrode array 206 and the rack 260.
  • the electrical connection between the rack wiring 261 and the substrate 201 is made via a substrate bottom surface 232 and a substrate side surface 233 using a conductive adhesive.
  • the rack 260 has a rack wiring 261 that is electrically connected to the substrate 201.
  • the lower end portion of the shutter 212 having an opening angle of less than 90 degrees and the inner wall surface of the substrate 201 facing the upper surface (right side surface in the drawing) of the shutter 212.
  • the distance between them is the smallest at the shutter opening 264.
  • the shaft portion of the shutter 212 protrudes above the rack opening 263.
  • the inner wall surface of the substrate 201 on the shaft portion side of the shutter 212 partially covers the rack opening 263.
  • the distance between the surface extending the upper surface of the shutter 212 downward and the lower end of the inner wall surface of the substrate 201 facing the upper surface of the shutter 212 is determined. It is smaller than the width of the rack opening 263 and the shutter opening 264. That is, the effective aperture ratio of the shutter array 205 is low.
  • the effective opening ratio is defined as a ratio (percentage) calculated with the width of the shutter opening 264 as the denominator and the above minimum distance as the numerator.
  • the light passing through the rack opening 263 and the shutter opening 264 is adjusted so as to converge to the above minimum distance or less and focus in a region where the width of the rack opening 263 or the shutter opening 264 is small.
  • the angle at which the light converges is such that the reflected light 302 and the light 303 do not collide with the inner wall surface of the substrate 201 and the shutter 212.
  • the inclination of the substrate 201 is small, that is, the inclination of the shutter opening 264 with respect to the rack opening 263 is small.
  • the shutter angle 280 is preferably in the range of 85 degrees to 60 degrees, more preferably in the range of 80 degrees to 60 degrees, and particularly preferably in the range of 75 degrees to 60 degrees.
  • the meaning of the lower limit value "60 degrees" in the above range is an effective aperture ratio in a configuration in which the inclination of the substrate 201 is 0 degrees, that is, in a configuration in which the inner wall surfaces of the rack opening 263 and the shutter opening 264 are parallel.
  • the value is 50% or more.
  • the effective opening ratio is less than 50%, it is desirable from the viewpoint that the degree of convergence of light passing through the rack opening 263 and the shutter opening 264 becomes a problem, and the distance between adjacent shutter openings 264 becomes large. No.
  • the upper limit of the shutter angle 280 can be a value obtained by subtracting the inclination of the substrate 201 from 90 degrees.
  • FIG. 6 shows the AA cross section of FIG. 4A.
  • FIG. 6 shows the states of the shutter open 213 and the shutter closed 223.
  • FIG. 7 is a top view of the rack 260 of FIG. 4A.
  • the rack wiring 261 is formed so as to electrically connect the upper surface edges of the rack openings 263 adjacent to each other in the lateral direction in the drawing, including the slope of the uneven structure provided on the rack 260. ..
  • An insulating portion 265 is provided between the adjacent rack wirings 261 in parallel with the rack wirings 261 so as not to be electrically conductive.
  • FIG. 8 is a cross-sectional view showing the shutter array device of the second embodiment.
  • the height of the substrate 201 is lower than that in the first embodiment shown in FIG.
  • Other configurations are the same as in FIG.
  • the length of the shutter opening 264 bent with respect to the rack opening 263 is shortened, and the opening area through which the optical axis passes at the shutter opening 213 can be widened. .. Further, even if the opening angle of the shutter 212 is further reduced, the opening area can be secured.
  • the electrode array 206 is formed by forming the rack wiring 261 so as to form an appropriate circuit and connecting wiring such as a wire to the shutter support portion 203 in order to change the potentials of the shutter support portion 203 and the shutter 212. Can be omitted.
  • FIG. 9 is a cross-sectional view showing the shutter array device of the third embodiment.
  • the height of the substrate 201 is lowered as in the second embodiment shown in FIG.
  • the ends of adjacent shutter arrays 205 are arranged so as to overlap each other.
  • the substrate 201 of the shutter array 205 is arranged so as to partially cover the upper part of the shutter support portion 203 of the adjacent shutter array 205.
  • a gap 290 is provided in a portion where the substrate 201 and the shutter support portion 203 overlap.
  • the electrode array 206 is also arranged so as to overlap in the same manner. Since the gap 290 is provided, the substrate 201 and the lower shutter support portion 203 are not in contact with each other. As a result, insulation can be ensured and short circuits can be prevented. Instead of providing the gap 290, an insulating material may be sandwiched.
  • the distance between adjacent shutter openings 264 can be set narrow.
  • the degree of integration of the shutter array 205 can be increased, and the pattern of the spatial filter can also be increased.
  • FIG. 10A shows a shutter array of a comparative example.
  • the shutter 212 shown in this figure is in a state of being opened too much and is in close contact with the inner wall surface 282 of the substrate 201. In this case, there is a concern that the attached shutter 212 will not be separated from the inner wall surface 282 and the opening / closing function cannot be obtained.
  • FIG. 10B shows the shutter array of Example 4.
  • the convex portion 281 is provided on the inner wall surface 282 of the substrate 201 so that the contact of the shutter 212 becomes a part. As a result, the shutter 212 can be prevented from being fixed in the open state. Further, the convex portion 281 sets an upper limit value of the opening angle of the shutter 212.
  • FIG. 5 and the like show a configuration in which the upper surface of the shutter array intersects the optical axis diagonally when the shutter 212 is closed
  • the upper surface of the shutter array is formed.
  • the shutter 212 may be configured to intersect with the optical axis substantially perpendicularly.
  • FIG. 10C is a top view of the shutter array of this embodiment.
  • Two convex portions 281 shown in this figure are provided in the vertical direction so as to support the shutter 212 with a small area when the shutter is opened 213.
  • FIG. 11 shows the shutter array of Example 5.
  • a convex portion 283 is provided on a part of the lower surface of the shutter 212. This prevents the shutter 212 from adhering to the substrate 201 and getting stuck when the shutter 212 is opened too much.
  • FIG. 12A shows the shutter array of Example 6.
  • the shutter opening 264 of the substrate 201 is tilted with respect to the bottom surface of the shutter support 203.
  • FIG. 12B shows a state in which the shutter array of this embodiment is installed in a rack.
  • the inner wall surface of the rack opening 263 is the shutter opening when the shutter array 205 is installed in the rack 260 at a predetermined angle. It is substantially parallel to the inner wall surface of 264. In other words, the rack opening 263 and the shutter opening 264 communicate with each other substantially in parallel. As a result, the rack opening 263 and the shutter opening 264 can be arranged substantially parallel to the optical axis.
  • the shutter 212 is the inner wall surface of the shutter opening 264 even when the opening angle of the shutter 212 is maximized.
  • the convex portion 281 of FIG. 10B or the convex portion 283 of FIG. 11 is provided, the convex portion 281 of FIG.
  • the spot diameter focused on each shutter 212 by the microlens array can be increased, and the design margin of the microlens can be increased. This also contributes to cost reduction of the microlens.
  • the shutter array of this embodiment can be formed by tilting the substrate 201 and setting it in the dry etching apparatus when the silicon of the substrate 201 is etched and removed by using the dry etching apparatus.
  • FIG. 13 is a top view showing the details of the shutter array of the seventh embodiment.
  • the shutter 2001 that opens and closes is supported by the shutter support portion 2002 that constitutes the same plane via the twist rod 284 (shaft portion).
  • the shutter 2001 is connected near the center of the torsion bar 284.
  • a slit 2003 is provided between the shutter 2001 and the shutter support portion 2002.
  • a slit 2004 is provided between the shutter support portion 2002 and the twist rod 284.
  • the twist rod 284 has a linear central axis and a square cross section, a rectangular shape, a circular shape, an elliptical shape, or the like. Mechanically, a circular shape is desirable, but from the viewpoint of ease of manufacture, a square shape or a rectangular shape is preferable.
  • the shutter 2001 When the shutter 2001 is opened, a torsional stress is generated on the torsion rod 284.
  • an electrostatic force accompanying the application of a voltage acts, the shutter 2001 opens, so that a torsional stress is generated.
  • the electrostatic force disappears, the shutter 2001 closes, and the torsional stress disappears.
  • the torsion rod 284 functions as a torsion rod spring (elastic body).
  • the shutter 2001 has a single door structure with a twist rod 284 as a shaft.
  • the opening angle of the shutter 2001 is preferably smaller than 90 degrees in consideration of fatigue fracture of the torsion rod 284 and its surroundings.
  • FIG. 14 is a top view showing the details of the shutter array of the eighth embodiment.
  • the shutter 2001 that opens and closes is supported by the shutter support portion 2002 that constitutes the same plane via the meander rod 285 (shaft portion).
  • a slit 2004 is provided between the shutter support portion 2002 and the meander rod 285.
  • the Mianda rod 285 has, for example, a sinusoidal shape or the like, and has a square cross section, a rectangular shape, a circular shape, an elliptical shape, or the like.
  • FIG. 15 schematically shows a cross section of the shutter array.
  • a voltage is applied to the shutter 212 so as to have a positive potential (V1) via the shutter support portion 203, and to the substrate 201 so as to have a negative potential (V2).
  • An electrostatic force is generated by the potential difference generated by this, and the shutter 212 opens.
  • the lower surface of the shutter 212 is positively charged, and the inner wall surface 282 of the substrate 201 is negatively charged. This causes the shutter 212 to rotate around the shaft, resulting in the shutter opening.
  • the applied voltage is 20 to 200V.
  • the present invention is not limited to the above example because it changes depending on the size of the shutter 212.
  • Shutter array, electrode array, rack, etc. are formed by combining surface oxidation treatment of silicon used in the semiconductor manufacturing process, photolithography, etching, vapor deposition, ion implantation, etc., and parts are assembled.
  • the shutter array device as an integral body may be manufactured.
  • 10 Defect observation device, 20: Optical microscope, 100: Imaging element, 101: Imaging lens, 102: Objective lens, 103: Laser light source, 104: Wafer, 106, 107, 1102: Microlens array, 108: Defect, 200, 1101: Shutter array device, 201: Substrate, 202, 202a, 202b: Substrate division slit, 203, 2002: Shutter support, 204a, 204b: Slit, 205: Shutter array, 206: Electrode array, 207: Electrode plate , 211: Shutter closed, 212, 220, 2001: Shutter, 221: Shutter open, 240, 241: Wire, 250, 251: Adhesive surface, 260: Rack, 261: Rack wiring, 263: Rack opening, 264 : Shutter opening, 265: Insulation, 270: Insulation layer, 281, 283: Convex, 282: Inner wall surface, 284: Twist rod, 285: Mi

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Abstract

The present invention is a light filtering device comprising a shutter (212) that has an axis part and has an openable/closable configuration, and a substrate (201) that has a shutter opening part (264), the light filtering device having a configuration wherein voltage is applied between the shutter (212) and the substrate (201), the shutter (212) rotates around the axis part and moves to the shutter opening part (264) and thus is brought into a opening state, and the opening angle (280) of the shutter is adjusted to less than 90 degrees.　Accordingly, fatigue fracture of the shutter of the light filtering device to be used for an optical microscope, which is a component of a defect observation apparatus, is prevented, and the life of a shutter array device can be prolonged.

Description

光フィルタリングデバイス、光学顕微鏡及び欠陥観察装置Optical filtering device, light microscope and defect observation device
　本発明は、光フィルタリングデバイス、光学顕微鏡及び欠陥観察装置に関する。 The present invention relates to an optical filtering device, an optical microscope and a defect observation device.
　欠陥観察装置は、半導体製造ライン等において半導体の基板であるウエハの表面に生じる各種の欠陥、異物等（以下「欠陥等」という。）のレビュー、分類等を行う走査型電子顕微鏡（ＳＥＭ）等を備えている。 Defect observation devices include scanning electron microscopes (SEMs) that review and classify various defects, foreign substances, etc. (hereinafter referred to as "defects, etc.") that occur on the surface of wafers that are semiconductor substrates in semiconductor manufacturing lines, etc. It has.
　欠陥観察装置は、光学顕微鏡を更に備えていることが望ましい。欠陥観察装置は、光学顕微鏡を制御し、ウエハ表面の欠陥等を効率よく自動的に検出し、座標アライメントを行う機能を有する。光学顕微鏡により検出した微小な欠陥等については、ＳＥＭを制御することにより、その形状を詳しく観察し、成分分析することができる。光学顕微鏡は、暗視野光学顕微鏡（ＤＦＯＭ：Ｄａｒｋ　Ｆｉｅｌｄ　Ｏｐｔｉｃａｌ　Ｍｉｃｒｏｓｃｏｐｅ）として使用可能なものが望ましい。 It is desirable that the defect observation device is further equipped with an optical microscope. The defect observation device has a function of controlling an optical microscope, efficiently and automatically detecting defects on the wafer surface, and performing coordinate alignment. By controlling the SEM, the shape of minute defects detected by an optical microscope can be observed in detail and the components can be analyzed. It is desirable that the optical microscope can be used as a dark field optical microscope (DFOM: Dark Field Optical Microscope).
　また、欠陥観察装置は、ＳＥＭ像、欠陥等の分類データ、元素分析データ等を自動的に出力する機能を有し、出力されたデータから欠陥マップを作成することもできる。さらに、欠陥観察装置は、作成した欠陥マップを元に、欠陥等の観察、分類及び分析を行うこともできる。このため、欠陥観察装置は、レビューＳＥＭとも呼ばれている。また、欠陥レビューＳＥＭ（Ｄｅｆｅｃｔ　Ｒｅｖｉｅｗ－ＳＥＭ）又はウエハ検査ＳＥＭとも呼ばれている。 In addition, the defect observation device has a function of automatically outputting SEM images, classification data such as defects, elemental analysis data, etc., and can also create a defect map from the output data. Further, the defect observation device can also observe, classify, and analyze defects and the like based on the created defect map. For this reason, the defect observation device is also called a review SEM. It is also called a defect review SEM (Defect Review-SEM) or a wafer inspection SEM.
　言い換えると、欠陥観察装置において、光学顕微鏡とＳＥＭとは共通のステージを有し、このステージに載置したウエハについて、光学顕微鏡で観察し、検出した欠陥等の位置を特定し、その欠陥等をＳＥＭにより観察することができる。例えば、数十μｍの精度を有する欠陥マップに従って、欠陥観察装置の暗視野顕微鏡を用いて数百ｎｍの範囲で欠陥等を探索し、数μｍ以下の精度で欠陥等の位置を特定することができる。 In other words, in the defect observation device, the optical microscope and the SEM have a common stage, and the wafer placed on this stage is observed with an optical microscope, the position of the detected defect or the like is specified, and the defect or the like is identified. It can be observed by SEM. For example, according to a defect map having an accuracy of several tens of μm, a defect or the like can be searched for in a range of several hundred nm using a dark field microscope of a defect observation device, and the position of the defect or the like can be identified with an accuracy of several μm or less. can.
　これにより、光学顕微鏡とＳＥＭとの座標系の乖離を補正し、欠陥観察の成功率を向上させ、高いスループットを維持することができる。また、半導体デバイスの製造工程において、配線の絶縁不良や短絡等の不良の原因になる欠陥等を早期に検出し、その発生源を突き止め、歩留まり低下を防ぐことができる。 This makes it possible to correct the deviation of the coordinate system between the optical microscope and the SEM, improve the success rate of defect observation, and maintain high throughput. Further, in the manufacturing process of a semiconductor device, it is possible to detect a defect that causes a defect such as a wiring insulation defect or a short circuit at an early stage, identify the source thereof, and prevent a decrease in yield.
　特許文献１には、第一撮像部（光学顕微鏡）及び第二撮像部（ＳＥＭ）を備えた欠陥観察装置において、第一撮像部の複数の撮像手段の中から第一撮像部の次の撮像手段又は第二撮像部の撮像条件を設定し、第二撮像部の撮像条件として、積算フレーム枚数、加速電圧、プローブ電流、撮像倍率又は撮像視野を設定し、第一撮像部によって検出された欠陥の位置情報と第一撮像部による画像取得により得られた情報に基づいて座標補正式を算出し、補正された位置情報に基づいて第二撮像部を用いて欠陥を撮像するものが開示されている。 In Patent Document 1, in a defect observation device including a first imaging unit (optical microscope) and a second imaging unit (SEM), the next imaging of the first imaging unit from among a plurality of imaging means of the first imaging unit is described. Defects detected by the first imaging unit by setting the imaging conditions of the means or the second imaging unit, setting the integrated frame number, acceleration voltage, probe current, imaging magnification or imaging field as the imaging conditions of the second imaging unit. A coordinate correction formula is calculated based on the position information of the above and the information obtained by image acquisition by the first imaging unit, and a defect is imaged using the second imaging unit based on the corrected position information. There is.
　特許文献２には、ＳＯＩウェハに２次元状に配列する孔部と、孔部を覆う光学的に不透明な薄膜であってＳＯＩウェハ上に２次元状に配列したシャッタパターンと、ＳＯＩウェハに形成された動作電極と、を有するシャッタアレイを備えた、光学フィルタリングデバイスが開示されている。ここで、ＳＯＩは、Ｓｉｌｉｃｏｎ　ｏｎ　Ｉｎｓｕｌａｔｏｒの略称であり、ＳＯＩウェハは、Ｓｉ基板の上に、酸化絶縁膜（ＢＯＸ層：Ｂｕｒｉｅｄ　Ｏｘｉｄｅ 層）、表面Ｓｉ膜（ＳＯＩ部）が形成された構造を有するものである。 Patent Document 2 describes holes that are arranged two-dimensionally on an SOI wafer, a shutter pattern that is an optically opaque thin film that covers the holes and is arranged two-dimensionally on an SOI wafer, and is formed on an SOI wafer. An optical filtering device comprising a shutter array with an insulator is disclosed. Here, SOI is an abbreviation for Silicon on Insulator, and the SOI wafer has a structure in which an oxide insulating film (BOX layer: Burid Oxide layer) and a surface Si film (SOI portion) are formed on a Si substrate. It is a thing.
特開２０１９－１３２６３７号公報Japanese Unexamined Patent Publication No. 2019-132637 特許第５８６７７３６号公報Japanese Patent No. 5867736
　暗視野顕微鏡においては、欠陥等の種類に応じた瞳フィルタが必要であり、多種類の欠陥等に対応する１ｍｍ以下の寸法を有する微小なシャッタが求められている。このようなシャッタを開閉させることにより、多様な空間フィルタを形成することができると考えられる。 In a dark-field microscope, a pupil filter according to the type of defect or the like is required, and a minute shutter having a dimension of 1 mm or less corresponding to various types of defects or the like is required. It is considered that various spatial filters can be formed by opening and closing such a shutter.
　このようなシャッタを使わない従来の暗視野光学系による欠陥検出においては、各種の欠陥散乱光の瞳面における空間特性及び偏光特性を利用して、欠陥と、検出ノイズとなるウエハラフネスとの判別可能性を空間フィルタ及び偏光フィルタにより高めていた。 In defect detection using a conventional dark-field optical system that does not use such a shutter, defects and wafer roughness, which is detection noise, are discriminated by utilizing the spatial characteristics and polarization characteristics of various defect scattered lights on the pupil surface. The possibilities were increased by spatial filters and polarizing filters.
　欠陥等の種類によって検出に有利な空間フィルタの形状が異なるため、複数種の欠陥の検出感度向上のためには、複数種の空間フィルタとフィルタ切り替え機構とが必要である。フィルタ切り替え機構を用いることにより、シャッタの開閉箇所を選択することができ、複数種の空間フィルタを構成することができるからである。 Since the shape of the spatial filter that is advantageous for detection differs depending on the type of defect, etc., multiple types of spatial filter and filter switching mechanism are required to improve the detection sensitivity of multiple types of defects. This is because the opening / closing location of the shutter can be selected by using the filter switching mechanism, and a plurality of types of spatial filters can be configured.
　シャッタの開閉動作の際には、弾性変形する軸部であるサスペンション部に発生する変形量が大きくなる。このため、開閉動作の繰り返しにより、シャッタの軸部及びその周辺部における疲労破壊が発生しやすくなり、シャッタの寿命の短くなることが懸念される。 When the shutter is opened and closed, the amount of deformation generated in the suspension portion, which is the shaft portion that elastically deforms, increases. Therefore, repeated opening and closing operations are likely to cause fatigue failure in the shaft portion of the shutter and its peripheral portion, and there is a concern that the life of the shutter may be shortened.
　本発明は、欠陥観察装置の構成要素である光学顕微鏡に用いるシャッタアレイデバイス（光フィルタリングデバイス）のシャッタの疲労破壊を防止し、シャッタアレイデバイスの寿命を長くすることを目的とする。 An object of the present invention is to prevent fatigue destruction of the shutter of a shutter array device (optical filtering device) used in an optical microscope, which is a component of a defect observation device, and to prolong the life of the shutter array device.
　本発明の光フィルタリングデバイスは、軸部を有し開閉可能な構成を有するシャッタと、シャッタ開口部を有する基板と、を備え、シャッタと基板との間に電圧を印加する構成を有し、シャッタは、軸部の周りに回転しシャッタ開口部に移動することにより開状態となる構成を有し、シャッタの開き角は、９０度未満に調整される構成を有する。 The optical filtering device of the present invention includes a shutter having a shaft portion and a structure that can be opened and closed, and a substrate having a shutter opening, and has a configuration in which a voltage is applied between the shutter and the substrate. Has a configuration in which it is opened by rotating around a shaft portion and moving to a shutter opening, and has a configuration in which the opening angle of the shutter is adjusted to less than 90 degrees.
　本発明によれば、欠陥観察装置の構成要素である光学顕微鏡に用いる光フィルタリングデバイスのシャッタの疲労破壊を防止し、シャッタアレイデバイスの寿命を長くすることができる。 According to the present invention, it is possible to prevent fatigue destruction of the shutter of the optical filtering device used in the optical microscope, which is a component of the defect observation device, and extend the life of the shutter array device.
実施形態に係る欠陥観察装置を示す模式構成図である。It is a schematic block diagram which shows the defect observation apparatus which concerns on embodiment. 図１の欠陥観察装置の欠陥検出部である光学顕微鏡を示す模式構成図である。It is a schematic block diagram which shows the optical microscope which is the defect detection part of the defect observation apparatus of FIG. シャッタアレイデバイス及びマイクロレンズアレイを示す模式拡大図である。It is a schematic enlarged view which shows the shutter array device and the microlens array. 図３Ａのシャッタアレイデバイスを構成するシャッタが一部を除き閉じた状態を示す模式拡大図である。FIG. 3A is a schematic enlarged view showing a state in which the shutters constituting the shutter array device of FIG. 3A are closed except for a part. 図３Ａのシャッタアレイデバイスを構成するシャッタの全てが閉じた状態を示す模式拡大図である。FIG. 3 is a schematic enlarged view showing a state in which all the shutters constituting the shutter array device of FIG. 3A are closed. 図３Ａのシャッタアレイデバイスの状態に対応する空間フィルタを示す図である。It is a figure which shows the spatial filter corresponding to the state of the shutter array device of FIG. 3A. 図３Ｂのシャッタアレイデバイスの状態に対応する空間フィルタを示す図である。It is a figure which shows the spatial filter corresponding to the state of the shutter array device of FIG. 3B. 図３Ｃのシャッタアレイデバイスの状態に対応する空間フィルタを示す図である。It is a figure which shows the spatial filter corresponding to the state of the shutter array device of FIG. 3C. 実施例１のシャッタアレイデバイスを示す斜視図である。It is a perspective view which shows the shutter array device of Example 1. FIG. １個のシャッタアレイを示す斜視図である。It is a perspective view which shows one shutter array. １個の電極アレイを示す斜視図である。It is a perspective view which shows one electrode array. 図４ＡのＢ－Ｂ断面図である。FIG. 4A is a cross-sectional view taken along the line BB of FIG. 4A. 図４ＡのＡ－Ａ断面図である。FIG. 4A is a cross-sectional view taken along the line AA of FIG. 4A. 図４Ａのラックの上面図である。It is a top view of the rack of FIG. 4A. 実施例２のシャッタアレイデバイスを示す断面図である。It is sectional drawing which shows the shutter array device of Example 2. FIG. 実施例３のシャッタアレイデバイスを示す断面図である。It is sectional drawing which shows the shutter array device of Example 3. FIG. 比較例のシャッタアレイを示す断面図である。It is sectional drawing which shows the shutter array of the comparative example. 実施例４のシャッタアレイを示す断面図である。It is sectional drawing which shows the shutter array of Example 4. FIG. 実施例４のシャッタアレイを示す上面図である。It is a top view which shows the shutter array of Example 4. FIG. 実施例５のシャッタアレイを示す断面図である。It is sectional drawing which shows the shutter array of Example 5. 実施例６のシャッタアレイを示す断面図である。It is sectional drawing which shows the shutter array of Example 6. 実施例６のシャッタアレイをラックに設置した状態を示す断面図である。It is sectional drawing which shows the state which installed the shutter array of Example 6 in a rack. 実施例７のシャッタアレイの詳細を示す上面図である。It is a top view which shows the detail of the shutter array of Example 7. 実施例８のシャッタアレイの詳細を示す上面図である。It is a top view which shows the detail of the shutter array of Example 8. 一実施形態のシャッタアレイを示す模式断面図である。It is a schematic cross-sectional view which shows the shutter array of one Embodiment.
　図１は、欠陥観察装置を示す模式構成図である。 FIG. 1 is a schematic configuration diagram showing a defect observation device.
　本図において、欠陥観察装置１０は、走査型電子顕微鏡１００２（ＳＥＭ）と、光学顕微鏡１００３（欠陥検出部）と、制御部１００６と、端末１００７と、記録装置１００８と、ネットワーク１００９と、を備えている。 In this figure, the defect observation device 10 includes a scanning electron microscope 1002 (SEM), an optical microscope 1003 (defect detection unit), a control unit 1006, a terminal 1007, a recording device 1008, and a network 1009. ing.
　走査型電子顕微鏡１００２は、ステージ１００４とともに、真空槽１００５に設置されている。ステージ１００４には、ウエハ１００１が載置されるようになっている。ウエハ１００１は、Ｘ軸及びＹ軸について移動可能なステージ１００４とともに移動させることができる。これにより、ウエハ１００１の任意の表面について、走査型電子顕微鏡１００２及び光学顕微鏡１００３による観察が可能となっている。 The scanning electron microscope 1002 is installed in the vacuum chamber 1005 together with the stage 1004. Wafer 1001 is placed on the stage 1004. Wafer 1001 can be moved with a stage 1004 that is movable about the X and Y axes. This makes it possible to observe an arbitrary surface of the wafer 1001 with a scanning electron microscope 1002 and an optical microscope 1003.
　光学顕微鏡１００３は、レーザー光源１０１０と、対物レンズ１０１３と、結像レンズ１０１５と、撮像素子１０１６と、を備えている。対物レンズ１０１３は、真空槽１００５に設置されている。このため、対物レンズ１０１３を通過した光が撮像素子１０１６に到達するように、真空封止窓１０１４が設けられている。真空封止窓１０１４と結像レンズ１０１５との間には、真空封止窓１０１４側から順に、マイクロレンズアレイ１１０３、シャッタアレイデバイス１１０１及びマイクロレンズアレイ１１０２が設置されている。レーザー光源１０１０から照射された光線は、真空封止窓１０１１を通過し、ミラー１０１２を介してウエハ１００１の上面に照射されるように構成されている。 The optical microscope 1003 includes a laser light source 1010, an objective lens 1013, an imaging lens 1015, and an imaging element 1016. The objective lens 1013 is installed in the vacuum chamber 1005. Therefore, the vacuum sealing window 1014 is provided so that the light that has passed through the objective lens 1013 reaches the image sensor 1016. A microlens array 1103, a shutter array device 1101 and a microlens array 1102 are installed between the vacuum sealing window 1014 and the imaging lens 1015 in this order from the vacuum sealing window 1014 side. The light beam emitted from the laser light source 1010 passes through the vacuum sealing window 1011 and is configured to irradiate the upper surface of the wafer 1001 through the mirror 1012.
　ウエハ１００１の上面で反射した光は、対物レンズ１０１３及び真空封止窓１０１４を順に通過し、マイクロレンズアレイ１１０３、シャッタアレイデバイス１１０１及びマイクロレンズアレイ１１０２を順に通過し、結像レンズ１０１５で結像されて、撮像素子１０１６により検出される。撮像素子１０１６としては、２次元ＣＣＤセンサ、ラインＣＣＤセンサ、複数のＴＤＩを平行に配置したＴＤＩセンサ群、フォトダイオードアレイ等が用いられる。ここで、ＣＣＤは、Charge-Coupled Deviceの略称である。また、ＴＤＩは、Time Delay Integrationの略称である。 The light reflected on the upper surface of the wafer 1001 passes through the objective lens 1013 and the vacuum sealing window 1014 in order, passes through the microlens array 1103, the shutter array device 1101 and the microlens array 1102 in order, and is imaged by the imaging lens 1015. Then, it is detected by the image pickup element 1016. As the image sensor 1016, a two-dimensional CCD sensor, a line CCD sensor, a TDI sensor group in which a plurality of TDIs are arranged in parallel, a photodiode array, and the like are used. Here, CCD is an abbreviation for Charge-Coupled Device. TDI is an abbreviation for Time Delay Integration.
　走査型電子顕微鏡１００２と光学顕微鏡１００３とは、正確な距離を保つように固定されている。 The scanning electron microscope 1002 and the optical microscope 1003 are fixed so as to maintain an accurate distance.
　制御部１００６は、ステージ制御回路１０１８と、ＳＥＭ撮像系制御回路１０１９と、画像処理回路１０２０と、外部入出力インターフェース１０２１と、中央演算部１０２２（ＣＰＵ）と、メモリ１０２３と、を有する。ステージ制御回路１０１８、ＳＥＭ撮像系制御回路１０１９及び画像処理回路１０２０は、バス１０２４を介して、外部入出力インターフェース１０２１、中央演算部１０２２及びメモリ１０２３と接続されている。ステージ制御回路１０１８、ＳＥＭ撮像系制御回路１０１９及び画像処理回路１０２０は、ウエハ１００１の移動、ウエハ１００１の表面の欠陥等の観察その他の操作をするための回路である。画像処理回路１０２０は、撮像素子１０１６で取得した画像の信号を積算し、データ変換等を行って、欠陥等の種類の判別、その位置及び寸法の特定等を行う。判別、特定等の結果に関する情報は、本明細書においては「欠陥情報」と呼ぶことにする。 The control unit 1006 includes a stage control circuit 1018, an SEM imaging system control circuit 1019, an image processing circuit 1020, an external input / output interface 1021, a central processing unit 1022 (CPU), and a memory 1023. The stage control circuit 1018, the SEM imaging system control circuit 1019, and the image processing circuit 1020 are connected to the external input / output interface 1021, the central calculation unit 1022, and the memory 1023 via the bus 1024. The stage control circuit 1018, the SEM imaging system control circuit 1019, and the image processing circuit 1020 are circuits for moving the wafer 1001, observing defects on the surface of the wafer 1001, and other operations. The image processing circuit 1020 integrates the signals of the image acquired by the image sensor 1016, performs data conversion and the like, discriminates the type of defects and the like, and identifies the positions and dimensions thereof. Information on the results of discrimination, identification, etc. will be referred to as "defect information" in the present specification.
　欠陥情報は、記録装置１００８又はメモリ１０２３に入力される。メモリ１０２３は、主として、一時的な保存に用いられる。一方、記録装置１００８は、取得された欠陥情報を蓄積し保管するために用いることができる。 The defect information is input to the recording device 1008 or the memory 1023. The memory 1023 is mainly used for temporary storage. On the other hand, the recording device 1008 can be used to store and store the acquired defect information.
　制御部１００６においては、欠陥情報に基づいて、ステージ制御回路１０１８がステージ１００４を、ＳＥＭ撮像系制御回路１０１９が走査型電子顕微鏡１００２を制御する。そして、制御部１００６においては、光学顕微鏡１００３により検出された欠陥等のいくつか又は全てを詳細に観察し、欠陥等の分類、その発生原因の分析等を行う。また、制御部１００６においては、ＳＥＭ像の焦点や出力の制御、分析の制御、走査型電子顕微鏡１００２で得られたデータの解析、光学顕微鏡１００３で得られた欠陥等の位置補正等も行う。さらに、制御部１００６においては、端末１００７への表示、ネットワーク１００９経由のデータ転送等も行うことができる。 In the control unit 1006, the stage control circuit 1018 controls the stage 1004 and the SEM imaging system control circuit 1019 controls the scanning electron microscope 1002 based on the defect information. Then, the control unit 1006 observes some or all of the defects detected by the optical microscope 1003 in detail, classifies the defects and the like, analyzes the cause of the defects, and the like. Further, the control unit 1006 also controls the focus and output of the SEM image, controls the analysis, analyzes the data obtained by the scanning electron microscope 1002, and corrects the positions of defects and the like obtained by the optical microscope 1003. Further, the control unit 1006 can also perform display on the terminal 1007, data transfer via the network 1009, and the like.
　端末１００７においては、欠陥等の観察に関する条件設定を行う。また、端末１００７においては、走査型電子顕微鏡１００２、光学顕微鏡１００３及びステージ１００４を制御するためのパラメータ設定を行う。また、端末１００７においては、シャッタアレイデバイス１１０１のシャッタ（後述）の開閉動作に関する設定も行う。さらに、端末１００７においては、シャッタ開のときの角度（開き角）を適正な値に調整することもできるようになっている。この場合においては、撮像素子１０１６で得られた画像から瞳像に変換した画像を端末１００７で確認しながら、シャッタアレイデバイス１１０１に印加する電圧の調整を行う方法を採用してもよい。これにより、シャッタの開き過ぎにより生じる基板への付着、シャッタの軸部の破損等の故障を防止することができる。 In the terminal 1007, conditions for observing defects and the like are set. Further, in the terminal 1007, parameters for controlling the scanning electron microscope 1002, the optical microscope 1003, and the stage 1004 are set. Further, in the terminal 1007, settings related to the opening / closing operation of the shutter (described later) of the shutter array device 1101 are also made. Further, in the terminal 1007, the angle (opening angle) when the shutter is opened can be adjusted to an appropriate value. In this case, a method of adjusting the voltage applied to the shutter array device 1101 may be adopted while checking the image obtained by the image sensor 1016 into a pupil image on the terminal 1007. As a result, it is possible to prevent failures such as adhesion to the substrate and damage to the shaft portion of the shutter caused by excessive opening of the shutter.
　シャッタの軸部においては、シャッタの開状態における応力に対抗して閉状態に戻ろうとする弾性体としての力が働く。この力と、上記の電圧印加によって発生するシャッタを開こうとする静電力との釣り合いにより、開き角が決定される。よって、上記の電圧を調整することにより、開き角を調整することができる。シャッタの開き角の上限値は、上記の電圧により定められる。 At the shaft of the shutter, a force acts as an elastic body that tries to return to the closed state against the stress in the open state of the shutter. The opening angle is determined by the balance between this force and the electrostatic force for opening the shutter generated by applying the voltage. Therefore, the opening angle can be adjusted by adjusting the above voltage. The upper limit of the shutter opening angle is determined by the above voltage.
　図２は、欠陥観察装置の欠陥検出部である光学顕微鏡を示す模式構成図である。 FIG. 2 is a schematic configuration diagram showing an optical microscope which is a defect detection unit of a defect observation device.
　本図において、光学顕微鏡２０は、撮像素子１００（センサ）と、結像レンズ１０１と、対物レンズ１０２と、を備えている。結像レンズ１０１と対物レンズ１０２との間には、マイクロレンズアレイ１０６、１０７が設置されている。マイクロレンズアレイ１０６、１０７の間には、シャッタアレイデバイス２００（光フィルタリングデバイス）が設置されている。マイクロレンズアレイ１０６、１０７及びシャッタアレイデバイス２００は、光学顕微鏡２０の瞳面の近傍に設置されている。 In this figure, the optical microscope 20 includes an image sensor 100 (sensor), an imaging lens 101, and an objective lens 102. Microlens arrays 106 and 107 are installed between the imaging lens 101 and the objective lens 102. A shutter array device 200 (optical filtering device) is installed between the microlens arrays 106 and 107. The microlens arrays 106, 107 and the shutter array device 200 are installed near the pupil surface of the optical microscope 20.
　対物レンズ１０２は、レーザー光源１０３からウエハ１０４に照射された光線３００がウエハ１０４の表面で反射し、その反射光３０１が入射するように構成されている。対物レンズ１０２を通過した光は、瞳面（フーリエ変換面）及び結像レンズ１０１を通過し、撮像素子１００に到達し、電気的な信号として検出される。なお、レーザー光源１０３から照射される光線３００は、真空封止窓３５１を透過し、ミラー３５２で反射し、ウエハ１０４に照射されるようになっている。 The objective lens 102 is configured such that the light beam 300 radiated from the laser light source 103 to the wafer 104 is reflected on the surface of the wafer 104 and the reflected light 301 is incident on the wafer 104. The light that has passed through the objective lens 102 passes through the pupil surface (Fourier transform surface) and the imaging lens 101, reaches the image pickup element 100, and is detected as an electrical signal. The light beam 300 emitted from the laser light source 103 passes through the vacuum sealing window 351 and is reflected by the mirror 352 to irradiate the wafer 104.
　ウエハ１０４に欠陥１０８が存在する場合は、欠陥１０８に当たった光線３００が反射し、通常と異なる反射光３０１が発生する。この反射光３０１を撮像素子１００により検出し、図１の画像処理回路１０２０により欠陥１０８の像に対応するデータを取得することができる。ステージ１０５を移動することにより、ウエハ１０４の表面に存在する欠陥１０８を見つけることができる。 When the defect 108 is present on the wafer 104, the light ray 300 that hits the defect 108 is reflected, and a reflected light 301 different from the usual one is generated. The reflected light 301 can be detected by the image pickup device 100, and the data corresponding to the image of the defect 108 can be acquired by the image processing circuit 1020 of FIG. By moving the stage 105, the defect 108 existing on the surface of the wafer 104 can be found.
　図３Ａは、シャッタアレイデバイス及びマイクロレンズアレイを示す模式拡大図である。 FIG. 3A is a schematic enlarged view showing a shutter array device and a microlens array.
　本図においては、マイクロレンズアレイ１０６、１０７の間にシャッタアレイデバイス２００が設置されている。シャッタアレイデバイス２００のシャッタ２２０はすべて開となっている。このため、シャッタアレイデバイス２００を通過する反射光３０２は、シャッタ開口部３０４において収束して焦点を結び、光３０３となる。 In this figure, the shutter array device 200 is installed between the microlens arrays 106 and 107. All shutters 220 of the shutter array device 200 are open. Therefore, the reflected light 302 passing through the shutter array device 200 converges and focuses at the shutter opening 304 to become the light 303.
　図３Ｂは、一部のシャッタ２２０以外が閉じた状態を示したものである。また、図３Ｃは、全てのシャッタ２１０が閉じた状態を示したものである。このように、複数個のシャッタ２１０、２２０は、それぞれが独立に開閉可能な構成を有する。 FIG. 3B shows a state in which a part of the shutter 220 other than the shutter 220 is closed. Further, FIG. 3C shows a state in which all shutters 210 are closed. As described above, the plurality of shutters 210 and 220 have a configuration in which each of the shutters 210 and 220 can be opened and closed independently.
　図３Ｄ、３Ｅ及び３Ｆはそれぞれ、図３Ａ、３Ｂ及び３Ｃに示す状態に対応する空間フィルタを示したものである。図３Ｄ、３Ｅ及び３Ｆは、シャッタ２２０の上方又は下方から見た図である。 3D, 3E and 3F show spatial filters corresponding to the states shown in FIGS. 3A, 3B and 3C, respectively. 3D, 3E and 3F are views viewed from above or below the shutter 220.
　これらの図において、シャッタ閉状態２１１は黒色で表し、シャッタ開状態２２１は白色で表している。シャッタアレイデバイス２００の画素ごとに個別にＯＮ／ＯＦＦ制御することにより、複数種の空間フィルタ（空間マスク）を構成することができる。なお、図３Ａ、３Ｂ及び３Ｃにおいては、シャッタアレイデバイス２００のシャッタ２１０、２２０及びマイクロレンズアレイ１０６、１０７のレンズは、３行３列で配置されているが、これは一例であって、必要に応じて、更に大規模なマトリクスを形成してもよい。 In these figures, the shutter closed state 211 is shown in black, and the shutter open state 221 is shown in white. A plurality of types of spatial filters (spatial masks) can be configured by individually ON / OFF controlling each pixel of the shutter array device 200. In FIGS. 3A, 3B and 3C, the shutters 210 and 220 of the shutter array device 200 and the lenses of the microlens arrays 106 and 107 are arranged in 3 rows and 3 columns, but this is an example and is necessary. Depending on the situation, a larger matrix may be formed.
　以下、図面を用いて実施例について説明する。 Hereinafter, examples will be described with reference to the drawings.
　図４Ａは、実施例１のシャッタアレイデバイスを示す斜視図である。 FIG. 4A is a perspective view showing the shutter array device of the first embodiment.
　本図に示すシャッタアレイデバイス２００は、シャッタアレイ２０５と、電極アレイ２０６と、ラック２６０（台座）と、を有している。シャッタアレイ２０５及び電極アレイ２０６は、基板２０１を有し、ラック２６０に固定されている。シャッタアレイ２０５及び電極アレイ２０６は、それぞれが直方体形状であり、ラック２６０に設けられた凹凸構造の斜面に設置されている。言い換えると、シャッタアレイ２０５及び電極アレイ２０６は、ラック２６０の斜面に設置されている。これにより、シャッタアレイ２０５及び電極アレイ２０６は、ラック２６０の底面に対して傾斜した構成となる。 The shutter array device 200 shown in this figure has a shutter array 205, an electrode array 206, and a rack 260 (pedestal). The shutter array 205 and the electrode array 206 have a substrate 201 and are fixed to the rack 260. The shutter array 205 and the electrode array 206 each have a rectangular parallelepiped shape, and are installed on a slope having a concavo-convex structure provided on the rack 260. In other words, the shutter array 205 and the electrode array 206 are installed on the slope of the rack 260. As a result, the shutter array 205 and the electrode array 206 are configured to be inclined with respect to the bottom surface of the rack 260.
　基板２０１は、基板分割スリット２０２で分割されている。 The substrate 201 is divided by the substrate division slit 202.
　シャッタアレイ２０５及び電極アレイ２０６は、接着面２５０で導電性接着剤により接着固定され、電気的導通が確保されている。シャッタアレイ２０５及び電極アレイ２０６はそれぞれ、ラック２６０及び接着面２５１に設けられたラック配線２６１に導電性接着剤で接着固定され、電気的導通が確保されている。なお、導電性接着剤の代わりに、導電性接着フィルム、はんだ等を用いてもよいし、Ａｕ－Ａｕ、Ｃｕ－Ｃｕ、Ｃｕ－Ｓｎ等を用いたメタル接合等を利用してもよい。 The shutter array 205 and the electrode array 206 are adhesively fixed on the adhesive surface 250 with a conductive adhesive to ensure electrical continuity. The shutter array 205 and the electrode array 206 are adhesively fixed to the rack wiring 261 provided on the rack 260 and the adhesive surface 251 with a conductive adhesive, respectively, to ensure electrical continuity. Instead of the conductive adhesive, a conductive adhesive film, solder, or the like may be used, or a metal bond or the like using Au-Au, Cu-Cu, Cu-Sn, or the like may be used.
　本図においては、シャッタ２１２（開閉板）が３行３列のマトリクス状に配置され、その両側にそれぞれ３個ずつの電極アレイ２０６が配置されているが、本発明は、これに限定されるものではなく、例えば、多数の電極アレイ２０６とともに、シャッタ２１２が３０行３０列のマトリクス状に配置された構成であってもよい。まとめると、シャッタ２１２は、複数個が隣り合うように配置されている。 In this figure, shutters 212 (opening and closing plates) are arranged in a matrix of 3 rows and 3 columns, and 3 electrode arrays 206 are arranged on both sides thereof, but the present invention is limited thereto. However, for example, the shutter 212 may be arranged in a matrix of 30 rows and 30 columns together with a large number of electrode arrays 206. In summary, a plurality of shutters 212 are arranged so as to be adjacent to each other.
　シャッタアレイ２０５及び電極アレイ２０６は、１個の寸法（縦、横、高さのそれぞれ）がおおよそ１ｍｍ×３ｍｍ×１ｍｍの直方体形状である。 The shutter array 205 and the electrode array 206 have a rectangular parallelepiped shape in which one dimension (length, width, height, respectively) is approximately 1 mm × 3 mm × 1 mm.
　図４Ｂは、１個のシャッタアレイを示したものである。 FIG. 4B shows one shutter array.
　本図において、シャッタアレイ２０５は、３つのシャッタ２１２が一列に配置された１つのシャッタ支持部２０３と、３つの基板２０１と、シャッタ支持部２０３と基板２０１との間に設けられた絶縁層２７０と、を有している。隣り合う基板２０１の間には、基板分割スリット２０２ａ、２０２ｂが設けられている。言い換えると、基板２０１は、基板分割スリット２０２ａ、２０２ｂで分割されている。絶縁層２７０は、シャッタ支持部２０３と同様に一体となっている。絶縁層２７０により、シャッタ支持部２０３と基板２０１とは絶縁され、それぞれに対して異なる電圧を印加することができるようなっている。 In this figure, the shutter array 205 has an insulating layer 270 provided between one shutter support portion 203 in which three shutters 212 are arranged in a row, three substrates 201, and the shutter support portions 203 and the substrate 201. And have. Substrate dividing slits 202a and 202b are provided between adjacent substrates 201. In other words, the substrate 201 is divided by the substrate dividing slits 202a and 202b. The insulating layer 270 is integrated in the same manner as the shutter support portion 203. The insulating layer 270 insulates the shutter support portion 203 and the substrate 201 so that different voltages can be applied to each of them.
　本実施例においては、シャッタ２１２、シャッタ支持部２０３及び基板２０１は、シリコン（Ｓｉ）で形成されている。一方、絶縁層２７０は、シリカ（ＳｉＯ２）で形成されている。 In this embodiment, the shutter 212, the shutter support portion 203, and the substrate 201 are made of silicon (Si). On the other hand, the insulating layer 270 is made of silica (SiO 2 ).
　図４Ｃは、１個の電極アレイを示したものである。 FIG. 4C shows one electrode array.
　本図に示すように、電極アレイ２０６は、シャッタを有していない３つの電極板２０７と、３つの基板２０１と、を有している。隣り合う基板２０１の間には、基板分割スリット２０２ａ、２０２ｂが設けられている。言い換えると、基板２０１は、基板分割スリット２０２ａ、２０２ｂで分割されている。電極板２０７も、スリット２０４ａ、２０４ｂで分割されている。電極アレイ２０６には、絶縁層が設けられていない。基板２０１と電極板２０７とは、電気的に接続された構成となっている。すなわち、基板２０１及び電極板２０７は、基板分割スリット２０２ａ、２０２ｂ及びスリット２０４ａ、２０４ｂにより３つに分割され、これらの３つに対して異なる電圧を印加することができるようなっている。なお、隣接する基板２０１は、絶縁性の接着剤で連接されている。これにより、電極板２０７が基板２０１と外部とを接続するための端子として用いることができるようになっている。 As shown in this figure, the electrode array 206 has three electrode plates 207 that do not have a shutter and three substrates 201. Substrate dividing slits 202a and 202b are provided between adjacent substrates 201. In other words, the substrate 201 is divided by the substrate dividing slits 202a and 202b. The electrode plate 207 is also divided by slits 204a and 204b. The electrode array 206 is not provided with an insulating layer. The substrate 201 and the electrode plate 207 are electrically connected to each other. That is, the substrate 201 and the electrode plate 207 are divided into three by the substrate dividing slits 202a and 202b and the slits 204a and 204b, and different voltages can be applied to these three. The adjacent substrates 201 are connected with an insulating adhesive. As a result, the electrode plate 207 can be used as a terminal for connecting the substrate 201 and the outside.
　図４Ａに示すように、シャッタ支持部２０３の端部には、ワイヤ２４０が接続されている。また、電極板２０７には、ワイヤ２４１が接続されている。ワイヤ２４０、２４１は、ワイヤボンディング等により固定されている。これにより、シャッタ２１２の開閉動作のために電圧をＯＮ又はＯＦＦに設定して印加することができる。 As shown in FIG. 4A, a wire 240 is connected to the end of the shutter support portion 203. A wire 241 is connected to the electrode plate 207. The wires 240 and 241 are fixed by wire bonding or the like. As a result, the voltage can be set to ON or OFF and applied for the opening / closing operation of the shutter 212.
　図５は、図４ＡのＢ－Ｂ断面を示したものである。 FIG. 5 shows a BB cross section of FIG. 4A.
　図５において、ラック２６０には、ラック２６０の底面に垂直なラック開口部２６３が複数設けられている。そして、それぞれのラック開口部２６３にシャッタ開口部２６４が連通するように、シャッタアレイ２０５が設置されている。シャッタ開口部２６４は、シャッタ支持部２０３の上面に対して垂直に設けられている。 In FIG. 5, the rack 260 is provided with a plurality of rack openings 263 perpendicular to the bottom surface of the rack 260. Then, the shutter array 205 is installed so that the shutter opening 264 communicates with each rack opening 263. The shutter opening 264 is provided perpendicular to the upper surface of the shutter support 203.
　本実施例においては、ラック開口部２６３の幅は、７００μｍとした。ラック開口部２６３の幅は、１００～１０００μｍが望ましい。 In this embodiment, the width of the rack opening 263 is 700 μm. The width of the rack opening 263 is preferably 100 to 1000 μm.
　シャッタ２１２は、閉じている状態（シャッタ閉２２３）では、シャッタ支持部２０３の上面に平行となっている。一方、シャッタ２１２が開いた状態（シャッタ開２１３）では、シャッタ角度２８０（開き角）が９０度よりも小さくなっている。 The shutter 212 is parallel to the upper surface of the shutter support portion 203 in the closed state (shutter closed 223). On the other hand, when the shutter 212 is open (shutter open 213), the shutter angle 280 (opening angle) is smaller than 90 degrees.
　ラック２６０の上面には、ラック絶縁層２６２が設けられ、ラック絶縁層２６２の表面にラック配線２６１が形成されている。ラック配線２６１及びラック絶縁層２６２は、シャッタアレイ２０５とラック２６０との間及び電極アレイ２０６とラック２６０との間にも設けられている。ラック配線２６１と基板２０１との電気的接続は、導電性接着剤を用いて、基板底面２３２及び基板側面２３３を介してなされている。言い換えると、ラック２６０は、基板２０１と電気的に接続するラック配線２６１を有する。 A rack insulating layer 262 is provided on the upper surface of the rack 260, and rack wiring 261 is formed on the surface of the rack insulating layer 262. The rack wiring 261 and the rack insulating layer 262 are also provided between the shutter array 205 and the rack 260 and between the electrode array 206 and the rack 260. The electrical connection between the rack wiring 261 and the substrate 201 is made via a substrate bottom surface 232 and a substrate side surface 233 using a conductive adhesive. In other words, the rack 260 has a rack wiring 261 that is electrically connected to the substrate 201.
　これにより、それぞれの基板２０１に電圧を印加することができるようになっている。また、ラック２６０とラック配線２６１との間にラック絶縁層２６２を設けているため、隣り合うラック配線２６１の間で導通が生じることを防止することができる。 This makes it possible to apply a voltage to each substrate 201. Further, since the rack insulating layer 262 is provided between the rack 260 and the rack wiring 261, it is possible to prevent conduction from occurring between the adjacent rack wirings 261.
　本図に示すように、シャッタ開２１３の状態においては、開き角が９０度未満のシャッタ２１２の下端部と、シャッタ２１２の上面（図中右側の面）に対向する基板２０１の内壁面との間の距離が、シャッタ開口部２６４において最も小さくなっている。 As shown in this figure, in the state where the shutter is open 213, the lower end portion of the shutter 212 having an opening angle of less than 90 degrees and the inner wall surface of the substrate 201 facing the upper surface (right side surface in the drawing) of the shutter 212. The distance between them is the smallest at the shutter opening 264.
　さらに、シャッタアレイ２０５の基板２０１が傾きを有するため、シャッタ２１２の軸部がラック開口部２６３の上方にせり出している。言い換えると、シャッタ２１２の軸部側の基板２０１の内壁面がラック開口部２６３を部分的に覆う構成をなっている。そして、シャッタ２１２の上面を下方に延長した面と、シャッタ２１２の上面に対向する基板２０１の内壁面の下端部との間の距離（シャッタ２１２と基板２０１の内壁面との最小距離）が、ラック開口部２６３及びシャッタ開口部２６４の幅に比べて小さくなっている。すなわち、シャッタアレイ２０５の有効開口率が低くなっている。ここで、有効開口率は、シャッタ開口部２６４の幅を分母とし、上記の最小距離を分子として算出した割合（百分率）と定義する。 Further, since the substrate 201 of the shutter array 205 has an inclination, the shaft portion of the shutter 212 protrudes above the rack opening 263. In other words, the inner wall surface of the substrate 201 on the shaft portion side of the shutter 212 partially covers the rack opening 263. Then, the distance between the surface extending the upper surface of the shutter 212 downward and the lower end of the inner wall surface of the substrate 201 facing the upper surface of the shutter 212 (minimum distance between the shutter 212 and the inner wall surface of the substrate 201) is determined. It is smaller than the width of the rack opening 263 and the shutter opening 264. That is, the effective aperture ratio of the shutter array 205 is low. Here, the effective opening ratio is defined as a ratio (percentage) calculated with the width of the shutter opening 264 as the denominator and the above minimum distance as the numerator.
　よって、ラック開口部２６３及びシャッタ開口部２６４を通過する光は、上記の最小距離以下に収束して、ラック開口部２６３又はシャッタ開口部２６４の幅が小さい領域で焦点を結ぶように調整されることが望ましい。光が収束する際の角度（図３Ａの反射光３０２及び光３０３の縦断面における角度）は、反射光３０２及び光３０３が基板２０１の内壁面及びシャッタ２１２に衝突しない角度とすることが望ましい。 Therefore, the light passing through the rack opening 263 and the shutter opening 264 is adjusted so as to converge to the above minimum distance or less and focus in a region where the width of the rack opening 263 or the shutter opening 264 is small. Is desirable. It is desirable that the angle at which the light converges (the angle in the vertical cross section of the reflected light 302 and the light 303 in FIG. 3A) is such that the reflected light 302 and the light 303 do not collide with the inner wall surface of the substrate 201 and the shutter 212.
　したがって、有効開口率の観点からは、基板２０１の傾きが小さいこと、すなわち、シャッタ開口部２６４のラック開口部２６３に対する傾きが小さいことが望ましい。 Therefore, from the viewpoint of the effective opening ratio, it is desirable that the inclination of the substrate 201 is small, that is, the inclination of the shutter opening 264 with respect to the rack opening 263 is small.
　一方、シャッタ２１２の軸部における応力の低減の観点からは、シャッタ角度２８０が小さくなるように調整することが望ましい。 On the other hand, from the viewpoint of reducing stress at the shaft portion of the shutter 212, it is desirable to adjust the shutter angle 280 so as to be small.
　上記の２つの観点から、シャッタ角度２８０は、８５度から６０度までの範囲が望ましく、８０度から６０度までの範囲が更に望ましく、７５度から６０度までの範囲が特に望ましい。ここで、上記の範囲における下限値「６０度」の意味は、基板２０１の傾きを０度とした構成、すなわちラック開口部２６３及びシャッタ開口部２６４の内壁面を平行とした構成において有効開口率が５０％以上であることが望ましいことに対応している。有効開口率が５０％未満となると、ラック開口部２６３及びシャッタ開口部２６４を通過する光の収束の程度が問題となること、隣り合うシャッタ開口部２６４の間隔が大きくなること等の観点から望ましくない。 From the above two viewpoints, the shutter angle 280 is preferably in the range of 85 degrees to 60 degrees, more preferably in the range of 80 degrees to 60 degrees, and particularly preferably in the range of 75 degrees to 60 degrees. Here, the meaning of the lower limit value "60 degrees" in the above range is an effective aperture ratio in a configuration in which the inclination of the substrate 201 is 0 degrees, that is, in a configuration in which the inner wall surfaces of the rack opening 263 and the shutter opening 264 are parallel. Corresponds to the fact that it is desirable that the value is 50% or more. When the effective opening ratio is less than 50%, it is desirable from the viewpoint that the degree of convergence of light passing through the rack opening 263 and the shutter opening 264 becomes a problem, and the distance between adjacent shutter openings 264 becomes large. No.
　なお、図５に示すように、シャッタ角度２８０は、シャッタ２１２の上面がラック開口部２６３の内壁面に平行となれば十分であり、それよりも大きくする必要はない。よって、シャッタ角度２８０は、９０度から基板２０１の傾きを引いた値を上限値とすることができる。 As shown in FIG. 5, it is sufficient that the upper surface of the shutter 212 is parallel to the inner wall surface of the rack opening 263, and the shutter angle 280 does not need to be larger than that. Therefore, the upper limit of the shutter angle 280 can be a value obtained by subtracting the inclination of the substrate 201 from 90 degrees.
　図６は、図４ＡのＡ－Ａ断面を示したものである。 FIG. 6 shows the AA cross section of FIG. 4A.
　図６においては、シャッタ開２１３及びシャッタ閉２２３の状態を示している。 FIG. 6 shows the states of the shutter open 213 and the shutter closed 223.
　図７は、図４Ａのラック２６０の上面図である。 FIG. 7 is a top view of the rack 260 of FIG. 4A.
　本図においては、ラック２６０に設けられた凹凸構造の斜面を含め、図中横方向に隣り合うラック開口部２６３の上面縁部を電気的に接続するように、ラック配線２６１が形成されている。隣り合うラック配線２６１に間には、ラック配線２６１に平行に絶縁部２６５が設けられ、電気的に導通しないように構成されている。 In this figure, the rack wiring 261 is formed so as to electrically connect the upper surface edges of the rack openings 263 adjacent to each other in the lateral direction in the drawing, including the slope of the uneven structure provided on the rack 260. .. An insulating portion 265 is provided between the adjacent rack wirings 261 in parallel with the rack wirings 261 so as not to be electrically conductive.
　図８は、実施例２のシャッタアレイデバイスを示す断面図である。 FIG. 8 is a cross-sectional view showing the shutter array device of the second embodiment.
　本図に示すシャッタアレイデバイス２００においては、図５に示す実施例１よりも、基板２０１の高さを低くしている。この他の構成は、図５と同様である。 In the shutter array device 200 shown in this figure, the height of the substrate 201 is lower than that in the first embodiment shown in FIG. Other configurations are the same as in FIG.
　基板２０１の高さを低くした構成により、ラック開口部２６３に対して屈曲しているシャッタ開口部２６４の長さが短くなり、シャッタ開２１３において光軸が通過する開口面積を広くすることができる。また、シャッタ２１２の開き角を更に小さくしても、開口面積を確保することができる。 Due to the configuration in which the height of the substrate 201 is lowered, the length of the shutter opening 264 bent with respect to the rack opening 263 is shortened, and the opening area through which the optical axis passes at the shutter opening 213 can be widened. .. Further, even if the opening angle of the shutter 212 is further reduced, the opening area can be secured.
　なお、ラック配線２６１を適切な回路となるように形成し、かつ、シャッタ支持部２０３及びシャッタ２１２の電位を変化させるためにワイヤ等の配線をシャッタ支持部２０３に接続することにより、電極アレイ２０６を省略することは可能である。 The electrode array 206 is formed by forming the rack wiring 261 so as to form an appropriate circuit and connecting wiring such as a wire to the shutter support portion 203 in order to change the potentials of the shutter support portion 203 and the shutter 212. Can be omitted.
　図９は、実施例３のシャッタアレイデバイスを示す断面図である。 FIG. 9 is a cross-sectional view showing the shutter array device of the third embodiment.
　本図に示すシャッタアレイデバイス２００においては、図８に示す実施例２と同様に、基板２０１の高さを低くしている。 In the shutter array device 200 shown in this figure, the height of the substrate 201 is lowered as in the second embodiment shown in FIG.
　本図においては、隣り合うシャッタアレイ２０５の端部が重なるように配置されている。言い換えると、シャッタアレイ２０５の基板２０１が隣のシャッタアレイ２０５のシャッタ支持部２０３の上方を部分的に覆うように配置されている。基板２０１とシャッタ支持部２０３とが重なる部分には、隙間２９０が設けられている。電極アレイ２０６も、同様に重なるように配置している。隙間２９０が設けられているため、基板２０１と下方のシャッタ支持部２０３とは接触しない構成となっている。これにより、絶縁を確保し、ショートを防止することができる。なお、隙間２９０を設ける代わりに、絶縁材料を挟み込んでもよい。 In this figure, the ends of adjacent shutter arrays 205 are arranged so as to overlap each other. In other words, the substrate 201 of the shutter array 205 is arranged so as to partially cover the upper part of the shutter support portion 203 of the adjacent shutter array 205. A gap 290 is provided in a portion where the substrate 201 and the shutter support portion 203 overlap. The electrode array 206 is also arranged so as to overlap in the same manner. Since the gap 290 is provided, the substrate 201 and the lower shutter support portion 203 are not in contact with each other. As a result, insulation can be ensured and short circuits can be prevented. Instead of providing the gap 290, an insulating material may be sandwiched.
　以上の構成により、隣り合うシャッタ開口部２６４の間隔を狭く設定することができる。その結果、シャッタアレイ２０５の集積度を高めることができ、空間フィルタのパターンも増やすことが可能となる。 With the above configuration, the distance between adjacent shutter openings 264 can be set narrow. As a result, the degree of integration of the shutter array 205 can be increased, and the pattern of the spatial filter can also be increased.
　（比較例）
　図１０Ａは、比較例のシャッタアレイを示したものである。 (Comparison example)
FIG. 10A shows a shutter array of a comparative example.
　本図に示すシャッタ２１２は、開き過ぎた状態であり、基板２０１の内壁面２８２に密着している。この場合、付着したシャッタ２１２が内壁面２８２から離脱しなくなり、開閉機能が得られなくなる懸念がある。 The shutter 212 shown in this figure is in a state of being opened too much and is in close contact with the inner wall surface 282 of the substrate 201. In this case, there is a concern that the attached shutter 212 will not be separated from the inner wall surface 282 and the opening / closing function cannot be obtained.
　図１０Ｂは、実施例４のシャッタアレイを示したものである。 FIG. 10B shows the shutter array of Example 4.
　本図においては、基板２０１の内壁面２８２に凸部２８１を設けることにより、シャッタ２１２の接触が一部分となるようにしている。これにより、シャッタ２１２が開いた状態で固定されないようにすることができる。また、凸部２８１により、シャッタ２１２の開き角の上限値が設定されている。 In this figure, the convex portion 281 is provided on the inner wall surface 282 of the substrate 201 so that the contact of the shutter 212 becomes a part. As a result, the shutter 212 can be prevented from being fixed in the open state. Further, the convex portion 281 sets an upper limit value of the opening angle of the shutter 212.
　なお、図５等においては、シャッタアレイの上面が、シャッタ２１２の閉状態では光軸と斜めに交わる構成を示しているが、本発明は、図１０Ｂに示すように、シャッタアレイの上面が、シャッタ２１２の閉状態では光軸と略垂直に交わる構成としてもよい。 Although FIG. 5 and the like show a configuration in which the upper surface of the shutter array intersects the optical axis diagonally when the shutter 212 is closed, in the present invention, as shown in FIG. 10B, the upper surface of the shutter array is formed. In the closed state of the shutter 212, the shutter 212 may be configured to intersect with the optical axis substantially perpendicularly.
　図１０Ｃは、本実施例のシャッタアレイを上面から見た図である。 FIG. 10C is a top view of the shutter array of this embodiment.
　本図に示す凸部２８１は、鉛直方向に２本設けられ、シャッタ開２１３においてシャッタ２１２を小さい面積で支持するようになっている。これにより、過剰な電圧によるシャッタ２１２の開き過ぎ、装置のステージのトラブルによる衝撃や振動、地震等による振動その他の異常事態が発生し、シャッタ２１２の開き角が設定範囲を超えても、シャッタ２１２が基板２０１に付着して動かなくなることを防止し、長期の信頼性を確保することができる。 Two convex portions 281 shown in this figure are provided in the vertical direction so as to support the shutter 212 with a small area when the shutter is opened 213. As a result, even if the shutter 212 opens too much due to excessive voltage, shocks and vibrations due to equipment stage troubles, vibrations due to earthquakes, and other abnormal situations occur, and the opening angle of the shutter 212 exceeds the set range, the shutter 212 Can be prevented from adhering to the substrate 201 and becoming immobile, and long-term reliability can be ensured.
　図１１は、実施例５のシャッタアレイを示したものである。 FIG. 11 shows the shutter array of Example 5.
　本図においては、シャッタ２１２の下面の一部に凸部２８３を設けている。これにより、シャッタ２１２が開き過ぎた場合に、シャッタ２１２が基板２０１に付着して動かなくなることを防止する。 In this figure, a convex portion 283 is provided on a part of the lower surface of the shutter 212. This prevents the shutter 212 from adhering to the substrate 201 and getting stuck when the shutter 212 is opened too much.
　図１２Ａは、実施例６のシャッタアレイを示したものである。 FIG. 12A shows the shutter array of Example 6.
　本図においては、シャッタ支持部２０３の底面に対して基板２０１のシャッタ開口部２６４を傾けて形成している。 In this figure, the shutter opening 264 of the substrate 201 is tilted with respect to the bottom surface of the shutter support 203.
　図１２Ｂは、本実施例のシャッタアレイをラックに設置した状態を示したものである。 FIG. 12B shows a state in which the shutter array of this embodiment is installed in a rack.
　本図に示すように、基板２０１のシャッタ開口部２６４は、傾斜した形状を有するため、シャッタアレイ２０５をラック２６０に所定の角度で設置した状態では、ラック開口部２６３の内壁面がシャッタ開口部２６４の内壁面と略平行になっている。言い換えると、ラック開口部２６３とシャッタ開口部２６４とが略平行に連通している。これにより、ラック開口部２６３及びシャッタ開口部２６４を光軸に対して略平行に配置することができる。 As shown in this figure, since the shutter opening 264 of the substrate 201 has an inclined shape, the inner wall surface of the rack opening 263 is the shutter opening when the shutter array 205 is installed in the rack 260 at a predetermined angle. It is substantially parallel to the inner wall surface of 264. In other words, the rack opening 263 and the shutter opening 264 communicate with each other substantially in parallel. As a result, the rack opening 263 and the shutter opening 264 can be arranged substantially parallel to the optical axis.
　これにより、光軸を基準として、基板２０１の内壁面がラック開口部２６３を覆うような構造になることを避けることができ、シャッタアレイ２０５の有効開口率を向上させることができる。また、シャッタ２１２の開き角を小さくすることができる。 As a result, it is possible to prevent the inner wall surface of the substrate 201 from covering the rack opening 263 with reference to the optical axis, and it is possible to improve the effective aperture ratio of the shutter array 205. Further, the opening angle of the shutter 212 can be reduced.
　本実施例においては、シャッタ開口部２６４の内壁面とシャッタ支持部２０３の内壁面とが平行でないため、シャッタ２１２の開き角が最大となった状態においてもシャッタ２１２がシャッタ開口部２６４の内壁面に密着することはないと考えられるが、図１０Ｂの凸部２８１又は図１１の凸部２８３を設けて、密着を確実に防止する構成としてもよい。 In this embodiment, since the inner wall surface of the shutter opening 264 and the inner wall surface of the shutter support 203 are not parallel, the shutter 212 is the inner wall surface of the shutter opening 264 even when the opening angle of the shutter 212 is maximized. Although it is considered that the convex portion 281 of FIG. 10B or the convex portion 283 of FIG. 11 is provided, the convex portion 281 of FIG.
　本実施例の構成により、マイクロレンズアレイによりそれぞれのシャッタ２１２に集光されるスポット径を大きくすることができ、マイクロレンズの設計裕度を高めることができる。また、このことは、マイクロレンズのコスト削減にも寄与する。 With the configuration of this embodiment, the spot diameter focused on each shutter 212 by the microlens array can be increased, and the design margin of the microlens can be increased. This also contributes to cost reduction of the microlens.
　なお、本実施例のシャッタアレイは、ドライエッチング装置を用いて基板２０１のシリコンをエッチング除去する際に、基板２０１を傾けてドライエッチング装置にセットすることにより形成することができる。 The shutter array of this embodiment can be formed by tilting the substrate 201 and setting it in the dry etching apparatus when the silicon of the substrate 201 is etched and removed by using the dry etching apparatus.
　図１３は、実施例７のシャッタアレイの詳細を示す上面図である。 FIG. 13 is a top view showing the details of the shutter array of the seventh embodiment.
　本図において、開閉動作をするシャッタ２００１は、同一平面を構成するシャッタ支持部２００２にねじり棒２８４（軸部）を介して支持されている。シャッタ２００１は、ねじり棒２８４の中央部付近で接続されている。シャッタ２００１とシャッタ支持部２００２との間には、スリット２００３が設けられている。また、シャッタ支持部２００２とねじり棒２８４との間には、スリット２００４が設けられている。 In this figure, the shutter 2001 that opens and closes is supported by the shutter support portion 2002 that constitutes the same plane via the twist rod 284 (shaft portion). The shutter 2001 is connected near the center of the torsion bar 284. A slit 2003 is provided between the shutter 2001 and the shutter support portion 2002. Further, a slit 2004 is provided between the shutter support portion 2002 and the twist rod 284.
　ねじり棒２８４は、中心軸が直線状であり、断面が正方形状、長方形状、円形状、楕円形状等である。力学的には円形状が望ましいが、製造の容易さの観点からは正方形状又は長方形状が望ましい。 The twist rod 284 has a linear central axis and a square cross section, a rectangular shape, a circular shape, an elliptical shape, or the like. Mechanically, a circular shape is desirable, but from the viewpoint of ease of manufacture, a square shape or a rectangular shape is preferable.
　シャッタ２００１が開く際には、ねじり棒２８４にねじり応力が生じる。電圧の印加に伴う静電力が作用すると、シャッタ２００１が開くため、ねじり応力が生じる。電圧の印加を停止すると、静電力がなくなり、シャッタ２００１が閉じ、ねじり応力がなくなる。このように、ねじり棒２８４は、ねじり棒ばね（弾性体）として機能する。 When the shutter 2001 is opened, a torsional stress is generated on the torsion rod 284. When an electrostatic force accompanying the application of a voltage acts, the shutter 2001 opens, so that a torsional stress is generated. When the application of the voltage is stopped, the electrostatic force disappears, the shutter 2001 closes, and the torsional stress disappears. In this way, the torsion rod 284 functions as a torsion rod spring (elastic body).
　まとめると、本図に示すように、シャッタ２００１は、ねじり棒２８４を軸部とする片開き扉の構造を有する。 In summary, as shown in this figure, the shutter 2001 has a single door structure with a twist rod 284 as a shaft.
　シャッタ２００１の開き角が９０度になると、ねじり応力が最大となる。このため、ねじり棒２８４及びその周辺の疲労破壊等を考慮すると、シャッタ２００１の開き角は、９０度よりも小さいことが望ましい。 When the opening angle of the shutter 2001 reaches 90 degrees, the torsional stress becomes maximum. Therefore, the opening angle of the shutter 2001 is preferably smaller than 90 degrees in consideration of fatigue fracture of the torsion rod 284 and its surroundings.
　図１４は、実施例８のシャッタアレイの詳細を示す上面図である。 FIG. 14 is a top view showing the details of the shutter array of the eighth embodiment.
　本図において、開閉動作をするシャッタ２００１は、同一平面を構成するシャッタ支持部２００２にミアンダ棒２８５（軸部）を介して支持されている。シャッタ支持部２００２とミアンダ棒２８５との間には、スリット２００４が設けられている。ミアンダ棒２８５は、例えば、正弦波形状等であり、断面が正方形状、長方形状、円形状、楕円形状等である。 In this figure, the shutter 2001 that opens and closes is supported by the shutter support portion 2002 that constitutes the same plane via the meander rod 285 (shaft portion). A slit 2004 is provided between the shutter support portion 2002 and the meander rod 285. The Mianda rod 285 has, for example, a sinusoidal shape or the like, and has a square cross section, a rectangular shape, a circular shape, an elliptical shape, or the like.
　シャッタ２００１が開く際には、シャッタ２００１の回転軸方向（軸部の長手方向）に対して交差するミアンダ棒２８５の屈曲部が伸びる方向に応力が生じる。 When the shutter 2001 is opened, stress is generated in the direction in which the bent portion of the meander rod 285 that intersects the rotation axis direction (longitudinal direction of the shaft portion) of the shutter 2001 extends.
　この構成により、図１３のねじり棒２８４を用いる場合に比べて、局所的な応力が低減され、シャッタアレイとしての信頼性を向上させることができる。 With this configuration, local stress can be reduced and the reliability of the shutter array can be improved as compared with the case of using the torsion rod 284 of FIG.
　つぎに、シャッタの駆動方式について説明する。 Next, the shutter drive method will be described.
　図１５は、シャッタアレイの断面を模式的に示したものである。 FIG. 15 schematically shows a cross section of the shutter array.
　本図において、シャッタ２１２にはシャッタ支持部２０３を介して正の電位（Ｖ１）となるように、基板２０１には負の電位（Ｖ２）となるように、電圧が印加される。これにより生じる電位差により静電力が生じ、シャッタ２１２が開く。 In this figure, a voltage is applied to the shutter 212 so as to have a positive potential (V1) via the shutter support portion 203, and to the substrate 201 so as to have a negative potential (V2). An electrostatic force is generated by the potential difference generated by this, and the shutter 212 opens.
　本図に示すように、シャッタ２１２の下面が正に帯電し、基板２０１の内壁面２８２が負に帯電する。これにより、シャッタ２１２が軸部の周りに回転し、その結果としてシャッタ開となる。 As shown in this figure, the lower surface of the shutter 212 is positively charged, and the inner wall surface 282 of the substrate 201 is negatively charged. This causes the shutter 212 to rotate around the shaft, resulting in the shutter opening.
　電圧の印加を停止すると、軸部の復元力により、シャッタ閉の状態に戻る。 When the application of voltage is stopped, the shutter is returned to the closed state due to the restoring force of the shaft.
　例えば、Ｖ１が正の電位として＋１０～１００Ｖ、Ｖ２が負の電位として－１０～－１００Ｖとなるようにする場合、印加する電圧は、２０～２００Ｖである。ただし、シャッタ２１２の大きさによっても変わるものであり、本発明が上記の例に限定されるものではない。 For example, when V1 has a positive potential of +10 to 100V and V2 has a negative potential of -10 to -100V, the applied voltage is 20 to 200V. However, the present invention is not limited to the above example because it changes depending on the size of the shutter 212.
　なお、上述の実施例においては、シャッタアレイ、電極アレイ、ラック等の部品を組み立てることにより作製したシャッタアレイデバイスを示しているが、本発明は、このような実施例に限定されるものではなく、シャッタアレイ、電極アレイ、ラック等に該当する部分を、半導体製造工程で用いられるシリコンの表面酸化処理、フォトリソグラフィ、エッチング、蒸着、イオン注入等を組み合わせることにより形成し、部品の組み立てをすることなく、一体物としてのシャッタアレイデバイスを作製してもよい。 Although the above-described embodiment shows a shutter array device manufactured by assembling parts such as a shutter array, an electrode array, and a rack, the present invention is not limited to such an embodiment. , Shutter array, electrode array, rack, etc. are formed by combining surface oxidation treatment of silicon used in the semiconductor manufacturing process, photolithography, etching, vapor deposition, ion implantation, etc., and parts are assembled. Instead, the shutter array device as an integral body may be manufactured.
　１０：欠陥観察装置、２０：光学顕微鏡、１００：撮像素子、１０１：結像レンズ、１０２：対物レンズ、１０３：レーザー光源、１０４：ウエハ、１０６、１０７、１１０２：マイクロレンズアレイ、１０８：欠陥、２００、１１０１：シャッタアレイデバイス、２０１：基板、２０２、２０２ａ、２０２ｂ：基板分割スリット、２０３、２００２：シャッタ支持部、２０４ａ、２０４ｂ：スリット、２０５：シャッタアレイ、２０６：電極アレイ、２０７：電極板、２１１：シャッタ閉状態、２１２、２２０、２００１：シャッタ、２２１：シャッタ開状態、２４０、２４１：ワイヤ、２５０、２５１：接着面、２６０：ラック、２６１：ラック配線、２６３：ラック開口部、２６４：シャッタ開口部、２６５：絶縁部、２７０：絶縁層、２８１、２８３：凸部、２８２：内壁面、２８４：ねじり棒、２８５：ミアンダ棒、２９０：隙間、３０３：光、３０４：シャッタ開口部、３００：光線、３０１、３０２：反射光、３５１：真空封止窓、３５２：ミラー、１００１：ウエハ、１００２：走査型電子顕微鏡、１００３：光学顕微鏡、１００４：ステージ、１００５：真空槽、１００６：制御部、１００７：端末、１００８：記録装置、１００９：ネットワーク、１０１０：レーザー光源、１０１３：対物レンズ、１０１５：結像レンズ、１０１６：撮像素子、１０１８：ステージ制御回路、１０１９：ＳＥＭ撮像系制御回路、１０２０：画像処理回路、１０２１：外部入出力インターフェース、１０２２：中央演算部、１０２３：メモリ、２００３、２００４：スリット。 10: Defect observation device, 20: Optical microscope, 100: Imaging element, 101: Imaging lens, 102: Objective lens, 103: Laser light source, 104: Wafer, 106, 107, 1102: Microlens array, 108: Defect, 200, 1101: Shutter array device, 201: Substrate, 202, 202a, 202b: Substrate division slit, 203, 2002: Shutter support, 204a, 204b: Slit, 205: Shutter array, 206: Electrode array, 207: Electrode plate , 211: Shutter closed, 212, 220, 2001: Shutter, 221: Shutter open, 240, 241: Wire, 250, 251: Adhesive surface, 260: Rack, 261: Rack wiring, 263: Rack opening, 264 : Shutter opening, 265: Insulation, 270: Insulation layer, 281, 283: Convex, 282: Inner wall surface, 284: Twist rod, 285: Mianda rod, 290: Gap, 303: Light, 304: Shutter opening , 300: Ray, 301, 302: Reflected light, 351: Vacuum sealing window, 352: Mirror, 1001: Wafer, 1002: Scanning electron microscope, 1003: Optical microscope, 1004: Stage, 1005: Vacuum chamber, 1006: Control unit, 1007: Terminal, 1008: Recording device, 1009: Network, 1010: Laser light source, 1013: Objective lens, 1015: Imaging lens, 1016: Imaging element, 1018: Stage control circuit, 1019: SEM imaging system control circuit 1020: Image processing circuit, 1021: External input / output interface, 1022: Central arithmetic unit, 1023: Memory, 2003, 2004: Slit.

Claims (18)

  1. 　軸部を有し開閉可能な構成を有するシャッタと、
    　シャッタ開口部を有する基板と、を備え、
    　前記シャッタと前記基板との間に電圧を印加する構成を有し、
    　前記シャッタは、前記軸部の周りに回転し前記シャッタ開口部に移動することにより開状態となる構成を有し、
    　前記シャッタの開き角は、９０度未満に調整される構成を有する、光フィルタリングデバイス。     A shutter that has a shaft and can be opened and closed,
    With a substrate having a shutter opening,
    It has a configuration in which a voltage is applied between the shutter and the substrate.
    The shutter has a configuration in which it is opened by rotating around the shaft portion and moving to the shutter opening portion.
    An optical filtering device having a configuration in which the opening angle of the shutter is adjusted to less than 90 degrees.
  2. 　前記シャッタは、閉状態では光軸と略垂直に交わる構成を有する、請求項１記載の光フィルタリングデバイス。 The optical filtering device according to claim 1, wherein the shutter has a configuration that intersects the optical axis substantially perpendicularly in the closed state.
  3. 　前記シャッタは、閉状態では光軸と斜めに交わる構成を有する、請求項１記載の光フィルタリングデバイス。 The optical filtering device according to claim 1, wherein the shutter has a configuration in which it intersects the optical axis diagonally in the closed state.
  4. 　前記シャッタは、複数個が隣り合うように配置されている、請求項１記載の光フィルタリングデバイス。 The optical filtering device according to claim 1, wherein a plurality of the shutters are arranged so as to be adjacent to each other.
  5. 　前記複数個の前記シャッタは、それぞれが独立に開閉可能な構成を有する、請求項４記載の光フィルタリングデバイス。 The optical filtering device according to claim 4, wherein each of the plurality of shutters can be opened and closed independently.
  6. 　前記シャッタの前記開き角は、８５度から６０度までの範囲に調整される構成を有する、請求項１記載の光フィルタリングデバイス。 The optical filtering device according to claim 1, wherein the opening angle of the shutter is adjusted in a range of 85 degrees to 60 degrees.
  7. 　前記シャッタ、シャッタ支持部及び前記基板を含むシャッタアレイと、
    　前記シャッタアレイを設置するラックと、を含み、
    　前記ラックは、前記基板と電気的に接続するラック配線を有する、請求項１記載の光フィルタリングデバイス。     A shutter array including the shutter, the shutter support portion, and the substrate,
    Includes a rack on which the shutter array is installed.
    The optical filtering device according to claim 1, wherein the rack has rack wiring that is electrically connected to the substrate.
  8. 　前記ラックには、ラック開口部が設けられ、
    　前記シャッタアレイは、前記ラックの斜面に設置され、
    　前記シャッタ開口部と前記ラック開口部とは連通している、請求項７記載の光フィルタリングデバイス。     The rack is provided with a rack opening.
    The shutter array is installed on the slope of the rack.
    The optical filtering device according to claim 7, wherein the shutter opening and the rack opening communicate with each other.
  9. 　前記シャッタ開口部は、前記ラック開口部に対して屈曲している、請求項８記載の光フィルタリングデバイス。 The optical filtering device according to claim 8, wherein the shutter opening is bent with respect to the rack opening.
  10. 　前記シャッタ開口部と前記ラック開口部とは、略平行に連通している、請求項８記載の光フィルタリングデバイス。 The optical filtering device according to claim 8, wherein the shutter opening and the rack opening communicate with each other substantially in parallel.
  11. 　隣り合う前記シャッタアレイは、部分的に重なるように配置されている、請求項８記載の光フィルタリングデバイス。 The optical filtering device according to claim 8, wherein the adjacent shutter arrays are arranged so as to partially overlap each other.
  12. 　前記基板の内壁面又は前記シャッタには、凸部が設けられ、前記凸部により前記開き角の上限値が設定されている、請求項１記載の光フィルタリングデバイス。 The optical filtering device according to claim 1, wherein a convex portion is provided on the inner wall surface of the substrate or the shutter, and an upper limit value of the opening angle is set by the convex portion.
  13. 　前記シャッタの前記開き角の上限値は、前記電圧により定められる、請求項１記載の光フィルタリングデバイス。 The optical filtering device according to claim 1, wherein the upper limit value of the opening angle of the shutter is determined by the voltage.
  14. 　前記軸部は、ねじり棒又はミアンダ棒で構成されている、請求項１記載の光フィルタリングデバイス。 The optical filtering device according to claim 1, wherein the shaft portion is composed of a twisting rod or a meander rod.
  15. 　前記シャッタ支持部と前記基板との間には、絶縁層が設けられている、請求項７記載の光フィルタリングデバイス。 The optical filtering device according to claim 7, wherein an insulating layer is provided between the shutter support portion and the substrate.
  16. 　電極アレイを更に含み、
    　前記電極アレイは、前記ラックに設置されている、請求項７記載の光フィルタリングデバイス。     Further including an electrode array,
    The optical filtering device according to claim 7, wherein the electrode array is installed in the rack.
  17. 　請求項１記載の光フィルタリングデバイスと、
    　マイクロレンズアレイと、を備えた、光学顕微鏡。     The optical filtering device according to claim 1 and
    An optical microscope equipped with a microlens array.
  18. 　請求項１７記載の光学顕微鏡と、
    　走査型電子顕微鏡と、を備えた、欠陥観察装置。     The optical microscope according to claim 17,
    A defect observation device including a scanning electron microscope.
PCT/JP2020/012940 2020-03-24 2020-03-24 Light filtering device, optical microscope, and defect observation apparatus WO2021192017A1 (en)

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