WO2021159780A1 - 一种oled显示屏模组及终端设备 - Google Patents

一种oled显示屏模组及终端设备 Download PDF

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Publication number
WO2021159780A1
WO2021159780A1 PCT/CN2020/127204 CN2020127204W WO2021159780A1 WO 2021159780 A1 WO2021159780 A1 WO 2021159780A1 CN 2020127204 W CN2020127204 W CN 2020127204W WO 2021159780 A1 WO2021159780 A1 WO 2021159780A1
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Prior art keywords
area
circuit
region
oled display
substrate
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PCT/CN2020/127204
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English (en)
French (fr)
Inventor
欧阳祥睿
石储荣
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华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to US17/798,382 priority Critical patent/US11869440B2/en
Priority to EP20918192.4A priority patent/EP4086968B1/en
Publication of WO2021159780A1 publication Critical patent/WO2021159780A1/zh

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266Details of drivers for scan electrodes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M1/00Substation equipment, e.g. for use by subscribers
    • H04M1/02Constructional features of telephone sets
    • H04M1/0202Portable telephone sets, e.g. cordless phones, mobile phones or bar type handsets
    • H04M1/026Details of the structure or mounting of specific components
    • H04M1/0266Details of the structure or mounting of specific components for a display module assembly
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/131Interconnections, e.g. wiring lines or terminals
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0209Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0223Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0233Improving the luminance or brightness uniformity across the screen
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation

Definitions

  • This application relates to the field of electronics, and in particular to an OLED display module and terminal equipment.
  • OLED organic light-emitting diode
  • the frame of the OLED screen is always limited by this, and the frame cannot be further reduced.
  • the embodiment of the application provides an OLED display module and terminal equipment, by replacing the position of the control light emitting circuit (emission circuit, EM) element and the EM timing signal line (clock, Clk), so that the low potential VSS can be covered Above the EM element, it is possible to reduce the impedance of the emission layer vss (ELVSS) or to shorten the frame of the OLED display module while maintaining the original impedance.
  • EM control light emitting circuit
  • Clk EM timing signal line
  • an OLED display screen module includes: a first area located in a substrate, the first area is used for arranging control elements; and a plurality of other areas located on both sides of the first area in the substrate , A number of other areas are set up in order of distance from the first area from near to far.
  • the other areas in turn include: a second area for arranging the first circuit element; a third area for arranging the first circuit timing signal Line; the fourth area, used to lay the second circuit timing signal line; the fifth area, used to lay the second circuit element; the sixth area, used to lay the first low-potential port; the seventh area located on the upper surface of the substrate, The seventh area covers the sixth area, and partially covers the fifth area, and is used for arranging the second low-potential port, wherein the first low-potential port and the second low-potential port are electrically connected; the eighth area is located on the upper surface of the substrate , The eighth area covers the seventh area and the upper surface of the substrate, and is used for arranging the third low-potential port.
  • partially covering the fifth area includes: covering a part of the fifth area or completely covering the fifth area.
  • the partial coverage distance is 50 to 100 microns.
  • the first circuit element is an on-array gate register, and the second circuit element is a light-emitting circuit; or the first circuit element is a light-emitting circuit, and the second circuit element is an on-array gate. Bit register.
  • the interval between the first circuit timing signal line and the second circuit timing signal line is 5 to 15 microns.
  • a terminal device in a second aspect, includes the OLED display module related to the first aspect.
  • This application discloses an OLED display module and terminal device.
  • the VSS can be extended and covered above the EM element. If the VSS maintains the original impedance, it can be shortened. The frame of the OLED display module; or if the VSS keeps its original size, the impedance of the ELVSS can be reduced.
  • FIG. 1 is a schematic top view of an OLED display module provided by an embodiment of the application.
  • FIG. 2 is a schematic front cross-sectional view of an OLED display module provided by an embodiment of the application.
  • FIG. 3 is a schematic diagram of a GOA circuit provided by an embodiment of the application.
  • Fig. 4 is a schematic diagram of a waveform of the circuit shown in Fig. 3;
  • Fig. 5a is a schematic diagram of circuit connection of the circuit shown in Fig. 3;
  • Fig. 5b is another schematic diagram of circuit connection of the circuit shown in Fig. 3;
  • FIG. 6 is a schematic diagram of edge connection of an OLED display module provided by an embodiment of the application.
  • FIG. 7 is a schematic front cross-sectional view of another OLED display module provided by an embodiment of the application.
  • FIG. 8 is a schematic diagram of another edge connection of an OLED display module provided by an embodiment of the application.
  • FIG. 9 is a schematic front cross-sectional view of another OLED display module provided by an embodiment of the application.
  • FIG. 10 is a schematic diagram of another edge connection of an OLED display module provided by an embodiment of the application.
  • FIG. 11 is a schematic diagram of a terminal device provided by an embodiment of the application.
  • connection should be understood in a broad sense, for example, it can be a fixed connection or a detachable connection. , It may also be an interference connection or an integral connection; for those of ordinary skill in the art, the specific meaning of the above-mentioned terms in this application can be understood under specific circumstances.
  • An OLED display module and terminal device provided by the embodiments of this application, wherein the terminal device may be a mobile phone, a tablet computer, a notebook computer, an ultra-mobile personal computer (UMPC), a handheld computer, a netbook, or a personal computer.
  • Digital assistants personal digital assistants, PDAs
  • wearable devices virtual reality devices, etc., are not limited in the embodiments of the present application.
  • FIG. 1 is a schematic top view of an OLED display module provided by an embodiment of the application.
  • the OLED display module includes an active area (AA) with a darker center gray and an OLED substrate (substrare) with a lighter gray.
  • AA is set inside the base.
  • FIG. 2 is a schematic front cross-sectional view of an OLED display module provided by an embodiment of the application. It can be seen more clearly from Figure 2 that AA is located in the substrate at the left and right edges of the OLED module.
  • the substrate may include three parts, such as part a, part b, and part c in FIG. 2.
  • the part a substrate and the part c substrate may be organic compounds, and the part b substrate may be inorganic compounds.
  • the part shown in FIG. 2 may be the left edge or the right edge of the OLED display module in FIG. 1. It can be understood that the OLED display module shown in FIG. 1 has a symmetrical structure from left to right and from top to bottom.
  • Area 1 can be provided in the base of part b in FIG. 2, which can be used to lay AA in FIG. 1.
  • area 2 may be built into the substrate of part b, and area 2 may be equipped with gate on array (GOA) devices (devices) on the array.
  • GOA gate on array
  • the GOA device may be as shown in FIG. 3, which is a schematic diagram of a GOA circuit provided by an embodiment of the application.
  • FIG. 3 shows only a part of the GOA circuit.
  • the GOA circuit may include N circuits shown in FIG. 3, where N is greater than or equal to 1, and is a positive integer.
  • the GOA circuit can also be referred to as a gate on panel (GOP).
  • GOP gate on panel
  • the GOA circuit includes a switch group T1, a switch tube T2, a switch tube T3, a switch tube T4, a switch tube T5, a switch tube T6, a switch tube T7, a switch tube T8, and capacitors C1, Capacitance C2.
  • the switch group T1 can be composed of two MOS tubes, and the switch tube T2, the switch tube T3, the switch tube T4, the switch tube T5, the switch tube T6, the switch tube T7, and the switch tube T8 can also be made of metal oxide Semiconductor (metal oxide semiconductor, MOS) tube composition.
  • the MOS tube may be an NMOS tube or a PMOS tube. It can be seen from FIG. 3 that the GOA circuit can control the switch group and the connection state of different switch tubes according to the signals input by the timing signal 1 (clock1, CK1) and timing signal 2 (clock1, CK2).
  • FIG. 4 is a schematic diagram of a waveform of the circuit shown in FIG. 3. It can be seen that there are three input signals of start pulse (STV), CK1 and CK2 in Fig. 4.
  • the GOA circuit may include one or more circuits shown in FIG. 3, and multiple circuits shown in FIG. 3 are connected to each other.
  • N input STV at GN-1 as the initial start signal, which is used to provide the most original input information for the GOA circuit. So that after a number of circuits shown in Figure 3, it is finally output as GN.
  • FIG. 5a shows a schematic diagram of circuit connection of the circuit of Fig. 3.
  • FIG. 5a is a schematic diagram of the circuit connection of the circuit of FIG. 3 at time t1. It can be seen that the switch group or switch tube circled by the white circle in Fig. 5a indicates that the circuit is in the on state, and the black circle indicates that the circuit position of the switch tube is in the off state.
  • FIG. 5b shows another circuit connection diagram of the circuit of FIG. 3.
  • Fig. 5b is a schematic diagram of the circuit connection of the circuit of Fig. 3 at time t2.
  • the switch group or switch tube circled by the white circle in Fig. 5b indicates that the circuit is in the on state
  • the black circle indicates that the circuit position of the switch tube is in the off state.
  • a region 3, a region 5, a region 4, and a region 6 may also be provided in the substrate of part b.
  • area 3 can be deployed with GOA Clk
  • area 5 can be deployed with EM device
  • area 4 can be deployed with EM Clk
  • area 6 can be deployed with VSS.
  • a region 7 can also be provided on the upper surface of the substrate in part b, and the region 7 can be provided with the same VSS as the region 6. It can be understood that the VSS arranged in the area 7 and the VSS arranged in the area 6 may be electrically connected.
  • a region 8 can also be provided above the substrate of part a and above the removal region 7. In one example, the region 8 can be provided with ELVSS.
  • the connection relationship of each area is shown in FIG. 6 as a schematic diagram of the edge connection of an OLED display module.
  • GOA Clk may include CK1, CK2, and STV in FIGS. 3 to 5b.
  • VSS and EM Clk are both made of metal, if the VSS in area 7 is extended above area 4, since high frequency signals are transmitted on EM Clk, parasitic capacitance is likely to be generated at high frequencies. This seriously affects the signal transmitted on Clk. Therefore, based on the edge layout of FIG. 6, the left and right edge areas of the OLED display module have been subject to this limitation and cannot be reduced. At the same time, because VSS is also limited by this, it will cause uneven display of the OLED display module.
  • FIG. 7 is a front cross-sectional schematic diagram of another OLED display module provided by an embodiment of the application.
  • the OLED display module may include a first area located in the substrate of part b, and the first area is used for arranging control elements. And a plurality of other regions adjacent to the first region and arranged in sequence in the base of part b, wherein the plurality of other regions are set up in sequence from near to far according to the distance from the first region, and the plurality of other regions may sequentially include: The second area is used to lay the first circuit element; the third area is used to lay the first circuit timing signal line; the fourth area is used to lay the second circuit timing signal line; the fifth area is used to lay the second circuit element ; The sixth area is used to lay out the first low-potential port.
  • the OLED display module may further include a seventh area located on the upper surface of the substrate of part b, the seventh area covering the sixth area, and partially covering the fifth area, for arranging the second low-potential port. It can be seen from Fig. 7 that the coverage involved in this application is not a complete overlap of the two regions, but looks like coverage between relative positions on different layers. Wherein, the first low-potential port in the sixth area is electrically connected to the second low-potential port in the seventh area.
  • the OLED display module may further include an eighth area located on the upper surface of the part a substrate and the upper surface of the seventh area, wherein the eighth area completely covers the seventh area and the upper surface of the part a substrate, and The third low-potential port is installed.
  • the deployed control element may be AA shown in FIG. 2.
  • the first circuit element may be a GOA device
  • the first circuit timing signal line may be a GOA Clk
  • the second circuit element may be an EM device
  • the second circuit timing signal line may be an EM Clk
  • the first circuit element may be an EM device
  • the first circuit timing signal line may be an EM Clk
  • the second circuit element may be a GOA device
  • the second circuit timing signal line may be a GOA Clk.
  • the first low-potential port and the second low-potential port may be the same VSS, and VSSs in different regions are electrically connected.
  • the third low-potential port can also be ELVSS.
  • the seventh area partially covering the fifth area may include: covering a part of the fifth area or completely covering the fifth area. It is understandable that, since it is necessary to ensure that the coverage of the VSS is not located above the Clk, the VSS deployed in the seventh area can extend to any position above the fifth area.
  • the partial coverage distance is 50 microns to 100 microns.
  • the interval between the first circuit timing signal line and the second circuit timing signal line is 5 to 15 microns. Specifically, the interval can be 10 microns.
  • VSS metal can be extended to the top of the device. Thereby increasing the available line width of VSS. Since VSS extends to the central area of the OLED display module, the bonding area between VSS and ELVSS also increases. Since the impedance of VSS is lower than that of ELVSS, the impedance of the part of ELVSS bonded to VSS also decreases. . This helps to improve the overall stability of ELVSS.
  • FIG. 8 is a schematic diagram of another edge connection of an OLED display module provided by an embodiment of the application.
  • FIG. 8 is only a possible regional location illustration.
  • the GOA device and the EM device can be replaced, and correspondingly, a corresponding replacement location is also required between the GOA Clk and the EM Clk.
  • the VSS can extend to the center, if the same display uniformity is ensured, the frame of the OLED display module can be narrowed accordingly to achieve a narrower frame.
  • FIG. 9 is a schematic front cross-sectional view of another OLED display module provided by an embodiment of the application.
  • FIG. 9 The area framed by the dashed line in FIG. 9 is the reduced area.
  • the structure shown in FIG. 9 enables the OLED display module to have a narrower frame while maintaining the original VSS width.
  • FIG. 10 the connection relationship of each area is shown in FIG. 10 as another schematic diagram of the edge connection of the OLED display module.
  • the OLED display modules of Figures 9 and 10 rely on the space saved by the overlap of VSS and EM device, which effectively reduces the panel, reduces the distance of the frame, and has a narrower frame.
  • the OLED display module shown in Figure 9 and Figure 10 can effectively shrink the panel by 10%
  • the GOA device and the EM device may be composed of one or more PMOS, NMOS, or CMOS. Of course, in other examples, they may also be composed of low temperature poly-silicon (LTPS).
  • LTPS low temperature poly-silicon
  • GOA Clk and EM Clk can be made of metals such as titanium aluminum titanium or copper.
  • metals such as titanium aluminum titanium or copper.
  • other equivalent metals or other materials can also be used, which is not limited in this application.
  • FIG. 11 is a schematic diagram of a terminal device provided by an embodiment of the application.
  • the present application also provides a terminal device.
  • the terminal device shown in FIG. 11 includes the OLED display module involved in FIGS. 1 to 10, that is, the gray grid area in FIG. 11.
  • the terminal device may also include other devices such as a processor, a memory, etc., and any additions or deletions may be made according to the actual situation, so as to drive the OLED display module for corresponding display.
  • the processor may be a central processing unit (CPU).
  • CPU central processing unit
  • the memory may include volatile memory (volatile memory), such as random-access memory (RAM); the memory may also include non-volatile memory (English: non-volatile memory), For example, read-only memory (ROM), flash memory, hard disk drive (HDD) or solid state drive (SSD); the memory may also include a combination of the foregoing types of memory.
  • volatile memory such as random-access memory (RAM)
  • non-volatile memory English: non-volatile memory
  • ROM read-only memory
  • flash memory flash memory
  • HDD hard disk drive
  • SSD solid state drive
  • the memory may also include a combination of the foregoing types of memory.
  • the processor can be coupled with the memory, and read and execute the instructions in the memory; when the processor is running, the instructions are executed, so that the processor can be used to drive the OLED display module involved in FIGS. 1 to 10 .

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Signal Processing (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种OLED显示屏模组,显示屏模组包括:位于基底中的第一区域,用于布设操控元件;位于基底中第一区域两侧的多个其它区域,多个其它区域按与第一区域的距离依次设立,多个其它区域依次包括:第二区域,用于布设第一电路元件;第三区域,用于布设第一电路时序讯号线;第四区域,用于布设第二电路时序讯号线;第五区域,用于布设第二电路元件;第六区域,用于布设第一低电位端口;位于基底上表面的第七区域,第七区域覆盖第六区域,且部分覆盖第五区域,用于布设第二低电位端口,其中,第一低电位端口与第二低电位端口之间电连接;位于基底上表面的第八区域,第八区域覆盖第七区域以及基底的上表面,用于布设第三低电位端口。

Description

一种OLED显示屏模组及终端设备
本申请要求在2020年2月10日提交国家专利局、申请号为202020158568.7、发明名称为“一种OLED显示屏模组及终端设备”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请涉及电子领域,尤其涉及一种OLED显示屏模组及终端设备。
背景技术
有机发光二极管(organic light-emitting diode,OLED)为一种电流型的有机发光器件。其具有轻薄、亮度高、功耗低、响应快、清晰度高、柔性好、发光效率高等特点,使得OLED可以满足人们对显示技术的更多需求。如今,绝大多数显示器的商家都将OLED作为重点进行研究,使得大多数的终端设备采用OLED作为显示的装置。
然而,由于OLED屏的显示区域的周围具有特定电路排布,使得其边框一直受限于此,无法将边框进行进一步的缩小。
实用新型内容
本申请实施例提供了一种OLED显示屏模组及终端设备,通过将控制发光电路(emission circuit,EM)元件与EM时序讯号线(clock,Clk)的位置进行替换,以便低电位VSS可以覆盖在EM元件上方,从而达到降低发射层VSS(emission layer vss,ELVSS)的阻抗或是保持原有阻抗的情况下缩短OLED显示屏模组的边框。
第一方面,提供了一种OLED显示屏模组,显示屏模组包括:位于基底中的第一区域,第一区域用于布设操控元件;位于基底中第一区域两侧的多个其它区域,多个其它区域按与第一区域的距离由近及远依次设立,多个其它区域依次包括:第二区域,用于布设第一电路元件;第三区域,用于布设第一电路时序讯号线;第四区域,用于布设第二电路时序讯号线;第五区域,用于布设第二电路元件;第六区域,用于布设第一低电位端口;位于基底上表面的第七区域,第七区域覆盖第六区域,且部分覆盖第五区域,用于布设第二低电位端口,其中,第一低电位端口与第二低电位端口之间电连接;位于基底上表面的第八区域,第八区域覆盖第七区域以及基底的上表面,用于布设第三低电位端口。
在一个可能的实施方式中,部分覆盖第五区域,包括:覆盖第五区域的一部分,或将第五区域完全覆盖。
在一个可能的实施方式中,部分覆盖距离为50至100微米。
在一个可能的实施方式中,第一电路元件为阵列上闸极位暂存器、第二电路元件为控制发光电路;或第一电路元件为控制发光电路、第二电路元件为阵列上闸极位暂 存器。
在一个可能的实施方式中,第一电路时序讯号线与第二电路时序讯号线之间间隔为5至15微米。
第二方面,提供了一种终端设备,终端设备包括第一方面涉及的OLED显示屏模组。
本申请公开了一种OLED显示屏模组及终端设备,通过将EM元件与EM Clk的位置进行替换,以使得VSS可以延伸并覆盖在EM元件的上方,若VSS保持原有阻抗,则可以缩短OLED显示屏模组的边框;或是VSS保持原有大小,则可以降低ELVSS的阻抗。
附图说明
图1为本申请实施例提供的一种OLED显示屏模组俯视示意图;
图2为本申请实施例提供的一种OLED显示屏模组正视剖面示意图;
图3为本申请实施例提供的一种GOA电路示意图;
图4为图3示出电路的一种波形示意图;
图5a为图3示出电路的一种电路连通示意图;
图5b为图3示出电路的另一种电路连通示意图;
图6为本申请实施例提供的一种OLED显示屏模组边缘连接示意图;
图7为本申请实施例提供的另一种OLED显示屏模组正视剖面示意图;
图8为本申请实施例提供的另一种OLED显示屏模组边缘连接示意图;
图9为本申请实施例提供的又一种OLED显示屏模组正视剖面示意图;
图10为本申请实施例提供的又一种OLED显示屏模组边缘连接示意图;
图11为本申请实施例提供的一种终端设备示意图。
具体实施方式
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行描述。
在本申请的描述中,术语“中心”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本申请和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本申请的限制。
在本申请的描述中,需要说明的是,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”应做广义理解,例如可以是固定连接,也可以是可拆卸连接,还可以是抵触连接或一体的连接;对于本领域的普通技术人员而言,可以具体情况理解上述术语在本申请中的具体含义。
本申请实施例提供的一种OLED显示屏模组以及终端设备,其中终端设备可以为手机、平板电脑、笔记本电脑、超级移动个人计算机(ultra-mobile personal computer,UMPC)、手持计算机、上网本、个人数字助理(personal digital assistant,PDA)、可穿戴设备、虚拟现实设备等等,本申请实施例对此不做任何限制。
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行详细描述。
图1为本申请实施例提供的一种OLED显示屏模组俯视示意图。
由图1可以从俯视的角度看出该OLED显示屏模组包括有中心灰色较深的操控区域(active area,AA)以及灰色交浅的OLED基底(substrare)。其中AA是设置在基底内部的。
图2为本申请实施例提供的一种OLED显示屏模组正视剖面示意图。通过图2可以更加清晰的看出,位于OLED模组的左右边缘处,AA位于基底内。在一个例子中,基底可以包括三部分,如图2中的a部分、b部分和c部分。其中a部分基底与c部分基底可以为有机化合物,b部分基底可以为无机化合物。值得注意的是,图2所示的部分可以是图1中OLED显示屏模组的左侧边缘,也可以是右侧边缘。可以理解的是图1所示的OLED显示屏模组为左右、上下均对称的结构。
图2中b部分基底中可以内设有区域1,可以用于布设图1中的AA。在一个例子中,b部分基底中可以内设有区域2,区域2可以布设阵列上闸极位移暂存器(gate on array,GOA)元件(device)。
在一个例子中,GOA的device可以如图3所示,图3为本申请实施例提供的一种GOA电路示意图。本领域人员应当注意,图3示出的仅仅是GOA电路中的一部分,具体的,GOA电路中可以包括N个图3所示电路,其中N大于等于1,且为正整数。同时本领域人员应当注意的是,GOA电路也可称为面板上闸极位移暂存器(gate on panel,GOP)。
如图3中示出的,该GOA电路中包括有开关组T1、开关管T2、开关管T3、开关管T4、开关管T5、开关管T6、开关管T7、开关管T8,以及电容C1、电容C2。在一个例子中,开关组T1可以由两个MOS管构成,以及开关管T2、开关管T3、开关管T4、开关管T5、开关管T6、开关管T7和开关管T8也可以由金属氧化物半导体(metal oxide semiconductor,MOS)管构成。在一个例子中MOS管可以是NMOS管或是PMOS管。由图3可以看出,GOA电路可以根据时序讯号1(clock1,CK1)、时序讯号2(clock1,CK2)输入的信号控制开关组以及不同开关管的联通状态。
例如图4为图3示出电路的一种波形示意图。可以看出,图4中有起始讯号(start pulse,STV)、CK1和CK2三个输入信号。在一个例子中,可以理解的是GOA电路中可以包含一个或多个图3所示电路,多个图3所示电路彼此相连。当N为1时,则在GN-1处输入STV作为最初的起始讯号,用于为GOA电路提供最原始的输入信息。以便经过多个图3所示电路后,最终作为GN输出。可以看出由于STV给GOA电路最初的起始讯号,当CK1为高电平、CK2为低电平的时间段,即t1时刻时,G1也为低电平。然后当CK1为低电平、CK2为高电平的时间段,即t2时刻时,则G2为低电平。即可以看做经过CK1和CK2的一次信号变化后,G1的信息被位移至G2。经过多个信号周期即t1+t2之后,G1的信息被位移至GN。
图5a示出了图3电路的一种电路连通示意。在一个例子中,图5a为图3电路处于t1时刻的电路连接示意图。可以看出,图5a中白色圆圈圈出的开关组或开关管即表示该处电路为通路状态,而黑色圆圈即表示该开关管所处电路位置为断路状态。
同理,图5b示出了图3电路的另一种电路连通示意。在一个例子中,图5b为图 3电路处于t2时刻的电路连接示意图。与图5a相同的是,图5b中白色圆圈圈出的开关组或开关管即表示该处电路为通路状态,而黑色圆圈即表示该开关管所处电路位置为断路状态。
再次回到图2,在一个例子中,b部分基底中还可以内设有区域3、区域5、区域4以及区域6。其中,区域3可以布设GOA Clk,区域5可以布设EM device,区域4可以布设EM Clk,以及区域6可以布设VSS。位于b部分基底上表面还可以设有区域7,区域7可以布设与区域6相同的VSS。可以理解的是区域7布设的VSS与区域6布设的VSS之间可以电连接。位于a部分基底上方以及去区域7上方还可设置有区域8,在一个例子中,区域8可以布设ELVSS。其各区域连接关系如图6示出的一种OLED显示屏模组边缘连接示意。
在一个例子中,GOA Clk可以包括图3至图5b中的CK1、CK2以及STV。
然而由于VSS与EM Clk同为金属材质,如果将区域7中的VSS延伸至区域4的上方,由于在EM Clk上传递高频讯号,因此在高频的情况下,容易产生寄生电容。从而严重影响到Clk上传递的讯号。因此,基于图6这种边缘布局,OLED显示屏模组的左右边缘区域一直收到该限制而无法缩小。同时由于VSS也受限于此,因此将导致OLED显示屏模组显示的不均匀。
所以本申请提供了一种OLED显示屏模组,具体的,可以如图7所示。图7为本申请实施例提供的另一种OLED显示屏模组正视剖面示意图。
在一个例子中,该OLED显示屏模组可以包括位于b部分基底中的第一区域,第一区域用于布设操控元件。以及位于b部分基底中与第一区域相邻并依次排列的多个其它区域,其中,多个其它区域按照与第一区域的距离由近及远依次设立,多个其它区域依次可以包括:第二区域,用于布设第一电路元件;第三区域,用于布设第一电路时序讯号线;第四区域,用于布设第二电路时序讯号线;第五区域,用于布设第二电路元件;第六区域,用于布设第一低电位端口。在一个例子中,该OLED显示屏模组还可以包括位于b部分基底上表面的第七区域,第七区域覆盖第六区域,且部分覆盖第五区域,用于布设第二低电位端口。由图7可以看出,本申请所涉及的覆盖并不是两个区域位置上的完全重叠,而是位于不同层上相对位置之间看起来像是覆盖。其中,第六区域第一低电位端口与第七区域的第二低电位端口之间电连接。在一个例子中,该OLED显示屏模组还可以包括位于a部分基底上表面以及第七区域上表面的第八区域,其中,第八区域完全覆盖第七区域以及a部分基底的上表面,用于布设第三低电位端口。
在一个例子中,布设的操控元件可以是图2所示的AA。在一种可能实施的方式中,第一电路元件可以为GOA device、第一电路时序讯号线可以为GOA Clk、第二电路元件可以为EM device、第二电路时序讯号线可以为EM Clk。在另一种可能实施的方式中,第一电路元件可以为EM device、第一电路时序讯号线可以为EM Clk、第二电路元件可以为GOA device、第二电路时序讯号线可以为GOA Clk。
在一个例子中,第一低电位端口和第二低电位端口可以同为VSS,不同区域的VSS之间电连接。在另一个例子中,第三低电位端口可以同为ELVSS。
在一个可能的实施方式中,第七区域部分覆盖第五区域可以包括:覆盖第五区域 的一部分或是将第五区域完全覆盖。可以理解的是,由于要保证VSS的覆盖不会位于Clk上方,因此,第七区域布设的VSS可以延伸至第五区域上方的任意位置。
在一个例子中,部分覆盖的距离为50微米至100微米。
在另一个例子中,第一电路时序讯号线与第二电路时序讯号线之间间隔为5至15微米。具体的,可以间隔10微米。
可以看出,相比与图2所示的OLED显示屏模组,在图7中将最外侧的是时序讯号线与电路元件的位置进行了调换。因此可以将VSS金属延伸至device上方。从而增加了VSS的可用线宽。由于VSS向OLED显示屏模组中心区域进行了延伸,因此VSS与ELVSS的贴合面积也随之增大,由于VSS的阻抗比ELVSS的低,因此与VSS贴合的部分ELVSS阻抗也随之降低。从而有利于提高ELVSS整体的稳定性。
图8为本申请实施例提供的另一种OLED显示屏模组边缘连接示意图。
图7中其各区域连接关系如图8所示,可以看出通过将EM device与EM Clk之间调换位置,可以将VSS向OLED显示屏模组中间进行延伸。可以理解的是图8仅为一种可能的区域位置示意,当然其中GOA device与EM device可以进行相替换,相应的,GOA Clk与EM Clk之间也需要相应的替换位置。
可以看出,如图7、图8示出的OLED显示屏模组,由于将device与Clk之间调换位置,从而VSS可以向中心进行延伸,若在不改变其他条件的情况下,在相同面板的情况下增加了VSS的线宽,从而改善了显示的均匀性。
然而由于VSS可以向中心进行延伸,因此若在保证相同显示均匀性的情况下,可以相应的缩窄OLED显示屏模组的边框,实现更窄的边框。
图9为本申请实施例提供的又一种OLED显示屏模组正视剖面示意图。
由图9可以看出,在保持原有第七区域VSS宽度不变的情况下,由于向中心进行了延伸,因此最外侧的边缘则可以想用的进行裁剪,以使得OLED显示屏模组具有更窄的边框。
如图9中虚线所框出的区域即为缩减的区域,显然图9所示出的结构使得OLED显示屏模组在保持原有VSS宽度的前提下,具有了更窄的边框。其中,各区域连接关系如图10示出的又一种OLED显示屏模组边缘连接示意。相较于图8示出的连接示意,显然,图9、图10的OLED显示屏模组依靠VSS与EM device重叠节省下来的空间,有效减少了面板,缩减了边框的距离,具有更窄的边框。
在一个例子中,图9、图10所示出的OLED显示屏模组可以有效缩小10%的面板
在一个例子中,GOA device和EM device可以由一个或多个PMOS、NMOS或CMOS构成,当然在其他例子中还可以由低温多晶硅(low temperature poly-silicon,LTPS)构成。
在另一个例子中,GOA Clk、EM Clk可以由钛铝钛或铜等金属制成。当然本领域人员可以理解,还可采用其他等效的金属或其他材质,本申请在此不作限定。
图11为本申请实施例提供的一种终端设备示意图。
本申请还提供了一种终端设备,如图11所示的终端设备中包括图1至图10所涉及的OLED显示屏模组,即图11中灰色网格区域。当然本领域人员还应当注意,该 终端设备还可以包括处理器、存储器等其它设备,可也根据实际情况进行任意的添加或删减,以便驱动OLED显示屏模组进行相应的显示。
在一个例子中,处理器可以为中央处理器(central processing unit,CPU)。
在另一个例子中,存储器可以包括易失性存储器(volatile memory),例如随机存取存储器(random-access memory,RAM);存储器也可以包括非易失性存储器(英文:non-volatile memory),例如只读存储器(read-only memory,ROM),快闪存储器,硬盘(hard disk drive,HDD)或固态硬盘(solid state drive,SSD);存储器还可以包括上述种类的存储器的组合。
在一个例子中,处理器可以与存储器耦合,以及读取并执行存储器中的指令;当处理器运行时执行指令,使得处理器可以用于驱动图1至图10所涉及的OLED显示屏模组。
本领域普通技术人员应该还可以进一步意识到,结合本文中所公开的实施例描述的各示例的单元及算法步骤,能够以电子硬件、计算机软件或者二者的结合来实现,为了清楚地说明硬件和软件的可互换性,在上述说明中已经按照功能一般性地描述了各示例的组成及步骤。这些功能究竟以硬件还是软件方式来执行,取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能,但是这种实现不应认为超出本申请的范围。
本领域普通技术人员可以理解实现上述实施例方法中的全部或部分步骤是可以通过程序来指令处理器完成,所述的程序可以存储于计算机可读存储介质中,所述存储介质是非短暂性(英文:non-transitory)介质,例如随机存取存储器,只读存储器,快闪存储器,硬盘,固态硬盘,磁带(英文:magnetic tape),软盘(英文:floppy disk),光盘(英文:optical disc)及其任意组合。
以上所述,仅为本申请较佳的具体实施方式,但本申请的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到的变化或替换,都应涵盖在本申请的保护范围之内。因此,本申请的保护范围应该以权利要求的保护范围为准。

Claims (6)

  1. 一种OLED显示屏模组,其特征在于,所述显示屏模组包括:
    位于基底中的第一区域,所述第一区域用于布设操控元件;
    位于所述基底中所述第一区域两侧的多个其它区域,多个所述其它区域按与所述第一区域的距离由近及远依次设立,多个所述其它区域依次包括:第二区域,用于布设所述第一电路元件;第三区域,用于布设第一电路时序讯号线;第四区域,用于布设第二电路时序讯号线;第五区域,用于布设第二电路元件;第六区域,用于布设第一低电位端口;
    位于所述基底上表面的第七区域,所述第七区域覆盖所述第六区域,且部分覆盖所述第五区域,用于布设第二低电位端口,其中,所述第一低电位端口与所述第二低电位端口之间电连接;
    位于所述基底上表面的第八区域,所述第八区域覆盖所述第七区域以及所述基底的上表面,用于布设第三低电位端口。
  2. 如权利要求1所述的显示屏模组,其特征在于,所述部分覆盖所述第五区域,包括:覆盖所述第五区域的一部分,或将所述第五区域完全覆盖。
  3. 如权利要求1所述的显示屏模组,其特征在于,所述部分覆盖距离为50至100微米。
  4. 如权利要求1所述的显示屏模组,其特征在于,所述第一电路元件为阵列上闸极位暂存器、所述第二电路元件为控制发光电路;或
    所述第一电路元件为控制发光电路、所述第二电路元件为阵列上闸极位暂存器。
  5. 如权利要求1所述的显示屏模组,其特征在于,所述第一电路时序讯号线与所述第二电路时序讯号线之间间隔为5至15微米。
  6. 一种终端设备,其特征在于,所述终端设备包括如权利要求1-5所述的OLED显示屏模组。
PCT/CN2020/127204 2020-02-10 2020-11-06 一种oled显示屏模组及终端设备 WO2021159780A1 (zh)

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