WO2021146942A1 - Circuit de registre à décalage, circuit de pilote de grille, dispositif, et procédés d'entraînement et de collecte - Google Patents
Circuit de registre à décalage, circuit de pilote de grille, dispositif, et procédés d'entraînement et de collecte Download PDFInfo
- Publication number
- WO2021146942A1 WO2021146942A1 PCT/CN2020/073582 CN2020073582W WO2021146942A1 WO 2021146942 A1 WO2021146942 A1 WO 2021146942A1 CN 2020073582 W CN2020073582 W CN 2020073582W WO 2021146942 A1 WO2021146942 A1 WO 2021146942A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- node
- circuit
- shift register
- transistor
- terminal
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 52
- 230000004044 response Effects 0.000 claims abstract description 26
- 239000003990 capacitor Substances 0.000 claims description 48
- 230000004913 activation Effects 0.000 claims description 41
- 238000001514 detection method Methods 0.000 claims description 11
- 230000008569 process Effects 0.000 claims description 11
- 230000009467 reduction Effects 0.000 claims description 10
- 238000010586 diagram Methods 0.000 description 31
- 238000003909 pattern recognition Methods 0.000 description 23
- 101100443251 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) DIG2 gene Proteins 0.000 description 18
- 101100041128 Schizosaccharomyces pombe (strain 972 / ATCC 24843) rst2 gene Proteins 0.000 description 18
- 101150117538 Set2 gene Proteins 0.000 description 14
- 101100041125 Arabidopsis thaliana RST1 gene Proteins 0.000 description 12
- 101150055297 SET1 gene Proteins 0.000 description 12
- 101100443250 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) DIG1 gene Proteins 0.000 description 12
- 102100024735 Resistin Human genes 0.000 description 9
- 101150091950 retn gene Proteins 0.000 description 9
- 239000010409 thin film Substances 0.000 description 7
- 238000003825 pressing Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 5
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 4
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 238000003860 storage Methods 0.000 description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 238000003384 imaging method Methods 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 239000002699 waste material Substances 0.000 description 2
- 239000011787 zinc oxide Substances 0.000 description 2
- 230000008859 change Effects 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 230000001960 triggered effect Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
Definitions
- the shift register unit further includes an input circuit.
- the input circuit is connected to the second node and the input terminal, and is configured to control the level of the second node in response to the input control signal received by the input terminal.
- FIG. 6 is a signal timing diagram of a gate driving circuit provided by at least one embodiment of the present disclosure.
- the output circuit 312 includes a sixth transistor T6 and a second capacitor C2.
- the gate of the sixth transistor T6 is connected to the second node N2, the first electrode of the sixth transistor T6 is connected to the first clock signal terminal CLKA to receive the first clock signal CLKA, the second electrode of the sixth transistor T6 and the output terminal OUT connect.
- the first electrode of the second capacitor C2 is connected to the second node N2, and the second electrode of the second capacitor C2 is connected to the second electrode of the sixth transistor T6.
- the sixth transistor T6 is turned on, thereby outputting the first clock signal CLKA to the output terminal OUT.
- the second capacitor C2 is used to maintain the level of the second node N2 and achieve a bootstrap function when the output terminal OUT outputs a signal.
- the scan input signal input terminal SIN of the first stage shift register circuit may be configured to receive the trigger signal STV
- the first reset terminal RST1 of the last stage shift register circuit may be configured to receive the reset signal RESET
- the trigger signal STV And the reset signal RESET is not shown in FIGS. 5A and 5B.
- the second reset control signal RST2 changes from high level to low level
- the node start control signal set_2 changes from low level to high level
- the node auxiliary set signal set_en changes from high level to low level, which directly drives the Nth stage shift register circuit to work, Nth to N+M stages
- the working process of the shift register circuit is basically the same as that of the P2 stage, and will not be repeated here.
- the driving method 900 of the electronic device may include:
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Liquid Crystal Display Device Control (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
L'invention concerne un circuit de registre à décalage, un circuit de pilote de grille et un procédé de commande associé, un dispositif électronique et un procédé de commande associé, ainsi qu'un procédé de collecte de texture au moyen d'un dispositif électronique. L'unité de registre à décalage (110) comprend une extrémité d'entrée (IN), une extrémité de sortie (OUT) et une extrémité de réinitialisation globale (RST2), et est configurée pour recevoir un signal de commande d'entrée à l'extrémité d'entrée (IN), émettre en sortie un signal de balayage à l'extrémité de sortie (OUT) et recevoir un signal de commande de réinitialisation globale à l'extrémité de réinitialisation globale (RST2) de sorte à être réinitialisée. Une unité de réglage de noeud de balayage (120) comprend un circuit de réglage de noeud (121), un circuit de démarrage de noeud (122) et un circuit de réglage de noeud auxiliaire (123). Le circuit de registre à décalage et le circuit de pilote de grille ont la fonction de démarrer et d'arrêter n'importe quel noeud, et présentent également deux modes d'entraînement pour chacun des noeuds. Lorsqu'ils sont appliqués à la collecte de texture, les circuits peuvent considérablement réduire le temps de balayage de texture, augmenter la vitesse de réponse de reconnaissance de texture, améliorer le taux d'utilisation de ressources de pilote de grille sur réseau (GOA) et réduire efficacement la consommation d'énergie de l'équipement.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2020/073582 WO2021146942A1 (fr) | 2020-01-21 | 2020-01-21 | Circuit de registre à décalage, circuit de pilote de grille, dispositif, et procédés d'entraînement et de collecte |
| CN202080000067.9A CN113661536B (zh) | 2020-01-21 | 2020-01-21 | 电子装置、驱动方法和采集方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2020/073582 WO2021146942A1 (fr) | 2020-01-21 | 2020-01-21 | Circuit de registre à décalage, circuit de pilote de grille, dispositif, et procédés d'entraînement et de collecte |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2021146942A1 true WO2021146942A1 (fr) | 2021-07-29 |
Family
ID=76991718
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/CN2020/073582 WO2021146942A1 (fr) | 2020-01-21 | 2020-01-21 | Circuit de registre à décalage, circuit de pilote de grille, dispositif, et procédés d'entraînement et de collecte |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN113661536B (fr) |
| WO (1) | WO2021146942A1 (fr) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114038382A (zh) * | 2021-11-25 | 2022-02-11 | 合肥鑫晟光电科技有限公司 | 一种栅极驱动电路、驱动方法 |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024065658A1 (fr) * | 2022-09-30 | 2024-04-04 | 京东方科技集团股份有限公司 | Circuit d'attaque de grille et procédé d'attaque associé, panneau d'affichage et appareil d'affichage |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104795018A (zh) * | 2015-05-08 | 2015-07-22 | 上海天马微电子有限公司 | 移位寄存器、驱动方法、栅极驱动电路及显示装置 |
| CN105590608A (zh) * | 2015-11-04 | 2016-05-18 | 友达光电股份有限公司 | 触控显示装置及其移位寄存器 |
| US9847070B2 (en) * | 2014-10-22 | 2017-12-19 | Apple Inc. | Display with intraframe pause circuitry |
| CN110582805A (zh) * | 2019-08-06 | 2019-12-17 | 京东方科技集团股份有限公司 | 移位寄存器及其驱动方法、栅极驱动电路和显示装置 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8134630B2 (en) * | 2008-05-09 | 2012-03-13 | Truesense Imaging, Inc. | System and method for draining residual charge from charge-coupled device (CCD) shift registers in image sensors having reset drains |
| JP6205312B2 (ja) * | 2014-06-18 | 2017-09-27 | 株式会社ジャパンディスプレイ | 液晶表示装置 |
| CN106412453B (zh) * | 2016-10-14 | 2019-02-22 | 吉林大学 | 基于两次电荷转移的高动态范围图像传感器 |
| KR102564267B1 (ko) * | 2016-12-01 | 2023-08-07 | 삼성전자주식회사 | 전자 장치 및 그 동작 방법 |
| CN107623020A (zh) * | 2017-09-08 | 2018-01-23 | 京东方科技集团股份有限公司 | 显示面板、制作方法和显示装置 |
| CN108564015B (zh) * | 2018-03-30 | 2020-06-19 | 维沃移动通信有限公司 | 一种指纹识别方法及移动终端 |
| CN109241940B (zh) * | 2018-09-28 | 2021-03-30 | 上海天马微电子有限公司 | 一种显示面板及其指纹识别驱动方法、显示装置 |
| CN110245649B (zh) * | 2019-07-31 | 2021-12-28 | 上海天马微电子有限公司 | 显示面板、驱动方法和显示装置 |
-
2020
- 2020-01-21 CN CN202080000067.9A patent/CN113661536B/zh active Active
- 2020-01-21 WO PCT/CN2020/073582 patent/WO2021146942A1/fr active Application Filing
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9847070B2 (en) * | 2014-10-22 | 2017-12-19 | Apple Inc. | Display with intraframe pause circuitry |
| CN104795018A (zh) * | 2015-05-08 | 2015-07-22 | 上海天马微电子有限公司 | 移位寄存器、驱动方法、栅极驱动电路及显示装置 |
| CN105590608A (zh) * | 2015-11-04 | 2016-05-18 | 友达光电股份有限公司 | 触控显示装置及其移位寄存器 |
| CN110582805A (zh) * | 2019-08-06 | 2019-12-17 | 京东方科技集团股份有限公司 | 移位寄存器及其驱动方法、栅极驱动电路和显示装置 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114038382A (zh) * | 2021-11-25 | 2022-02-11 | 合肥鑫晟光电科技有限公司 | 一种栅极驱动电路、驱动方法 |
| CN114038382B (zh) * | 2021-11-25 | 2023-08-15 | 合肥鑫晟光电科技有限公司 | 一种栅极驱动电路、驱动方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113661536B (zh) | 2023-01-31 |
| CN113661536A (zh) | 2021-11-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11328672B2 (en) | Shift register unit and driving method thereof, gate driving circuit, and display device | |
| US11302276B2 (en) | Gate drive circuit, touch display device and driving method | |
| CN106023945B (zh) | 栅极驱动电路及其驱动方法、显示装置 | |
| US11094244B2 (en) | Scanning circuit, driver circuit, touch display panel, receiving switching circuit and driving method | |
| CN107015683B (zh) | 包括触摸屏的显示装置以及用于驱动显示装置的驱动电路 | |
| CN109830256B (zh) | 一种移位寄存器及其驱动方法、栅极驱动电路 | |
| US20170017340A1 (en) | Touch display panel and driving method of touch mode | |
| WO2018209937A1 (fr) | Registre à décalage, son procédé de pilotage, circuit de pilotage de grille et dispositif d'affichage | |
| US20150318052A1 (en) | Shift register unit, gate drive circuit and display device | |
| CN109241940B (zh) | 一种显示面板及其指纹识别驱动方法、显示装置 | |
| CN107731187B (zh) | 一种移位寄存器及其驱动方法、栅极驱动电路和显示装置 | |
| US9640121B2 (en) | Driver IC for a display panel with touch device with display state timing in accordance with differing driving periods | |
| CN108664907B (zh) | 阵列基板、显示面板及显示装置 | |
| CN109584832B (zh) | 一种移位寄存器及其驱动方法、栅极驱动电路、显示装置 | |
| WO2021146942A1 (fr) | Circuit de registre à décalage, circuit de pilote de grille, dispositif, et procédés d'entraînement et de collecte | |
| TWI789816B (zh) | 顯示面板的指紋識別驅動方法 | |
| CN109671385B (zh) | 栅极驱动单元、栅极驱动方法、栅极驱动电路和显示装置 | |
| WO2019134450A1 (fr) | Unité de registre à décalage, circuit d'attaque de grille, dispositif d'affichage et procédé de commande | |
| CN109584941B (zh) | 移位寄存器及其驱动方法、栅极驱动电路、显示装置 | |
| CN109584786B (zh) | 一种显示面板的驱动电路、驱动方法及显示装置 | |
| JP5329539B2 (ja) | 表示装置および表示装置の駆動方法 | |
| WO2020192340A1 (fr) | Registre à décalage, circuit d'attaque de grille et procédé d'attaque associé et dispositif d'affichage | |
| TW202242627A (zh) | 用於面板的指紋識別方法、電子裝置、以及控制電路 | |
| CN111937067B (zh) | 移位寄存器单元及驱动方法、栅极驱动电路、显示装置 | |
| CN104966489B (zh) | 阵列基板行驱动电路 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 20915951 Country of ref document: EP Kind code of ref document: A1 |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 20915951 Country of ref document: EP Kind code of ref document: A1 |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 20915951 Country of ref document: EP Kind code of ref document: A1 |
|
| 32PN | Ep: public notification in the ep bulletin as address of the adressee cannot be established |
Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 28.03.2023) |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 20915951 Country of ref document: EP Kind code of ref document: A1 |