WO2021139626A1 - 显示基板、拼接显示面板及显示装置 - Google Patents

显示基板、拼接显示面板及显示装置 Download PDF

Info

Publication number
WO2021139626A1
WO2021139626A1 PCT/CN2021/070170 CN2021070170W WO2021139626A1 WO 2021139626 A1 WO2021139626 A1 WO 2021139626A1 CN 2021070170 W CN2021070170 W CN 2021070170W WO 2021139626 A1 WO2021139626 A1 WO 2021139626A1
Authority
WO
WIPO (PCT)
Prior art keywords
display
light
base substrate
emitting units
display substrate
Prior art date
Application number
PCT/CN2021/070170
Other languages
English (en)
French (fr)
Inventor
董恩凯
孙海威
李沛
翟明
桑建
禹璐
刘超
Original Assignee
京东方科技集团股份有限公司
北京京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 北京京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US17/434,712 priority Critical patent/US20220199865A1/en
Publication of WO2021139626A1 publication Critical patent/WO2021139626A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/56—Materials, e.g. epoxy or silicone resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58—Optical field-shaping elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a display substrate, a spliced display panel and a display device.
  • the spliced display panel is generally formed by splicing a plurality of display substrates with each other.
  • each display substrate includes a connection trace, the connection trace is arranged at the edge of the display substrate, and the connection trace is used to connect the flexible circuit board of the display device.
  • the display device further includes a driving circuit (integrated circuit, IC) for driving the display substrate, and the driving circuit is connected to the flexible circuit board.
  • IC integrated circuit
  • the present disclosure provides a display substrate, a spliced display panel, and a display device.
  • the technical solutions are as follows:
  • a display substrate includes: a base substrate, a plurality of light-emitting units, a protective layer, and connecting wires;
  • the base substrate is a transparent substrate, and the plurality of light-emitting units, the protective layer and the connecting wires are sequentially stacked in a direction away from the base substrate;
  • the protective layer is provided with a via hole, one end of the connecting wire is connected to the plurality of light-emitting units through the via hole, and the other end of the connecting wire is used to connect the driving circuit of the display device.
  • the multiple light-emitting units are located in a display area of the display substrate;
  • the orthographic projection of the other end of the connecting wire on the base substrate is located in the display area.
  • the orthographic projection of the connecting trace on the base substrate overlaps the orthographic projection of some of the light-emitting units on the base substrate.
  • the display substrate further includes: a plurality of microlenses corresponding to the plurality of light-emitting units one-to-one;
  • Each of the microlenses is located on the side of the corresponding one of the light-emitting units away from the base substrate, and the orthographic projection of each of the light-emitting units on the base substrate is located on the corresponding one of the microlenses. In the orthographic projection on the base substrate.
  • the material made of the microlens includes transparent glue.
  • the display substrate further includes: a plurality of reflective films corresponding to the plurality of light-emitting units one-to-one;
  • Each of the reflective films is located on the side of the corresponding one of the light-emitting units away from the base substrate, and the orthographic projection of each of the light-emitting units on the base substrate is located on the corresponding one of the reflective films. In the orthographic projection on the base substrate.
  • the plurality of reflective films and the plurality of microlenses in the display substrate are in one-to-one correspondence;
  • Each of the microlenses is located between a corresponding one of the light-emitting units and a corresponding one of the reflective films.
  • the orthographic projection of each of the microlenses on the base substrate is located within the orthographic projection of the corresponding one of the reflective films on the base substrate.
  • the material made of the reflective film includes: at least one of aluminum and silver.
  • the display substrate further includes: an adhesive layer;
  • the adhesive layer is located between the plurality of light-emitting units and the base substrate, and the plurality of light-emitting units are adhered to the base substrate through the adhesive layer.
  • the material of the adhesive layer is transparent photoresist.
  • the display substrate further includes: a thin film transistor circuit located between the base substrate and the plurality of light-emitting units;
  • Each of the light-emitting units is connected to the thin film transistor circuit.
  • the material made of the protective layer includes at least one of silica gel and epoxy glue.
  • each of the light-emitting units is a miniature light-emitting diode.
  • the micro light emitting diode includes: a first semiconductor layer, a second semiconductor layer, and an active layer located between the first semiconductor layer and the second semiconductor layer.
  • the second semiconductor layer, the active layer, and the first semiconductor layer are sequentially stacked in a direction away from the base substrate;
  • the micro light emitting diode further includes: a first electrode, a second Electrode and reflective layer;
  • the reflective layer is located on a side of the first semiconductor layer away from the active layer;
  • the first electrode is connected to the first semiconductor layer
  • the second electrode is connected to the second semiconductor layer
  • the first electrode and the second electrode are both located on the reflective layer away from the first semiconductor layer.
  • One side of the semiconductor layer is connected to the first semiconductor layer
  • the first electrode and the second electrode are both located on the reflective layer away from the first semiconductor layer.
  • the first semiconductor layer is a P-type semiconductor layer
  • the active layer is a multiple quantum well layer
  • the second semiconductor layer is an N-type semiconductor layer.
  • a spliced display panel in another aspect, includes a mother board and a plurality of spliced display substrates as described in the above aspect;
  • a plurality of the display substrates are arranged on the mother board.
  • a display device including: a driving circuit, a flexible circuit board, and the display substrate as described in the foregoing aspect;
  • the driving circuit and the flexible circuit board are both located on the side of the display substrate where the protective layer is away from the base substrate;
  • the driving circuit is arranged on the flexible circuit board, and the driving circuit is connected to the connecting wires in the display substrate through the flexible circuit board.
  • the display device includes: a motherboard and a plurality of spliced display substrates;
  • a plurality of the display substrates are arranged on the mother board.
  • FIG. 1 is a schematic structural diagram of a display substrate provided by an embodiment of the present disclosure
  • FIG. 2 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 3 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 4 is a schematic structural diagram of still another display substrate provided by an embodiment of the present disclosure.
  • FIG. 5 is a schematic structural diagram of a light-emitting unit provided by an embodiment of the present disclosure.
  • FIG. 6 is a schematic structural diagram of still another display substrate provided by an embodiment of the present disclosure.
  • FIG. 7 is a flowchart of a manufacturing method of a display substrate provided by an embodiment of the present disclosure.
  • Fig. 8 is a schematic diagram of a structure of a TFT circuit formed on one side of a base substrate provided by an embodiment of the present disclosure
  • FIG. 9 is a schematic structural diagram of forming an adhesive layer on the side of the TFT circuit away from the base substrate provided by an embodiment of the present disclosure.
  • FIG. 10 is a schematic diagram of a structure in which a plurality of light-emitting units are formed on a side of an adhesive layer away from a base substrate according to an embodiment of the present disclosure
  • FIG. 11 is a schematic diagram of a structure for connecting multiple light-emitting units with TFT lines according to an embodiment of the present disclosure
  • FIG. 12 is a schematic diagram of a structure of forming a microlens on a side of a plurality of light-emitting units away from a base substrate according to an embodiment of the present disclosure
  • FIG. 13 is a schematic diagram of a structure in which a reflective film is formed on a side of a micro lens away from a base substrate according to an embodiment of the present disclosure
  • FIG. 14 is a schematic structural view of a protective layer formed on the side of the reflective film away from the base substrate provided by the implementation of the present disclosure
  • FIG. 15 is a schematic diagram of a structure of forming a via hole on a protective layer according to an embodiment of the present disclosure
  • FIG. 16 is a schematic structural diagram of a spliced display panel provided by an embodiment of the present disclosure.
  • FIG. 17 is a schematic structural diagram of a display device provided by an embodiment of the present disclosure.
  • FIG. 1 is a schematic structural diagram of a display substrate provided by an embodiment of the present disclosure.
  • the display substrate 10 may include: a base substrate 101, a plurality of light-emitting units 102, a protective layer 103, and connecting wires 104.
  • the base substrate 101 may be a transparent substrate, and the plurality of light-emitting units 102, the protective layer 103 and the connection traces 104 may be sequentially stacked in a direction away from the base substrate 101.
  • the protective layer 103 may be provided with a via hole, one end of the connecting wire 104 may be connected to a plurality of light emitting units 102 through the via hole, and the other end of the connecting wire 104 may be used for connecting a driving circuit.
  • the connecting wires 104 and the multiple light-emitting units 102 can be arranged in different layers. Since the connecting wire 104 and the plurality of light-emitting units 102 are arranged in different layers, and the other end of the connecting wire 104 is used to connect the driving circuit, the driving circuit is located on the side of the protective layer 103 away from the base substrate 101. Therefore, when a plurality of display substrates 10 are spliced to form a spliced display panel, there is no need to bend a flexible printed circuit (FPC) on the side of the display substrate 10.
  • FPC flexible printed circuit
  • the base substrate 101 is a transparent substrate, the light emitted by the plurality of light-emitting units 102 can be emitted through the base substrate 101.
  • Arranging the driving circuit on the side of the protective layer 103 away from the base substrate 101 can prevent the light emitted by the multiple light-emitting units 102 from being affected by the driving circuit, and ensure the display effect of the display substrate 10.
  • the embodiments of the present disclosure provide a display substrate.
  • the display substrate includes a base substrate, and a plurality of light-emitting units, protective layers, and connection wires that are sequentially stacked in a direction away from the base substrate.
  • One end of the connecting wire is connected to a plurality of light-emitting units through vias provided in the protective layer, and the other end is used to connect the driving circuit, that is, the driving circuit is directly arranged on the side of the protective layer away from the base substrate. Since multiple display substrates are spliced to form a spliced display panel, there is no need to bend the flexible circuit board on the side of the display substrate, the gap between every two adjacent display substrates is small, and the display effect is better.
  • the material of the protective layer 103 may include: at least one of silica gel and epoxy glue.
  • the protective layer 103 may be formed on the side of the plurality of light-emitting units 102 away from the base substrate 101 by a coating process.
  • a plurality of light emitting units 102 may be located in the display area of the display substrate 10.
  • the orthographic projection of the other end of the connecting wire 104 on the base substrate 101 is located in the display area. Referring to FIG. 1, the orthographic projection of the connecting trace 104 on the base substrate 101 may overlap with the orthographic projection of some of the light-emitting units 102 on the base substrate 101.
  • the driving circuit connected to the connecting trace 104 is on the base substrate 101.
  • the orthographic projection also overlaps with the orthographic projection of some of the light-emitting units 102 on the base substrate 101.
  • the driving circuit since the driving circuit is located on the side of the light emitting unit 102 away from the base substrate 101, and the light emitted by the light emitting unit 102 is emitted from the base substrate 101, the driving circuit will not affect the light emitted by the light emitting unit 102.
  • FIG. 2 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • the display substrate may further include a plurality of microlenses 105 corresponding to the plurality of light-emitting units in a one-to-one manner.
  • Each microlens 105 may be located on the side of the corresponding light-emitting unit 102 away from the base substrate 101, and the orthographic projection of each light-emitting unit 102 on the base substrate 101 may be located on the corresponding one of the microlenses 105 on the base substrate 101. In the orthographic projection.
  • the micro lens 105 can be used to reflect light. Because part of the light emitted by the light-emitting unit 102 may be emitted from the side of the light-emitting unit 102 away from the base substrate 101, a corresponding microlens 105 can be provided on the side of each light-emitting unit 102 away from the base substrate 101. Among the light emitted by the light emitting unit 102, the light irradiated to the microlens 105 is reflected to the base substrate 101, which improves the light emitting efficiency of the light emitting unit 102.
  • the material made of the microlens 105 may include transparent glue.
  • the specific size of the microlens 105 can be obtained according to optical simulation.
  • the micro lens 105 can be formed on the side of the light emitting unit 102 away from the base substrate 101 by jetting.
  • FIG. 3 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • the display substrate 10 may further include a plurality of reflective films 106 corresponding to the plurality of light-emitting units 102 in a one-to-one manner.
  • Each reflective film 106 may be located on the side of the corresponding light-emitting unit 102 away from the base substrate 101, and the orthographic projection of each light-emitting unit 102 on the base substrate 101 is located on the corresponding reflective film 106 on the base substrate 101. In orthographic projection.
  • the reflective film 106 on the side of the light-emitting unit 102 away from the base substrate 101, the light emitted by the light-emitting unit 102 can be reflected to the base substrate 101 to be emitted from the base substrate 101 ,
  • the luminous efficiency of the light-emitting unit 102 is relatively high.
  • the multiple reflective films 106 and the multiple microlenses 105 can correspond one to one, and each microlens 105 can be located in a light emitting unit 102 corresponding to the microlens 105, and is connected to the microlens 105.
  • 105 corresponds to a reflective film 106. That is, the display substrate 10 may include a plurality of microlenses 105 and a plurality of reflective films 106. Each reflective film 106 may be located on the side of the corresponding one of the microlenses 105 away from the base substrate 101.
  • the microlens 105 and the reflective film 106 in the display substrate 10, it can be further ensured that the light emitted by the light-emitting unit 102 can be reflected to the base substrate 101 and emitted from the base substrate 101, and the luminous efficiency of the light-emitting unit 102 is higher. high.
  • the orthographic projection of each microlens 105 on the base substrate 101 is located within the orthographic projection of a corresponding reflective film 106 on the base substrate 101, so as to ensure that the light not reflected by the microlens 105 can be reflected by the reflective film 106.
  • the reflection ensures that the light emitted by the light-emitting unit 102 can be reflected to the base substrate 101 so as to be emitted from the base substrate 101, and the light-emitting unit 102 has a high luminous efficiency.
  • the material made of the reflective film 106 may include at least one of aluminum (Al) and silver (Ag).
  • the reflective film 106 can also be a highly reflective coating made of other highly reflective materials. The embodiments of the present disclosure do not limit this.
  • the reflective film 106 may be formed on the side of the light-emitting unit away from the base substrate 101 by evaporation or sputtering.
  • FIG. 4 is a schematic structural diagram of still another display substrate provided by an embodiment of the present disclosure. It can be seen with reference to FIG. 4 that the display substrate may further include an adhesive layer 107.
  • the adhesive layer 107 may be located between the multiple light-emitting units 102 and the base substrate 101. Each light-emitting unit 102 of the plurality of light-emitting units 102 may be bonded to the base substrate 101 through the adhesive layer 107.
  • the adhesive layer 107 may be made of transparent photoresist. Since the adhesive layer 107 is made of transparent photoresist, when the light emitted by the light-emitting unit 102 is emitted from the base substrate 101, the adhesive layer 107 located between the plurality of light-emitting units 102 and the base substrate 101 will not The light emitted by the light-emitting unit 102 is affected, and the display effect of the display substrate 10 is better.
  • the orthographic projection of each light-emitting unit 102 on the base substrate 101 can be located in the orthographic projection of the adhesive layer 107 on the base substrate 101, ensuring that each light-emitting unit 102 can be fixedly arranged on the base substrate 101 on.
  • the display substrate further includes: a thin film transistor (TFT) circuit 108, and the TFT circuit 108 may be located between the base substrate 101 and the plurality of light emitting units 102.
  • TFT thin film transistor
  • each light emitting unit 102 may be a micro light emitting diode (micro LED).
  • each light-emitting unit 102 may also be an organic light-emitting diode (OLED), and the embodiment of the present disclosure does not limit the type of the light-emitting unit 102.
  • OLED organic light-emitting diode
  • FIG. 5 is a schematic structural diagram of a miniature light-emitting diode provided by an embodiment of the present disclosure.
  • the miniature light emitting diode 102 may include a first semiconductor layer 1021, a second semiconductor layer 1022, and an active layer 1023 located between the first semiconductor layer 1021 and the second semiconductor layer 1022.
  • the first semiconductor layer 1021 may be a P-type semiconductor layer
  • the active layer 1023 may be a multiple quantum well (MQW) layer
  • the second semiconductor layer 1022 may be an N-type semiconductor layer.
  • MQW multiple quantum well
  • FIG. 6 is a schematic structural diagram of still another display substrate provided by an embodiment of the present disclosure. Referring to Fig. 6, the second semiconductor layer 1022, the active layer 1023, and the first semiconductor layer 1021 are sequentially stacked along the direction away from the base substrate 101.
  • the micro light emitting diode 102 may further include: a first electrode 1024, a second electrode 1025 and a reflective layer 1026.
  • the reflective layer 1026 may be located on the side of the first semiconductor layer 1021 away from the active layer 1023. By providing the reflective layer 1026 in the micro light emitting diode 102, the light emitted by the active layer 1023 in the micro light emitting diode 102 can be emitted from the base substrate 101, avoiding the driving circuit pair on the side of the protective layer 103 away from the base substrate 101. The image displayed on the display substrate 10 is affected.
  • the material of the reflective layer 1026 may include: at least one of aluminum (Al) and silver (Ag).
  • the reflective layer 1026 may be a distributed Bragg reflection (DBR).
  • the first electrode 1024 is connected to the first semiconductor layer 1021, and the second electrode 1025 is connected to the second semiconductor layer 1022.
  • the first electrode 1024 may be a P electrode, and the second electrode 1025 may be an N electrode.
  • the first electrode 1024 and the second electrode 1025 may both be located on the side of the reflective layer 1026 away from the first semiconductor layer 1021.
  • the first electrode 1024 and the second electrode 1025 can both be connected to a TFT circuit.
  • the first electrode 1024 and the second electrode 1025 can be connected to different TFT circuits.
  • the embodiments of the present disclosure provide a display substrate.
  • the display substrate includes a base substrate, and a plurality of light-emitting units, protective layers, and connection wires that are sequentially stacked in a direction away from the base substrate.
  • One end of the connecting wire is connected to a plurality of light-emitting units through vias provided in the protective layer, and the other end is used to connect the driving circuit, that is, the driving circuit can be directly arranged on the side of the protective layer away from the base substrate. Since multiple display substrates are spliced to form a spliced display panel, there is no need to bend the flexible circuit board on the side of the display substrate, the gap between every two adjacent display substrates is small, and the display effect is better.
  • FIG. 7 is a flowchart of a manufacturing method of a display substrate provided by an embodiment of the present disclosure. This manufacturing method can be used to manufacture the display substrate 10 provided in the above embodiment. It can be seen with reference to FIG. 7 that the method may include:
  • Step 201 forming a TFT circuit on a base substrate.
  • the TFT circuit may be formed on one side of the base substrate 101.
  • Step 202 forming an adhesive layer on the side of the TFT circuit away from the base substrate.
  • the adhesive layer 107 may be located on one side of the base substrate 101.
  • the material of the adhesive layer 107 may be transparent photoresist.
  • Step 203 forming a plurality of light-emitting units on the side of the adhesive layer away from the base substrate.
  • a plurality of light-emitting units 102 may be located on a side of the adhesive layer 107 away from the base substrate 101, and the plurality of light-emitting units 102 may be adhered to the base substrate 101 through the adhesive layer 107.
  • a mass transfer technology may be used to transfer a plurality of light-emitting units 102 to a base substrate 101 on which TFT circuits are formed.
  • Step 204 Connect each of the multiple light-emitting units to the TFT circuit.
  • a connecting line 109 may be formed on one side of the base substrate 101, and each light-emitting unit 102 is connected to the TFT circuit through the connecting line 109.
  • Step 205 forming a corresponding micro lens on the side of each light-emitting unit away from the base substrate.
  • jetting may be used to form a corresponding microlens 105 on the side of each light-emitting unit 102 away from the base substrate 101.
  • the material of the microlens 105 may include transparent glue.
  • Step 206 forming a corresponding reflective film on the side of each microlens away from the base substrate.
  • the reflective film 106 can be formed on the side of the microlens 105 away from the base substrate 101 by evaporation or sputtering.
  • the material of the reflective film 106 may include: at least one of aluminum and silver.
  • Step 207 forming a protective layer on the side of the reflective film away from the base substrate.
  • a coating process may be used to form the protective layer 103 on the side of the reflective film 106 away from the base substrate 101.
  • the material of the protective layer 103 may include: at least one of silica gel and epoxy glue.
  • Step 208 forming a via hole on the protective layer.
  • via holes 103 a may be formed on the protective layer 103 so that the plurality of light-emitting units 102 can be connected to the driving circuit.
  • Step 209 Connect the connecting wires to the multiple light-emitting units through the vias formed on the protective layer.
  • connection trace 104 may be disposed in a via hole formed on the protection layer 103 and connected to a plurality of light-emitting units 102 through the via hole. That is, one end of the connecting wire 104 can be connected to a plurality of light-emitting units 102, and the other end can be used to connect a driving circuit.
  • steps 204 to 206 can be deleted according to actual conditions.
  • 207 may be: forming a protective layer on the side of the plurality of light-emitting units away from the base substrate.
  • the embodiments of the present disclosure provide a method for manufacturing a display substrate.
  • the manufactured display substrate is connected to the light-emitting unit through the via hole provided in the protective layer due to the connection trace, and the connection trace is different from the light-emitting unit. Therefore, the driving circuit connected by the connecting wire can be directly arranged on the side of the protective layer away from the base substrate, without bending the flexible circuit board on the side of the display substrate.
  • the gap between every two adjacent display substrates can be made smaller, and the display effect is better.
  • FIG. 16 is a schematic structural diagram of a spliced display panel provided by an embodiment of the present disclosure.
  • the spliced display panel may include a mother board 30 and a plurality of spliced display substrates 10 as provided in the above-mentioned embodiments.
  • the spliced display panel shown in FIG. 16 includes four spliced display substrates 10.
  • the plurality of display substrates 10 may be arranged on the motherboard 30.
  • the motherboard 30 can be used to fix the multiple display substrates 10, and the multiple display substrates 10 do not need to be connected.
  • FIG. 17 is a schematic structural diagram of a display device provided by an embodiment of the present disclosure. It can be seen with reference to FIG. 17 that the display device may include a driving circuit (not shown in the figure), a flexible circuit board 40 and the display substrate 10 provided in the above-mentioned embodiment.
  • the flexible circuit board 40 may be located on the side of the display substrate 10 that is away from the base substrate 101 of the protective layer 103, and the driving circuit may be disposed on the flexible circuit board 40.
  • the driving circuit can be connected to the connection trace 104 in the display substrate 10 through the flexible circuit board 40.
  • the driving circuit and the flexible circuit board 40 are located on the side of the protective layer 103 away from the base substrate 101, the light is emitted The light emitted by the unit 102 will not be affected by the driving circuit and the flexible circuit board 40.
  • the driving circuit is connected to the connecting wire 104 through the flexible circuit board 40, which can improve the reliability of the connection between the driving circuit and the connecting wire 104.
  • the display device may further include: a mother board 30 and a plurality of display substrates 10 spliced together.
  • the plurality of display substrates 10 may be provided on the mother board 30. That is, the display device may include the spliced display panel described in the foregoing embodiment.
  • the display device may be: a liquid crystal panel, electronic paper, organic light-emitting diode (OLED) panel, mobile phone, tablet computer, television, display, notebook computer, digital photo frame, or navigation Any product or component with display function, such as instrument.
  • OLED organic light-emitting diode

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Theoretical Computer Science (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

提供了一种显示基板、拼接显示面板及显示装置，涉及显示技术领域。该显示基板包括衬底基板，以及沿远离该衬底基板的方向依次层叠的多个发光单元，保护层和连接走线。连接走线的一端通过保护层中设置的过孔与多个发光单元连接，另一端用于连接驱动电路，即驱动电路可以直接设置在保护层远离衬底基板的一侧。由于在对多个显示基板进行拼接以形成拼接显示面板时，无需在显示基板的侧面弯折柔性电路板，每相邻两个显示基板之间的间隙较小，显示效果较好。

Description

显示基板、拼接显示面板及显示装置
本公开要求于2020年1月6日提交的申请号为202020021403.5、发明名称为“显示基板、拼接显示面板及显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本公开中。
技术领域
本公开涉及显示技术领域，特别涉及一种显示基板、拼接显示面板及显示装置。
背景技术
在显示领域，通常采用拼接显示面板实现图像的大面积显示。该拼接显示面板一般由多个显示基板相互拼接形成。
相关技术中，每个显示基板包括连接走线，该连接走线设置在显示基板的边缘处，该连接走线用于连接显示装置的柔性电路板。其中，该显示装置还包括用于驱动显示基板的驱动电路(integrated circuit，IC)，该驱动电路与柔性电路板连接。
发明内容
本公开提供了一种显示基板、拼接显示面板及显示装置，技术方案如下：
一方面，提供了一种显示基板，所述显示基板包括：衬底基板，多个发光单元，保护层，以及连接走线；
其中，所述衬底基板为透明基板，所述多个发光单元，所述保护层和所述连接走线沿远离所述衬底基板的方向依次层叠；
所述保护层中设置有过孔，所述连接走线的一端通过所述过孔与所述多个发光单元连接，所述连接走线的另一端用于连接所述显示装置的驱动电路。
可选的，所述多个发光单元位于所述显示基板的显示区域；
所述连接走线的另一端在所述衬底基板上的正投影位于所述显示区域内。
可选的，所述连接走线在所述衬底基板上的正投影，与所述多个发光单元中部分发光单元在所述衬底基板上的正投影重叠。
可选的，所述显示基板还包括：与所述多个发光单元一一对应的多个微透镜；
每个所述微透镜位于对应的一个所述发光单元远离所述衬底基板的一侧，且每个所述发光单元在所述衬底基板上的正投影位于对应的一个所述微透镜在所述衬底基板上的正投影内。
可选的，制成所述微透镜的材料包括透明胶。
可选的，所述显示基板还包括：与所述多个发光单元一一对应的多个反射膜；
每个所述反射膜位于对应的一个所述发光单元远离所述衬底基板的一侧，且每个所述发光单元在所述衬底基板上的正投影位于对应的一个所述反射膜在所述衬底基板上的正投影内。
可选的，所述多个反射膜，以及所述显示基板中的多个微透镜一一对应；
每个所述微透镜位于对应的一个所述发光单元以及对应的一个所述反射膜之间。
可选的，每个所述微透镜在所述衬底基板上的正投影位于对应的一个所述反射膜在所述衬底基板的正投影内。
可选的，制成所述反射膜的材料包括：铝和银中的至少一种。
可选的，所述显示基板还包括：粘接层；
所述粘接层位于所述多个发光单元和所述衬底基板之间，所述多个发光单元通过所述粘接层粘合在所述衬底基板上。
可选的，制成所述粘接层的材料为透明光刻胶。
可选的，所述显示基板还包括：位于所述衬底基板和所述多个发光单元之间的薄膜晶体管线路；
每个所述发光单元与所述薄膜晶体管线路连接。
可选的，制成所述保护层的材料包括：硅胶和环氧胶中的至少一种。
可选的，每个所述发光单元为微型发光二极管。
可选的，所述微型发光二极管包括：第一半导体层，第二半导体层，以及位于所述第一半导体层和所述第二半导体层之间的有源层。
可选的，所述第二半导体层，所述有源层，以及所述第一半导体层沿远离所述衬底基板的方向依次层叠；所述微型发光二极管还包括：第一电极，第二电极和反射层；
所述反射层位于所述第一半导体层远离所述有源层的一侧；
所述第一电极和所述第一半导体层连接，所述第二电极和所述第二半导体层连接，且所述第一电极和所述第二电极均位于所述反射层远离所述第一半导体层的一侧。
可选的，所述第一半导体层为P型半导体层，所述有源层为多量子阱层，所述第二半导体层为N型半导体层。
另一方面，提供了一种拼接显示面板，所述拼接显示面板包括：母板，以及拼接的多个如上述方面所述的显示基板；
多个所述显示基板设置在所述母板上。
又一方面，提供了一种显示装置，所述显示装置包括：驱动电路，柔性电路板，以及如上述方面所述的显示基板；
所述驱动电路和所述柔性电路板均位于所述显示基板中保护层远离衬底基板的一侧；
所述驱动电路设置在所述柔性电路板上，且所述驱动电路通过所述柔性电路板与所述显示基板中的连接走线连接。
可选的，所述显示装置包括：母板和拼接的多个所述显示基板；
多个所述显示基板设置在所述母板上。
附图说明
为了更清楚地说明本公开实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本公开实施例提供的一种显示基板的结构示意图；
图2是本公开实施例提供的另一种显示基板的结构示意图；
图3是本公开实施例提供的又一种显示基板的结构示意图；
图4是本公开实施例提供的再一种显示基板的结构示意图；
图5是本公开实施例提供的一种发光单元的结构示意图；
图6是本公开实施例提供的再一种显示基板的结构示意图；
图7是本公开实施例提供的一种显示基板的制造方法的流程图；
图8是本公开实施例提供的一种衬底基板的一侧形成TFT线路的结构示意 图；
图9是本公开实施例提供的一种在TFT线路远离衬底基板的一侧形成粘接层的结构示意图；
图10是本公开实施例提供的一种在粘接层远离衬底基板的一侧形成多个发光单元的结构示意图；
图11是本公开实施例提供的一种将多个发光单元与TFT线路连接的结构示意图；
图12是本公开实施例提供的一种在多个发光单元远离衬底基板的一侧形成微透镜的结构示意图；
图13是本公开实施例提供的一种在微透镜远离衬底基板的一侧形成反射膜的结构示意图；
图14是本公开实施提供的一种在反射膜远离衬底基板的一侧形成保护层的结构示意图；
图15是本公开实施例提供的一种在保护层上形成过孔的结构示意图；
图16是本公开实施例提供的一种拼接显示面板的结构示意图；
图17是本公开实施例提供的一种显示装置的结构示意图。
具体实施方式
为使本公开的目的、技术方案和优点更加清楚，下面将结合附图对本公开实施方式作进一步地详细描述。
相关技术中，在对多个显示基板进行拼接以形成拼接显示面板时，需要弯折柔性电路板，以将驱动IC设置于该显示基板的背面。此时，连接该显示基板和驱动IC的柔性电路板位于显示基板的侧面，导致拼接显示面板中每相邻两个显示基板之间的间隙较大，拼接显示面板的显示效果较差。
图1是本公开实施例提供的一种显示基板的结构示意图。参考图1可以看出，该显示基板10可以包括：衬底基板101，多个发光单元102，保护层103，以及连接走线104。该衬底基板101可以为透明基板，该多个发光单元102，保护层103和连接走线104可以沿远离衬底基板101的方向依次层叠。
参考图1，该保护层103中可以设置有过孔，该连接走线104的一端可以通过该过孔与多个发光单元102连接，该连接走线104的另一端可以用于连接驱 动电路。
通过在多个发光单元102和连接走线104之间设置保护层103，可以使得连接走线104与多个发光单元102异层设置。由于连接走线104与多个发光单元102异层设置，且该连接走线104的另一端用于连接驱动电路，因此该驱动电路位于保护层103远离衬底基板101的一侧。由此，在对多个显示基板10进行拼接以形成拼接显示面板时，可以无需在显示基板10的侧面弯折柔性电路板(flexible printed circuit，FPC)。并且，由于该衬底基板101为透明基板，因此该多个发光单元102发出的光线能够通过该衬底基板101射出。将驱动电路设置在保护层103远离衬底基板101的一侧，可以避免多个发光单元102发出的光线受到该驱动电路的影响，保证显示基板10的显示效果。
综上所述，本公开实施例提供了一种显示基板，该显示基板包括衬底基板，以及沿远离该衬底基板的方向依次层叠的多个发光单元，保护层和连接走线。连接走线的一端通过保护层中设置的过孔与多个发光单元连接，另一端用于连接驱动电路，即驱动电路直接设置在保护层远离衬底基板的一侧。由于在对多个显示基板进行拼接以形成拼接显示面板时，无需在显示基板的侧面弯折柔性电路板，每相邻两个显示基板之间的间隙较小，显示效果较好。
可选的，制成该保护层103的材料可以包括：硅胶和环氧胶中的至少一种。该保护层103可以通过涂布(coating)工艺形成在多个发光单元102远离衬底基板101的一侧。
在本公开实施例中，多个发光单元102可以位于显示基板10的显示区域。连接走线104的另一端在该衬底基板101上的正投影位于显示区域内。参考图1，该连接走线104在该衬底基板101上的正投影，可以与多个发光单元102中的部分发光单元在该衬底基板101上的正投影重叠。
由于该连接走线104在衬底基板101上的正投影与部分发光单元102在该衬底基板101上的正投影重叠，因此与该连接走线104连接的驱动电路在衬底基板101上的正投影也会与多个发光单元102中的部分发光单元102在衬底基板101上的正投影重叠。但由于该驱动电路位于发光单元102远离衬底基板101的一侧，且发光单元102发出的光线从衬底基板101射出，因此该驱动电路不会对发光单元102发出的光线造成影响。
图2是本公开实施例提供的另一种显示基板的结构示意图。参考图2可以看出，该显示基板还可以包括：与多个发光单元一一对应的多个微透镜105。每 个微透镜105可以位于对应的一个发光单元102远离衬底基板101的一侧，且每个发光单元102在衬底基板101上的正投影可以位于对应的一个微透镜105在衬底基板101上的正投影内。
其中，该微透镜105可以用于反射光线。由于发光单元102发出的部分光线可能会从发光单元102远离衬底基板101的一侧射出，因此在每个发光单元102远离衬底基板101的一侧设置对应的一个微透镜105，可以将该发光单元102发出的光线中照射至该微透镜105的光线反射至衬底基板101，提高发光单元102的发光效率。
可选的，制成该微透镜105的材料可以包括透明胶。并且，该微透镜105的具体尺寸可以根据光学模拟得到。该微透镜105可以通过点胶(Jetting)的方式形成在发光单元102远离衬底基板101的一侧。
图3是本公开实施例提供的又一种显示基板的结构示意图。参考图3，该显示基板10还可以包括：与多个发光单元102一一对应的多个反射膜106。每个反射膜106可以位于对应的一个发光单元102远离衬底基板101的一侧，且每个发光单元102在衬底基板101上的正投影位于对应的一个反射膜106在衬底基板101的正投影内。
在本公开实施例中，通过在发光单元102远离衬底基板101的一侧设置反射膜106，可以使得发光单元102发出的光线能够被反射至衬底基板101，以从该衬底基板101射出，发光单元102的发光效率较高。
参考图3还可以看出，多个反射膜106，以及多个微透镜105可以一一对应，且每个微透镜105可以位于与该微透镜105对应的一个发光单元102，以及与该微透镜105对应的一个反射膜106之间。也即是，显示基板10可以包括：多个微透镜105和多个反射膜106。每个反射膜106可以位于对应的一个微透镜105远离衬底基板101的一侧。
通过在该显示基板10中设置微透镜105和反射膜106，可以进一步确保发光单元102发出的光线能够被反射至衬底基板101，并从该衬底基板101射出，发光单元102的发光效率较高。
参考图3，每个微透镜105在衬底基板101上的正投影位于对应的一个反射膜106在衬底基板101的正投影内，从而保证未被微透镜105反射的光线可以被反射膜106反射，确保发光单元102发出的光线能够被反射至衬底基板101，以从该衬底基板101射出，发光单元102的发光效率较高。
可选的，制成该反射膜106的材料可以包括：铝(Al)和银(Ag)中的至少一种。当然，该反射膜106也可以为其他高反射材料制成的高反镀膜。本公开实施例对此不做限定。并且，该反射膜106可以通过蒸镀或溅射的方式形成在发光单元远离衬底基板101的一侧。
图4是本公开实施例提供的再一种显示基板的结构示意图。参考图4可以看出，该显示基板还可以包括：粘接层107。该粘接层107可以位于多个发光单元102与衬底基板101之间。该多个发光单元102中的每个发光单元102可以通过该粘接层107粘合在衬底基板101上。
可选的，制成该粘接层107的材料可以为透明光刻胶。由于粘接层107是由透明光刻胶制成的，因此发光单元102发出的光线从衬底基板101射出时，位于多个发光单元102和衬底基板101之间的粘接层107不会对发光单元102发出的光线造成影响，显示基板10的显示效果较好。
参考图4，每个发光单元102在衬底基板101上的正投影，可以位于粘接层107在衬底基板101上的正投影内，保证每个发光单元102能够固定设置在该衬底基板101上。
需要说明的是，参考图1至图4，显示基板还包括：薄膜晶体管(thin film transistor，TFT)线路108，该TFT线路108可以位于在衬底基板101和多个发光单元102之间。为了使得该发光单元102能够正常工作，需要将该发光单元102与TFT线路连接。
在本公开实施例中，每个发光单元102可以均为微型发光二极管(micro light emitting diode，micro LED)。或者，每个发光单元102还可以为有机发光二极管(organic light-emitting diode，OLED)，本公开实施例对该发光单元102的类型不做限定。
图5是本公开实施例提供的一种微型发光二极管的结构示意图。参考图5可以看出，该微型发光二极管102可以包括：第一半导体层1021，第二半导体层1022，以及位于该第一半导体层1021和第二半导体层1022之间的有源层1023。
可选的，该第一半导体层1021可以为P型半导体层，该有源层1023可以为多量子阱层(multiple quantum well，MQW)，该第二半导体层1022可以为N型半导体层。
图6是本公开实施例提供的再一种显示基板的结构示意图。参考图6，该第 二半导体层1022，有源层1023，以及第一半导体层1021沿远离衬底基板101的方向依次层叠。
在本公开实施例中，参考图5和图6，该微型发光二极管102还可以包括：第一电极1024，第二电极1025和反射层1026。
该反射层1026可以位于第一半导体层1021远离有源层1023的一侧。通过在微型发光二极管102中设置反射层1026，可以使得该微型发光二极管102中有源层1023发出的光线从衬底基板101射出，避免保护层103远离衬底基板101的一侧的驱动电路对显示基板10显示的图像造成影响。
可选的，制成该反射层1026的材料可以包括：铝(Al)和银(Ag)中的至少一种。该反射层1026可以为分布式布拉格反射镜(distributed bragg reflection，DBR)。
该第一电极1024和第一半导体层1021连接，第二电极1025和第二半导体层1022连接。第一电极1024可以为P电极，第二电极1025可以为N电极。第一电极1024和第二电极1025可以均位于反射层1026远离第一半导体层1021的一侧。
该第一电极1024和第二电极1025可以均与TFT线路连接。并且，该第一电极1024和第二电极1025可以与不同的TFT线路连接。
综上所述，本公开实施例提供了一种显示基板，该显示基板包括衬底基板，以及沿远离该衬底基板的方向依次层叠的多个发光单元，保护层和连接走线。连接走线的一端通过保护层中设置的过孔与多个发光单元连接，另一端用于连接驱动电路，即驱动电路可以直接设置在保护层远离衬底基板的一侧。由于在对多个显示基板进行拼接以形成拼接显示面板时，无需在显示基板的侧面弯折柔性电路板，每相邻两个显示基板之间的间隙较小，显示效果较好。
图7是本公开实施例提供的一种显示基板的制造方法的流程图。该制造方法可以用于制造上述实施例提供的显示基板10。参考图7可以看出，该方法可以包括：
步骤201、在衬底基板上形成TFT线路。
参考图8，该TFT线路可以形成在衬底基板101的一侧。
步骤202、在TFT线路远离衬底基板的一侧形成粘接层。
参考图9，该粘接层107可以位于衬底基板101的一侧。其中，制成该粘接 层107的材料可以为透明光刻胶。
步骤203、在粘接层远离衬底基板的一侧形成多个发光单元。
参考图10，多个发光单元102可以位于粘接层107远离衬底基板101的一侧，该多个发光单元102可以通过粘接层107粘合在衬底基板101上。
可选的，在本公开实施例中，可以采用巨量转移技术，将多个发光单元102转印至形成有TFT线路的衬底基板101上。
步骤204、将多个发光单元中的每个发光单元与TFT线路连接。
参考图11，为了保证该发光单元能够正常工作，可以在衬底基板101的一侧形成连接线109，每个发光单元102通过该连接线109与TFT线路连接。
步骤205、在每个发光单元远离衬底基板的一侧形成对应的一个微透镜。
参考图12，可以采用点胶(jetting)的方式在每个发光单元102远离衬底基板101的一侧形成对应的一个微透镜105。其中，制成该微透镜105的材料可以包括：透明胶。
步骤206、在每个微透镜远离衬底基板的一侧形成对应的一个反射膜。
参考图13，可以采用蒸镀或溅射的方式在微透镜105远离衬底基板101的一侧形成反射膜106。其中，制成该反射膜106的材料可以包括：铝和银中的至少一种。
步骤207、在反射膜远离衬底基板的一侧形成保护层。
参考图14，可以采用涂布(coating)工艺在反射膜106远离衬底基板101的一侧形成保护层103。其中，制成该保护层103的材料可以包括：硅胶和环氧胶中的至少一种。
步骤208、在保护层上形成过孔。
在本公开实施例中，参考图15，在形成保护层103之后，可以在该保护层103上形成过孔103a，以便多个发光单元102能够与驱动电路连接。
步骤209、将连接走线通过保护层上形成的过孔与多个发光单元连接。
参考图4，该连接走线104可以设置在保护层103上形成的过孔内，并通过该过孔与多个发光单元102连接。也即是，该连接走线104的一端可以与多个发光单元102连接，另一端可以用于连接驱动电路。
需要说明的是，本公开实施例提供的显示基板的制造方法的步骤的先后顺序可以进行适当调整，步骤也可以根据情况进行相应增减，例如，步骤204至步骤206可以根据实际情况删除，步骤207可以为：在多个发光单元远离衬底 基板的一侧形成保护层。任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到变化的方法，都应涵盖在本公开的保护范围之内，因此不再赘述。
综上所述，本公开实施例提供了一种显示基板的制造方法，制造得到的显示基板由于连接走线通过保护层中设置的过孔与发光单元连接，该连接走线与发光单元异层设置，因此该连接走线所连接的驱动电路可以直接设置在保护层远离衬底基板的一侧，而无需在显示基板的侧面弯折柔性电路板。在对多个显示基板进行拼接以形成拼接显示面板时，可以使得每相邻两个显示基板之间的间隙较小，显示效果较好。
图16是本公开实施例提供的一种拼接显示面板的结构示意图。参考图16可以看出，该拼接显示面板可以包括：母板30，以及拼接的多个如上述实施例提供的显示基板10。例如，图16所示的拼接显示面板包括：四个拼接的显示基板10。
其中，该多个显示基板10可以设置在该母板30上。该母板30可以用于固定该多个显示基板10，且该多个显示基板10之间无需连接。
图17是本公开实施例提供的一种显示装置的结构示意图。参考图17可以看出，该显示装置可以包括：驱动电路(图中未示出)，柔性电路板40以及如上述实施例提供的显示基板10。该柔性电路板40可以位于显示基板10中保护层103远离衬底基板101的一侧，该驱动电路可以设置在柔性电路板40上。该驱动电路可以通过柔性电路板40与显示基板10中的连接走线104连接。
由于显示基板10中的多个发光单元102发出的光线从显示基板10中的衬底基板101射出，且该驱动电路和柔性电路板40位于保护层103远离衬底基板101的一侧，因此发光单元102发出的光线不会受到该驱动电路和柔性电路板40的影响。并且，驱动电路通过该柔性电路板40与连接走线104连接，可以提高该驱动电路与连接走线104连接的可靠性。
在本公开实施例中，显示装置还可以包括：母板30和拼接的多个显示基板10。该多个显示基板10可以设置在母板30上。也即是，该显示装置可以包括上述实施例所述的拼接显示面板。
在本公开实施例中，该显示装置可以为：液晶面板、电子纸、有机发光二 极管(organic light-emitting diode，OLED)面板、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框或导航仪等任何具有显示功能的产品或部件。
以上所述仅为本公开的可选实施例，并不用以限制本公开，凡在本公开的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本公开的保护范围之内。

Claims (20)

  1. 一种显示基板，所述显示基板包括：衬底基板，多个发光单元，保护层，以及连接走线；
    其中，所述衬底基板为透明基板，所述多个发光单元，所述保护层和所述连接走线沿远离所述衬底基板的方向依次层叠；
    所述保护层中设置有过孔，所述连接走线的一端通过所述过孔与所述多个发光单元连接，所述连接走线的另一端用于连接所述显示装置的驱动电路。
  2. 根据权利要求1所述的显示基板，其中，所述多个发光单元位于所述显示基板的显示区域；
    所述连接走线的另一端在所述衬底基板上的正投影位于所述显示区域内。
  3. 根据权利要求2所述的显示基板，其中，所述连接走线在所述衬底基板上的正投影，与所述多个发光单元中部分发光单元在所述衬底基板上的正投影重叠。
  4. 根据权利要求1至3任一所述的显示基板，其中，所述显示基板还包括：与所述多个发光单元一一对应的多个微透镜；
    每个所述微透镜位于对应的一个所述发光单元远离所述衬底基板的一侧，且每个所述发光单元在所述衬底基板上的正投影位于对应的一个所述微透镜在所述衬底基板上的正投影内。
  5. 根据权利要求4所述的显示基板，其中，制成所述微透镜的材料包括透明胶。
  6. 根据权利要求1至5任一所述的显示基板，其中，所述显示基板还包括：与所述多个发光单元一一对应的多个反射膜；
    每个所述反射膜位于对应的一个所述发光单元远离所述衬底基板的一侧，且每个所述发光单元在所述衬底基板上的正投影位于对应的一个所述反射膜在所述衬底基板上的正投影内。
  7. 根据权利要求6所述的显示基板，其中，所述多个反射膜，以及所述显示基板中的多个微透镜一一对应；
    每个所述微透镜位于对应的一个所述发光单元以及对应的一个所述反射膜之间。
  8. 根据权利要求7所述的显示基板，其中，每个所述微透镜在所述衬底基板上的正投影位于对应的一个所述反射膜在所述衬底基板的正投影内。
  9. 根据权利要求6至8任一所述的显示基板，其中，制成所述反射膜的材料包括：铝和银中的至少一种。
  10. 根据权利要求1至9任一所述的显示基板，其中，所述显示基板还包括：粘接层；
    所述粘接层位于所述多个发光单元和所述衬底基板之间，所述多个发光单元通过所述粘接层粘合在所述衬底基板上。
  11. 根据权利要求10所述的显示基板，其中，制成所述粘接层的材料为透明光刻胶。
  12. 根据权利要求1至11任一所述的显示基板，其中，所述显示基板还包括：位于所述衬底基板和所述多个发光单元之间的薄膜晶体管线路；
    每个所述发光单元与所述薄膜晶体管线路连接。
  13. 根据权利要求1至12任一所述的显示基板，其中，制成所述保护层的材料包括：硅胶和环氧胶中的至少一种。
  14. 根据权利要求1至13任一所述的显示基板，其中，每个所述发光单元为微型发光二极管。
  15. 根据权利要求14所述的显示基板，其中，所述微型发光二极管包括：第一半导体层，第二半导体层，以及位于所述第一半导体层和所述第二半导体层之间的有源层。
  16. 根据权利要求15所述的显示基板，其中，所述第二半导体层，所述有源层，以及所述第一半导体层沿远离所述衬底基板的方向依次层叠；所述微型发光二极管还包括：第一电极，第二电极和反射层；
    所述反射层位于所述第一半导体层远离所述有源层的一侧；
    所述第一电极和所述第一半导体层连接，所述第二电极和所述第二半导体层连接，且所述第一电极和所述第二电极均位于所述反射层远离所述第一半导体层的一侧。
  17. 根据权利要求16所述的显示基板，其中，所述第一半导体层为P型半导体层，所述有源层为多量子阱层，所述第二半导体层为N型半导体层。
  18. 一种拼接显示面板，其中，所述拼接显示面板包括：母板，以及拼接的多个如权利要求1至17任一所述的显示基板；
    多个所述显示基板设置在所述母板上。
  19. 一种显示装置，其中，所述显示装置包括：驱动电路，柔性电路板，以及如权利要求1至17任一所述的显示基板；
    所述驱动电路和所述柔性电路板均位于所述显示基板中保护层远离衬底基板的一侧；
    所述驱动电路设置在所述柔性电路板上，且所述驱动电路通过所述柔性电路板与所述显示基板中的连接走线连接。
  20. 根据权利要求19所述的显示装置，其中，所述显示装置包括：母板和拼接的多个所述显示基板；
    多个所述显示基板设置在所述母板上。
PCT/CN2021/070170 2020-01-06 2021-01-04 显示基板、拼接显示面板及显示装置 WO2021139626A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US17/434,712 US20220199865A1 (en) 2020-01-06 2021-01-04 Display substrate, spliced display panel and display apparatus

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202020021403.5U CN210837757U (zh) 2020-01-06 2020-01-06 显示基板、拼接显示面板及显示装置
CN202020021403.5 2020-01-06

Publications (1)

Publication Number Publication Date
WO2021139626A1 true WO2021139626A1 (zh) 2021-07-15

Family

ID=71265446

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2021/070170 WO2021139626A1 (zh) 2020-01-06 2021-01-04 显示基板、拼接显示面板及显示装置

Country Status (3)

Country Link
US (1) US20220199865A1 (zh)
CN (1) CN210837757U (zh)
WO (1) WO2021139626A1 (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN210837757U (zh) * 2020-01-06 2020-06-23 北京京东方光电科技有限公司 显示基板、拼接显示面板及显示装置
CN113270437A (zh) 2020-02-17 2021-08-17 京东方科技集团股份有限公司 背板及其制备方法、显示装置
CN112562526A (zh) * 2020-12-11 2021-03-26 京东方科技集团股份有限公司 一种显示面板及其制作方法、显示装置
CN112802942A (zh) * 2020-12-31 2021-05-14 厦门天马微电子有限公司 一种显示面板、制备方法及显示装置
CN114203734B (zh) * 2021-12-11 2023-08-22 武汉华星光电半导体显示技术有限公司 显示面板及其制备方法
CN115294882B (zh) * 2022-08-25 2023-11-10 京东方科技集团股份有限公司 显示模组和拼接显示装置

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1812093A (zh) * 2004-12-21 2006-08-02 夏普株式会社 发光二极管、背光器件以及制造发光二极管的方法
US20090065789A1 (en) * 2007-09-12 2009-03-12 Bily Wang LED chip package structure with high-efficiency light-emitting effect and method of packing the same
CN102044610A (zh) * 2009-10-21 2011-05-04 Lg伊诺特有限公司 发光器件及其制造方法、发光器件封装和照明系统
CN108886050A (zh) * 2017-01-24 2018-11-23 歌尔股份有限公司 微led装置、显示设备及微led制造方法
CN109920804A (zh) * 2019-03-27 2019-06-21 京东方科技集团股份有限公司 一种显示基板及其制备方法和显示装置
CN110416242A (zh) * 2019-07-19 2019-11-05 深圳市华星光电半导体显示技术有限公司 显示面板及其制造方法
CN210837757U (zh) * 2020-01-06 2020-06-23 北京京东方光电科技有限公司 显示基板、拼接显示面板及显示装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4548121B2 (ja) * 2005-01-14 2010-09-22 セイコーエプソン株式会社 発光素子の製造方法
JP4479827B2 (ja) * 2008-05-12 2010-06-09 ソニー株式会社 発光ダイオード表示装置及びその製造方法
JP4951018B2 (ja) * 2009-03-30 2012-06-13 株式会社東芝 半導体装置の製造方法
CN102856464B (zh) * 2011-06-29 2015-07-08 展晶科技(深圳)有限公司 发光二极管封装结构及封装方法
US9523797B2 (en) * 2012-09-21 2016-12-20 Electronics And Telecommunications Research Institute Microlens array film and display device including the same
US10483253B1 (en) * 2015-09-24 2019-11-19 Apple Inc. Display with embedded pixel driver chips
KR20180071743A (ko) * 2016-12-20 2018-06-28 엘지디스플레이 주식회사 발광 다이오드 칩 및 이를 포함하는 발광 다이오드 디스플레이 장치
US20200118988A1 (en) * 2018-10-16 2020-04-16 Innolux Corporation Electronic device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1812093A (zh) * 2004-12-21 2006-08-02 夏普株式会社 发光二极管、背光器件以及制造发光二极管的方法
US20090065789A1 (en) * 2007-09-12 2009-03-12 Bily Wang LED chip package structure with high-efficiency light-emitting effect and method of packing the same
CN102044610A (zh) * 2009-10-21 2011-05-04 Lg伊诺特有限公司 发光器件及其制造方法、发光器件封装和照明系统
CN108886050A (zh) * 2017-01-24 2018-11-23 歌尔股份有限公司 微led装置、显示设备及微led制造方法
CN109920804A (zh) * 2019-03-27 2019-06-21 京东方科技集团股份有限公司 一种显示基板及其制备方法和显示装置
CN110416242A (zh) * 2019-07-19 2019-11-05 深圳市华星光电半导体显示技术有限公司 显示面板及其制造方法
CN210837757U (zh) * 2020-01-06 2020-06-23 北京京东方光电科技有限公司 显示基板、拼接显示面板及显示装置

Also Published As

Publication number Publication date
US20220199865A1 (en) 2022-06-23
CN210837757U (zh) 2020-06-23

Similar Documents

Publication Publication Date Title
WO2021139626A1 (zh) 显示基板、拼接显示面板及显示装置
US20210296394A1 (en) Array substrate and preparation method therefor, and display panel and display device
WO2021007998A1 (zh) 显示面板、显示模组及显示装置
TWI701645B (zh) 顯示裝置及包含該顯示裝置的多螢幕顯示裝置
WO2017071334A1 (zh) 阵列基板、显示面板及显示装置
US10748880B2 (en) Micro LED display panel and manufacturing method thereof
US11181762B2 (en) Display device
KR20200064217A (ko) 플렉서블 표시 장치 및 이의 조립 방법
KR20130142750A (ko) 표시 패널 및 이의 제조 방법
KR20150145827A (ko) 디스플레이 모듈 및 이를 포함하는 멀티 디스플레이 장치
US11121331B2 (en) Flexible substrate and display panel using the same
WO2023093220A1 (zh) 显示面板及其制作方法、终端设备
US10312316B2 (en) Display apparatus and method of manufacturing the same, package cover plate
US20220085000A1 (en) Light-emitting module and manufacturing method thereof and display device
CN113764455B (zh) 拼接显示面板及拼接显示装置
WO2021087726A1 (zh) 一种阵列基板及其制作方法、显示装置
KR20200115756A (ko) 회로기판 및 이를 포함한 표시장치
CN112366218A (zh) 一种显示面板的制作方法及显示面板
WO2020103241A1 (zh) 一种oled显示器
KR101797001B1 (ko) 이방성 도전필름, 이를 이용한 표시패널의 제조방법 및 그 표시패널을 포함하는 평판표시장치모듈
US11309370B1 (en) Electronic device displays with curved surfaces
US20240049519A1 (en) Flexible display panel, manufacturing method thereof, and electronic device
KR20200115757A (ko) 회로기판 및 이의 제조방법
CN113745393A (zh) 显示基板、显示面板和显示装置
JP2006210809A (ja) 配線基板および実装構造体、電気光学装置および電子機器

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 21738812

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 21738812

Country of ref document: EP

Kind code of ref document: A1

122 Ep: pct application non-entry in european phase

Ref document number: 21738812

Country of ref document: EP

Kind code of ref document: A1

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205 DATED 09/02/2023)

122 Ep: pct application non-entry in european phase

Ref document number: 21738812

Country of ref document: EP

Kind code of ref document: A1