WO2021114476A1 - 一种柔性显示面板及其制造方法 - Google Patents

一种柔性显示面板及其制造方法 Download PDF

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Publication number
WO2021114476A1
WO2021114476A1 PCT/CN2020/075831 CN2020075831W WO2021114476A1 WO 2021114476 A1 WO2021114476 A1 WO 2021114476A1 CN 2020075831 W CN2020075831 W CN 2020075831W WO 2021114476 A1 WO2021114476 A1 WO 2021114476A1
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WIPO (PCT)
Prior art keywords
insulating layer
electrode
layer
connection line
drain
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Application number
PCT/CN2020/075831
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English (en)
French (fr)
Inventor
明星
Original Assignee
武汉华星光电半导体显示技术有限公司
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Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US16/769,701 priority Critical patent/US11424311B2/en
Publication of WO2021114476A1 publication Critical patent/WO2021114476A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/301—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements flexible foldable or roll-able electronic displays, e.g. thin LCD, OLED
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/70—Testing, e.g. accelerated lifetime tests
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/311—Flexible OLED
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
    • H10K71/231—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers

Definitions

  • This application relates to the field of display technology, and in particular to a flexible display panel and a manufacturing method thereof.
  • the flexible display panel has the advantages of low power consumption and small size due to its bendable and foldable characteristics, so it has been widely promoted.
  • the current flexible display panel includes a display area and a non-display area.
  • a TFT switch tube is arranged in the display area, including a gate electrode, a source electrode and a drain electrode, and a metal connection line is arranged on the source electrode and the drain electrode for connecting the source electrode or the drain electrode and the pixel electrode. When the source and drain electrodes and the metal connection lines are made, the corresponding metal layer is patterned.
  • the patterning of the same metal layer as the source and drain forms a signal connection line electrically connected to the source or drain for Signal transmission during testing and subsequent practical applications.
  • the metal of the same metal layer as the metal connection line will also be patterned, but because the film layer above the signal connection line is too thin, it is easy to etch the upper metal connection line metal layer to form a patterned metal connection line. Etch away the signal connection line, which leads to a disconnection.
  • the main technical problem solved by the present application is to provide a flexible display panel and a manufacturing method thereof, which can ensure the integrity of signal connection lines in the non-display area.
  • a technical solution adopted in this application is to provide a method for manufacturing a flexible display panel, the flexible display panel including a display area and a non-display area, and the manufacturing method includes:
  • the active layer and the gate electrode of the switch tube of the flexible display panel are sequentially arranged on the substrate, wherein the switch tube is in the display area;
  • the source and drain of the switch tube are arranged on the gate, and a signal connection line in the same layer as the source and drain is arranged in the non-display area, and the signal connection line is used for connection The source electrode or the drain electrode and an external test circuit;
  • a first insulating layer and a metal connecting line are sequentially arranged on the source and the drain, a pixel electrode layer is arranged on the metal connecting line, and the metal connecting line is electrically connected to the source or the drain , To transmit the signal of the source electrode or the drain electrode to the pixel electrode layer, wherein the first insulating layer and/or the metal connecting line further extend into the non-display area, and Covering the signal connection line.
  • the insulating layer and/or the metal connecting line further extending into the non-display area and covering the signal connecting line includes:
  • a first insulating layer and a pixel connecting layer are sequentially arranged on the source electrode and the drain electrode, and after the first insulating layer and the pixel connecting layer are arranged, the first insulating layer is etched by a mask.
  • Layer and the pixel connection layer are patterned, and the mask pattern corresponding to the first insulating layer and/or the mask pattern of the metal connection line masks the signal connection line on the non-display area to After etching, the first insulating layer and/or the metal connection line on the signal connection line in the non-display area remain.
  • the method before the arranging the source and drain of the switch tube on the gate, the method includes:
  • a storage electrode is arranged on the gate, and the storage electrode and the gate form a storage capacitor.
  • the method before arranging the storage electrode on the gate, the method includes:
  • the arranging a storage electrode on the gate includes:
  • the method Before arranging the source and drain of the switch tube on the gate, the method includes:
  • the manufacturing method further includes:
  • the arranging the source and drain of the switch tube on the gate includes:
  • the source electrode and the drain electrode are arranged on the three insulating layers, and the source electrode and the drain electrode are respectively electrically connected to the active layer through the via hole.
  • the manufacturing method further includes:
  • a first filling hole is provided on the substrate, a second filling hole is provided on the second insulating layer, the third insulating layer, and the fourth insulating layer, and the first filling hole and the second filling hole are connected Set up
  • a flexible material is arranged in the first filling hole and the second filling hole for filling.
  • a flexible display panel including a display area and a non-display area, and the flexible display panel further includes:
  • the active layer and the gate of the switch tube are sequentially arranged on the substrate, wherein the switch tube is located in the display area;
  • the source and drain of the switch tube are arranged on the gate;
  • a signal connection line is arranged in the non-display area and is arranged on the same layer as the source electrode and the drain electrode, and the signal connection line is used to connect the source electrode or the drain electrode and an external test circuit;
  • the first insulating layer and the metal connection line are sequentially arranged on the source and the drain, the metal connection line is provided with a pixel electrode layer, and the metal connection line is electrically connected to the source or the drain. Connected to transmit the signal of the source electrode or the drain electrode to the pixel electrode layer, wherein the first insulating layer and/or the metal connecting line further extend into the non-display area, And cover the signal connection line.
  • the flexible display panel further includes:
  • the storage electrode is arranged on the gate, and the storage electrode and the gate form a storage capacitor.
  • the flexible display panel further includes:
  • the second insulating layer is arranged on the gate, and the storage electrode is arranged on the second insulating layer;
  • the third insulating layer is arranged on the storage capacitor
  • the fourth insulating layer is arranged on the active layer.
  • the flexible display panel further includes:
  • Two via holes are provided on the second insulating layer and the third insulating layer, the via holes respectively expose both ends of the active layer, and the third insulating layer is provided with the The source electrode and the drain electrode, and the source electrode and the drain electrode are respectively electrically connected to the active layer through the via hole.
  • the flexible display panel further includes:
  • a first filling hole is provided on the substrate, a second filling hole is provided on the second insulating layer, the third insulating layer, and the fourth insulating layer, and the first filling hole and the second filling hole are connected Setting, arranging a flexible material for filling in the first filling hole and the second filling hole.
  • the beneficial effect of the present application is: different from the prior art, the present application provides a flexible display panel and a manufacturing method thereof.
  • the manufacturing method includes: providing a substrate; and sequentially arranging switch tubes of the flexible display panel on the substrate. Active layer and gate, wherein the switch tube is in the display area; the source and drain of the switch tube are arranged on the gate, and the switch tube is arranged in the non-display area
  • the source and drain are in the same layer of the signal connection line, the signal connection line is used to connect the source or the drain to an external test circuit; the source and the drain are sequentially arranged on the first An insulating layer and a metal connection line, where a pixel electrode layer is provided on the metal connection line, and the metal connection line is electrically connected to the source or the drain to transmit the signal of the source or the drain Into the pixel electrode layer, wherein the first insulating layer and/or the metal connection line further extend into the non-display area and cover the signal connection line.
  • the present application provides the first insulating layer and/or the metal connection line on the signal connection line, thereby increasing the thickness of the film layer on the signal connection line, and also avoiding the over-etching of the metal connection line when etching the metal connection line.
  • the signal connection line is etched away, causing a disconnection.
  • FIG. 1 is a schematic cross-sectional structure diagram of a flexible display panel provided by an embodiment of the present application
  • FIG. 2 is a schematic diagram of a planar structure of the flexible display panel shown in FIG. 1;
  • FIG. 3 is a schematic cross-sectional structure diagram of another flexible display panel provided by an embodiment of the present application.
  • FIG. 4 is a schematic diagram of a planar structure of the flexible display panel shown in FIG. 3;
  • FIG. 5 is a schematic flowchart of a method for manufacturing a flexible display panel provided by an embodiment of the present application.
  • Example embodiments will now be described more fully with reference to the accompanying drawings.
  • the example embodiments can be implemented in various forms, and should not be construed as being limited to the examples set forth herein; on the contrary, the provision of these embodiments makes this application more comprehensive and complete, and fully conveys the concept of the example embodiments To those skilled in the art.
  • the described features, structures or characteristics can be combined in one or more embodiments in any suitable way.
  • FIG. 1 is a schematic cross-sectional view of a flexible display panel provided by an embodiment of the present application
  • FIG. 2 is a schematic plan view of the flexible display panel shown in FIG.
  • the flexible display panel 100 of the present application may be a flexible AMOLED (Active-matrix organic light-emitting diode, active matrix organic light-emitting diode) display panel.
  • the display panel 100 includes a display area 101 and a non-display area 102.
  • the non-display area 102 includes a chip area 121 and a test bonding area 122.
  • the display area 101 is provided with an OLED (not shown) and a switch tube for driving the OLED to display.
  • the flexible display panel 100 includes a substrate 103, a switch tube 104 and a pixel electrode layer 106.
  • the substrate 103 may be a multi-layer composite structure, which may include a PI (polyimide) layer 131, an isolation layer 132, a PI (polyimide) layer 133, an isolation layer 134, and a buffer layer 135 arranged in sequence.
  • the base 103 can be used as a substrate of the switch tube 104 and other components.
  • the switch tube 104 is disposed in the display area 101, and it can be a TFT transistor, which includes a gate 141, an active layer 142, a source 143 and a drain 144.
  • the active layer 142 is disposed on the substrate 103, and specifically may be disposed on the side of the buffer layer 135 away from the isolation layer 134.
  • the active layer 142 may be formed of a polysilicon material to form a semiconductor.
  • the gate 141 is provided on the active layer 142.
  • the source electrode 143 and the drain electrode 144 are arranged on the gate 141 in the same layer, and are ohmically connected to both ends of the active layer 142.
  • the flexible display panel 100 further includes a metal connection line 105 disposed on the source electrode 143 and the drain electrode 144.
  • the pixel electrode layer 106 is provided on the metal connection line 105.
  • the metal connection line 105 is electrically connected to the source electrode 143 or the drain electrode 144 to transmit the signal of the source electrode 143 or the drain electrode 144 to the pixel electrode 106.
  • the metal connection line 105 is electrically connected to the drain 144. It should be understood that in other embodiments, the metal connection line 105 may also be electrically connected to the source electrode 143.
  • the active layer 142 can be controlled to be turned on, so that the source 143 and the drain 144 are connected through the conductive active layer 142.
  • the source 143 receives the data signal
  • the drain 144 may also receive the data signal and transmit it to the corresponding source 143 through the active layer 142.
  • the flexible display panel 100 further includes a signal connection line 107 and a first insulating layer 108.
  • the signal connection line 107 is arranged in the non-display area 102 and is arranged in the same layer as the source electrode 143 and the drain electrode 144, and the signal connection line 107 is used to connect the source electrode 143 or the drain electrode 144 with an external test circuit.
  • the signal connection line 107 can be made of the same metal as the source electrode 143 and the drain electrode 144, or can be formed in the same process.
  • the first insulating layer 108 is disposed on the source electrode 143 and the drain electrode 144, and the metal connection line 105 is disposed on the first insulating layer 108. That is, the first insulating layer 108 connects the source electrode 143 and the drain electrode 144 with the metal connection line 105. Separately, the metal connecting wire is electrically connected to the source electrode 142 through the via hole. Wherein, the first insulating layer 108 and/or the metal connection line 105 further extend into the non-display area 102 and cover the signal connection line 107.
  • the metal connection line 105 extends into the IC area 121 of the non-display area 102 and covers the signal connection line 107.
  • the position of the first insulating layer 108 in the IC region 121 corresponding to the signal connection line 107 is patterned and etched away.
  • the signal connection line 107 and the metal connection line 105 are electrically connected in the test bonding area 122.
  • the first insulating layer 108 extends into the IC area 121 of the non-display area 102 and covers the signal connection line 107.
  • the position of the metal connection line 105 in the IC area 121 corresponding to the signal connection line 107 is patterned and etched away.
  • the signal connection line 107 and the metal connection line 105 are electrically connected in the test bonding area 122.
  • the first insulating layer 108 and the metal connection line 105 extend into the IC area 121 of the non-display area 102 and cover the signal connection line 107.
  • the signal connection line 107 and the metal connection line 105 are electrically connected in the test bonding area 122.
  • the flexible display panel 100 further includes a storage electrode 109, the storage electrode 109 is disposed on the gate 141, and the storage electrode 109 and the gate 141 form a storage capacitor.
  • the flexible display panel 100 further includes a second insulating layer 110, a third insulating layer 111, and a fourth insulating layer 114.
  • the second insulating layer 110 is disposed on the gate 141, and the storage electrode 109 is disposed on the second insulating layer 110.
  • the third insulating layer 111 is disposed on the storage electrode 109 and may include a composite double-layer insulating layer 112 and 113 structure.
  • the fourth insulating layer 114 is disposed on the active layer 142, that is, between the active layer 142 and the gate 141.
  • two via holes M1 and M2 are provided on the second insulating layer 110, the third insulating layer 111, and the fourth insulating layer 114.
  • the via holes M1 and M2 respectively expose both ends of the active layer 142, and the source electrode 143 and the drain electrode 144 are disposed on the third insulating layer 111. And the source electrode 143 and the drain electrode 144 are electrically connected to the active layer 142 through the via holes M1 and M2, respectively.
  • a first filling hole M3 is provided on the substrate 103, and a second filling hole M4 is provided on the second insulating layer 110, the third insulating layer 111, and the fourth insulating layer 114.
  • the first filling hole M3 and the second filling hole M4 are provided with a flexible PI material in the first filling hole M3 and the second filling hole M4.
  • the flexible display panel 100 also includes a PV (polyvinyl chloride) layer 116, which is disposed on the source electrode 142 and the drain electrode 143 to protect the metal of the source electrode 142 and the drain electrode 143 and prevent water vapor from being along the source electrode 142 and the drain electrode 143. Metal entering the display area causes the AMOLDE device to fail.
  • PV polyvinyl chloride
  • the manufacturing method includes the following steps:
  • Step S1 Provide a substrate.
  • the substrate may be a multilayer composite structure, which may include a PI (polyimide) layer, an isolation layer, a PI (polyimide) layer, an isolation layer, and a buffer layer arranged in sequence.
  • the base can be used as the substrate of the switch tube and other components.
  • Step S2 sequentially arranging the active layer and the gate electrode of the switch tube of the flexible display panel on the substrate, wherein the switch tube is in the display area.
  • Step S3 Set the source and drain of the switch tube on the gate, and set a signal connection line in the same layer as the source and drain in the non-display area, the signal connection line Used to connect the source or the drain to an external test circuit.
  • Step S4 A first insulating layer and a metal connection line are sequentially arranged on the source electrode and the drain electrode, a pixel electrode layer is arranged on the metal connection line, and the metal connection line is connected to the source electrode or the drain electrode.
  • the electrode is electrically connected to transmit the signal of the source electrode or the drain electrode to the pixel electrode layer, wherein the first insulating layer and/or the metal connection line further extend to the non-display area In, and covered on the signal connection line.
  • a storage electrode is provided on the gate, and the storage electrode and the gate form a storage capacitor.
  • a second insulating layer can be provided on the gate, and the storage electrode can be provided on the second insulating layer.
  • a third insulating layer is provided on the storage capacitor, and a fourth insulating layer is provided on the active layer.
  • Two via holes are provided on the second insulating layer, the third insulating layer, and the fourth insulating layer, and the via holes respectively expose the two ends of the active layer.
  • the source electrode and the drain electrode are arranged on the layer, and the source electrode and the drain electrode are respectively electrically connected with the active layer through the via hole.
  • Step S4 further includes: sequentially disposing a first insulating layer and a pixel connection layer on the source electrode and the drain electrode, and after disposing the first insulating layer and the pixel connection layer, performing mask etching
  • the first insulating layer and the pixel connection layer are patterned, and the mask pattern corresponding to the first insulating layer and/or the mask pattern of the metal connection line is connected to the signal on the non-display area
  • the lines are masked, so that the first insulating layer and/or the metal connection lines on the signal connection lines in the non-display area remain after etching.
  • the metal connection line 105 extends into the IC area 121 of the non-display area 102 and covers the signal connection line 107.
  • the position of the first insulating layer 108 in the IC region 121 corresponding to the signal connection line 107 is patterned and etched away.
  • the signal connection line 107 and the metal connection line 105 are electrically connected in the bonding area 122.
  • the first insulating layer 108 extends into the IC area 121 of the non-display area 102 and covers the signal connection line 107.
  • the position of the metal connection line 105 in the IC area 121 corresponding to the signal connection line 107 is patterned and etched away.
  • the signal connection line 107 and the metal connection line 105 are electrically connected in the bonding area 122.
  • the first insulating layer 108 and the metal connection line 105 extend into the IC area 121 of the non-display area 102 and cover the signal connection line 107.
  • the signal connection line 107 and the metal connection line 105 are electrically connected in the bonding area 122.
  • the method of this embodiment further includes: arranging a first filling hole on the substrate, arranging a second filling hole on the second insulating layer, the third insulating layer, and the fourth insulating layer, and the first filling hole It is arranged in communication with the second filling hole, and a flexible material is arranged for filling in the first filling hole and the second filling hole.
  • the present application provides the first insulating layer and/or the metal connection line on the signal connection line, thereby increasing the thickness of the film on the signal connection line, and also avoiding the over-etching of the metal connection line when etching the metal connection line.
  • the signal connection line is etched away by corrosion, causing a disconnection.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)

Abstract

本申请公开了一种柔性显示面板及其制造方法。制造方法包括：在基底上依次设置有源层和栅极，其中，开关管处于显示区中；在栅极上设置源极和漏极，并且在非显示区中设置与源极和漏极同层的信号连接线；在源极和漏极上依次设置第一绝缘层和金属连接线，其中，第一绝缘层和\或金属连接线进一步延伸到非显示区中，且覆盖在所述信号连接线上。本申请增加了信号连接线上的膜层的厚度，也避免了刻蚀金属连接线时由于过刻蚀而将信号连接线刻蚀掉，从而造成断路的现象。

Description

一种柔性显示面板及其制造方法 技术领域
本申请涉及显示技术领域，尤其是涉及一种柔性显示面板及其制造方法。
 背景技术
柔性显示面板由于其具有可弯曲折叠的特性，具有功耗低、体积小的优点，因此受到广泛的推广。目前柔性显示面板包括显示区和非显示区。在显示区设置TFT开关管，包括栅极、源极和漏极，并且在源极和漏极上设置金属连接线，用于连接源极或漏极与像素电极。在制作源极和漏极以及金属连接线时，会将对应的金属层进行图案化处理。其中，在非显示区中，例如面板外围IC或者绑定区域等，图案化处理后，与源极和漏极同一金属层的图案化形成电连接源极或者漏极的信号连接线，用于进行测试以及后续实际应用时信号的传输。
 技术问题
与金属连接线同一金属层的金属也会图案化，但由于信号连接线上方的膜层太薄，从而在刻蚀其上层的金属连接线金属层，以形成图案化的金属连接线时，容易将信号连接线刻蚀掉，从而导致断路的现象。
 技术解决方案
本申请主要解决的技术问题是提供一种柔性显示面板及其制造方法，能够保证非显示区中的信号连接线的完整性。
为解决上述技术问题，本申请采用的一个技术方案是：提供一种柔性显示面板的制造方法，所述柔性显示面板包括显示区和非显示区，所述制造方法包括：
提供一基底；
在所述基底上依次设置柔性显示面板的开关管的有源层和栅极，其中，所述开关管处于所述显示区中；
在所述栅极上设置所述开关管的源极和漏极，并且在所述非显示区中设置与所述源极和漏极同层的信号连接线，所述信号连接线用于连接所述源极或所述漏极与外部的测试电路；
在所述源极和所述漏极上依次设置第一绝缘层和金属连接线，所述金属连接线上设置像素电极层，所述金属连接线与所述源极或所述漏极电连接，以将所述源极或所述漏极的信号传输到所述像素电极层中，其中，所述第一绝缘层和\或所述金属连接线进一步延伸到所述非显示区中，且覆盖在所述信号连接线上。
可选的，所述绝缘层和\或所述金属连接线进一步延伸到所述非显示区中，且覆盖在所述信号连接线上包括：
在所述源极和所述漏极上依次设置第一绝缘层和像素连接层，并且设置所述第一绝缘层和所述像素连接层后通过掩膜刻蚀的方式对所述第一绝缘层以及所述像素连接层进行图案化处理，所述第一绝缘层对应的掩膜图案和\或所述金属连接线的掩膜图案对所述非显示区上的信号连接线进行掩盖，以使得刻蚀后保留位于所述非显示区的信号连接线上所述第一绝缘层和\或所述金属连接线。
可选的，所述在所述栅极上设置所述开关管的源极和漏极之前，包括：
在所述栅极上设置存储电极，所述存储电极与所述栅极形成存储电容。
可选的，所述在所述栅极上设置存储电极之前，包括：
在所述栅极上设置第二绝缘层；
所述在所述栅极上设置存储电极，包括：
在所述第二绝缘层上设置所述存储电极；
所述在所述栅极上设置所述开关管的源极和漏极之前，包括：
在所述存储电容上设置第三绝缘层；
所述制造方法还包括：
在所述有源层上设置第四绝缘层；
所述在所述栅极上设置所述开关管的源极和漏极包括：
在所述第二绝缘层、所述第三绝缘层和所述第四绝缘层上设置两个导通孔，所述导通孔分别将所述有源层的两端外露，在所述第三绝缘层上设置所述源极和所述漏极，并且所述源极和所述漏极分别通过所述导通孔与所述有源层电连接。
可选的，所述制造方法还包括：
在所述有源层上设置第四绝缘层；
在所述基底上设置第一填充孔，在所述第二绝缘层、第三绝缘层和第四绝缘层上设置第二填充孔，并且所述第一填充孔和所述第二填充孔联通设置；
在所述第一填充孔和所述第二填充孔中设置柔性材料进行填充。
为解决上述技术问题，本申请采用的另一个技术方案是：提供一种柔性显示面板，所述柔性显示面板包括显示区和非显示区，所述柔性显示面板进一步包括：
基底；
开关管的有源层和栅极，依次设置在所述基底上，其中，所述开关管处于所述显示区中；
所述开关管的源极和漏极，设置在所述栅极上；
信号连接线，设置在所述非显示区中，且与所述源极和漏极同层设置，所述信号连接线用于连接所述源极或所述漏极与外部的测试电路；
第一绝缘层和金属连接线，依次设置在所述源极和所述漏极上，所述金属连接线上设置像素电极层，所述金属连接线与所述源极或所述漏极电连接，以将所述源极或所述漏极的信号传输到所述像素电极层中，其中，所述第一绝缘层和\或所述金属连接线进一步延伸到所述非显示区中，且覆盖在所述信号连接线上。
可选的，所述柔性显示面板还包括：
存储电极，设置在所述栅极上，所述存储电极与所述栅极形成存储电容。
可选的，所述柔性显示面板还包括：
第二绝缘层，设置在所述栅极上，所述存储电极设置在所述第二绝缘层上；
第三绝缘层，设置在所述存储电容上；
第四绝缘层，设置在所述有源层上。
可选的，所述柔性显示面板还包括：
在所述第二绝缘层和所述第三绝缘层上设置两个导通孔，所述导通孔分别将所述有源层的两端外露，在所述第三绝缘层上设置所述源极和所述漏极，并且所述源极和所述漏极分别通过所述导通孔与所述有源层电连接。
可选的，所述柔性显示面板还包括：
在所述基底上设置第一填充孔，在所述第二绝缘层、第三绝缘层和第四绝缘层上设置第二填充孔，并且所述第一填充孔和所述第二填充孔联通设置，在所述第一填充孔和所述第二填充孔中设置柔性材料进行填充。
 有益效果
本申请的有益效果是：区别于现有技术的情况，本申请提供一种柔性显示面板及其制造方法，制造方法包括：提供一基底；在所述基底上依次设置柔性显示面板的开关管的有源层和栅极，其中，所述开关管处于所述显示区中；在所述栅极上设置所述开关管的源极和漏极，并且在所述非显示区中设置与所述源极和漏极同层的信号连接线，所述信号连接线用于连接所述源极或所述漏极与外部的测试电路；在所述源极和所述漏极上依次设置第一绝缘层和金属连接线，所述金属连接线上设置像素电极层，所述金属连接线与所述源极或所述漏极电连接，以将所述源极或所述漏极的信号传输到所述像素电极层中，其中，所述第一绝缘层和\或所述金属连接线进一步延伸到所述非显示区中，且覆盖在所述信号连接线上。
也就是说，本申请在信号连接线上设置第一绝缘层和\或金属连接线，从而增加了信号连接线上的膜层的厚度，并且也避免了刻蚀金属连接线时由于过刻蚀而将信号连接线刻蚀掉，从而造成断路的现象。
 附图说明
图1是本申请实施例提供的一种柔性显示面板的剖面结构示意图；
图2是图1所示的柔性显示面板的平面结构示意图；
图3是本申请实施例提供的另一种柔性显示面板的剖面结构示意图；
图4是图3所示的柔性显示面板的平面结构示意图；
图5是本申请实施例提供的一种柔性显示面板的制造方法的流程示意图。
 本发明的实施方式
现在将参考附图更全面地描述示例实施方式。然而，示例实施方式能够以多种形式实施，且不应被理解为限于在此阐述的范例；相反，提供这些实施方式使得本申请将更加全面和完整，并将示例实施方式的构思全面地传达给本领域的技术人员。所描述的特征、结构或特性可以以任何合适的方式结合在一个或更多实施方式中。
此外，附图仅为本申请的示意性图解，并非一定是按比例绘制。图中相同的附图标记表示相同或类似的部分，因而将省略对它们的重复描述。附图中所示的一些方框图是功能实体，不一定必须与物理或逻辑上独立的实体相对应。可以采用软件形式来实现这些功能实体，或在一个或多个硬件模块或集成电路中实现这些功能实体，或在不同网络和/或处理器装置和/或微控制器装置中实现这些功能实体。
请参阅图1和图2，图1是本申请实施例提供的一种柔性显示面板的剖面结果示意图；如图2是图1所示的柔性显示面板的平面结构示意图。如图1和图2所示，本申请的柔性显示面板100可为柔性AMOLED（Active-matrix organic light-emitting diode，有源矩阵有机发光二极体）显示面板。显示面板100包括显示区101和非显示区102。非显示区102包括芯片区域121和测试绑定区域122。显示区101设置有OLED（图未示）和驱动OLED进行显示的开关管。
柔性显示面板100包括基底103、开关管104以及像素电极层106。
基底103可为多层复合结构，其可包括依次设置的PI（聚酰亚胺）层131、隔离层132、PI（聚酰亚胺）层133、隔离层134以及缓冲层135。基底103可作为开关管104等元件的衬底。
开关管104设置在显示区101中，其可为TFT晶体管，其包括栅极141、有源层142、源极143以及漏极144。
其中，有源层142设置在基底103上，具体可设置在缓冲层135远离隔离层134的一侧。有源层142可采用多晶硅材料形成半导体。栅极141设置在有源层142上。源极143和漏极144同层设置在栅极141上，并与有源层142的两端欧姆连接。
柔性显示面板100还包括金属连接线105，设置在源极143和漏极144上。金属连接线105上设置像素电极层106。金属连接线105与源极143或漏极144电连接，以将源极143或漏极144的信号传输到像素电极106中。本实施例中，如图1所示，金属连接线105与漏极144电连接。应理解，在其他实施例中，金属连接线105还可与源极143电连接。
因此，在栅极141接收到栅极驱动信号时，可控制有源层142导通，从而源极143和漏极144通过导通的有源层142连通，当源极143接收到数据信号时，可通过有源层142传输到对应的漏极144，进一步再通过金属连接线105传输到像素电极层106上，驱动像素电极层106进行像素显示。
在其他实施例中，也可漏极144接收数据信号，通过有源层142传输到对应的源极143。
柔性显示面板100还包括信号连接线107和第一绝缘层108。
信号连接线107设置在非显示区102中，且与源极143和漏极144同层设置，信号连接线107用于连接源极143或漏极144与外部的测试电路。在实际应用中，信号连接线107可采用与源极143和漏极144同种金属，也可同一个工艺流程形成。
第一绝缘层108设置在源极143和漏极144上，金属连接线105设置在第一绝缘层108上，也就是，第一绝缘层108将源极143和漏极144与金属连接线105隔开，其中，金属连接线通过导通孔与源极142电连接。其中，第一绝缘层108和\或金属连接线105进一步延伸到非显示区102中，且覆盖在信号连接线107上。
具体的，在一实施例中，如图1和图2所示，金属连接线105延伸到非显示区102的IC区域121中，且覆盖在信号连接线107上。第一绝缘层108在IC区域121中对应信号连接线107的位置被图案化刻蚀掉。信号连接线107和金属连接线105在测试绑定区域122中电性连接。
在另一实施例中，如图3和图4所示，第一绝缘层108延伸到非显示区102的IC区域121中，且覆盖在信号连接线107上。金属连接线105在IC区域121中对应信号连接线107的位置被图案化刻蚀掉。信号连接线107和金属连接线105在测试绑定区域122中电性连接。
在另一实施例中，第一绝缘层108和金属连接线105延伸到非显示区102的IC区域121中，且覆盖在信号连接线107上。信号连接线107和金属连接线105在测试绑定区域122中电性连接。
柔性显示面板100还包括存储电极109，存储电极109设置在栅极141上，存储电极109与栅极141形成存储电容。
柔性显示面板100还包括第二绝缘层110、第三绝缘层111、第四绝缘层114。
其中，第二绝缘层110设置栅极141上，存储电极109设置在第二绝缘层110上。第三绝缘层111设置在存储电极109上，其可包括复合的双层绝缘层112和113结构。第四绝缘层114设置在有源层142上，即位于有源层142和栅极141之间。
进一步的，在第二绝缘层110、第三绝缘层111和第四绝缘层114上设置两个导通孔M1和M2。导通孔M1和M2分别将有源层142两端外露，源极143和漏极144设置在第三绝缘层111上。并且源极143和漏极144分别通过导通孔M1和M2与有源层142电连接。
在基底103上设置第一填充孔M3，在第二绝缘层110、第三绝缘层111、第四绝缘层114上设置第二填充孔M4。并且第一填充孔M3和第二填充孔M4，在第一填充孔M3和第二填充孔M4中设置柔韧性较好的PI材料。
柔性显示面板100还包括PV（聚氯乙烯）层116，设置在源极142和漏极143上，用于保护源极142和漏极143的金属，避免水汽沿着源极142和漏极143金属进入显示区造成AMOLDE器件失效。
请参阅图5，基于前文所述的柔性显示面板，还提供了一种柔性显示面板的制造方法。该制造方法包括以下步骤：
步骤S1: 提供一基底。
基底可为多层复合结构，其可包括依次设置的PI（聚酰亚胺）层、隔离层、PI（聚酰亚胺）层、隔离层以及缓冲层。基底可作为开关管等元件的衬底。
步骤S2:在所述基底上依次设置柔性显示面板的开关管的有源层和栅极，其中，所述开关管处于所述显示区中。
步骤S3:在所述栅极上设置所述开关管的源极和漏极，并且在所述非显示区中设置与所述源极和漏极同层的信号连接线，所述信号连接线用于连接所述源极或所述漏极与外部的测试电路。
步骤S4:在所述源极和所述漏极上依次设置第一绝缘层和金属连接线，所述金属连接线上设置像素电极层，所述金属连接线与所述源极或所述漏极电连接，以将所述源极或所述漏极的信号传输到所述像素电极层中，其中，所述第一绝缘层和\或所述金属连接线进一步延伸到所述非显示区中，且覆盖在所述信号连接线上。
其中，在步骤S3之前，在所述栅极上设置存储电极，所述存储电极与所述栅极形成存储电容。具体的，可在所述栅极上设置第二绝缘层，在第二绝缘层上设置所述存储电极。
进一步的，在所述存储电容上设置第三绝缘层，在所述有源层上设置第四绝缘层。在所述第二绝缘层、所述第三绝缘层和第四绝缘层上设置两个导通孔，所述导通孔分别将所述有源层的两端外露，在所述第三绝缘层上设置所述源极和所述漏极，并且所述源极和所述漏极分别通过所述导通孔与所述有源层电连接。
步骤S4进一步包括：在所述源极和所述漏极上依次设置第一绝缘层和像素连接层，并且设置所述第一绝缘层和所述像素连接层后通过掩膜刻蚀的方式对所述第一绝缘层以及所述像素连接层进行图案化处理，所述第一绝缘层对应的掩膜图案和\或所述金属连接线的掩膜图案对所述非显示区上的信号连接线进行掩盖，以使得刻蚀后保留位于所述非显示区的信号连接线上所述第一绝缘层和\或所述金属连接线。
具体的，在一实施例中，如图1所示，金属连接线105延伸到非显示区102的IC区域121中，且覆盖在信号连接线107上。第一绝缘层108在IC区域121中对应信号连接线107的位置被图案化刻蚀掉。信号连接线107和金属连接线105在绑定区域122中电性连接。
在另一实施例中，如图3所示，第一绝缘层108延伸到非显示区102的IC区域121中，且覆盖在信号连接线107上。金属连接线105在IC区域121中对应信号连接线107的位置被图案化刻蚀掉。信号连接线107和金属连接线105在绑定区域122中电性连接。
在另一实施例中，第一绝缘层108和金属连接线105延伸到非显示区102的IC区域121中，且覆盖在信号连接线107上。信号连接线107和金属连接线105在绑定区域122中电性连接。
本实施例的方法进一步包括：在所述基底上设置第一填充孔，在所述第二绝缘层、第三绝缘层和第四绝缘层上设置第二填充孔，并且所述第一填充孔和所述第二填充孔联通设置，并且在所述第一填充孔和所述第二填充孔中设置柔性材料进行填充。
综上所述，本申请在信号连接线上设置第一绝缘层和\或金属连接线，从而增加了信号连接线上的膜层的厚度，并且也避免了刻蚀金属连接线时由于过刻蚀而将信号连接线刻蚀掉，从而造成断路的现象。
此外，上述附图仅是根据本申请示例性实施例的方法所包括的处理的示意性说明，而不是限制目的。易于理解，上述附图所示的处理并不表明或限制这些处理的时间顺序。另外，也易于理解，这些处理可以是例如在多个模块中同步或异步执行的。
本领域技术人员在考虑说明书及实践这里公开的发明后，将容易想到本申请的其他实施例。本申请旨在涵盖本申请的任何变型、用途或者适应性变化，这些变型、用途或者适应性变化遵循本申请的一般性原理并包括本申请未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的，本申请的真正范围和精神由权利要求指出。
应当理解的是，本申请并不局限于上面已经描述并在附图中示出的精确结构，并且可以在不脱离其范围进行各种修改和改变。本申请的范围仅由所附的权利要求来限。

Claims (11)

  1. 一种柔性显示面板的制造方法，其特征在于，所述柔性显示面板包括显示区和非显示区，所述制造方法包括：
    提供一基底；
    在所述基底上依次设置柔性显示面板的开关管的有源层和栅极，其中，所述开关管处于所述显示区中；
    在所述栅极上设置存储电极，所述存储电极与所述栅极形成存储电容；
    在所述栅极上设置所述开关管的源极和漏极，并且在所述非显示区中设置与所述源极和漏极同层的信号连接线，所述信号连接线用于连接所述源极或所述漏极与外部的测试电路；
    在所述源极和所述漏极上依次设置第一绝缘层和金属连接线，所述金属连接线上设置像素电极层，所述金属连接线与所述源极或所述漏极电连接，以将所述源极或所述漏极的信号传输到所述像素电极层中；
    在所述源极和所述漏极上依次设置第一绝缘层和像素连接层，并且设置所述第一绝缘层和所述像素连接层后通过掩膜刻蚀的方式对所述第一绝缘层以及所述像素连接层进行图案化处理，所述第一绝缘层对应的掩膜图案和\或所述金属连接线的掩膜图案对所述非显示区上的信号连接线进行掩盖，以使得刻蚀后保留位于所述非显示区的信号连接线上所述第一绝缘层和\或所述金属连接线。
  2. 一种柔性显示面板的制造方法，其中，所述柔性显示面板包括显示区和非显示区，所述制造方法包括：
    提供一基底；
    在所述基底上依次设置柔性显示面板的开关管的有源层和栅极，其中，所述开关管处于所述显示区中；
    在所述栅极上设置所述开关管的源极和漏极，并且在所述非显示区中设置与所述源极和漏极同层的信号连接线，所述信号连接线用于连接所述源极或所述漏极与外部的测试电路；
    在所述源极和所述漏极上依次设置第一绝缘层和金属连接线，所述金属连接线上设置像素电极层，所述金属连接线与所述源极或所述漏极电连接，以将所述源极或所述漏极的信号传输到所述像素电极层中，其中，所述第一绝缘层和\或所述金属连接线进一步延伸到所述非显示区中，且覆盖在所述信号连接线上。
  3. 根据权利要求2所述的制造方法，其中，所述第一绝缘层和\或所述金属连接线进一步延伸到所述非显示区中，且覆盖在所述信号连接线上包括：
    在所述源极和所述漏极上依次设置第一绝缘层和像素连接层，并且设置所述第一绝缘层和所述像素连接层后通过掩膜刻蚀的方式对所述第一绝缘层以及所述像素连接层进行图案化处理，所述第一绝缘层对应的掩膜图案和\或所述金属连接线的掩膜图案对所述非显示区上的信号连接线进行掩盖，以使得刻蚀后保留位于所述非显示区的信号连接线上所述第一绝缘层和\或所述金属连接线。
  4. 根据权利要求2所述的制造方法，其中，所述在所述栅极上设置所述开关管的源极和漏极之前，包括：
    在所述栅极上设置存储电极，所述存储电极与所述栅极形成存储电容。
  5. 根据权利要求4所述的制造方法，其中，所述在所述栅极上设置存储电极之前，包括：
    在所述栅极上设置第二绝缘层；
    所述在所述栅极上设置存储电极，包括：
    在所述第二绝缘层上设置所述存储电极；
    所述在所述栅极上设置所述开关管的源极和漏极之前，包括：
    在所述存储电极上设置第三绝缘层；
    所述制造方法还包括：
    在所述有源层上设置第四绝缘层；
    所述在所述栅极上设置所述开关管的源极和漏极包：
    在所述第二绝缘层、所述第三绝缘层和所述第四绝缘层上设置两个导通孔，所述导通孔分别将所述有源层的两端外露，在所述第三绝缘层上设置所述源极和所述漏极，并且所述源极和所述漏极分别通过所述导通孔与所述有源层电连接。
  6. 根据权利要求5所述的制造方法，其中，所述制造方法还包括：
    在所述基底上设置第一填充孔，在所述第二绝缘层、第三绝缘层和第四绝缘层上设置第二填充孔，并且所述第一填充孔和所述第二填充孔联通设置；
    在所述第一填充孔和所述第二填充孔中设置柔性材料进行填充。
  7. 一种柔性显示面板，其中，所述柔性显示面板包括显示区和非显示区，所述柔性显示面板进一步包括：
    基底；
    开关管的有源层和栅极，依次设置在所述基底上，其中，所述开关管处于所述显示区中；
    所述开关管的源极和漏极，设置在所述栅极上；
    信号连接线，设置在所述非显示区中，且与所述源极和漏极同层设置，所述信号连接线用于连接所述源极或所述漏极与外部的测试电路；
    第一绝缘层和金属连接线，依次设置在所述源极和所述漏极上，所述金属连接线上设置像素电极层，所述金属连接线与所述源极或所述漏极电连接，以将所述源极或所述漏极的信号传输到所述像素电极层中，其中，所述第一绝缘层和\或所述金属连接线进一步延伸到所述非显示区中，且覆盖在所述信号连接线上。
  8. 根据权利要求7所述的柔性显示面板，其中，所述柔性显示面板还包括：
    存储电极，设置在所述栅极上，所述存储电极与所述栅极形成存储电容。
  9. 根据权利要求8所述的柔性显示面板，其中，所述柔性显示面板还包括：
    第二绝缘层，设置在所述栅极上，所述存储电极设置在所述第二绝缘层上；
    第三绝缘层，设置在所述存储电容上；
    第四绝缘层，设置在所述有源层上。
  10. 根据权利要求9所述的柔性显示面板，其中，所述柔性显示面板还包括：
    在所述第二绝缘层、所述第三绝缘层和所述第四绝缘层上设置两个导通孔，所述导通孔分别将所述有源层的两端外露，在所述第三绝缘层上设置所述源极和所述漏极，并且所述源极和所述漏极分别通过所述导通孔与所述有源层电连接。
  11. 根据权利要求10所述的柔性显示面板，其中，所述柔性显示面板还包括：
    在所述基底上设置第一填充孔，在所述第二绝缘层、第三绝缘层和第四绝缘层上设置第二填充孔，并且所述第一填充孔和所述第二填充孔联通设置，在所述第一填充孔和所述第二填充孔中设置柔性材料进行填充。
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Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20220075071A (ko) * 2020-11-27 2022-06-07 삼성디스플레이 주식회사 표시 장치 및 이의 불량 검사 방법
CN117280472A (zh) * 2022-04-20 2023-12-22 京东方科技集团股份有限公司 显示基板及其制备方法、显示装置
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9450038B2 (en) * 2014-07-31 2016-09-20 Lg Display Co., Ltd. Flexible display
CN207116434U (zh) * 2017-08-02 2018-03-16 京东方科技集团股份有限公司 一种oled基板及显示装置
CN108899334A (zh) * 2018-07-20 2018-11-27 京东方科技集团股份有限公司 阵列基板及其制造方法、显示装置
CN109378318A (zh) * 2018-10-15 2019-02-22 武汉华星光电半导体显示技术有限公司 一种显示面板及其制作方法
CN109585511A (zh) * 2018-12-03 2019-04-05 武汉华星光电半导体显示技术有限公司 显示面板及其制造方法
CN110265409A (zh) * 2019-06-20 2019-09-20 武汉华星光电半导体显示技术有限公司 一种tft阵列基板、其制备方法及其显示面板
CN110504276A (zh) * 2018-05-18 2019-11-26 三星显示有限公司 薄膜晶体管衬底、制造其的方法以及包括其的显示装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102631257B1 (ko) * 2016-11-18 2024-01-31 삼성디스플레이 주식회사 디스플레이 장치
KR102465376B1 (ko) * 2017-06-16 2022-11-10 삼성디스플레이 주식회사 표시 장치 및 표시 장치의 제조 방법
CN109686758A (zh) * 2018-12-04 2019-04-26 武汉华星光电半导体显示技术有限公司 一种柔性显示面板及其制备方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9450038B2 (en) * 2014-07-31 2016-09-20 Lg Display Co., Ltd. Flexible display
CN207116434U (zh) * 2017-08-02 2018-03-16 京东方科技集团股份有限公司 一种oled基板及显示装置
CN110504276A (zh) * 2018-05-18 2019-11-26 三星显示有限公司 薄膜晶体管衬底、制造其的方法以及包括其的显示装置
CN108899334A (zh) * 2018-07-20 2018-11-27 京东方科技集团股份有限公司 阵列基板及其制造方法、显示装置
CN109378318A (zh) * 2018-10-15 2019-02-22 武汉华星光电半导体显示技术有限公司 一种显示面板及其制作方法
CN109585511A (zh) * 2018-12-03 2019-04-05 武汉华星光电半导体显示技术有限公司 显示面板及其制造方法
CN110265409A (zh) * 2019-06-20 2019-09-20 武汉华星光电半导体显示技术有限公司 一种tft阵列基板、其制备方法及其显示面板

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