WO2021085573A1 - Condensateur de tranchée et procédé de production de condensateur de tranchée - Google Patents

Condensateur de tranchée et procédé de production de condensateur de tranchée Download PDF

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Publication number
WO2021085573A1
WO2021085573A1 PCT/JP2020/040726 JP2020040726W WO2021085573A1 WO 2021085573 A1 WO2021085573 A1 WO 2021085573A1 JP 2020040726 W JP2020040726 W JP 2020040726W WO 2021085573 A1 WO2021085573 A1 WO 2021085573A1
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Prior art keywords
layer
thickness
trench
trench capacitor
conductive layer
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PCT/JP2020/040726
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English (en)
Japanese (ja)
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善雄 青柳
里樹 末正
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太陽誘電株式会社
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Publication of WO2021085573A1 publication Critical patent/WO2021085573A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G13/00—Apparatus specially adapted for manufacturing capacitors; Processes specially adapted for manufacturing capacitors not provided for in groups H01G4/00 - H01G11/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G2/00—Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
    • H01G2/02—Mountings
    • H01G2/06—Mountings specially adapted for mounting on a printed-circuit support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/018—Dielectrics
    • H01G4/06—Solid dielectrics
    • H01G4/08—Inorganic dielectrics
    • H01G4/12—Ceramic dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/30—Stacked capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/33—Thin- or thick-film capacitors 

Definitions

  • a thin film capacitor having a MIM structure formed by a thin film process and generating a capacitance by this MIM structure is known.
  • it is required to improve the generated capacity per unit area in order to reduce the size or increase the capacity.
  • Trench capacitors are known as thin film capacitors that can improve the generated capacity per unit area.
  • the trench capacitor includes a base material on which a large number of concavo-convex structures called trenches are formed, and a MIM structure provided so that a part of the base material extends along the trench.
  • the MIM structure is also provided in the trench extending in the thickness direction of the base material, the capacity per unit area can be improved.
  • Conventional trench capacitors are disclosed in, for example, Patent Documents 1 and 2.
  • the MIM structure since the MIM structure extends in the thickness direction of the base material, the current path in the conductive layer of the MIM structure becomes longer than that of a general thin film capacitor. As a result, the trench capacitor has a problem that the equivalent series resistance (ESR) tends to be large.
  • ESR equivalent series resistance
  • One of the objects of the present invention is to provide a trench capacitor and a method for manufacturing a trench capacitor capable of reducing the equivalent series resistance.
  • Other objects of the present invention will be made clear through the description throughout the specification.
  • the trench capacitor according to an embodiment of the present invention is sandwiched between a plurality of conductive layers and a plurality of conductive layers, and a base material having a top surface, a lower surface opposite to the upper surface, and trenches extending from the upper surface in the vertical direction.
  • a MIM structure having a dielectric layer and a plurality of conductive layers, each of which is located outside the trench and extends along the top surface, and inside the trench and along the wall surface of the trench. It has an extending second portion, and the thickness of the first portion of at least one conductive layer among the plurality of conductive layers is larger than the thickness of the second portion of the one conductive layer.
  • the present inventor has a small amount of current flowing inside the trench (that is, the second portion of the conductive layer), and a portion along the surface of the base material (that is, the conductive layer). It was found that the amount of current flowing in the first part) is large.
  • the thickness of the first portion of at least one conductive layer among the plurality of conductive layers is larger than the thickness of the second portion of the one conductive layer. As described above, the thickness of the first portion through which a large amount of current flows is increased, so that the equivalent series resistance can be effectively reduced.
  • the plurality of conductive layers include a first conductive layer located above the dielectric layer, and the thickness of the first portion of the first conductive layer is the second portion of the first conductive layer. It may be larger than the thickness of.
  • the thickness of the first portion of the first conductive layer may be twice or more and 50 times or less the thickness of the second portion of the first conductive layer.
  • the first portion of the first conductive layer may have a multilayer structure including a first layer and a second layer provided on the first layer. According to this configuration, the first layer and the second layer of the first conductive layer can be made of different materials.
  • the plurality of conductive layers include a second conductive layer located below the dielectric layer, and the thickness of the first portion of the second conductive layer is the second of the second conductive layer. It may be larger than the thickness of the portion.
  • the thickness of the first portion of the second conductive layer may be twice or more and 50 times or less the thickness of the second portion of the second conductive layer.
  • the first portion of the second conductive layer may have a multilayer structure including the first layer and the second layer provided on the first layer. According to this configuration, the first layer and the second layer of the second conductive layer can be made of different materials.
  • the conductivity of the material constituting the second layer may be higher than the conductivity of the material constituting the first layer. According to this configuration, the equivalent series resistance of the trench capacitor can be further reduced.
  • the thickness of the first portion of the first conductive layer may be larger than the thickness of the first portion of the second conductive layer.
  • One embodiment of the present invention relates to a circuit board including any of the above trench capacitors. Further, one embodiment of the present invention relates to an electronic device including the above circuit board.
  • the method for manufacturing a trench capacitor according to an embodiment of the present invention defines a step of preparing a base material having a top surface, a lower surface opposite to the upper surface, and a trench extending from the upper surface in the vertical direction, and defining the upper surface and the trench.
  • the step of forming the conductive layer of the MIM structure along the wall surface is provided, and the step of forming the conductive layer includes a step of performing chemical vapor deposition and a step of performing physical vapor deposition.
  • the step of forming the conductive layer in this method of manufacturing a trench capacitor includes a step of performing chemical vapor deposition and a step of performing physical vapor deposition.
  • a conductive layer is formed along the upper surface of the base material and the wall surface of the trench.
  • a conductive layer is formed only on the upper surface of the base material.
  • a trench capacitor and a method for manufacturing a trench capacitor capable of reducing the equivalent series resistance.
  • FIG. 5 is a cross-sectional view schematically showing a cross section of the trench capacitor of FIG. 1 cut along the line I.I. It is sectional drawing which shows the trench part of the trench capacitor of FIG. 1 enlarged. It is sectional drawing which enlarges and shows the trench part of the trench capacitor which concerns on another embodiment. It is sectional drawing which enlarges and shows the trench part of the trench capacitor which concerns on another embodiment.
  • FIG. 1 is a schematic plan view of the trench capacitor 1
  • FIG. 2 is a cross-sectional view schematically showing a cross section of the trench capacitor 1 cut along the I-I line.
  • FIG. 3 is an enlarged cross-sectional view showing a trench portion of the trench capacitor.
  • the trench capacitor 1 includes a base material 10, a MIM structure 20 provided on the base material 10, and a protective layer 40 provided so as to cover the MIM structure 20. ..
  • An external electrode 2 and an external electrode 3 are provided on the outside of the protective layer 40. The external electrode 2 and the external electrode 3 are electrically connected to the electrode layer constituting the MIM structure 20, as will be described in detail later.
  • the trench capacitor 1 is mounted on the circuit board by joining the external electrode 2 and the external electrode 3 to a land provided on the circuit board.
  • This circuit board can be mounted on various electronic devices.
  • the electronic device including the circuit board on which the trench capacitor 1 is mounted includes a smartphone, a mobile phone, a tablet terminal, a game console, and any other electronic device capable of including a circuit board on which the trench capacitor 1 is mounted. included.
  • FIGS. 1 and 2 the X, Y, and Z directions that are orthogonal to each other are shown.
  • the orientation and arrangement of the constituent members of the trench capacitor 1 may be described with reference to the X direction, the Y direction, and the Z direction shown in these figures.
  • the "width" direction, "length” direction, and “thickness” direction of the thin film capacitor 1 are the direction along the X-axis and the Y-axis of FIG. 1, respectively, unless otherwise understood in the context.
  • the positive direction of the Z-axis is the upward direction of the trench capacitor 1 and the negative direction of the Z-axis is defined as the upward direction of the trench capacitor 1, unless otherwise understood in the context.
  • the direction is the downward direction of the trench capacitor 1.
  • the base material 10 is made of an insulating material such as Si.
  • the base material 10 is formed in a substantially rectangular shape, and its width direction (X-axis direction) is, for example, 50 ⁇ m to 5000 ⁇ m, and its length direction (Y-axis direction) is For example, it is set to 50 ⁇ m to 5000 ⁇ m, and the dimension in the thickness direction (Z-axis direction) is set to, for example, 5 ⁇ m to 500 ⁇ m.
  • the dimensions of the base material 10 specifically shown in the present specification are merely examples, and the base material 10 can take any size.
  • the base material 10 has an upper surface 10a, a lower surface 10b on the opposite side of the upper surface 10a, a side surface 10c connecting the upper surface 10a and the lower surface 10b, and a wall portion 12 defining a trench 11 described later.
  • the base material 10 has a substantially rectangular parallelepiped shape, and in the present specification, the four surfaces connecting the upper surface 10a and the lower surface 10b of the base material 10 are collectively referred to as a side surface 10c.
  • a plurality of trenches 11 extending from the upper surface 10a of the base material 10 along the Z-axis direction are formed. Each of the plurality of trenches 11 is formed so as to have a predetermined depth in the Z-axis direction.
  • each of the plurality of trenches 11 has a substantially rectangular shape whose plan view shape is defined by a side extending along the X-axis direction and a side extending along the Y-axis direction. It is formed to be. In the illustrated embodiment, each of the plurality of trenches 11 is formed so that the side extending along the X-axis direction is shorter than the side extending along the Y-axis direction in a plan view.
  • each of the plurality of trenches 11 is formed to have a high aspect ratio in order to realize a high capacity per unit area. That is, each of the plurality of trenches 11 is formed so that the ratio of the depth (dimension in the Z-axis direction) to the width (for example, the length of the side in the X-axis direction) is large.
  • the width of each of the plurality of trenches 11 is, for example, 0.1 ⁇ m to 5 ⁇ m, and the depth thereof (dimensions in the Z-axis direction) is, for example, 1 ⁇ m to 100 ⁇ m.
  • the dimensions of the trench 11 specifically shown in the present specification are merely examples, and the trench 11 can take any dimension.
  • the shape of the trench 11 in a plan view is not limited to a rectangular shape, and the trench 11 can take any shape.
  • the trench 11 is configured such that its depth (dimensions in the Z-axis direction) is 30 ⁇ m and its width (dimensions in the X-axis direction) is 1.0 ⁇ m.
  • the trench 11 can be formed, for example, by forming a mask having openings corresponding to the pattern of the trench 11 formed on the surface of the Si substrate and then etching the Si substrate by etching.
  • the etching process of the trench 11 can be performed by a reactive ion etching method such as deep digging RIE (deep digging reactive etching) using a Bosch process.
  • adjacent trenches 11 are separated from each other by a wall portion 12.
  • the wall portion 12 is a part of the base material 10 and is configured to separate adjacent trenches 11 from each other.
  • the wall surface 13 includes a side surface 13A extending along the vertical direction (that is, the Z-axis direction) and a bottom surface 13B extending in a direction along the upper surface 10a (that is, the X-axis direction or the Y-axis direction).
  • the MIM structure 20 will be described. As described above, the base material 10 is provided with the MIM structure 20. As shown, the MIM structure 20 is provided on the base material 10 so that a part thereof is embedded in each of the trenches 11.
  • the MIM structure 20 is configured to have a shape that follows the upper surface 10a of the base material 10 and the trench 11.
  • the MIM structure 20 has a plurality of conductive layers and a dielectric layer sandwiched between the plurality of conductive layers.
  • the MIM structure 20 has a first conductive layer, a second conductive layer, and a dielectric layer sandwiched between the first conductive layer and the second conductive layer. That is, the MIM structure 20 is a laminated body in which conductive layers and dielectric layers are alternately laminated.
  • the MIM structure 20 in the illustrated embodiment is provided on the lower electrode layer 22 (second conductive layer), the dielectric layer 21 provided on the lower electrode layer 22, and the dielectric layer 21. It also has an upper electrode layer 23 (first conductive layer).
  • the base material 10 is not used in the vertical direction along the Z-axis direction.
  • the side closer to the base material 10 may be referred to as "lower”, and the side farther from the base material 10 may be referred to as "upper”.
  • the MIM structure 20 may include two or more MIM layers.
  • a second layer is placed on the first MIM layer composed of the lower electrode layer 22, the dielectric layer 21, and the upper electrode layer 23.
  • the MIM layer of the eye is formed.
  • the second MIM layer can include a dielectric layer provided on the upper electrode layer 23 and an electrode layer provided on the dielectric layer.
  • the upper electrode layer 23 has both a function as an upper electrode layer of the first MIM layer and a function as a lower electrode layer of the second MIM layer.
  • BST barium titanate
  • BTO barium titanate
  • STO strontium titanate
  • ZrO 2 zirconia
  • Al 2 O 3 alumina
  • hafnium oxide HfO 2
  • TiO 2 Titanium oxide
  • the material of the dielectric layer 21 is not limited to those explicitly described herein.
  • the dielectric layer 21 is formed by, for example, an ALD (atomic layer deposition) method, a sputtering method, a CVD method, a vapor deposition method, a plating method, or a known method other than these.
  • the dielectric layer 21 is formed so that its film thickness is, for example, 1 nm to 500 nm. In one embodiment, the film thickness of the dielectric layer 21 is 100 nm.
  • Materials for the lower electrode 22 and the upper electrode 23 are nickel (Ni), copper (Cu), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), ruthenium (Ru), and tungsten (W). , Molybdenum (Mo), titanium (Ti), conductive silicon, alloy materials containing one or more of these metal elements, compounds of the metal elements, or metal materials other than these.
  • platinum (Pt) is used as the material for the lower electrode layer 22 and the upper electrode layer 23.
  • Titanium nitride (TiN) may be used as a material for the lower electrode layer 22 and the upper electrode layer 23.
  • the materials of the lower electrode layer 22 and the upper electrode layer 23 are not limited to those explicitly described herein.
  • the lower electrode layer 22 and the upper electrode layer 23 are formed by, for example, an ALD (atomic layer deposition) method, a sputtering method, a vapor deposition method, a plating method, or a known method other than these.
  • the lower electrode layer 22 is formed so that its film thickness is, for example, 1 nm to 500 nm.
  • the upper electrode 23 is formed so that its film thickness is, for example, 1 nm to 500 nm. The detailed structure of the lower electrode layer 22 and the upper electrode layer 23 will be described later.
  • the protective layer 40 is provided so as to cover the MIM structure 20 and the base material 10 in order to protect the MIM structure 20 from the external environment.
  • the protective layer 40 is provided so as to protect the MIM structure 20 from mechanical damage such as an impact received from the outside, for example.
  • a resin material such as polyimide, silicon oxide (SiO 2 ), silicon nitride (SiN), silicon oxynitride (SiON), and other insulating materials can be used.
  • the protective layer 40 is formed by, for example, applying a photosensitive polyimide by a spin coating method, and exposing, developing, and curing the applied polyimide.
  • the protective layer 40 is formed so that its film thickness is, for example, 200 nm to 5000 nm. In one embodiment, the film thickness of the protective layer 40 is 3000 nm. The material and film thickness of the protective layer 40 are not limited to those expressly described herein.
  • a barrier layer (not shown) may be provided between the protective layer 40 and the MIM structure 20 (or the base material 10).
  • the barrier layer is mainly provided on the MIM structure 20 in order to improve the weather resistance of the trench capacitor 1.
  • the barrier layer is provided between the MIM structure 20 and the protective layer 40 so that the moisture released from the protective layer 40 and the moisture in the atmosphere do not reach the MIM structure 20.
  • the barrier layer may be a thin film having excellent hydrogen gas barrier properties.
  • As the material of the barrier layer alumina (Al 2 O 3 ), silicon oxide (SiO 2 ), silicon oxynitride (SiON), zirconia (ZrO 2 ), and other insulating materials can be used.
  • the barrier layer is formed by, for example, a sputtering method, a CVD method, or a known method other than these.
  • the barrier layer is formed so that its film thickness is, for example, 5 nm to 500 nm. In one embodiment, the film thickness of the barrier layer is 50 nm.
  • the material and film thickness of the barrier layer are not limited to those expressly described herein.
  • the external electrode 2 and the external electrode 3 are provided on the upper side of the protective layer 40 so as to be separated from each other in the Y-axis direction.
  • the external electrode 2 and the external electrode 3 are formed by applying a conductor paste containing a metal material to the outside of the protective layer 40.
  • Materials of the external electrode 2 and the external electrode 3 include copper (Cu), nickel (Ni), tin (Sn), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), or other materials.
  • a metal material or an alloy material containing one or more of these metal elements can be used.
  • At least one of a solder barrier layer and a solder leakage layer may be formed on the external electrode 2 and the external electrode 3, if necessary.
  • a groove 41 is provided near the end of the protective layer 40 in the negative direction of the Y axis, and a groove 42 is provided near the end of the protective layer 40 in the positive direction of the Y axis. Both the groove 41 and the groove 42 are provided so as to extend along the X-axis direction and penetrate the protective layer 40 in the Z-axis direction.
  • the groove 41 is provided with an extraction electrode 2a, and the groove 42 is provided with an extraction electrode 3a.
  • the upper end of the extraction electrode 2a is connected to the external electrode 2, and the lower end of the extraction electrode 2a is connected to the lower electrode layer 22 of the MIM structure 20.
  • the upper end of the extraction electrode 3a is connected to the external electrode 3, and the lower end of the extraction electrode 3a is connected to the upper electrode 23 of the MIM structure 20.
  • the material of the extraction electrodes 2a and 3a copper (Cu), nickel (Ni), tin (Sn), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), or a metal material other than these. , Or an alloy material containing one or more of these metal elements can be used.
  • the extraction electrodes 2a and 3a are formed by a vapor deposition method, a sputtering method, a plating method, or a known method other than these.
  • each of the lower electrode layer 22 and the upper electrode layer 23 is located outside the trench 11 and is located inside the trench 11 as well as the first portions 22R1, 23R1 extending along the upper surface 10a. It has a second portion 22R2, 23R2 extending along the wall surface 13 of the trench 11. The thickness 23T1 of the first portion 23R1 of the upper electrode layer 23 is larger than the thickness 23T2 of the second portion 23R2 of the upper electrode 23.
  • the thicknesses 22T1, 23T1 of the first portion 22R1, 23R1 refer to the dimensions of the lower electrode layer 22 or the upper electrode layer 23 in the Z-axis direction, respectively.
  • the thicknesses 22T2 and 23T2 of the second portions 22R2 and 23R2 refer to the dimensions of the lower electrode layer 22 or the upper electrode layer 23 in the direction perpendicular to the wall surface 13 of the wall portion 12, respectively.
  • the thickness of the portion of the second portion 22R2, 23R2 along the bottom surface 13B of the trench 11 refers to the dimension of the lower electrode layer 22 or the upper electrode layer 23 in the Z-axis direction, and the second portion 22R2, 23R2.
  • the thickness of the portion along the side surface 13A of the trench 11 refers to the dimension of the lower electrode layer 22 or the upper electrode layer 23 in the X-axis or Y-axis direction.
  • the half of the distance between the dielectric layers 21 in the X-axis direction or the Y-axis direction is the thickness 23T2 of the second portion 23R2.
  • the thickness 23T1 of the first portion 23R1 of the upper electrode layer 23 can be, for example, twice or more and 50 times or more the thickness of the second portion 23T2.
  • the thickness 23T1 of the first portion 23R1 of the upper electrode layer 23 is preferably 2.5 times or more the thickness 23T2 of the second portion 23R2 of the upper electrode layer 23.
  • the thickness 23T1 of the first portion 23R1 of the upper electrode layer 23 is 200 nm
  • the thickness 23T2 of the second portion 23R2 of the upper electrode layer 23 is 50 nm.
  • the first portion 23R1 of the upper electrode layer 23 has a multilayer structure including a first layer 23A and a second layer 23B provided on the first layer 23A.
  • the number of layers constituting the first portion 23R1 of the upper electrode layer 23 is not particularly limited, and the first portion 23R1 may have a multilayer structure of three or more layers.
  • the first portion 23R1 of the upper electrode layer 23 is composed of two layers, the first layer 23A and the second layer 23B, and the second portion 23R2 is composed of only the first layer 23A.
  • the first layer 23A of the upper electrode layer 23 is in contact with the dielectric layer 21, and the second layer 23B of the upper electrode layer 23 is in contact with the protective layer 40.
  • the thickness of the first layer 23A is substantially the same as the thickness T2 of the second portion 23R2.
  • the thickness of the first layer 23A is, for example, 50 nm
  • the thickness of the second layer 23B is, for example, 150 nm.
  • the first layer 23A and the second layer 23B may be made of the same material as each other, or may be made of different materials from each other. In the illustrated embodiment, the first layer 23A and the second layer 23B are made of different materials, and the conductivity of the material constituting the second layer 23B is higher than the conductivity of the material constituting the first layer 23A. It has become.
  • the first layer 23A and the second layer 23B are made of different materials, the first layer 23A and the second layer 23B are combined in order to improve the adhesion between the first layer 23A and the second layer 23B.
  • An adhesion layer may be provided between them.
  • the material constituting the adhesion layer include Ti, TiN, Ta, TaN and the like.
  • the first layer 23A is composed of Pt and the second layer 23B is composed of Cu.
  • the adhesion layer between the first layer 23A and the second layer 23B is composed of Ti.
  • the thickness of the first portion 22R1 of the lower electrode layer 22 and the thickness of the second portion 22R2 of the lower electrode layer 22 are substantially the same.
  • the first portion 22R1 of the lower electrode layer 22 does not have a multi-layer structure and is composed of only one layer.
  • the thickness 23T1 of the first portion 23R1 of the upper electrode layer 23 is larger than the thickness 22T1 of the first portion 22R1 of the lower electrode layer 22.
  • the thickness of the lower electrode layer 22 is 50 nm.
  • the film thicknesses of the lower electrode layer 22 and the upper electrode layer 23 are not limited to those explicitly described herein.
  • a base material having an upper surface 10a, a lower surface opposite to the upper surface 10a, and a trench 11 extending from the upper surface 10a along the vertical direction is prepared.
  • a wafer to be the base material 10 is prepared, and a mask corresponding to the pattern of the trench 11 is formed on the upper surface of the wafer.
  • the wafer is etched to form a plurality of trenches 11.
  • Wafer etching is performed by dry etching using, for example, a Bosch process.
  • the step of forming the MIM structure 20 includes a step of forming a conductive layer and a step of forming a dielectric layer.
  • the lower electrode layer 22 is formed.
  • the lower electrode layer 22 is formed of, for example, Pt.
  • the dielectric layer 21 is formed on the lower electrode layer 22.
  • the dielectric layer 21 is formed from, for example, zirconia.
  • the lower electrode layer 22 and the dielectric layer 21 can be formed by a chemical vapor deposition method such as an ALD method or a CVD method.
  • the upper electrode layer 23 is formed on the dielectric layer 21.
  • the step of forming the upper electrode layer 23 includes a step of performing chemical vapor deposition and a step of performing physical vapor deposition.
  • the first layer 23A is first formed by performing chemical vapor deposition such as an ALD method or a CVD method.
  • the second layer 23B is formed by performing physical vapor deposition such as a sputtering method or a vacuum vapor deposition method.
  • the thickness of the first portion 23R1 along the upper surface 10a of the base material 10 is larger than the thickness of the second portion 23R2 extending along the wall surface 13 of the trench 11.
  • the MIM structure 20 is formed by the above steps.
  • the protective layer 40 is formed on the MIM structure 20.
  • grooves are provided near both ends in the Y-axis direction of the portion of the protective layer 40 provided on the upper side of the MIM structure 20.
  • the extraction electrodes 2a and 3a are formed inside the groove by a plating method or the like, and the external electrode 2 and the external electrode 3 are formed on the surface of the protective layer 40.
  • the wafer is fragmented.
  • each of the lower electrode layer 22 and the upper electrode layer 23 (that is, the plurality of conductive layers) of the trench capacitor 1 is located outside the trench 11 and extends along the upper surface 10a. It has a 23R1 and a second portion 22R2, 23R1 that is located in the trench 11 and extends along the wall surface 13 of the trench 11, and the thickness 23T1 of the first portion 23R1 of the upper electrode layer 23 is the upper electrode layer. The thickness of the second portion 23R2 of 23 is larger than the thickness 23T2.
  • the present inventor has a small amount of current flowing inside the trench (that is, the second portion 22R2, 23R2), and the substrate has a small amount of current. It has been found that the amount of current flowing in the portion along the surface (that is, the first portion 22R1, 23R1) is large. Therefore, in the trench capacitor 1, the thickness 23T1 of the first portion 23R1 of at least one conductive layer (upper electrode layer 23 in the illustrated embodiment) among the lower electrode layer 22 and the upper electrode layer 23 is set to the one. The thickness of the second portion 23R2 of the conductive layer (that is, the upper electrode layer 23) is made larger than the thickness 23T2.
  • the equivalent series resistance can be reduced.
  • the cross-sectional area of the current path can be increased without increasing the size of the trench 11 in the direction along the upper surface 10a. Therefore, it is possible to reduce the equivalent series resistance while maintaining the generated capacity per unit area.
  • the thickness 23T1 of the first portion 23R1 of the upper electrode layer 23 is twice or more and 50 times or less the thickness of the second portion 23R2 of the upper electrode layer 23.
  • the equivalent series resistance can be effectively reduced.
  • the trench 11 is blocked in the step of forming the second layer 23B by the physical vapor deposition method in the manufacturing process. It is possible to prevent it from coming off.
  • the first portion 23R1 of the upper electrode layer 23 has a multilayer structure including a first layer 23A and a second layer 23B provided on the first layer 23A.
  • the first layer 23A and the second layer 23B can be made of different materials.
  • the second layer 23B having a relatively large thickness can be formed by a method having a high film forming rate.
  • the conductivity of the material constituting the second layer 23B is higher than the conductivity of the material constituting the first layer 23A. Thereby, the equivalent series resistance of the trench capacitor 1 can be further reduced.
  • the step of forming the upper electrode 23 includes a step of performing chemical vapor deposition and a step of performing physical vapor deposition.
  • the step of performing chemical vapor deposition the first layer 23A of the upper electrode 23 is formed along the upper surface 10a of the base material 10 and the wall surface of the trench 11.
  • the step of performing physical vapor deposition it is difficult to supply the material of the second layer 23B into the trench 11, so that the second layer 23B is formed on the upper surface 10a of the base material 10.
  • the thickness 23T1 of the first portion 23R1 of the upper electrode layer 23 located outside the trench 11 and extending along the upper surface 10a is located inside the trench 11 and extends along the wall surface 13 of the trench 11.
  • the thickness of the second portion 23R2 of the layer 23 can be made larger than the thickness 23T2. Therefore, the cross-sectional area of the current path can be increased without enlarging the size of the trench 11 in the direction along the upper surface 10a (that is, the direction orthogonal to the vertical direction), and the generated capacity per unit area can be maintained.
  • the equivalent series resistance can be reduced.
  • the trench capacitor 100 according to another embodiment has a base material 10 having a trench 11 extending from the upper surface 10a and a plurality of conductive layers (that is, an upper electrode layer 23), similarly to the trench capacitor 1. And a lower electrode 22), and a MIM structure 20 having a dielectric layer 21 sandwiched between a plurality of conductive layers and provided along a wall surface 13 defining an upper surface 10a and a trench 11. ..
  • the difference between the trench capacitor 100 and the trench capacitor 1 is that the thickness 22T1 of the first portion 22R1 of the lower electrode layer 22 is larger than the thickness 22T2 of the second portion 22R2 of the lower electrode layer 22 instead of the upper electrode layer 23. It is a point that is getting bigger.
  • the first portion 22R1 of the lower electrode layer 22 of the trench capacitor 100 has a multilayer structure, and includes the first layer 22A and the second layer 22B.
  • the thickness 22T1 of the first portion 22R1 of the lower electrode layer 22 is set within a range of twice or more and 50 times or less the thickness 22T2 of the second portion 22R2 of the lower electrode layer 22.
  • the thickness 22T1 of the first portion 22R1 is preferably 2.5 times or more the thickness 22T2 of the second portion 22R2.
  • the thickness 22T1 of the first portion 22R1 is 200 nm
  • the thickness 22T2 of the second portion 22R2 is 50 nm.
  • the thickness 23T1 of the first portion 23R1 of the upper electrode layer 23 of the trench capacitor 100 and the thickness 23T1 of the second portion 23R2 of the upper electrode layer 23 are substantially the same.
  • the trench capacitor 100 can be manufactured by substantially the same method as the method for manufacturing the trench capacitor 1 described above, but in the step of forming the lower electrode layer 22, the first of the lower electrode layer 22 is produced by the chemical vapor deposition method. The difference is that after the layer 22A is formed, the second layer 22B of the lower electrode layer 22 is formed by the physical vapor deposition method.
  • the upper electrode layer 23 is formed by a chemical vapor deposition method such as an ALD method or a CVD method.
  • the thickness 22T1 of the first portion 22R1 of the lower electrode layer 22 is thicker than the thickness 22T2 of the second portion 22R2 of the lower electrode layer 22. Therefore, for the same reason as that of the trench capacitor 1, it is possible to reduce the equivalent series resistance while maintaining the generated capacity per unit area.
  • the trench capacitor 200 includes a base material 10 having a trench 11 extending from the upper surface 10a and a plurality of conductive layers (that is, an upper electrode layer 23 and a lower electrode 22), similarly to the trench capacitor 1.
  • a MIM structure 20 having a dielectric layer 21 sandwiched between a plurality of conductive layers and provided along a wall surface defining an upper surface 10a and a trench 11 is provided.
  • the difference between the trench capacitor 200 and the trench capacitor 1 is that in both the upper electrode layer 23 and the lower electrode layer 22, the thickness 22T1,23T1 of the first portion 22R1,23R1 is the thickness 22T2 of the second portion 22R2,23R2.
  • the first portion 22R1 of the lower electrode layer 22 of the trench capacitor 200 has a multilayer structure, and includes the first layer 22A and the second layer 22B.
  • the first portion 23R1 of the upper electrode layer 23 also has a multilayer structure, and includes the first layer 23A and the second layer 23B.
  • the thickness 22T1,23T1 of the first portion 22R1,23R1 of the lower electrode layer 22 and the upper electrode layer 23 is set within a range of 2 times or more and 50 times or less of the thickness 22T2, 23T2 of the second portion 22R2, 23R2. .. In the embodiment shown in FIG.
  • the thickness 22T1 of the first portion 22R1 of the lower electrode layer 22 and the thickness 23T1 of the first portion 23R1 of the upper electrode layer 23 are substantially the same, but the thickness of the lower electrode layer 22 is the same.
  • the thickness 22T1 of the one portion 22R1 and the thickness 23T1 of the first portion 23R1 of the upper electrode layer 23 may be different from each other.
  • the thickness 22T2 of the second portion 22R2 of the lower electrode layer 22 and the thickness 23T2 of the second portion 23R2 of the upper electrode layer 23 are substantially the same, but the thickness 22T2 of the second portion 22R2 of the lower electrode layer 22.
  • the thickness 23T2 of the second portion 23R2 of the upper electrode layer 23 may be different from each other.
  • the thickness 22T1,23T1 of the first portion 22R1,23R1 is thicker than the thickness 22T2,23T2 of the second portion 22R2,23R2. ing. Therefore, for the same reason as that of the trench capacitor 1, it is possible to further reduce the equivalent series resistance while maintaining the generated capacity per unit area.
  • each component described herein is not limited to those expressly described in the embodiments, and each component may be included within the scope of the present invention. Can be transformed to have the dimensions, materials, and arrangement of.
  • components not explicitly described in the present specification may be added to the described embodiments, or some of the components described in each embodiment may be omitted.
  • the one object when it is described that one object is provided “above”, “upper surface”, “lower”, or “lower surface” of another object, the one object is referred to as the other object. It may be in direct contact, or may be indirect contact via another layer or membrane.
  • Trench capacitor 10 ... Base material, 10a ... Top surface, 11 ... Trench, 12 ... Wall, 20 ... MIM structure, 21 ... Dielectric layer, 22 ... Lower electrode layer (second conductive layer), 23 ... Upper Electrode layer (first conductive layer), 22A, 23A ... 1st layer, 22B, 23B ... 2nd layer, 22R1, 23R1 ... 1st part, 22R2, 23R2 ... 2nd part.

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  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Semiconductor Integrated Circuits (AREA)
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Abstract

L'invention concerne un condensateur de tranchée et un procédé de production de condensateur de tranchée qui permettent d'obtenir une réduction de la résistance série équivalente. Ce condensateur de tranchée 1 : un matériau de base 10 qui a une tranchée 11 s'étendant dans la direction verticale à partir d'une surface supérieure 10a ; et une structure MIM 20 qui a une pluralité de couches conductrices (couche d'électrode inférieure 22 et couche d'électrode supérieure 23) et une couche diélectrique 21 prise en sandwich entre la pluralité de couches conductrices. La pluralité de couches conductrices ont chacune une première partie 22R1, 23R1 qui est située à l'extérieur de la tranchée 11 et s'étend le long de la surface supérieure 10a, et une seconde partie 22R2, 23R2 qui est située à l'intérieur de la tranchée 11 et s'étend le long des surfaces de paroi 13 de la tranchée 11. L'épaisseur 23T1 de la première partie 23R1 de la couche d'électrode supérieure 23 est supérieure à l'épaisseur 23T2 de la seconde partie 23R2 de la couche d'électrode supérieure 23.
PCT/JP2020/040726 2019-10-30 2020-10-29 Condensateur de tranchée et procédé de production de condensateur de tranchée WO2021085573A1 (fr)

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JP2019197136A JP2021072331A (ja) 2019-10-30 2019-10-30 トレンチキャパシタ及びトレンチキャパシタの製造方法

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EP3796351B1 (fr) * 2019-09-17 2021-11-03 Murata Manufacturing Co., Ltd. Condensateur à électrolyte solide mince à haute capacité et présentant peu de défauts et son procédé de fabrication

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09219500A (ja) * 1996-02-07 1997-08-19 Taiwan Moshii Denshi Kofun Yugenkoshi 高密度メモリ構造及びその製造方法
JP2003297942A (ja) * 2002-03-26 2003-10-17 Samsung Electronics Co Ltd 金属−絶縁体−金属キャパシタを有する半導体装置及びその方法
JP2006500772A (ja) * 2002-09-23 2006-01-05 インターナショナル・ビジネス・マシーンズ・コーポレーション デュアル・ダマシン構造におけるｍｉｍキャパシタの構造および製作方法
US20130130053A1 (en) * 2002-08-29 2013-05-23 Micron Technology, Inc. Metal Plating Using Seed Film

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09219500A (ja) * 1996-02-07 1997-08-19 Taiwan Moshii Denshi Kofun Yugenkoshi 高密度メモリ構造及びその製造方法
JP2003297942A (ja) * 2002-03-26 2003-10-17 Samsung Electronics Co Ltd 金属−絶縁体−金属キャパシタを有する半導体装置及びその方法
US20130130053A1 (en) * 2002-08-29 2013-05-23 Micron Technology, Inc. Metal Plating Using Seed Film
JP2006500772A (ja) * 2002-09-23 2006-01-05 インターナショナル・ビジネス・マシーンズ・コーポレーション デュアル・ダマシン構造におけるｍｉｍキャパシタの構造および製作方法

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