WO2021035534A1 - 显示基板及其制作方法、显示装置 - Google Patents

显示基板及其制作方法、显示装置 Download PDF

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Publication number
WO2021035534A1
WO2021035534A1 PCT/CN2019/102848 CN2019102848W WO2021035534A1 WO 2021035534 A1 WO2021035534 A1 WO 2021035534A1 CN 2019102848 W CN2019102848 W CN 2019102848W WO 2021035534 A1 WO2021035534 A1 WO 2021035534A1
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Prior art keywords
color filter
color film
pixel
area
layer
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Application number
PCT/CN2019/102848
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English (en)
French (fr)
Inventor
李云龙
卢鹏程
张逵
刘李
杨盛际
黄冠达
陈小川
张大成
Original Assignee
京东方科技集团股份有限公司
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Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to EP19933234.7A priority Critical patent/EP4024124A4/en
Priority to CN201980001500.8A priority patent/CN112714890B/zh
Priority to US16/959,043 priority patent/US11647661B2/en
Priority to PCT/CN2019/102848 priority patent/WO2021035534A1/zh
Publication of WO2021035534A1 publication Critical patent/WO2021035534A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/38—Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/844—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0257—Reduction of after-image effects
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/549—Organic PV cells

Definitions

  • the embodiments of the present disclosure relate to a display substrate, a manufacturing method thereof, and a display device.
  • the Micro Organic Light-Emitting Diode (Micro-OLED) display device is a new type of OLED display device using a silicon substrate as a substrate, and is also called a silicon-based organic light-emitting diode (silicon-based OLED) display device.
  • Silicon-based OLED display devices have the advantages of small size, high resolution, etc., have a broad market application space, and are suitable for use in helmet-mounted displays, stereoscopic display mirrors, and glasses-type displays.
  • the color display of the silicon-based OLED display device is generally realized by a white light organic light emitting diode (WOLED) combined with a color filter (CF).
  • WOLED white light organic light emitting diode
  • CF color filter
  • the embodiments of the present disclosure provide a display substrate, a manufacturing method thereof, and a display device.
  • the display substrate can solve the problem of light reflection of the lower reflective structure and the problem of uneven coating of the last layer of the color film of the display substrate.
  • An embodiment of the present disclosure provides a display substrate, including a base substrate, including a display area and a peripheral area surrounding the display area; a first light-emitting element located on the base substrate; and a color filter structure located on the The display side of the light-emitting element, wherein the color filter structure includes: a first color filter layer, including only the first pixel color filter located in the display area; and a second color filter layer, including a first color filter layer located in the display area and The first pixel color filter is at least partially non-overlapping second pixel color filter, and a first border color filter located in the peripheral area and surrounding the display area.
  • the color filter structure further includes: a third color filter layer, including a third color filter layer located in the display area and at least partially non-overlapping with the first pixel color filter and the second pixel color filter.
  • Pixel color film and a second frame color film located in the peripheral area and surrounding the display area, wherein the second frame color film is located on a side of the first frame color film away from the base substrate.
  • the orthographic projection of the second frame color film on the base substrate and the orthographic projection of the first frame color film on the base substrate completely overlap or fall into the first frame The color film is within the orthographic projection on the base substrate.
  • the sum of the thickness of the first frame color film and the second frame color film is 2 to 3 ⁇ m larger than the thickness of the first pixel color film.
  • the display substrate further includes: a third color filter layer, which only includes a third color filter layer that is located in the display area and does not at least partially overlap the first pixel color filter and the second pixel color filter. Pixel color film.
  • the first pixel color film and the second pixel color film or the third pixel color film at least partially overlap, and the first pixel color film and the second pixel color film overlap each other. Or in the overlapping portion of the third pixel color filter, the first pixel color filter is located on a side of the second pixel color filter or the third pixel color filter close to the base substrate.
  • the first color filter layer, the second color filter layer, and the third color filter layer are color filter layers of different colors.
  • the first color filter layer, the second color filter layer, and the third color filter layer are a red color filter layer, a blue color filter layer, and a green color filter layer, respectively.
  • the first border color film has a ring shape surrounding the display area.
  • the display substrate further includes a sensing area located in the peripheral area, the sensing area includes a plurality of sensing pixel units, and each of the sensing pixel units includes a second light emitting element and a sensing area.
  • a circuit structure wherein the color filter structure is located on the side of the light-emitting element and the sensing circuit structure away from the base substrate, and the orthographic projection of the sensing area on the base substrate is located at the The first frame color film is in the orthographic projection on the base substrate.
  • the display substrate further includes a connection electrode area located in the peripheral area, the connection electrode area is a ring-shaped area surrounding the display area, and includes a plurality of ring-shaped connection electrodes, wherein the color film
  • the structure is located on the side of the plurality of ring-shaped connecting electrodes away from the base substrate, and the orthographic projection of the connecting electrode area on the base substrate is located on the first frame color film on the base substrate Within the orthographic projection.
  • the display substrate further includes a first dummy area located in the peripheral area, the first dummy area is located between the connection electrode area and the display area, and includes a plurality of floating electrodes, wherein The color filter structure is located on the side of the plurality of floating electrodes away from the base substrate, and the orthographic projection of the first dummy area on the base substrate is located on the first frame of the color film. In the orthographic projection on the base substrate.
  • the display substrate further includes a second dummy area located in the peripheral area, and the second dummy area is located at the outermost periphery of the peripheral area, surrounding the first dummy area, the connection electrode area, and the sensor.
  • the second dummy area includes a plurality of second dummy electrodes, wherein the color filter structure is located on a side of the plurality of second dummy electrodes away from the base substrate, and the second dummy area
  • the orthographic projection on the base substrate is located within the orthographic projection of the first frame color film on the base substrate.
  • the base substrate is a silicon substrate.
  • the side of the silicon substrate facing the light-emitting element includes a pixel circuit structure, and the pixel circuit structure is connected to the light-emitting element, and at least a part of the pixel circuit structure is located in the silicon substrate.
  • the display substrate further includes a thin-film encapsulation layer, and the thin-film encapsulation layer is located on a side of the first color filter layer facing the light-emitting element.
  • An embodiment of the present disclosure further provides a display device, including any of the above-mentioned display substrates.
  • An embodiment of the present disclosure further provides a method for manufacturing a display substrate, including: providing a base substrate, including a display area and a peripheral area surrounding the display area; and forming a light-emitting element on the display area on the base substrate Making a first color filter layer on the light-emitting element, the first color filter layer including only the first pixel color filter located in the display area; making a second color filter layer on the first color filter layer ,
  • the second color filter layer includes a second pixel color filter located in the display area and at least partially not overlapping the first pixel color filter, and a first pixel color filter located in the peripheral area and surrounding the display area. Border color film.
  • the method further includes: after fabricating the second color filter layer, fabricating a third color filter layer on the first color filter layer, where the third color filter layer includes A third pixel color film that does not at least partially overlap the first pixel color film and the second pixel color film, and a second frame color film located in the peripheral area and surrounding the display area, wherein The second frame color film is located on a side of the first frame color film away from the base substrate.
  • the method further includes: after fabricating the first color filter layer and before fabricating the second color filter layer, fabricating a third color filter layer on the first color filter layer, so The third color filter layer only includes a third pixel color filter that is located in the display area and at least partially does not overlap with the first pixel color filter and the second pixel color filter.
  • the first pixel color filter and the second pixel color filter or the third pixel color filter at least partially overlap, and the first pixel color filter is In the overlapping portion of the pixel color film and the second pixel color film or the third pixel color film, the first pixel color film is located near the second pixel color film or the third pixel color film.
  • the side of the base substrate is configured to cover the first pixel color filter and the second pixel color filter or the third pixel color filter.
  • making at least one of the first color filter layer, the second color filter layer, and the third color filter layer includes coating a corresponding color filter material layer using a spin coating method, and The corresponding color film material layer is patterned.
  • FIG. 1 is a schematic cross-sectional view of a color film structure of a silicon-based organic light emitting diode display substrate
  • FIG. 2A is a schematic cross-sectional structure diagram of a color filter structure according to an embodiment of the present disclosure
  • FIG. 2B is a schematic plan view of the color filter structure shown in FIG. 2A;
  • FIG. 3 is a schematic cross-sectional structure diagram of yet another color filter structure according to an embodiment of the present disclosure.
  • FIG. 4 is a schematic cross-sectional structure diagram of yet another color filter structure according to an embodiment of the present disclosure.
  • FIG. 5 is a schematic diagram of a cross-sectional structure of a display substrate according to an embodiment of the present disclosure
  • FIG. 6A is a schematic diagram of area division of a display substrate according to an embodiment of the present disclosure.
  • FIG. 6B is a schematic cross-sectional structure diagram of the display substrate shown in FIG. 6A;
  • FIGS. 6A and 6B are schematic top views of the structure of the display substrate shown in FIGS. 6A and 6B;
  • FIG. 7 is a schematic diagram of a circuit principle of a silicon-based organic light emitting display panel according to an embodiment of the present disclosure
  • FIG. 8A is a flowchart of a manufacturing method of a color filter structure according to an embodiment of the present disclosure
  • FIG. 8B is a schematic structural diagram of a first color filter layer according to an embodiment of the present disclosure.
  • FIG. 9 is a flowchart of yet another method for manufacturing a color filter structure according to an embodiment of the present disclosure.
  • FIG. 10 is a flowchart of yet another method for manufacturing a color filter structure according to an embodiment of the present disclosure.
  • FIG. 11 is a schematic structural diagram of a first mask according to an embodiment of the present disclosure.
  • FIG. 12 is a schematic structural diagram of a second mask according to an embodiment of the present disclosure.
  • FIG. 13 is a schematic structural diagram of a third mask according to an embodiment of the present disclosure.
  • FIG. 1 is a schematic cross-sectional structure diagram of a color filter structure of a silicon-based organic light emitting diode display substrate.
  • the silicon-based organic light-emitting diode (silicon-based OLED) display substrate includes a display area A and a peripheral area B surrounding the display area A.
  • the color filter structure includes a pixel color film 11 located in the display area A and a pixel color film 11 located in the peripheral area B.
  • the frame color film 12 is used to block the reflective structure of the lower layer.
  • the reflective structure is, for example, metal traces connected to the light-emitting elements of the display substrate, pixel sensing circuits, etc., to prevent the reflective structure from reflecting light and affecting the display area. display effect.
  • the inventor of the present application found that the frame color film is formed by superimposing three layers of color films. Although it can play a role in shielding the reflective structure, the thickness of the frame color film in the peripheral area is the same as that of the pixel color film in the display area. 3 times, a thicker cofferdam will be formed in the surrounding area. Therefore, in the process of coating the color film layer by the spin coating method, when the last color film layer is applied, since the first two color film layers have been made, a cofferdam with twice the thickness of the pixel color film has been formed. As a result, the last color film layer coated on the display area will be uneven, and the resulting display substrate will have uneven brightness (Mura) during display.
  • Mura uneven brightness
  • the embodiments of the present disclosure provide a color filter structure and a manufacturing method thereof, a display substrate and a mask plate group.
  • the color film structure includes a bottom layer, a first color film layer and a second color film layer on the bottom layer.
  • the bottom layer includes a display area and a peripheral area surrounding the display area; the first color filter layer only includes the first pixel color filter located in the display area; the second color filter layer includes the display area and at least partially does not overlap the first pixel color filter The second pixel color filter, and the first border color filter located in the peripheral area and surrounding the display area.
  • the second color film layer of the color film structure includes a first frame color film located in the peripheral area and surrounding the display area, so the problem of light reflection by the light reflection structure of the lower layer of the display substrate can be solved.
  • the first color filter layer of the color filter structure only includes the first pixel color filter located in the display area, thus reducing the thickness of the cofferdam, thereby solving the problem of uneven coating of the last layer of color film.
  • FIG. 2A is a schematic cross-sectional structure diagram of a color filter structure
  • FIG. 2B is a schematic diagram of a planar structure of the color filter structure shown in FIG. 2A.
  • the color filter structure includes a bottom layer 100, a first color filter layer 200 and a second color filter layer 300 on the bottom layer 100.
  • the bottom layer 100 includes a display area A and a peripheral area B surrounding the display area.
  • the display area A is the area used to display the picture, that is, the light-emitting area
  • the peripheral area B is the area where the picture is not displayed, that is, the non-light-emitting area.
  • the bottom layer 100 is a transparent bottom layer.
  • the first color filter layer 200 only includes the first pixel color film 210 in the display area A; the second color filter layer 300 includes the first pixel color film 210 in the display area A and is at least partially connected to the first pixel color film 210.
  • the non-overlapping second pixel color film 310 and the first border color film 320 located in the peripheral area B and surrounding the display area A.
  • the color filter structure shown in FIGS. 2A and 2B includes two color filter layers, and the peripheral area of the display substrate including the color filter structure includes a first frame color filter.
  • the first frame color film can solve the problem of light reflection by the light reflection structure in the lower layer of the peripheral area of the display substrate.
  • the peripheral area of the display substrate of the color filter structure only includes one layer of the first frame color filter, so the thickness of the cofferdam is reduced, and the problem of uneven coating of the color filter can be solved.
  • the shape of the first frame color film 320 of the second color film layer 300 is a closed ring. That is, the first frame color film is a continuous ring-shaped light-shielding layer located in the peripheral area to prevent the light reflecting structure located in the peripheral area of the display substrate including the color film structure from reflecting light, thereby improving the display effect of the display substrate.
  • the first color filter frame 320 of the second color filter layer 300 may cover part of the peripheral area B as shown in FIG. 2B, or may cover the entire peripheral area B, which is not limited in the present disclosure.
  • the first pixel color film 210 located in the display area A includes a plurality of first sub-pixel color films arranged in an array, and there is a certain distance between adjacent first sub-pixel color films. To make room for the color film of different colors to be formed later.
  • the second pixel color filter 310 includes a plurality of second sub-pixel color filters. The second sub-pixel color filter and the first sub-pixel color filter are at least partially non-overlapping, and one side of the second sub-pixel color filter can be connected to the first sub-pixel color filter.
  • the pixel color film is connected, and there is a certain distance between the other side and the first sub-pixel color film to form a subsequent pixel color film that is different in color from the first pixel color film and the second pixel color film.
  • the present disclosure is not limited to this, and the first sub-pixel color film and the second sub-pixel color film may be alternately and connected to each other.
  • the first pixel color film and the second pixel color film located in the display area are configured to be directly opposite to the light-emitting element in the display substrate including the color film structure to perform color filtering on the white light emitted by the light-emitting element The role of light.
  • the second pixel color film partially overlaps the first pixel color film, and the overlapped portion of the two pixels can play a role in shielding light, thereby saving the black matrix.
  • the second pixel color filter can also be separated from the first pixel color filter, and a black matrix is provided in the gap between the two to prevent crosstalk.
  • FIG. 3 is a schematic cross-sectional structure diagram of another color filter structure.
  • the color filter structure further includes a third color filter layer 400.
  • the third color film layer 400 includes a third pixel color film 410 located in the display area A and at least partially not overlapping the first pixel color film 210 and the second pixel color film 310, and a third pixel color film 410 located in the peripheral area B and surrounding the display area A
  • the second frame color film 420 is located on the side of the first frame color film 320 away from the bottom layer 100.
  • the second frame color film 420 is a closed ring color film layer surrounding the display area A.
  • the orthographic projection of the second frame color film 420 on the bottom layer completely coincides with the orthographic projection of the first frame color film 320 on the bottom layer, or the orthographic projection of the second frame color film 420 on the bottom layer falls into the first
  • the frame color film 320 is in the orthographic projection on the bottom layer.
  • the first frame color film and the second frame color film jointly play a role of shading the peripheral area.
  • the thicknesses of the first pixel color film, the second pixel color film, the third pixel color film, the first frame color film, and the second frame color film are all equal. At this time, the sum of the thickness of the first frame color film and the second frame color film is twice the thickness of the first pixel color film.
  • the thickness of the first pixel color film, the second pixel color film, the third pixel color film, the first frame color film, and the second frame color film may also be unequal, which is not limited in the present disclosure.
  • the sum of the thickness of the first frame color film and the second frame color film (that is, the thickness of the cofferdam) is 2-3 ⁇ m larger than the thickness of the first pixel color film.
  • the color filter structure shown in FIG. 3 includes three color filter layers, and the peripheral area of the display substrate including the color filter structure includes a first frame color film and a second frame color film.
  • the above-mentioned two-layer frame color film can solve the problem of light reflection by the light reflection structure of the lower layer of the peripheral area of the display substrate.
  • the display substrate including the color filter structure includes two-layer frame color films. Compared with a display substrate including three-layer frame color films, the thickness of the cofferdam is reduced, thereby solving the problem of uneven coating of the color film.
  • FIG. 4 is a schematic cross-sectional structure diagram of another color filter structure.
  • the third color filter layer 400 of the above color filter structure only includes a third pixel color film 410 that is located in the display area and does not overlap with the first pixel color film 210 and the second pixel color film 310 at least partially.
  • the color filter structure shown in FIG. 4 includes three color filter layers, and the peripheral area of the display substrate including the color filter structure includes a first frame color filter.
  • the above-mentioned first frame color film can solve the problem of light reflection by the light reflection structure of the lower layer of the peripheral area of the display substrate.
  • the display substrate including the color filter structure includes a first frame color film. Compared with the display substrate including three-layer frame color films, the thickness of the cofferdam is reduced, thereby solving the problem of uneven coating of the color film.
  • the first pixel color film 210 and the second pixel color film 310 or the third pixel color film 410 at least partially overlap, and the first pixel color film 210 and the second pixel color film 310 or the third pixel color film 410 overlap at least partially.
  • the first pixel color film 210 is located on the side of the second pixel color film 310 or the third pixel color film 410 close to the bottom layer 100.
  • the overlapping part of the first pixel color film and the second pixel color film or the third pixel color film can function as a black matrix.
  • the colors of the first color filter layer 200, the second color filter layer 300, and the third color filter layer 400 are different.
  • the first color film layer is a red color film layer
  • the second color film layer is a blue color film layer
  • the third color film layer is a green color film layer.
  • the colors and formation sequence of the first color film layer, the second color film layer, and the third color film layer can be adjusted according to the actual requirements of the product.
  • the color film layer formed first may not be provided with a frame color film but only includes a pixel color film, so that the thickness of the material layer formed in the spin coating process of the color film formed subsequently is more uniform.
  • the color film layer to be formed later one or two of the color film layers may have a frame color film, so that the peripheral area can be shielded from light.
  • FIG. 5 is a schematic cross-sectional structure diagram of the display substrate.
  • the display substrate further includes a base substrate 500, a light-emitting element 600, and a color filter structure.
  • the light-emitting element 600 is located on the base substrate 500 and includes a first light-emitting element and a second light-emitting element.
  • the first light-emitting element is a light-emitting element located in the display area A
  • the second light-emitting element is a light-emitting element located in the peripheral area B.
  • the color filter structure is located on the display side of the light-emitting element 600, and can be the color filter structure provided in any of the foregoing embodiments.
  • the display substrate further includes a sensing area R1.
  • the position of the sensing area R1 corresponds to the peripheral area B of the bottom layer of the color filter structure.
  • the frame color film can cover the sensing area R1.
  • the sensing area R1 includes a plurality of sensing pixel units 201, as shown by the dashed box in the figure.
  • Each sensing pixel unit 201 includes a light-emitting element 600 and a sensing circuit structure 202.
  • the sensing circuit structure 202 is used to detect the voltage at one end of the light-emitting element 600.
  • the sensing circuit structure can be connected to a temperature sensor, and the sensing circuit is located on the side of the color filter structure facing the base substrate 500.
  • the color film structure is located on the side of the light emitting element 600 and the sensing circuit structure 202 away from the base substrate 500, and the orthographic projection of the sensing area R1 on the base substrate 500 is located on the first frame color film 320 on the base substrate 500 In orthographic projection.
  • the color filter structure includes the second frame color film 420
  • the orthographic projection of the sensing area R1 on the base substrate 500 is also located within the orthographic projection of the second frame color film 420 on the base substrate 500.
  • the light-emitting element is an organic light-emitting diode (OLED), such as Micro-OLED or Mini-OLED, configured to emit white light.
  • OLED organic light-emitting diode
  • the light emitted by the sensing pixel unit of the sensing region R1 includes light emitted by the light emitting elements of the plurality of sensing pixel units and light reflected by the metal reflective structure in the sensing circuit structure of the plurality of sensing pixel units.
  • the first frame color film and the second frame color film can play the role of shielding the light emitted by the light-emitting element of the sensing pixel unit and the metal reflective structure in the sensing circuit.
  • the base substrate 500 is a silicon substrate 500
  • the side of the silicon substrate 500 facing the light-emitting element 600 includes a pixel circuit structure 510
  • the pixel circuit structure 510 is connected to the light-emitting element 600. That is, the pixel circuit structure 510 is integrated on the silicon substrate 500.
  • a gate driving circuit and a data driving circuit may also be integrated on the silicon substrate, and a flexible circuit board is provided in the peripheral area of the silicon substrate, configured to transmit electrical signals to the gate driving circuit, the data driving circuit, and the light emitting element.
  • the gate driving circuit is used to generate a gate driving signal
  • the data driving circuit is used to generate a data signal.
  • the gate driving circuit and the data driving circuit may adopt conventional circuit structures in the art. No restrictions.
  • the pixel circuit structure 510 is used to provide a driving current to the light-emitting element 600 under the control of a driving signal such as a gate scan signal, a data signal, and a voltage signal, so that the organic light-emitting layer included in the light-emitting element emits light.
  • a driving signal such as a gate scan signal, a data signal, and a voltage signal
  • the pixel circuit structure 510 may adopt 4T1C, 4T2C, 7T1C, 8T2C, and other circuit structures of pixel circuits, and the driving method thereof may adopt a conventional method in the art, which will not be repeated here.
  • the pixel circuit structure can be fabricated on a silicon substrate using a CMOS process, which is not limited in the embodiments of the present disclosure.
  • the silicon substrate 500 further includes a first insulating layer 520 and a second insulating layer 550 located between the pixel circuit structure 510 and the light emitting element 600, and via holes 530 are provided in both insulating layers.
  • the via 530 may be a tungsten hole filled with tungsten metal.
  • the thickness of the first insulating layer 520 and the second insulating layer 550 is relatively large, forming a tungsten via in the first insulating layer 520 and the second insulating layer 550 can ensure The stability of the conductive path, and because the process of making tungsten vias is mature, the obtained first insulating layer 520 and the second insulating layer 550 have good surface flatness, which is beneficial to reduce the first insulating layer 520 and the second insulating layer.
  • the contact resistance between 550 and the electrode included in the light-emitting element 600 is provided.
  • a metal layer 540 is provided between the vias 530 in the two insulating layers to electrically connect the light-emitting element 600 and the pixel circuit structure 510.
  • the light-emitting element 600 includes a first electrode 610, an organic light-emitting layer 620, and a second electrode 630 stacked in sequence.
  • the first electrode 610 is electrically connected to the pixel circuit structure 510 through a via 530 in the insulating layer.
  • the pixel circuit 510 is used to drive the light-emitting element 600 to emit light.
  • the light-emitting element 600 includes a plurality of light-emitting sub-elements, and the organic light-emitting layers 620 of adjacent light-emitting sub-elements are separated by a pixel defining layer 700.
  • the pixel circuit 510 includes at least a driving transistor and a switching transistor, and the driving transistor and the first electrode 610 are electrically connected to each other.
  • the electrical signal for driving the light-emitting element 600 is transmitted to the first electrode 610, thereby controlling the light-emitting element 600 to emit light.
  • the driving transistor includes a gate electrode, a source electrode, and a drain electrode.
  • the source electrode of the driving transistor is electrically connected to the first electrode 610.
  • the electrical signal provided by the power line may be transmitted to the first electrode 610 through the source electrode of the driving transistor. Since a voltage difference is formed between the first electrode 610 and the second electrode 630, an electric field is formed between the two, and the organic light emitting layer 620 emits light under the action of the electric field.
  • each light-emitting sub-element included in the light-emitting element 600 corresponds to each sub-pixel color film in a one-to-one correspondence.
  • the light emitted by the light-emitting element 600 is white light, and the white light can realize color display after passing through the color film of different color pixels on the display side of the light-emitting element 600.
  • the sensing area R1 located in the peripheral area B is also provided with the same light emitting element as the light emitting element 600 in the display area A.
  • the light emitting element located in the sensing area R1 is not used for display, but used In order to detect the attenuation of the light emission of the pixel, it needs to be blocked by the border color film located in the peripheral area B.
  • the display substrate further includes a thin film encapsulation layer on the second electrode 630, the bottom layer 100 is a thin film encapsulation layer, and the thin film encapsulation layer is located on the first color film layer 200 facing the light emitting element 600.
  • the display substrate further includes a thin film encapsulation layer on the second electrode 630, the bottom layer 100 is a thin film encapsulation layer, and the thin film encapsulation layer is located on the first color film layer 200 facing the light emitting element 600.
  • the thin film encapsulation layer is located on the first color film layer 200 facing the light emitting element 600.
  • the above-mentioned bottom layer 100 is a first thin-film encapsulation layer, and a second thin-film encapsulation layer is provided on the side of the color filter structure away from the light-emitting element 600.
  • the first thin-film encapsulation layer and the second thin-film encapsulation layer can realize effective encapsulation of the light-emitting element. , It can effectively block water vapor, oxygen, etc., and achieve the purpose of protecting the light-emitting element and prolonging the service life of the light-emitting element.
  • a cover plate is further provided on the side of the second thin film encapsulation layer away from the color filter structure, and the second thin film encapsulation layer and the cover plate are sequentially arranged on the color filter structure to realize the function of protecting the color filter structure.
  • the second thin-film encapsulation layer is made of one or more of organic materials or inorganic materials with better sealing properties to achieve a better sealing effect and protect the silicon-based OLED display device.
  • the cover plate can be made of a transparent material.
  • the transparent material can be an inorganic material such as glass or an organic material such as polyimide.
  • glass with high transmittance can be used. The embodiment does not limit this.
  • FIG. 6A is a schematic diagram of area division of a display substrate provided by an embodiment of the present disclosure.
  • the display substrate includes a display area A and a peripheral area B surrounding the display area A.
  • the peripheral area B includes a connection electrode area B1, a first dummy area B2, a second dummy area B3, a sensor area R1, and a pad area (pad area) R2.
  • the first dummy area B2 is located between the connection electrode area B1 and the display area A, and the second dummy area B3 is located on the side of the connection electrode area B1 away from the display area A.
  • the part of the first dummy area B2 located between the sensor area R1 and the connecting electrode area B1 is the first dummy sub-area B21; the second dummy sub-area B22 is located between the sensor area R1 and the display area A.
  • the pad area R2 can be used for an external circuit.
  • the peripheral area B does not include the sensor area R1, that is, the peripheral area B includes the connecting electrode area B1, the first dummy area B2, the second dummy area B3, and the pad area R2.
  • the provision of the first dummy area B2 can avoid short circuiting of the components that need to be insulated from each other in the display area and the connecting electrode area B1, and the provision of the second dummy area B3 can facilitate the packaging of the display substrate and improve the packaging effect.
  • the display substrate includes: a base substrate 500; a first electrode pattern 130 located in the display area A of the display substrate and including a plurality of first electrodes 131 spaced apart from each other; a connecting electrode pattern 140 located on the display substrate And the first dummy electrode pattern 150 is located in the first dummy area B2 of the display substrate and includes a plurality of first dummy electrodes 151.
  • the connection electrode area B1 surrounds the display area A, and the first dummy area B2 is located between the connection electrode area B1 and the display area A.
  • connection electrode pattern 140 surrounds the first electrode pattern 130, and the first dummy electrode pattern 150 surrounds the first electrode pattern 130.
  • the first dummy electrode pattern 150 is located between the connection electrode pattern 140 and the first electrode pattern 130.
  • the connection electrode pattern 140 has a ring shape. The provision of the first dummy electrode pattern 150 can help improve the etching uniformity.
  • the color filter structure is located on the side of the plurality of ring-shaped connecting electrodes away from the base substrate 500, and the orthographic projection of the connecting electrode area B1 on the base substrate 500 is located on the front of the first frame color film 320 on the base substrate 500. Within the projection.
  • the color filter structure is located on the side of the plurality of first dummy electrodes away from the base substrate 500, and the orthographic projection of the first dummy area B2 on the base substrate 500 is located on the first frame color film 320 on the base substrate 500. In orthographic projection.
  • the display substrate provided by an embodiment of the present disclosure further includes a second electrode 160, which is connected to the connection electrode 141; the peripheral area B of the display substrate surrounds the display area A, and the peripheral area B includes the connection The electrode area B1 and the first dummy area B2; the second electrode 160 is located in the display area A and the peripheral area B, and the second electrode 160 and the first electrode pattern 130 are spaced apart from each other.
  • At least two of the pattern density of the first electrode pattern 130, the pattern density of the connection electrode pattern 140, and the pattern density of the first dummy electrode pattern 150 are the same.
  • the display substrate provided by an embodiment of the present disclosure further includes a sensor electrode pattern 170, which is located in the sensor region R1 of the display substrate and includes a plurality of sensor electrodes 171.
  • the pattern density of the sensor electrode pattern 170 and the pattern density of the first electrode pattern 130 are the same.
  • the display substrate provided by an embodiment of the present disclosure further includes a second dummy electrode pattern 180, which is located in the second dummy area B3 of the display substrate and includes a plurality of second dummy electrodes 181; B3 is located on the side of the connection electrode area B1 away from the display area A.
  • the pattern density of the second dummy electrode pattern 180 and the pattern density of the first electrode pattern 130 are the same.
  • the pattern density of the first electrode pattern 130, the pattern density of the connection electrode pattern 140, the pattern density of the sensor electrode pattern 170, the pattern density of the first dummy electrode pattern 150, and the second dummy pattern The pattern density of the electrode patterns 180 is the same.
  • the second dummy area B3 is located at the outermost periphery of the peripheral area, surrounding the first dummy area, the connection electrode area, and the sensing area, and the second dummy area B3 includes a plurality of second dummy electrodes.
  • the color filter structure is located on a side of the plurality of second dummy electrodes away from the base substrate, and the orthographic projection of the second dummy area on the base substrate is within the orthographic projection of the first frame color filter on the base substrate.
  • the plurality of connection electrodes 141 are block-shaped, and the plurality of block-shaped connection electrodes 141 form a ring-shaped connection electrode pattern 140.
  • the plurality of first dummy electrodes 151 are block-shaped, and the plurality of block-shaped first dummy electrodes 151 form a ring-shaped first dummy electrode pattern 150.
  • the plurality of second dummy electrodes 181 are block-shaped, and the plurality of block-shaped second dummy electrodes 181 form a ring-shaped second dummy electrode pattern 180.
  • the second electrode 160 is the cathode of the light-emitting element
  • the connecting electrode 141 is configured to connect the cathode of the light-emitting element and a power signal. Both the first dummy electrode 151 and the second dummy electrode 181 float.
  • a first filling layer 190 is provided in the first dummy sub-region B21.
  • the first filling layer 190 includes a plurality of first dummy electrodes 151 and an insulating filling layer 191;
  • the first electrode pattern 130 includes The edge first electrode 132 and the insulating filling layer 191 adjacent to the electrode 141 are in contact with the connecting electrode 141 and the edge first electrode 132 respectively.
  • the second electrode 106 is in contact with the insulating filling layer 191.
  • the edge first electrode 132 and the plurality of first dummy electrodes 151 are insulated from each other.
  • the display substrate further includes a pixel defining layer 104, and the pixel defining layer 104 includes a plurality of pixel defining portions 1040, and each of the plurality of pixel defining portions 1040 is located between adjacent first electrodes 131.
  • the insulating filling layer 191 and the pixel defining layer 104 are located in the same layer, and can be formed by the same film layer using the same patterning process to save manufacturing process.
  • the first electrode pattern 130, the connection electrode pattern 140, the sensor electrode pattern 170, the first dummy electrode pattern 150, and the second dummy electrode pattern 180 are located on the same layer, and can be formed by the same film layer using the same patterning process. , In order to save the production process.
  • the display substrate further includes a second filling layer 192, and the second filling layer 192 includes at least one second filling portion 1920, and the second filling portion 1920 is located between adjacent connection electrodes 141.
  • the second filling layer 192 is an insulating layer.
  • the second filling portions 1920 are in contact with adjacent connection electrodes 141, respectively.
  • the second filling layer 192 and the first filling layer 190 are located in the same layer, and can be formed by the same film layer using the same patterning process to save manufacturing process.
  • the display substrate further includes a third filling layer 193.
  • the third filling layer 193 includes a plurality of third filling portions 1930.
  • the third filling portions 1930 are located at adjacent sensor electrodes 171 and adjacent sensor electrodes 171. And at least one of the first dummy electrodes.
  • the third filling portion 1930 is located between adjacent sensor electrodes 171 as an example for description.
  • the third filling layer 193 and the pixel definition layer 104 are located in the same layer, and can be formed by the same film layer using the same patterning process to save manufacturing process.
  • the pixel definition layer 104, the insulating filling layer 191, the second filling layer 192, and the third filling layer 193 are located in the same layer.
  • the display substrate further includes a light-emitting function layer 105, the light-emitting function layer 105 is located between the first electrode pattern 130 and the second electrode 160, and the light-emitting function layer 105 is in contact with the first filling layer 190.
  • the light-emitting function layer 105 is in contact with a part of the first filling layer 190.
  • the light-emitting function layer 105 extends to the first dummy sub-region B21.
  • the light-emitting function layer 105 covers the entire display area A, the sensor area R1, the second dummy sub-area B22, and a part of the first dummy sub-area B21, so as to prevent the light-emitting function layer 105 from being vapor-deposited on the connecting electrode area B1 to cause the first electrode and the second electrode Short circuit.
  • the second electrode 160 extends from the display area A to the second dummy area B3 of the peripheral area B to facilitate the connection between the second electrode 160 and the connection electrode 141.
  • the light-emitting function layer 105 is in contact with the sensor electrode pattern 170.
  • the light-emitting function layer 105 is not in contact with the first dummy electrode 151 located in the second dummy sub-region B22, but it is not limited thereto.
  • an insulating layer IS is further provided on the base substrate 500, and a conductive pattern 109 is provided on the insulating layer IS.
  • the conductive pattern 109 includes a first conductive portion 1091, a second conductive portion 1092, and a third conductive portion 1093.
  • the insulating layer IS includes a third via V11, a fourth via V21, and a fifth via V31.
  • the third via V11, the fourth via V21, and the fifth via V31 are respectively filled with conductive materials to form a connection member.
  • the first electrode 131 is connected to the connector in the fourth via hole V21 through the first conductive portion 1091.
  • the connection electrode 141 is connected to the connection member in the third via hole V11 through the second conductive portion 1092.
  • the sensor electrode 171 is connected to the connector in the fifth via hole V31 through the third conductive portion 1093. It should be noted that another structure is provided between the base substrate 500 and the insulating layer IS, and this other structure is not shown in FIG. 6B
  • the display substrate does not include the pixel definition layer 104.
  • the display substrate further includes an encapsulation layer 107.
  • the encapsulation layer 107 is configured to encapsulate the light-emitting element to prevent water and oxygen from attacking.
  • the encapsulation layer 107 covers the second electrode 160, the connection electrode pattern 140, and the second dummy electrode pattern 180.
  • the encapsulation layer 107 may cover the entire base substrate 500 and the structures thereon.
  • FIG. 6C is a schematic top view of the structure of the display substrate shown in FIGS. 6A and 6B.
  • FIG. 6C shows the display area A, the peripheral area B, the connection electrode area B1, the first dummy area B2, the second dummy area B3, and the sensor electrode 171.
  • the pattern density of the sensor electrode pattern 170, the pattern density of the first electrode pattern 130, the pattern density of the connection electrode pattern 140, the pattern density of the first dummy electrode pattern 150 and the second dummy electrode pattern 180 are the same.
  • the pattern density of the plurality of sensor electrodes 171, the pattern density of the plurality of first electrodes 131, the pattern density of the plurality of connection electrodes 141, the pattern density of the plurality of first dummy electrodes 151 and the plurality of second dummy electrodes 181 are the same.
  • the first dummy electrode 151 has a block shape.
  • the second dummy electrode 181 has a block shape.
  • the sensor electrode 171, the first electrode 131, the connection electrode 141, the first dummy electrode 151, and the second dummy electrode 181 are all in a block shape.
  • the display substrate further includes the color filter substrate provided in any of the above embodiments, which is located on the side of the packaging layer 107 away from the base substrate 500, which is not shown in FIG. 6B.
  • the orthographic projection of the connecting electrode area B1 on the base substrate is within the orthographic projection of the first frame color film on the base substrate.
  • the orthographic projection of the first dummy area B2 on the base substrate is within the orthographic projection of the first bezel color film on the base substrate.
  • the orthographic projection of the sensing area R1 on the base substrate is within the orthographic projection of the first frame color film on the base substrate.
  • the orthographic projection of at least a part of the second dummy area B3 on the base substrate is within the orthographic projection of the first frame color film on the base substrate.
  • the technical effect of the display substrate provided by the embodiment of the present disclosure is the same as the technical effect of the above-mentioned color filter structure provided by the embodiment of the present disclosure, and will not be repeated here.
  • Another embodiment of the present disclosure provides a light emitting diode display panel, including the display substrate provided in any of the above embodiments.
  • FIG. 7 is a schematic diagram of a circuit principle of a silicon-based organic light-emitting display panel provided by some embodiments of the present disclosure.
  • the silicon-based organic light-emitting display panel includes a plurality of display devices L (ie, light-emitting elements) located in a display area A and a pixel circuit 110 coupled to each display device L in a one-to-one correspondence.
  • the pixel circuit 110 includes a driving transistor.
  • the silicon-based organic light-emitting display panel may further include a plurality of voltage controls located in the peripheral area of the silicon-based organic light-emitting display panel (the area of the silicon-based organic light-emitting display panel excluding the display area A, which is not marked in the figure). Circuit 120.
  • At least two pixel circuits 110 in a row share one voltage control circuit 120, and the first electrode of the driving transistor in a row of pixel circuits 110 is coupled to the common voltage control circuit 120, and the second electrode of each driving transistor is connected to the corresponding display
  • the device L is coupled.
  • the voltage control circuit 120 is configured to output an initialization signal Vinit to the first pole of the driving transistor in response to the reset control signal RE, and control the corresponding display device L to reset; and in response to the light emission control signal EM, output the first power signal VDD To the first pole of the driving transistor to drive the display device L to emit light.
  • the silicon-based organic light emitting display panel may further include a second power signal VSS located in the display area for inputting the second power signal to the light emitting device L.
  • the reset control signal RE corresponding to each voltage control circuit 120 is not completely the same, and the light emission control signal EM corresponding to each voltage control circuit 120 is not completely different.
  • the structure of each pixel circuit in the display area A can be simplified, and the occupied area of the pixel circuit in the display area A can be reduced, so that more pixel circuits and display devices can be arranged in the display area A to achieve high PPI.
  • Organic light emitting display panel the voltage control circuit 120 outputs the initialization signal Vinit to the first pole of the driving transistor under the control of the reset control signal RE to control the reset of the corresponding display device, thereby avoiding the voltage pair applied to the display device when the previous frame emits light. The effect of the next frame of light, thereby improving the afterimage phenomenon.
  • the silicon-based organic light emitting display panel may further include a plurality of pixel units PX located in the display area A, each pixel unit PX includes a plurality of sub-pixels; each sub-pixel includes a display device L and a pixel circuit 110 respectively.
  • the pixel unit PX may include three sub-pixels of different colors. The three sub-pixels may be red sub-pixels, green sub-pixels, and blue sub-pixels, respectively.
  • the pixel unit PX may also include 4, 5 or more sub-pixels, which need to be designed and determined according to the actual application environment, which is not limited here.
  • the pixel circuits 110 in at least two adjacent sub-pixels in the same row may share one voltage control circuit 120.
  • all the pixel circuits 110 in the same row can share one voltage control circuit 120.
  • the pixel circuits 110 in two, three or more adjacent sub-pixels in the same row may share one voltage control circuit 120, which is not limited here. In this way, by sharing the voltage control circuit 120, the area occupied by the pixel circuit in the display area A can be reduced.
  • the two electrodes of the light emitting element L may be the first electrode 610 and the second electrode 630, respectively.
  • the first electrode 610 is the anode of the light-emitting element L
  • the second electrode 630 is the cathode of the light-emitting element L.
  • the first electrode 610 is connected to the pixel circuit 110, and the second electrode 630 can be input with the first power signal VSS.
  • the first power signal VSS may be transmitted to the second electrode 630 through the connection electrode 141.
  • the display panel provided by the embodiment of the present disclosure is a small-sized light emitting diode display panel, that is, a micro light emitting diode display panel.
  • the display panel can be applied to TVs, digital cameras, mobile phones, watches, tablet computers, notebook computers, navigators and other products or components with display functions, and is particularly suitable for use in helmet-mounted displays, stereoscopic display mirrors, and eye-type displays.
  • the above-mentioned display panel can be connected with mobile communication network, satellite positioning and other systems to obtain accurate image information at any place and at any time.
  • the display panel provided by the embodiment of the present disclosure may also be applied to a virtual reality device or an augmented reality device.
  • the display device may include any product or component with a display function such as a TV, a digital camera, a mobile phone, a watch, a tablet computer, a notebook computer, a navigator, etc.
  • the display device has the same technical effect as the display substrate provided in the foregoing embodiment.
  • FIG. 8A is a flow chart of a manufacturing method of a color film structure. As shown in Fig. 8A, the manufacturing method includes S11-S12.
  • the bottom layer 100 includes a display area A and a peripheral area B surrounding the display area.
  • the first color filter layer 200 only includes the first pixel color filter 210 located in the display area.
  • FIG. 8B is a schematic diagram of the structure of the first color filter layer 200.
  • the color filter structure after S11 is completed is shown in Figure 7B.
  • the method of fabricating the first color filter layer 200 on the bottom layer 100 includes: coating a first color filter material layer on the bottom layer by a spin coating method, and performing a patterning process on the first color filter material layer to form the first color filter layer. ⁇ 200 ⁇ Color film layer 200.
  • the glue application speed can be different.
  • the first pixel color film 210 can be formed in the display area A.
  • the color of the first color film material layer is different, and the exposure intensity and development time used are different.
  • the second color filter layer includes a second pixel color filter 310 located in the display area and at least partially not overlapping the first pixel color filter, and a first border color filter 320 located in the peripheral area and surrounding the display area.
  • the method of fabricating the second color filter layer 300 on the first color filter layer is the same as the method of fabricating the first color filter layer 200 on the bottom layer 100 described above, and will not be repeated here.
  • the color filter structure after completing S11 and S12 includes a first color filter layer 200 and a second color filter layer 300, as shown in FIG. 2A.
  • Fig. 9 is a flow chart of another method for fabricating a color film structure. As shown in Figure 9, in addition to S11 and S12, the manufacturing method also includes:
  • a third color filter layer 400 is fabricated on the first color filter layer.
  • the third color filter layer 400 includes a third pixel color film 410 located in the display area and at least partially not overlapping the first pixel color film and the second pixel color film, and a second border color film located in the peripheral area and surrounding the display area 420.
  • the second frame color film 420 is located on the side of the first frame color film 320 away from the bottom layer.
  • the method of manufacturing the third color filter layer 400 on the first color filter layer is the same as the method of manufacturing the first color filter layer 200 on the bottom layer 100 described above, and will not be repeated here.
  • the color filter structure after completing S11, S12 and S13a includes a first color filter layer 200, a second color filter layer 300, and a third color filter layer 400, as shown in FIG. 3.
  • Fig. 10 is a flowchart of yet another method for manufacturing a color filter structure. As shown in Figure 10, in addition to S11 and S12, the manufacturing method also includes:
  • the method of fabricating another third color filter layer 400 on the first color filter layer is the same as the method of fabricating the first color filter layer 200 on the bottom layer 100 described above, and will not be repeated here.
  • the color filter structure after S11, S13b, and S12 includes a first color filter layer 200, a second color filter layer 300, and another third color filter layer 400, as shown in FIG. 4.
  • the first pixel color filter and the second pixel color filter or the third pixel color filter at least partially overlap, and the first pixel color film and the second pixel color filter overlap each other.
  • the first pixel color film is located on the side of the second pixel color film or the third pixel color film close to the bottom layer.
  • An embodiment of the present disclosure further provides a manufacturing method of a display substrate, including:
  • a base substrate including a display area and a peripheral area surrounding the display area; a light-emitting element is formed in the display area on the base substrate; and a color film structure is fabricated on the light-emitting element.
  • the color filter structure includes the manufacturing method of the color filter structure provided in any of the above embodiments, and will not be described here.
  • An embodiment of the present disclosure further provides a mask set configured to fabricate the color filter structure provided in the above embodiment.
  • the mask set includes a first mask 20 and a second mask 30.
  • FIG. 11 is a schematic diagram of the structure of the first mask 20.
  • the pattern area of the first mask 20 only includes the first pixel pattern 21 located in the middle.
  • the first pixel pattern 21 is configured to form the first pixel color filter 210 of the first color filter layer 200 as shown in FIG. 2A or the third pixel color filter 410 to form the third color filter layer 400 as shown in FIG. 4.
  • the number of the first pixel patterns 21 is plural.
  • the first mask can be used in step S11 or S13b in the manufacturing method of the color filter structure provided in the above embodiment. That is, in step S11 or S13b, a patterning process is performed on the color filter material layer of the first color filter layer 200 or the third color filter layer 400 by using the first mask. It should be noted that when the first mask is used to make the third color filter layer 400 in S13b, the position of the first mask is different from that of the first mask when the first mask is used to make the first color filter layer 200 in S11. s position. For example, when the color filter structure shown in FIG.
  • the position of the first mask when the first mask is used to make the third color filter layer 400 can be relative to the position of the first mask when the first mask is used to make the first color filter layer 200.
  • the position of a mask is moved to the right by a distance of 2 pixels of the color film.
  • FIG. 12 is a schematic diagram of the structure of the second mask 30.
  • the pattern area of the second mask plate 30 includes a second pixel pattern 31 located in the middle and a first frame pattern 32 surrounding the middle.
  • the second pixel pattern 31 is configured to form the second pixel color film 310 of the second color filter layer 300 as shown in FIG. 2A
  • the first frame pattern 32 is configured to form the first frame color film 320 as shown in FIG. 2A.
  • the number of second pixel patterns 31 is plural.
  • the first frame pattern 32 is a closed ring, and the present disclosure does not limit its specific shape.
  • the second mask may be used in step S12 in the manufacturing method of the color filter structure provided in the foregoing embodiment. That is, in step S12, a patterning process is performed on the color filter material layer of the second color filter layer 300 by using the second mask.
  • the color filter structure shown in FIG. 2A can be manufactured according to the steps shown in FIG. 8A.
  • using the first mask twice and the second mask once can produce the color filter structure as shown in FIG. 4 according to the steps shown in FIG. 10.
  • the fabricated color filter structure is the same as the color filter structure provided in the foregoing embodiment, and therefore has the same technical effect.
  • the mask set further includes a third mask 40.
  • FIG. 13 is a schematic diagram of the structure of the third mask 40.
  • the pattern area of the third mask 40 includes a third pixel pattern 41 located in the middle and a second frame pattern 42 surrounding the middle.
  • the number of third pixel patterns 41 is plural.
  • the third pixel pattern 41 is configured to form a third pixel color film 410 of the third color filter layer 400 as shown in FIG. 3, and the second frame pattern 42 is configured to form a second frame color film 420 as shown in FIG. 3.
  • the shape and size of the first frame pattern 32 and the second frame pattern 42 are approximately the same, and the difference is that the distance between at least one side of the first frame pattern 32 and the second pixel pattern 31 is different from that of the second frame pattern 42
  • the distance between the corresponding side of and the third pixel pattern 41 is such that the second pixel color film and the third pixel color film do not overlap at least partially.
  • the distance L1 between the right side of the first frame pattern 32 and the second pixel pattern 31 closest to the side is different from the right side of the second frame pattern 42 and the distance from the second pixel pattern 31.
  • the distance L2 between the third pixel patterns 41 closest to the sides is different from the right side of the second frame pattern 42 and the distance from the second pixel pattern 31.
  • the second frame pattern 42 is a closed ring, and the present disclosure does not limit its specific shape.
  • the third mask may be used in step S S13a in the method for manufacturing the color filter structure provided in the foregoing embodiment. That is, in step S13a, a third mask is used to perform a patterning process on the third pixel color filter 410 of the third color filter layer 400 and the color filter material layer of the second frame color filter 420.
  • the color filter structure shown in FIG. 3 can be manufactured according to the steps shown in FIG. 9.
  • the fabricated color filter structure is the same as the color filter structure provided in the foregoing embodiment, and therefore has the same technical effect.

Abstract

一种显示基板及其制作方法、显示装置。该显示基板包括衬底基板(500)，包括显示区(A)和围绕显示区(A)的周边区(B)；第一发光元件，位于衬底基板(500)的显示区；以及彩膜结构，位于第一发光元件的显示侧。彩膜结构包括：第一彩膜层(200)，仅包括位于显示区(A)的第一像素彩膜(210)；以及第二彩膜层(300)，包括位于显示区(A)且与第一像素彩膜(210)至少部分不交叠的第二像素彩膜(310)，以及位于周边区(B)且围绕显示区(A)的第一边框彩膜(320)。该显示基板可解决下层反光结构反光的问题以及彩膜结构的最后一层彩膜涂覆不均的问题。

Description

显示基板及其制作方法、显示装置 技术领域
本公开的实施例涉及一种显示基板及其制作方法、显示装置。
背景技术
微型有机发光二极管(Micro Organic Light-Emitting Diode，简称Micro-OLED)显示装置是一种以硅基板为衬底的新型OLED显示装置，又叫做硅基有机发光二极管(简称硅基OLED)显示装置。硅基OLED显示装置具有体积小、分辨率高等优点，具有广阔的市场应用空间，适合应用于头盔显示器、立体显示镜以及眼镜式显示器等。目前，硅基OLED显示装置的彩色显示一般通过白光有机发光二极管(WOLED)配合彩色滤光片(CF)的方式实现。
发明内容
本公开的实施例提供一种显示基板及其制作方法、显示装置。该显示基板可解决下层反光结构反光的问题以及显示基板的最后一层彩膜涂覆不均的问题。
本公开一实施例提供一种显示基板，包括衬底基板，包括显示区和围绕所述显示区的周边区；第一发光元件，位于所述衬底基板上；以及彩膜结构，位于所述发光元件的显示侧，其中，所述彩膜结构包括：第一彩膜层，仅包括位于所述显示区的第一像素彩膜；以及第二彩膜层，包括位于所述显示区且与所述第一像素彩膜至少部分不交叠的第二像素彩膜，以及位于所述周边区且围绕所述显示区的第一边框彩膜。
在一些示例中，所述彩膜结构还包括：第三彩膜层，包括位于所述显示区且与所述第一像素彩膜和所述第二像素彩膜至少部分不交叠的第三像素彩膜，以及位于所述周边区且围绕所述显示区的第二边框彩膜，其中，所述第二边框彩膜位于所述第一边框彩膜远离所述衬底基板的一侧。
在一些示例中，所述第二边框彩膜在所述衬底基板上的正投影与所述第 一边框彩膜在所述衬底基板上的正投影完全重合或落入所述第一边框彩膜在所述衬底基板上的正投影之内。
在一些示例中，所述第一边框彩膜和所述第二边框彩膜的厚度之和比所述第一像素彩膜的厚度大2～3μm。
在一些示例中，所述显示基板还包括：第三彩膜层，仅包括位于所述显示区且与所述第一像素彩膜和所述第二像素彩膜至少部分不交叠的第三像素彩膜。
在一些示例中，所述第一像素彩膜与所述第二像素彩膜或所述第三像素彩膜至少部分交叠，且在所述第一像素彩膜与所述第二像素彩膜或所述第三像素彩膜的交叠部分中，所述第一像素彩膜位于所述第二像素彩膜或所述第三像素彩膜靠近所述衬底基板的一侧。
在一些示例中，所述第一彩膜层、第二彩膜层和第三彩膜层为不同颜色的彩膜层。
在一些示例中，所述第一彩膜层、第二彩膜层和第三彩膜层分别为红色彩膜层、蓝色彩膜层和绿色彩膜层。
在一些示例中，所述第一边框彩膜具有围绕所述显示区的环形形状。
在一些示例中，所述显示基板还包括位于所述周边区的感测区，所述感测区包括多个感测像素单元，每个所述感测像素单元包括第二发光元件和感测电路结构，其中，所述彩膜结构位于所述发光元件和所述感测电路结构远离所述衬底基板的一侧，且所述感测区在所述衬底基板上的正投影位于所述第一边框彩膜在所述衬底基板上的正投影内。
在一些示例中，所述显示基板还包括位于所述周边区的连接电极区，所述连接电极区为围绕所述显示区的环形区域，包括多个环形的连接电极，其中，所述彩膜结构位于所述多个环形的连接电极远离所述衬底基板的一侧，且所述连接电极区在所述衬底基板上的正投影位于所述第一边框彩膜在所述衬底基板上的正投影内。
在一些示例中，所述显示基板还包括位于所述周边区的第一虚设区，所述第一虚设区位于所述连接电极区与所述显示区之间，包括多个浮置电极，其中，所述彩膜结构位于所述多个浮置电极远离所述衬底基板的一侧，且所述第一虚设区在所述衬底基板上的正投影位于所述第一边框彩膜在所述衬底 基板上的正投影内。
在一些示例中，所述显示基板还包括位于所述周边区的第二虚设区，所述第二虚设区位于所述周边区的最外围，围绕所述第一虚设区、连接电极区和感测区，所述第二虚设区包括多个第二虚设电极，其中，所述彩膜结构位于所述多个第二虚设电极远离所述衬底基板的一侧，且所述第二虚设区在所述衬底基板上的正投影位于所述第一边框彩膜在所述衬底基板上的正投影内。
在一些示例中，所述衬底基板为硅基板。
在一些示例中，所述硅基板面向所述发光元件的一侧包括像素电路结构，且所述像素电路结构与所述发光元件连接，所述像素电路结构的至少一部分位于所述硅基板内。
在一些示例中，所述显示基板还包括薄膜封装层，所述薄膜封装层位于所述第一彩膜层面向所述发光元件的一侧。
本公开一实施例还提供一种显示装置，包括上述任一项的显示基板。
本公开一实施例还提供一种显示基板的制作方法，包括：提供衬底基板，包括显示区和围绕所述显示区的周边区；在所述衬底基板上的所述显示区形成发光元件；在所述发光元件上制作第一彩膜层，所述第一彩膜层仅包括位于所述显示区的第一像素彩膜；在所述第一彩膜层上制作第二彩膜层，所述第二彩膜层包括位于所述显示区且与所述第一像素彩膜至少部分不交叠的第二像素彩膜，以及位于所述周边区且围绕所述显示区的第一边框彩膜。
在一些示例中，所述方法还包括：在制作所述第二彩膜层之后，在所述第一彩膜层上制作第三彩膜层，所述第三彩膜层包括位于所述显示区且与所述第一像素彩膜和所述第二像素彩膜至少部分不交叠的第三像素彩膜，以及位于所述周边区且围绕所述显示区的第二边框彩膜，其中，所述第二边框彩膜位于所述第一边框彩膜远离所述衬底基板的一侧。
在一些示例中，所述方法还包括：在制作所述第一彩膜层之后且在制作所述第二彩膜层之前，在所述第一彩膜层上制作第三彩膜层，所述第三彩膜层仅包括位于所述显示区且与所述第一像素彩膜和所述第二像素彩膜至少部分不交叠的第三像素彩膜。
在一些示例中，在所述彩膜结构的制作方法中，所述第一像素彩膜与所述第二像素彩膜或所述第三像素彩膜至少部分交叠，且在所述第一像素彩膜 与所述第二像素彩膜或所述第三像素彩膜的交叠部分中，所述第一像素彩膜位于所述第二像素彩膜或所述第三像素彩膜靠近所述衬底基板的一侧。
在一些示例中，制作所述第一彩膜层、所述第二彩膜层和所述第三彩膜层中的至少之一包括使用旋涂法涂覆相应的彩膜材料层，并将所述相应的彩膜材料层进行构图。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1为一种硅基有机发光二极管显示基板的彩膜结构的剖视示意图；
图2A为根据本公开一实施例的一种彩膜结构的剖面结构示意图；
图2B为图2A所示的彩膜结构的平面结构示意图；
图3为根据本公开一实施例的又一种彩膜结构的剖面结构示意图；
图4为根据本公开一实施例的又一种彩膜结构的剖面结构示意图；
图5为根据本公开一实施例的一种显示基板的剖面结构示意图；
图6A为根据本公开一实施例的一种显示基板的区域划分示意图；
图6B为图6A所示的显示基板的剖视结构示意图；
图6C为图6A和图6B所示的显示基板的俯视结构示意图；
图7为根据本公开一实施例的一种硅基有机发光显示面板的电路原理示意图；
图8A为根据本公开一实施例的一种彩膜结构的制作方法的流程图；
图8B为根据本公开一实施例的第一彩膜层的结构示意图；
图9为根据本公开一实施例的又一种彩膜结构的制作方法的流程图；
图10为根据本公开一实施例的又一种彩膜结构的制作方法的流程图；
图11为根据本公开一实施例的第一掩模板的结构示意图；
图12为根据本公开一实施例的第二掩模板的结构示意图；
图13为根据本公开一实施例的第三掩模板的结构示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“一个”、“一”或者“该”等类似词语也不表示数量限制，而是表示存在至少一个。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
图1为一种硅基有机发光二极管显示基板的彩膜结构的剖视结构示意图。如图1所示，硅基有机发光二极管(硅基OLED)显示基板包括显示区A以及围绕显示区A的周边区B，彩膜结构包括位于显示区A的像素彩膜11和位于周边区B的边框彩膜12，边框彩膜12用于遮挡下层的反光结构，反光结构例如为连接显示基板的发光元件的金属走线、像素感测电路等，以防止反光结构产生反光从而影响显示区的显示效果。
在实际应用中，本申请的发明人发现：边框彩膜由三层彩膜叠加形成，虽然可以起到遮挡反光结构的作用，但周边区的边框彩膜的厚度为显示区的像素彩膜的3倍，会在周边区形成一圈较厚的围堰。由此，在采用旋涂法涂覆彩膜层的过程中，当涂覆最后一层彩膜层时，由于制作前两层彩膜层已经形成了2倍于像素彩膜厚度的围堰，因此会导致涂覆在显示区的最后一层彩膜层不均匀，从而造成形成的显示基板在显示时出现亮度不均匀(Mura)的现象。
本公开的实施例提供一种彩膜结构及其制作方法、显示基板和掩模板组。彩膜结构包括底层、位于底层上的第一彩膜层以及第二彩膜层。底层包括显 示区和围绕显示区的周边区；第一彩膜层仅包括位于显示区的第一像素彩膜；第二彩膜层包括位于显示区且与第一像素彩膜至少部分不交叠的第二像素彩膜，以及位于周边区且围绕显示区的第一边框彩膜。该彩膜结构的第二彩膜层包括位于周边区且围绕显示区的第一边框彩膜，因此可解决显示基板下层反光结构反光的问题。而且，该彩膜结构的第一彩膜层仅包括位于显示区的第一像素彩膜，因此降低了围堰的厚度，从而可解决最后一层彩膜涂覆不均的问题。
下面结合附图对本公开实施例提供的彩膜结构及其制作方法、显示基板和掩模板组进行描述。
本公开一实施例提供一种彩膜结构。图2A为一种彩膜结构的剖面结构示意图，图2B为图2A所示的彩膜结构的平面结构示意图。如图2A和图2B所示，彩膜结构包括底层100、位于底层100上的第一彩膜层200以及第二彩膜层300。底层100包括显示区A和围绕显示区的周边区B。例如，显示区A为用于显示画面的区域，即出光区；周边区B为不显示画面的区域，即非出光区。例如，底层100为透明的底层。
如图2A和图2B所示，第一彩膜层200仅包括位于显示区A的第一像素彩膜210；第二彩膜层300包括位于显示区A且与第一像素彩膜210至少部分不交叠的第二像素彩膜310，以及位于周边区B且围绕显示区A的第一边框彩膜320。
图2A和图2B所示的彩膜结构包括两层彩膜层，包括该彩膜结构的显示基板的周边区包括一层第一边框彩膜。该第一边框彩膜可解决显示基板周边区下层的反光结构反光的问题。而且，该彩膜结构的显示基板周边区仅包括一层第一边框彩膜，因此降低了围堰的厚度，从而可解决彩膜涂覆不均的问题。
在一些示例中，如图2B所示，第二彩膜层300的第一边框彩膜320的形状为闭合的环形。也就是，第一边框彩膜为位于周边区的连续的环形遮光层，以防止位于包括上述彩膜结构的显示基板的周边区的反光结构产生反光，从而提高显示基板的显示效果。
在一些示例中，第二彩膜层300的第一彩膜边框320可如图2B所示覆盖部分周边区B，也可覆盖全部周边区B，本公开对此不做限定。
例如，如图2A和图2B所示，位于显示区A的第一像素彩膜210包括阵列排布的多个第一子像素彩膜，且相邻第一子像素彩膜之间具有一定间距以为后续形成的不同颜色的像素彩膜留出空间。第二像素彩膜310包括多个第二子像素彩膜，第二子像素彩膜与第一子像素彩膜至少部分不交叠，且第二子像素彩膜的一侧可与第一子像素彩膜相接，另一侧与第一子像素彩膜之间具有一定间距以形成后续与第一像素彩膜和第二像素彩膜的颜色均不同的像素彩膜。当然，本公开不限于此，还可以是第一子像素彩膜与第二子像素彩膜交替且相接设置。本公开实施例中位于显示区的第一像素彩膜和第二像素彩膜被配置为与包括该彩膜结构的显示基板中的发光元件正相对以起到对发光元件发出的白光进行彩色滤光的作用。
例如，第二像素彩膜与第一像素彩膜部分重叠，两者重叠的部分可以起到遮光作用，从而节省了黑矩阵。例如，第二像素彩膜还可以与第一像素彩膜彼此分离，两者之间的间隙设置黑矩阵以防止发生串扰。
图3为又一种彩膜结构的剖面结构示意图。如图3所示，彩膜结构还包括第三彩膜层400。第三彩膜层400包括位于显示区A且与第一像素彩膜210和第二像素彩膜310至少部分不交叠的第三像素彩膜410，以及位于周边区B且围绕显示区A的第二边框彩膜420。第二边框彩膜420位于第一边框彩膜320远离底层100的一侧。例如，第二边框彩膜420为围绕显示区A的封闭的环形彩膜层。
在一些示例中，第二边框彩膜420在底层上的正投影与第一边框彩膜320在底层上的正投影完全重合，或第二边框彩膜420在底层上的正投影落入第一边框彩膜320在底层上的正投影内。第一边框彩膜和第二边框彩膜共同起到对周边区的遮光作用。
在一些示例中，第一像素彩膜、第二像素彩膜、第三像素彩膜、第一边框彩膜和第二边框彩膜的厚度均相等。此时，第一边框彩膜和第二边框彩膜的厚度之和为第一像素彩膜的厚度的2倍。当然，第一像素彩膜、第二像素彩膜、第三像素彩膜、第一边框彩膜和第二边框彩膜的厚度也可以不相等，本公开对此不做限定。
在一些示例中，第一边框彩膜和第二边框彩膜的厚度之和(即围堰的厚度)比第一像素彩膜的厚度大2～3μm。
图3所示的彩膜结构包括三层彩膜层，包括该彩膜结构的显示基板的周边区包括第一边框彩膜和第二边框彩膜。上述两层边框彩膜可解决显示基板周边区下层的反光结构反光的问题。而且，包括该彩膜结构的显示基板包括两层边框彩膜，相比包括三层边框彩膜的显示基板，降低了围堰的厚度，从而可解决彩膜涂覆不均的问题。
图4为又一种彩膜结构的剖面结构示意图。如图4所示，上述彩膜结构的第三彩膜层400仅包括位于显示区且与第一像素彩膜210和第二像素彩膜310至少部分不交叠的第三像素彩膜410。
图4所示的彩膜结构包括三层彩膜层，包括该彩膜结构的显示基板的周边区包括一层第一边框彩膜。上述第一边框彩膜可解决显示基板周边区下层的反光结构反光的问题。而且，包括该彩膜结构的显示基板包括一层第一边框彩膜，相比包括三层边框彩膜的显示基板，降低了围堰的厚度，从而可解决彩膜涂覆不均的问题。
在一些示例中，第一像素彩膜210与第二像素彩膜310或第三像素彩膜410至少部分交叠，且在第一像素彩膜210与第二像素彩膜310或第三像素彩膜410的交叠部分中，第一像素彩膜210位于第二像素彩膜310或第三像素彩膜410靠近底层100的一侧。第一像素彩膜与第二像素彩膜或第三像素彩膜交叠的部分可以起到黑矩阵的作用。
第一彩膜层200、第二彩膜层300和第三彩膜层400的颜色不相同。例如，第一彩膜层为红色彩膜层，第二彩膜层为蓝色彩膜层，第三彩膜层绿色彩膜层。需要说明的是，第一彩膜层、第二彩膜层和第三彩膜层的颜色以及形成顺序可以根据产品实际需求进行调整。此外，需要注意的是，最先形成的彩膜层可以不设置边框彩膜而仅包括像素彩膜，从而使得后续形成的彩膜在旋涂过程中形成的材料层厚度较为均匀。而对于在后形成的彩膜层中，其中的一层或两层可以具有边框彩膜，从而能够对周边区进行遮光。
本公开又一实施例提供一种显示基板，包括上述任一实施例提供的彩膜结构。图5为该显示基板的剖面结构示意图。如图5所示，该显示基板还包括衬底基板500、发光元件600以及彩膜结构。发光元件600位于衬底基板500上，并且包括第一发光元件和第二发光元件，其中第一发光元件为位于显示区A的发光元件，第二发光元件为位于周边区B的发光元件。彩膜结构 位于发光元件600的显示侧，可以为上述任一实施例提供的彩膜结构。
如图5所示，显示基板还包括感测区R1。例如，感测区R1的位置与彩膜结构的底层的周边区B对应。例如，边框彩膜可以覆盖感测区R1。感测区R1包括多个感测像素单元201，如图中虚线框所示。每个感测像素单元201包括发光元件600和感测电路结构202。感测电路结构202用于检测发光元件600一端的电压。该感测电路结构可以连接至温度传感器，且感测电路位于彩膜结构面向衬底基板500的一侧。彩膜结构位于发光元件600和感测电路结构202远离衬底基板500的一侧，且感测区R1在衬底基板500上的正投影位于第一边框彩膜320在衬底基板500上的正投影内。当彩膜结构包括第二边框彩膜420时，感测区R1在衬底基板500上的正投影也位于第二边框彩膜420在衬底基板500上的正投影内。
例如，发光元件为有机发光二极管(OLED)，例如，Micro-OLED或Mini-OLED，被配置为发出白光。
例如，感测区R1的感测像素单元出射的光包括多个感测像素单元的发光元件发射的光和多个感测像素单元的感测电路结构中的金属反光结构反射的光。
如此，第一边框彩膜和第二边框彩膜可起到对感测像素单元的发光元件发射的光和感测电路中的金属反光结构进行遮光的作用。
在一些示例中，如图5所示，衬底基板500为硅基板500，硅基板500面向发光元件600的一侧包括像素电路结构510，像素电路结构510与发光元件600连接。也即是，硅基板500上集成有像素电路结构510。
例如，硅基板上还可以集成有栅极驱动电路和数据驱动电路，硅基板的周边区设置有柔性电路板，配置为向栅驱动电路、数据驱动电路以及发光元件传输电信号。例如，该栅极驱动电路用于产生栅极驱动信号，数据驱动电路用于产生数据信号，该栅极驱动电路和数据驱动电路可以采用本领域内的常规电路结构，本公开的实施例对此不作限制。
例如，像素电路结构510用于在栅极扫描信号、数据信号以及电压信号等驱动信号的控制下，向发光元件600提供驱动电流，以使得发光元件包括的有机发光层发光。例如，像素电路结构510可以采用4T1C、4T2C、7T1C、8T2C等电路结构的像素电路，其驱动方法可以采用本领域的常规方法，在 此不再赘述。例如，像素电路结构可以采用CMOS工艺制作在硅基板上，本公开的实施例对此不作限制。
例如，如图5所示，硅基板500还包括位于像素电路结构510与发光元件600之间的第一绝缘层520和第二绝缘层550，两层绝缘层中均设置有过孔530。例如过孔530可以为填充钨金属的钨孔，第一绝缘层520和第二绝缘层550厚度较大的情况下，在第一绝缘层520和第二绝缘层550中形成钨过孔可以保证导电通路的稳定性，而且，由于制作钨过孔的工艺成熟，所得到的第一绝缘层520和第二绝缘层550的表面平坦度好，有利于降低第一绝缘层520和第二绝缘层550与发光元件600包括的电极之间的接触电阻。
例如，如图5所示，两层绝缘层中的过孔530之间设置有金属层540以实现将发光元件600与像素电路结构510电连接。
例如，如图5所示，发光元件600包括依次层叠设置的第一电极610、有机发光层620以及第二电极630，第一电极610通过位于绝缘层中的过孔530与像素电路结构510电连接，像素电路510用于驱动发光元件600发光。发光元件600包括多个发光子元件，相邻发光子元件的有机发光层620通过像素限定层700分隔。
例如，像素电路510至少包括驱动晶体管和开关晶体管，驱动晶体管与第一电极610之间彼此电连接。由此，驱动发光元件600的电信号传输到第一电极610，从而控制发光元件600发光。例如，驱动晶体管包括栅电极、源电极和漏电极。驱动晶体管的源电极电连接于第一电极610。在驱动晶体管处于开启状态时，由电源线提供的电信号可经过驱动晶体管的源电极传输到第一电极610。由于第一电极610与第二电极630之间形成电压差，在二者之间形成电场，有机发光层620在该电场作用下发光。
例如，如图5所示，发光元件600包括的各发光子元件分别与各子像素彩膜一一对应。例如，发光元件600发出的光为白光，白光通过位于发光元件600显示侧的不同颜色像素彩膜后可以实现彩色显示。
例如，如图5所示，位于周边区B的感测区R1还设置有与显示区A中的发光元件600相同的发光元件，位于感测区R1的发光元件并不用于显示，而是用于检测像素发光的衰减程度，因此需要被位于周边区B的边框彩膜遮挡。
在一些示例中，如图5所示，显示基板还包括薄膜封装层，位于第二电极630之上，底层100为薄膜封装层，且薄膜封装层位于第一彩膜层200面向发光元件600的一侧。
例如，上述底层100为第一薄膜封装层，在彩膜结构远离发光元件600的一侧还设置有第二薄膜封装层，第一薄膜封装层和第二薄膜封装层可以实现发光元件的有效封装，实现对水汽、氧气等的有效阻挡，达到保护发光元件以及延长发光元件的使用寿命的目的。
例如，在第二薄膜封装层远离彩膜结构的一侧还设置有盖板，第二薄膜封装层和盖板依次设置在彩膜结构的上面，可以实现保护彩膜结构的功能。例如，第二薄膜封装层采用密封特性较好的有机材料或无机材料中的一种或者多种结合制作而成，以达到较好的密封作用，保护硅基OLED显示器件。例如，盖板可以采用透明材料，例如透明材料可以为玻璃等无机材料或者聚酰亚胺等有机材料，例如，在本公开的实施例中，可以采用具有高透过率的玻璃，本公开的实施例对此不做限定。
图6A为本公开一实施例提供的一种显示基板的区域划分示意图。如图6A所示，显示基板包括显示区A和围绕显示区A的周边区B。周边区B包括连接电极区B1、第一虚设区B2、第二虚设区B3、传感器区R1和接垫区(pad区)R2。
第一虚设区B2位于连接电极区B1和显示区A之间，第二虚设区B3位于连接电极区B1的远离显示区A的一侧。第一虚设区B2的位于传感器区R1和连接电极区B1之间的部分为第一虚设子区B21；第二虚设子区B22位于传感器区R1和显示区A之间。接垫区R2可用来外接电路。
在一些示例中，周边区B不包括传感器区R1，即周边区B包括连接电极区B1、第一虚设区B2、第二虚设区B3和接垫区R2。
设置第一虚设区B2可避免显示区和连接电极区B1的需彼此绝缘的元件短路，设置第二虚设区B3可利于显示基板的封装，利于提高封装效果。
图6B为图6A所示的显示基板的剖视结构示意图。如图6B所示，该显示基板包括：衬底基板500；第一电极图案130，位于显示基板的显示区A，并包括彼此间隔的多个第一电极131；连接电极图案140，位于显示基板的连接电极区B1，并包括多个连接电极141；以及第一虚设电极图案150，位于 显示基板的第一虚设区B2，并包括多个第一虚设电极151。如图6A和图6B所示，连接电极区B1围绕显示区A，第一虚设区B2位于连接电极区B1和显示区A之间。连接电极图案140围绕第一电极图案130，第一虚设电极图案150围绕第一电极图案130。第一虚设电极图案150位于连接电极图案140和第一电极图案130之间。例如，连接电极图案140呈环形。设置第一虚设电极图案150可利于提高刻蚀均匀性。
例如，彩膜结构位于多个环形的连接电极远离衬底基板500的一侧，且连接电极区B1在衬底基板500上的正投影位于第一边框彩膜320在衬底基板500上的正投影内。
例如，彩膜结构位于多个第一虚设电极远离衬底基板500的一侧，且第一虚设区B2在衬底基板500上的正投影位于第一边框彩膜320在衬底基板500上的正投影内。
例如，如图6B所示，本公开一实施例提供的显示基板还包括第二电极160，第二电极160与连接电极141相连；显示基板的周边区B围绕显示区A，周边区B包括连接电极区B1和第一虚设区B2；第二电极160位于显示区A和周边区B，第二电极160与第一电极图案130彼此间隔。
例如，如图6B所示，第一电极图案130的图案密度、连接电极图案140的图案密度和第一虚设电极图案150的图案密度中至少两个相同。
例如，如图6B所示，本公开一实施例提供的显示基板还包括传感器电极图案170，传感器电极图案170位于显示基板的传感器区R1，并包括多个传感器电极171。例如，传感器电极图案170的图案密度和第一电极图案130的图案密度相同。
例如，如图6B所示，本公开一实施例提供的显示基板还包括第二虚设电极图案180，位于显示基板的第二虚设区B3，并包括多个第二虚设电极181；第二虚设区B3位于连接电极区B1的远离显示区A的一侧。例如，第二虚设电极图案180的图案密度和第一电极图案130的图案密度相同。在本公开一实施例提供的显示基板中，第一电极图案130的图案密度、连接电极图案140的图案密度、传感器电极图案170的图案密度、第一虚设电极图案150的图案密度和第二虚设电极图案180的图案密度相同。
例如，第二虚设区B3位于周边区的最外围，围绕第一虚设区、连接电 极区和感测区，第二虚设区B3包括多个第二虚设电极。彩膜结构位于多个第二虚设电极远离衬底基板的一侧，且第二虚设区在衬底基板上的正投影位于第一边框彩膜在衬底基板上的正投影内。
例如，多个连接电极141呈块状，多个块状的连接电极141组成环状的连接电极图案140。多个第一虚设电极151呈块状，多个块状的第一虚设电极151组成环状的第一虚设电极图案150。多个第二虚设电极181呈块状，多个块状的第二虚设电极181组成环状的第二虚设电极图案180。
例如，第二电极160为发光元件的阴极，连接电极141配置为连接发光元件的阴极和电源信号。第一虚设电极151和第二虚设电极181均浮置。
例如，如图6B所示，在第一虚设子区B21设有第一填充层190，第一填充层190包括多个第一虚设电极151和绝缘填充层191；第一电极图案130包括与连接电极141相邻的边缘第一电极132，绝缘填充层191分别与连接电极141和边缘第一电极132接触。例如，如图6B所示，第二电极106与绝缘填充层191接触。例如，如图6B所示，边缘第一电极132与多个第一虚设电极151彼此绝缘。
例如，如图6B所示，显示基板还包括像素定义层104，像素定义层104包括多个像素定义部1040，多个像素定义部1040中的每个位于相邻第一电极131之间。
例如，如图6B所示，绝缘填充层191与像素定义层104位于同一层，可由同一膜层采用同一构图工艺形成，以节省制作工艺。
例如，如图6B所示，第一电极图案130、连接电极图案140、传感器电极图案170、第一虚设电极图案150和第二虚设电极图案180位于同一层，可由同一膜层采用同一构图工艺形成，以节省制作工艺。
例如，如图6B所示，显示基板还包括第二填充层192，第二填充层192包括至少一个第二填充部1920，第二填充部1920位于相邻连接电极141之间。例如，第二填充层192为绝缘层。例如，如图6B所示，第二填充部1920分别与相邻连接电极141接触。
例如，如图6B所示，第二填充层192和第一填充层190位于同一层，可由同一膜层采用同一构图工艺形成，以节省制作工艺。
例如，如图6B所示，显示基板还包括第三填充层193，第三填充层193 包括多个第三填充部1930，第三填充部1930位于相邻传感器电极171、相邻的传感器电极171和第一虚设电极中至少之一之间。图6B以第三填充部1930位于相邻传感器电极171之间为例进行说明。
例如，如图6B所示，第三填充层193与像素定义层104位于同一层，可由同一膜层采用同一构图工艺形成，以节省制作工艺。例如，如图6B所示，像素定义层104、绝缘填充层191、第二填充层192、第三填充层193位于同一层。
例如，如图6B所示，显示基板还包括发光功能层105，发光功能层105位于第一电极图案130和第二电极160之间，发光功能层105与第一填充层190接触。例如，发光功能层105与部分第一填充层190接触。例如，如图6B所示，发光功能层105延伸到第一虚设子区B21。发光功能层105覆盖整个显示区A、传感器区R1、第二虚设子区B22和部分第一虚设子区B21，以防止发光功能层105蒸镀到连接电极区B1造成第一电极和第二电极短路。例如，如图6B所示，第二电极160从显示区A延伸到周边区B的第二虚设区B3，以利于第二电极160与连接电极141的连接。
例如，如图6B所示，发光功能层105与传感器电极图案170接触。例如，如图6B所示，发光功能层105与位于第二虚设子区B22内的第一虚设电极151不接触，但不限于此。
如图6B所示，在衬底基板500上还设有绝缘层IS，绝缘层IS上设有导电图案109，导电图案109包括第一导电部1091、第二导电部1092和第三导电部1093。绝缘层IS包括第三过孔V11、第四过孔V21、第五过孔V31。第三过孔V11、第四过孔V21、第五过孔V31中分别填充导电材料以形成连接件。第一电极131通过第一导电部1091与第四过孔V21中的连接件相连。连接电极141通过第二导电部1092与第三过孔V11中的连接件相连。传感器电极171通过第三导电部1093与第五过孔V31中的连接件相连。需要说明的是，在衬底基板500和绝缘层IS之间还设有其他结构，图6B中并没有示出该其他结构。
在一些示例中，显示基板不包括像素定义层104。
如图6B所示，显示基板还包括封装层107。封装层107被配置为封装发光元件，以避免水氧侵袭。如图6B所示，封装层107覆盖第二电极160以 及连接电极图案140、第二虚设电极图案180。如图6B所示，封装层107可覆盖整个衬底基板500以及其上的结构。
图6C为图6A和图6B所示的显示基板的俯视结构示意图。图6C示出了显示区A、周边区B、连接电极区B1、第一虚设区B2、第二虚设区B3和传感器电极171。传感器电极图案170的图案密度、第一电极图案130的图案密度、连接电极图案140的图案密度、第一虚设电极图案150的图案密度和第二虚设电极图案180相同。即，多个传感器电极171的图案密度、多个第一电极131的图案密度、多个连接电极141的图案密度、多个第一虚设电极151和多个第二虚设电极181的图案密度相同。
例如，如图6C所示，第一虚设电极151呈块状。
例如，如图6C所示，第二虚设电极181呈块状。
例如，如图6C所示，传感器电极171、第一电极131、连接电极141、第一虚设电极151和第二虚设电极181均呈块状。
该显示基板还包括如上述任一实施例提供的彩膜基板，位于封装层107远离衬底基板500的一侧，图6B中未示出。
例如，连接电极区B1在衬底基板上的正投影位于第一边框彩膜在衬底基板上的正投影内。
例如，第一虚设区B2在衬底基板上的正投影位于第一边框彩膜在衬底基板上的正投影内。
例如，感测区R1在衬底基板上的正投影位于第一边框彩膜在衬底基板上的正投影内。
例如，第二虚设区B3的至少一部分在衬底基板上的正投影位于第一边框彩膜在衬底基板上的正投影内。
本公开实施例提供的显示基板的技术效果与本公开实施例提供的上述彩膜结构的技术效果相同，这里不再赘述。
本公开又一实施例提供一种发光二极管显示面板，包括上述任一实施例提供的显示基板。
图7为本公开一些实施例提供的一种硅基有机发光显示面板的电路原理示意图。该硅基有机发光显示面板包括位于显示区A中的多个显示器件L(即发光元件)以及与各显示器件L一一对应耦接的像素电路110，像素电路110 包括驱动晶体管。并且，该硅基有机发光显示面板还可以包括位于硅基有机发光显示面板的周边区(硅基有机发光显示面板中除显示区A之外的区域，图中未标注)中的多个电压控制电路120。例如，一行中至少两个像素电路110共用一个电压控制电路120，且一行像素电路110中驱动晶体管的第一极与共用的电压控制电路120耦接，各驱动晶体管的第二极与对应的显示器件L耦接。电压控制电路120被配置为响应于复位控制信号RE，将初始化信号Vinit输出至驱动晶体管的第一极，控制对应的显示器件L复位；以及响应于发光控制信号EM，将第一电源信号VDD输出至驱动晶体管的第一极，以驱动显示器件L发光。该硅基有机发光显示面板还可以包括位于显示区的第二电源信号VSS，用于向发光器件L输入第二电源信号。需要说明的是，每个电压控制电路120对应的复位控制信号RE不完全相同，每个电压控制电路120对应的发光控制信号EM也不完全不同。通过共用电压控制电路120，可以简化显示区域A中各像素电路的结构，降低显示区A中像素电路的占用面积，从而可以使显示区A设置更多的像素电路和显示器件，实现高PPI的有机发光显示面板。并且，电压控制电路120在复位控制信号RE的控制下将初始化信号Vinit输出至驱动晶体管的第一极，控制对应的显示器件复位，从而可以避免上一帧发光时加载于显示器件上的电压对下一帧发光的影响，进而改善残影现象。
例如，该硅基有机发光显示面板还可以包括位于显示区A的多个像素单元PX，每个像素单元PX包括多个子像素；各子像素分别包括一个显示器件L与一个像素电路110。进一步地，像素单元PX可以包括3个不同颜色的子像素。这3个子像素可以分别为红色子像素、绿色子像素以及蓝色子像素。当然，像素单元PX也可以包括4个、5个或更多的子像素，这需要根据实际应用环境来设计确定，在此不作限定。
例如，可以使同一行中相邻的至少两个子像素中的像素电路110共用一个电压控制电路120。例如，如图6所示，可以使同一行中的所有像素电路110共用一个电压控制电路120。或者，也可以使同一行中相邻的两个、三个或更多子像素中的像素电路110共用一个电压控制电路120，在此不作限定。这样，通过共用电压控制电路120可以降低显示区A中像素电路的占用面积。
例如，发光元件L的两个电极可分别为第一电极610和第二电极630。 例如，第一电极610为发光元件L的阳极，第二电极630为发光元件L的阴极。第一电极610与像素电路110相连，第二电极630可被输入第一电源信号VSS。第一电源信号VSS可通过连接电极141传输到第二电极630。
本公开实施例提供的显示面板为小尺寸的发光二极管显示面板，即微发光二极管显示面板。该显示面板可以应用于电视、数码相机、手机、手表、平板电脑、笔记本电脑、导航仪等任何具有显示功能的产品或者部件，特别适合应用于头盔显示器、立体显示镜以及眼睛式显示器等。上述显示面板可与移动通讯网络、卫星定位等系统联在一起，以在任何地方、任何时间获得精确的图像信息。另外，本公开实施例提供的显示面板还可以应用于虚拟现实设备或者增强现实设备。
本公开又一实施例提供一种发光二极管显示装置，包括上述任一实施例提供的显示基板或显示面板。该显示装置可以包括电视、数码相机、手机、手表、平板电脑、笔记本电脑、导航仪等任何具有显示功能的产品或者部件，该显示装置具有和上述实施例提供的显示基板相同的技术效果。
本公开又一实施例提供一种彩膜结构的制作方法。图8A为一种彩膜结构的制作方法的流程图。如图8A所示，该制作方法包括S11-S12。
S11、在底层100上制作第一彩膜层200。底层100包括显示区A和围绕显示区的周边区B，第一彩膜层200仅包括位于显示区的第一像素彩膜210。
图8B为第一彩膜层200的结构示意图。完成S11后的彩膜结构如图7B所示。
例如，在底层100上制作第一彩膜层200的方法包括：使用旋涂法在底层上涂覆第一彩膜材料层，并在第一彩膜材料层上进行构图工艺，以形成第一彩膜层200。
例如，第一彩膜材料层的颜色不同，采用的涂胶速度可以不同。
例如，对第一彩膜材料层进行前烘、曝光、显影和后烘后，可以在显示区A形成第一像素彩膜210。
例如，第一彩膜材料层的颜色不同，采用的曝光强度以及显影时间不同。
S12、在第一彩膜层上制作第二彩膜层300。第二彩膜层包括位于显示区且与第一像素彩膜至少部分不交叠的第二像素彩膜310，以及位于周边区且围绕显示区的第一边框彩膜320。
在第一彩膜层上制作第二彩膜层300的方法与上述在底层100上制作第一彩膜层200的方法相同，此处不再赘述。
完成S11和S12后的彩膜结构包括第一彩膜层200和第二彩膜层300，如图2A所示。
图9为又一种彩膜结构的制作方法的流程图。如图9所示，该制作方法除了包括S11和S12外，还包括：
S13a：在制作第二彩膜层300之后，在第一彩膜层上制作第三彩膜层400。第三彩膜层400包括位于显示区且与第一像素彩膜和第二像素彩膜至少部分不交叠的第三像素彩膜410，以及位于周边区且围绕显示区的第二边框彩膜420。第二边框彩膜420位于第一边框彩膜320远离底层的一侧。
在第一彩膜层上制作第三彩膜层400的方法与上述在底层100上制作第一彩膜层200的方法相同，此处不再赘述。
完成S11、S12和S13a后的彩膜结构包括第一彩膜层200、第二彩膜层300和第三彩膜层400，如图3所示。
图10为又一种彩膜结构的制作方法的流程图。如图10所示，该制作方法除了包括S11和S12外，还包括：
S13b：在制作第一彩膜层200之后且在制作第二彩膜层300之前，在第一彩膜层上制作另一种第三彩膜层400，该另一种第三彩膜层400仅包括位于显示区且与第一像素彩膜和第二像素彩膜至少部分不交叠的第三像素彩膜410。
在第一彩膜层上制作另一种第三彩膜层400的方法与上述在底层100上制作第一彩膜层200的方法相同，此处不再赘述。
完成S11、S13b和S12后的彩膜结构包括第一彩膜层200、第二彩膜层300和另一种第三彩膜层400，如图4所示。
在一些示例中，在采用上述方法制作的彩膜结构中，第一像素彩膜与第二像素彩膜或第三像素彩膜至少部分交叠，且在第一像素彩膜与第二像素彩膜或第三像素彩膜的交叠部分中，第一像素彩膜位于第二像素彩膜或第三像素彩膜靠近底层的一侧。
本公开一实施例还提供一种显示基板的制作方法，包括：
提供衬底基板，包括显示区和围绕显示区的周边区；在衬底基板上的显 示区形成发光元件；以及在发光元件上制作彩膜结构。
彩膜结构包括上述任一实施例提供的彩膜结构的制作方法，此处不再描述。
本公开一实施例还提供一种掩模板组，该掩模板组配置为制作上述实施例提供的彩膜结构，该掩模板组包括第一掩模板20和第二掩模板30。
图11为第一掩模板20的结构示意图。如图11所示，第一掩模板20的图案区域仅包括位于中部的第一像素图案21。第一像素图案21配置为形成如图2A所示的第一彩膜层200的第一像素彩膜210或形成如图4所示的第三彩膜层400的第三像素彩膜410。例如，第一像素图案21的数量为多个。
第一掩模板可以用于上述实施例提供的彩膜结构的制作方法中的步骤S11或S13b。即，在步骤S11或S13b中，采用第一掩模板对第一彩膜层200或第三彩膜层400的彩膜材料层进行构图工艺。需要说明的是，在S13b中使用第一掩模板制作第三彩膜层400时，第一掩模板的位置不同于在S11中使用第一掩模板制作第一彩膜层200时第一掩模板的位置。例如，当制作图4所示的彩膜结构时，使用第一掩模板制作第三彩膜层400时第一掩模板的位置可相对于使用第一掩模板制作第一彩膜层200时第一掩模板的位置向右侧移动2个像素彩膜的距离。
图12为第二掩模板30的结构示意图。如图12所示，第二掩模板30的图案区域包括位于中部的第二像素图案31和围绕中部的第一边框图案32。第二像素图案31配置为形成如图2A所示的第二彩膜层300的第二像素彩膜310，第一边框图案32配置为形成如图2A所示的第一边框彩膜320。例如，第二像素图案31的数量为多个。
例如，第一边框图案32为封闭的环形，本公开不限定其具体形状。
第二掩模板可以用于上述实施例提供的彩膜结构的制作方法中的步骤S12。即，在步骤S12中，采用第二掩模板对第二彩膜层300的彩膜材料层进行构图工艺。
使用上述第一掩模板和第二掩模板组成的掩模板组，可以根据如图8A所示的步骤制作如图2A所示的彩膜结构。另外，使用两次第一掩模板和一次第二掩模板可以根据如图10所示的步骤制作如图4所述的彩膜结构。制作成的彩膜结构和上述实施例提供的彩膜结构相同，因此具有相同的技术效果。
在一些示例中，该掩模板组还包括第三掩模板40。
图13为第三掩模板40的结构示意图。如图13所示，第三掩模板40的图案区域包括位于中部的第三像素图案41和围绕中部的第二边框图案42。例如，第三像素图案41的数量为多个。第三像素图案41配置为形成如图3所示的第三彩膜层400的第三像素彩膜410，第二边框图案42配置为形成如图3所示的第二边框彩膜420。第一边框图案32与第二边框图案42的形状与尺寸大致相同，其不同之处在于，第一边框图案32的至少一个边与第二像素图案31之间的距离不同于第二边框图案42的对应边与第三像素图案41之间的距离，以使第二像素彩膜与第三像素彩膜至少部分不交叠。例如，如图11和图12所示，第一边框图案32的右侧边与离该边最近的第二像素图案31之间的距离L1不同于第二边框图案42的右侧边与离该边最近的第三像素图案41之间的距离L2。
在一些示例中，第二边框图案42为封闭的环形，本公开不限定其具体形状。
第三掩模板可以用于上述实施例提供的彩膜结构的制作方法中的步骤S S13a。即，在步骤S13a中，采用第三掩模板对第三彩膜层400的第三像素彩膜410和第二边框彩膜420的彩膜材料层进行构图工艺。
使用上述第一掩模板、第二掩模板和第三掩模板组成的掩模板组，可以根据如图9所示的步骤制作如图3所示的彩膜结构。制作成的彩膜结构和上述实施例提供的彩膜结构相同，因此具有相同的技术效果。
有以下几点需要说明：
(1)本公开实施例附图只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。
(2)在不冲突的情况下，本公开的实施例及实施例中的特征可以相互组合以得到新的实施例。
以上，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以权利要求的保护范围为准。

Claims (22)

  1. 一种显示基板，包括
    衬底基板，包括显示区和围绕所述显示区的周边区；
    第一发光元件，位于所述衬底基板的显示区；以及
    彩膜结构，位于所述第一发光元件的显示侧，
    其中，所述彩膜结构包括：
    第一彩膜层，仅包括位于所述显示区的第一像素彩膜；以及
    第二彩膜层，包括位于所述显示区且与所述第一像素彩膜至少部分不交叠的第二像素彩膜，以及位于所述周边区且围绕所述显示区的第一边框彩膜。
  2. 根据权利要求1所述的显示基板，其中，所述彩膜结构还包括：
    第三彩膜层，包括位于所述显示区且与所述第一像素彩膜和所述第二像素彩膜至少部分不交叠的第三像素彩膜，以及位于所述周边区且围绕所述显示区的第二边框彩膜，其中，所述第二边框彩膜位于所述第一边框彩膜远离所述衬底基板的一侧。
  3. 根据权利要求2所述的显示基板，其中，所述第二边框彩膜在所述衬底基板上的正投影与所述第一边框彩膜在所述衬底基板上的正投影完全重合或落入所述第一边框彩膜在所述衬底基板上的正投影之内。
  4. 根据权利要求2或3所述的显示基板，其中，所述第一边框彩膜和所述第二边框彩膜的厚度之和比所述第一像素彩膜的厚度大2～3μm。
  5. 根据权利要求1所述的显示基板，还包括：
    第三彩膜层，仅包括位于所述显示区且与所述第一像素彩膜和所述第二像素彩膜至少部分不交叠的第三像素彩膜。
  6. 根据权利要求2-5任一项所述的显示基板，其中，所述第一像素彩膜与所述第二像素彩膜或所述第三像素彩膜至少部分交叠，且在所述第一像素彩膜与所述第二像素彩膜或所述第三像素彩膜的交叠部分中，所述第一像素彩膜位于所述第二像素彩膜或所述第三像素彩膜靠近所述衬底基板的一侧。
  7. 根据权利要求2-6任一项所述的显示基板，其中，所述第一彩膜层、第二彩膜层和第三彩膜层为不同颜色的彩膜层。
  8. 根据权利要求7所述的显示基板，其中，所述第一彩膜层、第二彩膜 层和第三彩膜层分别为红色彩膜层、蓝色彩膜层和绿色彩膜层。
  9. 根据权利要求1-8任一项所述的显示基板，其中，所述第一边框彩膜具有围绕所述显示区的环形形状。
  10. 根据权利要求1-9任一项所述的显示基板，还包括位于所述周边区的感测区，所述感测区包括多个感测像素单元，每个所述感测像素单元包括第二发光元件和感测电路结构，其中，所述彩膜结构位于所述第二发光元件和所述感测电路结构远离所述衬底基板的一侧，且所述感测区在所述衬底基板上的正投影位于所述第一边框彩膜在所述衬底基板上的正投影内。
  11. 根据权利要求1-10任一项所述的显示基板，还包括位于所述周边区的连接电极区，所述连接电极区为围绕所述显示区的环形区域，包括多个环形的连接电极，其中，所述彩膜结构位于所述多个环形的连接电极远离所述衬底基板的一侧，且所述连接电极区在所述衬底基板上的正投影位于所述第一边框彩膜在所述衬底基板上的正投影内。
  12. 根据权利要求1-11任一项所述的显示基板，还包括位于所述周边区的第一虚设区，所述第一虚设区位于所述连接电极区与所述显示区之间，包括多个第一虚设电极，其中，所述彩膜结构位于所述多个第一虚设电极远离所述衬底基板的一侧，且所述第一虚设区在所述衬底基板上的正投影位于所述第一边框彩膜在所述衬底基板上的正投影内。
  13. 根据权利要求1-12任一项所述的显示基板，还包括位于所述周边区的第二虚设区，所述第二虚设区位于所述周边区的最外围，围绕所述第一虚设区、连接电极区和感测区，所述第二虚设区包括多个第二虚设电极，其中，所述彩膜结构位于所述多个第二虚设电极远离所述衬底基板的一侧，且所述第二虚设区在所述衬底基板上的正投影位于所述第一边框彩膜在所述衬底基板上的正投影内。
  14. 根据权利要求1-13任一项所述的显示基板，其中，所述衬底基板为硅基板。
  15. 根据权利要求14所述的显示基板，其中，所述硅基板面向所述发光元件的一侧包括像素电路结构，且所述像素电路结构与所述发光元件连接，所述像素电路结构的至少一部分位于所述硅基板内。
  16. 根据权利要求1-15任一项所述的显示基板，其中，所述显示基板还 包括薄膜封装层，所述薄膜封装层位于所述第一彩膜层面向所述衬底基板的一侧。
  17. 一种显示装置，包括根据权利要求1-16任一项所述的显示基板。
  18. 一种显示基板的制作方法，包括：
    提供衬底基板，包括显示区和围绕所述显示区的周边区；
    在所述衬底基板上的所述显示区形成发光元件；
    在所述发光元件上制作第一彩膜层，所述第一彩膜层仅包括位于所述显示区的第一像素彩膜；
    在所述第一彩膜层上制作第二彩膜层，所述第二彩膜层包括位于所述显示区且与所述第一像素彩膜至少部分不交叠的第二像素彩膜，以及位于所述周边区且围绕所述显示区的第一边框彩膜。
  19. 根据权利要求18所述的方法，还包括：
    在制作所述第二彩膜层之后，在所述第一彩膜层上制作第三彩膜层，所述第三彩膜层包括位于所述显示区且与所述第一像素彩膜和所述第二像素彩膜至少部分不交叠的第三像素彩膜，以及位于所述周边区且围绕所述显示区的第二边框彩膜，其中，所述第二边框彩膜位于所述第一边框彩膜远离所述衬底基板的一侧。
  20. 根据权利要求18所述的方法，还包括：
    在制作所述第一彩膜层之后且在制作所述第二彩膜层之前，在所述第一彩膜层上制作第三彩膜层，所述第三彩膜层仅包括位于所述显示区且与所述第一像素彩膜和所述第二像素彩膜至少部分不交叠的第三像素彩膜。
  21. 根据权利要求19或20所述的方法，其中，所述第一像素彩膜与所述第二像素彩膜或所述第三像素彩膜至少部分交叠，且在所述第一像素彩膜与所述第二像素彩膜或所述第三像素彩膜的交叠部分中，所述第一像素彩膜位于所述第二像素彩膜或所述第三像素彩膜靠近所述衬底基板的一侧。
  22. 根据权利要求19或20所述的方法，其中，制作所述第一彩膜层、所述第二彩膜层和所述第三彩膜层中的至少之一包括使用旋涂法涂覆相应的彩膜材料层，并将所述相应的彩膜材料层进行构图。
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