WO2021018308A1 - 一种具有环状类y型电极的微尺寸led器件及制备方法 - Google Patents

一种具有环状类y型电极的微尺寸led器件及制备方法 Download PDF

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Publication number
WO2021018308A1
WO2021018308A1 PCT/CN2020/106458 CN2020106458W WO2021018308A1 WO 2021018308 A1 WO2021018308 A1 WO 2021018308A1 CN 2020106458 W CN2020106458 W CN 2020106458W WO 2021018308 A1 WO2021018308 A1 WO 2021018308A1
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Prior art keywords
layer
boss
branch
electrode
ring
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PCT/CN2020/106458
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English (en)
French (fr)
Inventor
王洪
谭礼军
姚若河
武智斌
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华南理工大学
中山市华南理工大学现代产业技术研究院
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Publication of WO2021018308A1 publication Critical patent/WO2021018308A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating

Definitions

  • the invention relates to the technical field of light-emitting devices for visible light communication, in particular to a micro-sized LED device with a ring-like Y-shaped electrode and a preparation method.
  • the signal can be modulated to the visible light emitted by it for transmission, taking into account the lighting and realizing the visible light wireless communication.
  • the modulation bandwidth of the LED is mainly affected by the minority carrier recombination lifetime and the RC time constant in the active region, where R and C are the equivalent resistance and equivalent capacitance of the LED device, respectively.
  • Reducing the active area area of the LED device that is, realizing the micron-sized LED, on the one hand, it can effectively reduce the equivalent capacitance, thereby reducing the RC time constant; on the other hand, it can increase the current per unit area of the LED device and reduce the active area
  • the recombination lifetime of minority carriers ultimately realizes the improvement of the modulation bandwidth of the device.
  • micron-sized LED pixels are small in size, high in integration, and have higher unit current density in the active area.
  • the current crowding effect has a more significant impact on it, and the current expansion on the surface of the device appears more For important reasons, the choice of electrode shape directly affects the expansion of the current.
  • the LED When the LED is injecting current, because the conductivity of P-type GaN is poor, the current in the vertical direction is greater than the current in the horizontal direction, resulting in that the current cannot be effectively and evenly distributed in the P-type GaN after the current injection, resulting in local current concentration and the LED device turning on voltage If it is too high, the luminescence and heating will be uneven, and the non-radiative recombination of the active layer will increase, resulting in a decrease in internal quantum efficiency. Therefore, improving the uniformity of the lateral expansion of the LED current is very important for improving the performance of the LED, and a reasonable electrode structure can effectively realize the lateral expansion of the current.
  • LEDs usually use the most common opaque circular electrode structure.
  • the current is mainly concentrated in the part of the area directly below the circular electrode, and the distance between the electrode and the active area is limited, and the current is reached before the lateral expansion is sufficient.
  • the active area that is, the light-emitting area in the active area is mainly concentrated in the part of the active area under the electrode, which causes the current crowding effect. Therefore, it is necessary to minimize the vertical current under the P electrode when designing the electrode, and the injection current should maximize the transmission current, that is, the transmission distance should be less than the current transmission length, and the electrode area should not be too large, because the electrode is too large to largely block Light output.
  • the purpose of the present invention is to provide a ring-like Y-shaped electrode meter-sized LED device that can reduce output light loss and improve current expansion.
  • a method for preparing the micro-size LED device with ring-like Y-shaped electrodes is provided.
  • the present invention adopts at least one of the following technical solutions.
  • the present invention provides a micro-sized LED device with a ring-like Y-shaped electrode.
  • the device includes a substrate and a boss-type structure connected on the substrate.
  • the boss-type structure includes a lower part of a boss and an upper part of the boss , The upper part of the boss is located on the lower part of the boss, the cross-sectional area of the upper part of the boss is smaller than the cross-sectional area of the lower part of the boss;
  • the lower part of the boss includes a buffer layer, an undoped N-type GaN layer and a first N-GaN layer;
  • the upper part of the boss includes a second N-GaN layer, a multiple quantum well layer, a P-type AlGaN layer and a P-GaN layer arranged in order from bottom to top, the first N-GaN layer and the second N-
  • the GaN layer is integrally formed; the upper surface of the lower part of the boss is connected to the area outside the upper part of the boss to connect the N
  • the P electrode is a ring type Y
  • the ring-like Y-shaped electrode includes an annular contact ring and two or more Y-like forks.
  • the Y-like fork includes a bottom arm and a first branch and a second branch respectively connected to one end of the bottom arm. Bifurcation, the other end of the bottom arm is connected with the annular contact ring; a passivation layer is deposited on the area of the boss type structure except the P electrode and the N electrode.
  • the bottom arm, the first bifurcation and the second bifurcation are all straight lines, the first bifurcation and the second bifurcation are symmetrically distributed on both sides of the bottom arm, and the bifurcation angle is 30° ⁇ 120° .
  • the bottom arm and the first branch are straight lines
  • the second branch includes a straight line and an arc connected to the straight line
  • the straight lines of the first branch and the second branch are symmetrical Distributed on both sides of the bottom arm
  • the bifurcation angle is 30° ⁇ 120°
  • the second bifurcated arc extends along the arc angle to the side of the second bifurcated straight line, but the arc and other types
  • the Y-shaped forks do not touch; the length of the straight line of the first branch is greater than the length of the straight line of the second branch.
  • the bottom arm is a straight line
  • the first branch and the second branch both include a straight line and an arc connected to the straight line
  • the straight lines of the first branch and the second branch are symmetrical Distributed on both sides of the bottom arm
  • the bifurcation angle is 30° ⁇ 120°
  • the first bifurcated arc extends along the arc angle to the side of the first bifurcated straight line
  • the second bifurcated circle The side of the arc to the straight line of the second branch extends along the arc angle, but the arc does not touch other Y-like forks
  • the length of the straight line of the first branch is greater than the straight line of the second branch The length of the line.
  • the upper part of the boss and the lower part of the boss are of cylindrical structure, and the upper part of the boss is located at the center of the lower part of the boss; the area of the current spreading layer is smaller than the area of the bottom surface of the upper part of the boss; the diameter of the bottom surface of the upper part of the boss is 20um ⁇ 200um, the diameter of the bottom surface of the lower part of the boss is 30um ⁇ 50um larger than the diameter of the bottom surface of the upper part of the boss; the P electrode is located at the center of the upper surface of the current spreading layer; the N electrode is a circular ring, and a rectangle is connected to the outer circle of the circular ring Protrusion, the protrusion is located in the radial direction of the outer circle, the width and length of the protrusion are 5um ⁇ 10um; the N electrode is located in the area between the edge of the upper surface of the first N-GaN layer and the edge of the lower surface of the multiple quantum well layer
  • the upper surface of the current spreading layer under the P electrode is a roughened
  • the current spreading layer is ITO with a thickness of 100-230 nm;
  • the passivation layer is SiO 2 or a double-layer dielectric layer, and the double-layer dielectric layer is two dielectrics with different refractive indexes arranged from bottom to top layers having a refractive index lower than the refractive index of the upper dielectric layer underlying the dielectric layer;
  • the upper layer is MgO;
  • the lower layer of HfO 2 /SiO 2 is HfO 2 and the upper layer is SiO 2 ;
  • the lower layer of MgO/SiO 2 is MgO and the upper layer is SiO 2 ;
  • the P electrode and N electrode are Cr/Al/Ti/Au metal layers,
  • the total thickness of the metal layer is 1.15um
  • the number of Y-like forks in the ring-like Y-shaped electrode is three, and the Y-like forks are evenly connected to the annular contact ring at 120° between two and three Y-like forks.
  • the shape is exactly the same.
  • the number of Y-like forks in the ring-like Y-shaped electrode is four, and the two Y-like forks are evenly connected to the annular contact ring at 90°, and the size of the four Y-like forks
  • the shape is exactly the same.
  • the number of Y-like forks in the ring-like Y-shaped electrode is five, and the Y-like forks are evenly connected to the annular contact ring at 72° between two and five Y-like forks.
  • the shape is exactly the same.
  • the bottom arm, the first bifurcation and the second bifurcation are all straight lines, the first bifurcation and the second bifurcation are symmetrically distributed on both sides of the bottom arm, the bifurcation angle is 60°, and the bottom arm
  • the length ratio to the first bifurcation is 1:2, and the length of the first bifurcation is equal to the length of the second bifurcation.
  • the present invention also provides a method for preparing the micro-sized LED device with ring-like Y-shaped electrodes, which includes the following steps:
  • the sample piece includes the substrate arranged in sequence from bottom to top, buffer layer, undoped N-type GaN layer and N-GaN layer, multiple quantum well layer, P-type AlGaN layer and P-GaN layer,
  • a first photoresist mask layer is prepared on the P-GaN layer as a mask layer for etching the bump structure, and etched from the P-GaN layer to the N-GaN layer using the ICP dry etching method, exposing part of N -GaN layer, part of the N-GaN layer exposed on the sidewall constitutes the second N-GaN layer, and part of the N-GaN layer exposed on the upper surface constitutes the first N-GaN layer, thereby forming the upper part of the boss, and then removing the first Photoresist mask layer;
  • step (1) the upper surface of the exposed part of the P-GaN layer on the upper part of the boss and the first N-GaN layer is combined with an electron beam evaporation coater and a rapid annealing furnace to prepare a current spreading layer, and on the upper part of the boss A second photoresist mask layer is prepared on the upper surface of the current spreading layer on the P-GaN layer.
  • the area of the second photoresist mask layer is smaller than the upper surface area of the upper part of the boss.
  • an acidic solution at 30°C ⁇ 50°C Perform wet etching with a pH of 3.9-6.1.
  • step (3) Prepare a third photoresist mask layer on the upper surface of the exposed part of the first N-GaN layer and the upper surface of the P-GaN layer and the current spreading layer on the upper part of the boss in step (2), and the third photolithography
  • the size of the mask layer is larger than the size of the upper surface of the upper part of the boss.
  • the first N-GaN layer is etched to the substrate by the ICP dry etching method, the substrate is exposed to form the lower part of the boss, and then the third photoresist is removed Mask layer
  • a passivation layer is deposited using dielectric film deposition technology, and then a fourth photoresist mask layer is formed on the upper surface of the passivation layer, and the fourth photoresist mask layer is on the upper part of the boss Openings are provided on the upper surface and the upper surface of the lower part of the boss except for the upper part of the boss.
  • the passivation layer is etched by the ICP etching method and the wet etching method, and part of the current spreading layer on the upper surface of the boss and A part of the first N-GaN layer on the lower part of the boss is exposed;
  • the fourth photoresist mask layer prepared in step (4) is used as the mask layer of the etching current spreading layer, and the part of the current spreading layer exposed on the upper surface of the boss is roughened by wet etching technology, and then Removing the fourth photoresist mask layer;
  • step (5) the P electrode is prepared on the upper surface of the current spreading layer roughened in step (5) by photolithography and metal stripping technology, and prepared on the lower surface of the boss in step (4) N electrode.
  • the photoresist mask layer 3 is one of a single-layer photoresist and a double-layer photoresist; the preparation method of the double-layer photoresist is as follows: firstly, pre-baking the sample processed in step (2), Homogenize and bake to form a single layer of photoresist, and then homogenize and bake to form a second layer of photoresist; in step (5), the photoresist mask layer 4 is hardened for 3-6 minutes before wet etching .
  • the current spreading layer in step (2) is vapor-deposited by an electron beam evaporation coating machine, and then annealed in a rapid annealing furnace under the conditions of 200-250 sccm N 2 and 30-50 sccm O 2 at 500-600°C Annealing at a temperature of 3 to 5 minutes;
  • the roughening of the current spreading layer in step (5) refers to etching the current spreading layer in an ITO etching solution at 30°C to 50°C for 2 to 5 minutes.
  • the ITO etching solution is an acid solution with a pH It is 3.9 ⁇ 6.1.
  • the acidic solution is an HF solution.
  • the present invention has the following beneficial effects and advantages:
  • the micro-sized LED device with ring-like Y-shaped electrodes prepared in the present invention the epitaxial layer is a convex structure, and the ring-shaped Y-shaped P electrode is prepared on the current spreading layer on the upper surface of the boss.
  • the Y-like P electrode through the annular contact ring and the Y-like fork can effectively improve the current expansion and distribution under the condition of reducing the output light shielding, and achieve uniform light intensity distribution and uniform heating;
  • the area of the current spreading layer on the upper surface of the boss is smaller than that of the upper surface of the boss, that is, the edge is farther from the upper boundary of the boss,
  • the upper surface of the current spreading layer exposed after the preparation of the passivation layer is a rough structure, which is formed by etching in an acidic solution with a certain temperature for 2 to 5 minutes The temperature of the acidic solution is 30°C-50°C, so that the upper surface of the current spreading layer under the P electrode has a rough structure, which increases the lateral light output to a certain extent and reduces the damage of the light output power;
  • Example 1 is a schematic cross-sectional view of a micro-sized LED device structure with ring-like Y-shaped electrodes provided by Example 1;
  • FIGS. 2a to 2f are schematic diagrams of the preparation process of a micro-sized LED device with ring-like Y-shaped electrodes provided in Example 1;
  • Example 3 is a top view of the N-type electrode provided in Example 1;
  • Example 4 is a top view of the toroidal Y-shaped electrode provided in Example 1;
  • FIG. 5 is a top view of the annular Y-shaped electrode provided in Example 2.
  • Example 6 is a top view of the toroidal Y-shaped electrode provided in Example 3.
  • This embodiment provides a micro-sized LED device with a ring-like Y-shaped electrode.
  • the device includes a substrate 1 and a bump-shaped structure connected on the substrate.
  • the bump-shaped structure Including the lower part of the boss and the upper part of the boss, the upper part of the boss is located on the lower part of the boss, the cross-sectional area of the upper part of the boss is smaller than the cross-sectional area of the lower part of the boss; the lower part of the boss includes the buffer layer 2 arranged from bottom to top.
  • the Y-like fork includes a bottom arm 1121 and a first branch 1122 and a second branch 1123 respectively connected to one end of the bottom arm, and the other end of the bottom arm is connected to the annular contact ring 1120, and three The Y-like fork bottom
  • the bottom arm 1121, the first branch 1122 are all straight lines
  • the second branch 1123 includes a straight line and an arc connected with the straight line
  • the first branch 1122 and the second branch 1123 are straight.
  • the lines are symmetrically distributed on both sides of the bottom arm 1121, and the bifurcation angle is 60°; the second bifurcated arc extends along the arc angle to the side of the second bifurcated straight line, but the arc and other types
  • the Y-shaped forks do not touch; the length of the straight line of the first branch is greater than the length of the straight line of the second branch.
  • the upper part of the boss and the lower part of the boss are cylindrical structures, and the upper part of the boss is located at the center of the lower part of the boss; the area of the current spreading layer 8 is smaller than the area of the bottom surface of the upper part of the boss; the bottom diameter of the upper part of the boss is 160um, and the boss The bottom diameter of the lower part is 30um larger than that of the upper part of the boss; the P electrode 11 is located at the center of the upper surface of the current spreading layer; the N electrode 10 is a circular ring, and a rectangular protrusion is connected to the outer circle of the circular ring. It is located in the radial direction of the outer circle, and the width and length of the protrusion are 5um, as shown in FIG.
  • the N electrode 10 is located at the edge of the upper surface of the first N-GaN layer 401 and the edge of the lower surface of the multiple quantum well layer 5 The center of the middle area; the upper surface of the current spreading layer 8 under the P electrode 11 has a roughened structure.
  • the current spreading layer 8 of ITO having a thickness of 120 nm, a diameter of 90um; the passivation layer 9 of SiO 2, having a thickness of 1um; P electrode and N-electrode 10 was 11 Cr / Al / Ti / Au metal layer, the metal layer The total thickness is 1.15um; the substrate 1 is made of sapphire material.
  • the number of Y-like forks in the ring-like Y-shaped electrode is 3, and the two Y-like forks are evenly connected to the annular contact ring at 120°, and the size and shape of the three Y-like forks are complete Consistent, as shown in Figure 4.
  • This embodiment also provides a method for preparing the micro-sized LED device with ring-like Y-shaped electrodes, including the following steps:
  • the sample piece includes the substrate 1, the buffer layer 2, the undoped N-type GaN layer 3 and the N-GaN layer, the multiple quantum well layer 5, the P-type AlGaN layer 6 and P-GaN layer 7, a circular first photoresist mask layer is formed on the P-GaN layer 7 by ordinary ultraviolet lithography process as the mask layer for etching the convex structure, the diameter is 100um; the ICP dry method is used
  • the etching method is to etch from the P-GaN layer 7 to the N-GaN layer with a depth of 1.3um, exposing part of the N-GaN layer, and part of the N-GaN layer with the exposed sidewalls to form the second N-GaN layer 402, and the exposed part
  • the N-GaN layer on the upper surface constitutes the first N-GaN layer 401, thereby forming the upper part of the boss, the diameter of the upper part of the boss is 160um; then the first photoresist mask layer is removed by
  • step (2) After the sample processed in step (1) is processed with 511 solution (commercially available) and ammonia (commercially available), on the exposed part of the P-GaN layer 7 and the first N-GaN layer 401 on the upper part of the boss The surface is combined with an electron beam evaporation coating machine in a nitrogen and oxygen atmosphere at 550°C.
  • the alloy is rapidly annealed for 3 minutes to prepare the current spreading layer 8, and the current spreading layer 8 is prepared on the upper surface of the P-GaN layer 7 on the upper part of the boss
  • the second photoresist mask layer, the area of the second photoresist mask layer is smaller than the upper surface area of the upper part of the boss, and the ITO current with a diameter of 90um is formed at the center of the upper part of the boss by photolithography and wet etching technology
  • the corrosion condition of the expansion layer 8 is to etch in an acidic solution at 40°C for 15 minutes.
  • the SiO 2 passivation layer 9 is deposited with a thickness of 1um under the condition of 260 °C using dielectric film deposition technology, and then a fourth photoresist mask is formed on the upper surface of the passivation layer 9
  • the fourth photoresist mask layer has a circular opening with a diameter of 40um in the center of the upper surface of the upper part of the boss, and the upper surface of the lower part of the boss has a circular opening except for the upper part of the boss.
  • Etching method After 13 minutes of etching, use HF acid solution (commercially available) for etching until the ITO current spreading layer 8 and the first N-GaN layer 401 at the opening on the passivation layer 9 are exposed.
  • the cross section of the sample is shown in Figure 2d. Expose part of the current spreading layer 8 on the upper surface of the boss and part of the first N-GaN layer 401 on the lower part of the boss;
  • the fourth photoresist mask layer prepared in step (4) is used as the mask layer of the corrosion current spreading layer 8, and the fourth photoresist mask layer is hardened by a hot plate at a temperature of 105°C, The time is 5 minutes; then, the ITO current spreading at the opening 9 of the passivation layer on the top of the upper surface of the boss 8 is corroded in an ITO etching solution at 35°C for 5 minutes to form a coarse structure of the ITO current spreading layer.
  • the upper surface of the expansion layer 8 has a rough structure, and the lower surface has a normal structure; then the fourth photoresist mask layer is ultrasonically removed with acetone and isopropanol.
  • the cross-section of the sample after step (5) is shown in FIG. 2e.
  • step (5) use negative photoresist and use ordinary ultraviolet lithography technology to form P electrode 11 and N electrode 10 patterns on the sample, and use electronic vapor deposition technology to prepare Cr/Al/Ti/
  • the Au electrode has a total thickness of 1.15um; subsequently, it is stripped using 60°C acetone and 85°C degumming solution to form a P electrode 11 and an N electrode 10.
  • the cross section of the device is shown in Fig. 2f.
  • This embodiment proposes a micro-sized LED device with a ring-like Y-shaped electrode.
  • the structure is as shown in Figures 1 and 3 in Embodiment 1, except that the structure of the P electrode 11 is different.
  • the P electrode 11 is shown in Figure 5. As shown, it includes an annular contact ring 1130 and three Y-like forks; the annular contact ring is located at the center of the ITO current spreading layer 8; the Y-like fork includes a bottom arm 1131 and one end of the bottom arm 1131 respectively The first branch 1132 and the second branch 1133 are connected, the other end of the bottom arm is connected to the annular contact ring 1130, and the bottom arms of the three Y-like forks are evenly distributed on the annular contact ring, like Y-like The two forks are evenly connected with the circular contact ring at 120°, and the size and shape of the Y-like forks are exactly the same; the bottom arm 1131, the first branch 1132 and the second branch 1133 are all straight lines
  • This embodiment proposes a micro-sized LED device with ring-like Y-shaped electrodes. Its structure and dimensions are as shown in Figures 1 and 3 of Embodiment 1, except that the structure of the P electrode 11 is different, and the P electrode 11 is a ring.
  • the Y-shaped electrode includes a ring-shaped contact ring 1160 and three Y-shaped forks; the ring-shaped contact ring 1160 is located at the center of the current spreading layer 8.
  • the Y-shaped fork includes a bottom arm 1161 and a bottom arm
  • the first branch 1162 and the second branch 1163 are respectively connected at one end, and the other end of the bottom arm is connected to the annular contact ring 1160.
  • the three Y-like fork bottom arms 1161 are evenly distributed on the annular contact ring 1160 ,
  • the Y-like forks are evenly connected to the circular contact ring at 120° in pairs, and the size and shape of the Y-like forks are exactly the same;
  • the bottom arm 1161 is a straight line
  • the first branch 1162 and the second branch 1163 both include a straight line and an arc connected to the straight line
  • the first branch 1162 and the second branch 1162 The straight lines of the branch 1163 are symmetrically distributed on both sides of the bottom arm, and the branch angle is 60°;
  • the arc of the first branch 1161 extends along the arc angle to one side of the straight line of the first branch 1161
  • the arc of the second branch 1162 extends along the arc angle to one side of the straight line of the second branch 1163, but the arc does not contact other Y-like forks;
  • the straight line of the first branch 1161 The length of is greater than the length of the straight line of the second branch 1162.

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Abstract

一种具有环状类Y型电极的微尺寸LED器件及制备方法，所述器件包括衬底（1）和衬底（1）上连接的凸台型结构，所述凸台型结构包括凸台下部和凸台上部，凸台上部位于凸台下部之上；凸台上部的上表面连接电流扩展层（8），电流扩展层（8）上连接P电极（11），所述P电极（11）为环状类Y型电极，所述环状类Y型电极包括一个圆环状接触环（1120）和两个以上类Y型叉，两个以上类Y型叉的底臂（1121）在圆环状接触环（1160）上均匀分布；凸台型结构上除P电极（11）和N电极（10）以外的区域沉积有一层钝化层（9）。该微尺寸LED器件在减少输出光遮挡的情况下有效的改善电流扩展及分布，实现光强分布均匀，发热均匀。

Description

一种具有环状类Y型电极的微尺寸LED器件及制备方法 技术领域
本发明涉及可见光通信用发光器件技术领域，具体涉及一种具有环状类Y型电极的微尺寸LED器件及制备方法。
 背景技术
与传统光源相比，LED器件除了发光效率高、寿命长外，还具有调制性能好、调制带宽高等优点。基于LED器件的上述优点，可将信号调制到其发出的可见光上进行传输，兼顾照明的同时实现可见光无线通信。LED的调制带宽主要是受有源区少数载流子复合寿命和RC时间常数的影响，其中R、C分别为LED器件的等效电阻和等效电容。降低LED器件的有源区面积，即实现微米级尺寸LED，一方面可有效降低等效电容，从而实现RC时间常数的降低；另一方面可提高LED器件单位面积的电流，减小有源区少数载流子的复合寿命，最终实现器件调制带宽的提高。与普通大尺寸器件相比，微米尺寸LED像素尺寸小、集成度高，有源区的单位电流密度更高，其电流拥挤效应对其产生的影响更为显著，器件表面的电流扩展就显得更为重要，电极形状的选择直接影响电流的扩展情况。
对于LED注入电流时，因为P型GaN的导电性能较差，使得垂直方向的电流大于水平方向的电流，造成电流注入后无法有效均匀的分布在P型GaN，导致电流局部聚集，LED器件开启电压过高，发光发热不均匀，有源层非辐射复合增加，从而造成内量子效率下降。因此，改善LED电流横向扩展的均匀性对于提高LED性能至关重要，而通过设计合理的电极结构可以有效的实现电流横向扩展。
目前普通LED通常采用最为常见的不透明的圆形电极结构，其电流主要集中在圆形电极正下方的部分区域，而电极到有源区的距离有限，当电流还未横向扩展充分时就已经到达有源区，即有源区中发光的区域主要集中在电极下方的部分有源区导致电流拥挤效应。所以设计电极时有必要最小化P电极下的垂直电流，同时注入电流应使传输电流最大化，即传输距离应该小于电流传输长度，并且电极面积不宜过大，因为电极过大很大程度上遮挡光的输出。
 技术解决方案
针对GaN基微尺寸LED器件以及根据LED电极存在的问题以及电极设计的原则，本发明的目的是提出一种具有可减少输出光损失以及提高电流扩展的环状类Y型电极米尺寸LED器件，同时提供该具有环状类Y型电极的微尺寸LED器件的制备方法。
为实现上述目的，本发明至少采用下列技术方案之一。
本发明提供了一种具有环状类Y型电极的微尺寸LED器件，所述器件包括衬底和衬底上连接的凸台型结构，所述凸台型结构包括凸台下部和凸台上部，凸台上部位于凸台下部上，凸台上部的横截面积小于凸台下部的横截面积；凸台下部包括从下到上依次排列的缓冲层、未掺杂N型GaN层和第一N-GaN层；凸台上部包括从下到上依次排列分布的第二N-GaN层、多量子阱层、P型AlGaN层和P-GaN层，第一N-GaN层和第二N-GaN层一体成型；凸台下部的上表面连接凸台上部以外的区域连接N电极；凸台上部的上表面连接电流扩展层，电流扩展层上连接P电极，所述P电极为环状类Y型电极，所述环状类Y型电极包括一个圆环状接触环和两个以上类Y型叉，类Y型叉包括一底臂以及和底臂一端分别连接的第一分叉和第二分叉，底臂的另一端和圆环状接触环连接；凸台型结构上除P电极和N电极以外的区域沉积有一层钝化层。
优选地，所述底臂、第一分叉和第二分叉均为直型线条，第一分叉和第二分叉对称分布在底臂的两侧，分叉角度为30°~120°。
优选地，所述底臂、第一分叉均为直型线条，第二分叉包括一直型线条以及和直型线条连接的圆弧，第一分叉和第二分叉的直型线条对称分布在底臂的两侧，分叉角度为30°~120°；第二分叉的圆弧向第二分叉的直型线条的一侧沿着圆弧角度延伸，但圆弧和其他类Y型叉不接触；第一分叉的直型线条的长度大于第二分叉的直型线条的长度。
优选地，所述底臂为直型线条，第一分叉和第二分叉均包括一直型线条以及和直型线条连接的圆弧，第一分叉和第二分叉的直型线条对称分布在底臂的两侧，分叉角度为30°~120°；第一分叉的圆弧向第一分叉的直型线条的一侧沿着圆弧角度延伸，第二分叉的圆弧向第二分叉的直型线条的一侧沿着圆弧角度延伸，但圆弧和其他类Y型叉不接触；第一分叉的直型线条的长度大于第二分叉的直型线条的长度。
优选地，所述凸台上部和凸台下部为圆柱体结构，凸台上部位于凸台下部的中心处；电流扩展层的面积小于凸台上部的底面面积；凸台上部的底面直径为20um~200um，凸台下部的底面直径比凸台上部的底面直径大30um~50um；P电极位于电流扩展层上表面的中心处；所述N电极为圆环，在圆环的外圆上连接一矩形凸起，凸起位于外圆的径向方向上，凸起的宽度与长度为5um~10um；N电极位于第一N-GaN层上表面的边缘与多量子阱层下表面的边缘之间区域的中心；P电极下方的电流扩展层上表面为粗化结构。
优选地，电流扩展层为ITO，厚度为100～230nm；所述钝化层为SiO 2或双层介质层，所述双层介质层为从下到上排布的两个折射率不同的介质层组成，且上层介质层的折射率低于下层介质层的折射率；双层介质层为 HfO 2/MgO、HfO 2/SiO 2或MgO/SiO 2； HfO 2/MgO中下层为HfO 2，上层为MgO； HfO 2/SiO 2中下层为HfO 2，上层为SiO 2； MgO/SiO 2中下层为MgO，上层为SiO 2；P电极和N电极为Cr/Al/Ti/Au金属层，金属层的总厚度为1.15um ~1.35um；衬底为蓝宝石材料。
优选地，环状类Y型电极中的类Y型叉的个数为三个，类Y型叉之间两两成120°均匀与圆环状接触环连接，且三个类Y型叉大小形状完全一致。
优选地，环状类Y型电极中的类Y型叉的个数为四个，类Y型叉之间两两成90°均匀与圆环状接触环连接，且四个类Y型叉大小形状完全一致。
优选地，环状类Y型电极中的类Y型叉的个数为五个，类Y型叉之间两两成72°均匀与圆环状接触环连接，且五个类Y型叉大小形状完全一致。
优选地，所述底臂、第一分叉和第二分叉均为直型线条，第一分叉和第二分叉对称分布在底臂的两侧，分叉角度为60°，底臂和第一分叉的长度比为1:2，第一分叉的长度和第二分叉的长度相等。
本发明还提供了一种制备所述具有环状类Y型电极的微尺寸LED器件的方法，包括以下步骤：
（1）取样片，样片包括从下到上依次排布的衬底，缓冲层、未掺杂N型GaN层和N-GaN层、多量子阱层、P型AlGaN层和P-GaN层，在P-GaN层上制备第一光刻胶掩膜层作为刻蚀凸台型结构的掩膜层，利用ICP干法刻蚀方法从P-GaN层刻蚀至N-GaN层，暴露部分N-GaN层，暴露侧壁的部分N-GaN层构成第二N-GaN层，暴露出部分上表面的N-GaN层构成第一N-GaN层，由此形成凸台上部，然后去除第一光刻胶掩膜层；
（2）在步骤（1）凸台上部的P-GaN层和第一N-GaN层暴露的部分上表面上结合电子束蒸发镀膜机和快速退火炉制备电流扩展层，并在凸台上部的P-GaN层上的电流扩展层上表面制备第二光刻胶掩膜层，第二光刻胶掩膜层的面积小于凸台上部的上表面面积，在30℃~50℃的酸性溶液中进行湿法腐蚀，pH为3.9～6.1，当电流扩展层外圈小于第二光刻掩膜层大小出现电流扩展层侧腐蚀，去除第二光刻胶掩膜层；
（3）在步骤（2）中第一N-GaN层暴露的部分上表面以及凸台上部上的P-GaN层和电流扩展层上表面制备第三光刻胶掩膜层，第三光刻胶掩膜层的尺寸大于凸台上部上表面的尺寸，利用ICP干法刻蚀方法从第一N-GaN层刻蚀至衬底，暴露衬底形成凸台下部，随后去除第三光刻胶掩膜层；
（4）在步骤（3）的基础上利用介质薄膜沉积技术沉积钝化层，随后在钝化层上表面形成第四光刻胶掩膜层，第四光刻胶掩膜层在凸台上部上表面以及凸台下部上表面除连接凸台上部以外的区域分别设有开口，利用ICP刻蚀方法和湿法刻蚀方法刻蚀钝化层，将凸台上部上表面的部分电流扩展层以及凸台下部上的部分第一N-GaN层暴露；
（5）以步骤（4）制备的第四光刻胶掩膜层作为腐蚀电流扩展层的掩膜层，通过湿法腐蚀技术将凸台上部上表面暴露的部分电流扩展层进行粗化，随后去除第四光刻胶掩膜层；
（6）在步骤（5）的基础上，利用光刻技术和金属剥离技术在步骤（5）中粗化后的电流扩展层上表面制备P电极，在步骤（4）的凸台下部表面制备N电极。
优选地，光刻胶掩膜层3是单层光刻胶、双层光刻胶的一种；双层光刻胶的制备方法为：先将步骤（2）处理后的样片进行预烘、匀胶、烘烤形成单层光刻胶，再次匀胶、烘烤形成第二层光刻胶；步骤（5）中湿法腐蚀前先将光刻胶掩膜层4坚膜3～6分钟。
优选地，步骤（2）中的电流扩展层采用电子束蒸发镀膜机蒸镀，随后快速退火炉中退火，条件为200～250sccm N 2和30～50sccm O 2的氛围下，以500～600℃的温度退火3～5分钟；步骤（5）中的粗化电流扩展层是指将电流扩展层在30℃~50℃的ITO腐蚀液中腐蚀2~5分钟， ITO腐蚀液为酸性溶液，pH为3.9～6.1。
有益效果
优选地，酸性溶液为HF溶液。
和现有技术相比，本发明具有以下有益效果和优点：
（1）本发明制备的具有环状类Y型电极的微尺寸LED器件，外延层是凸台型结构，环状类Y型P电极制备在凸台上部上表面的电流扩展层上，环状类Y型P电极通过圆环状接触环和类Y型叉在减少输出光遮挡的情况下有效的改善电流扩展及分布，实现光强分布均匀，发热均匀；
（2）本发明制备的具有环状类Y型电极的微尺寸LED器件，凸台上部上表面的电流扩展层面积小于凸台上部上表面的面积，即其边缘离凸台上部边界较远，在后续工艺中不容易发生材料的扩散造成漏电，同时所述电流扩展层在钝化层制备后露出的部分上表面为粗化结构，通过在有一定温度的酸性溶液中腐蚀2~5分钟形成，所述酸性溶液温度为30℃~50℃，使得P电极下方的电流扩展层上表层为粗化结构，在一定程度增加了光的侧向输出，减少了光输出功率的损伤；
（3）本发明制备钝化层（PV）开口时采用光刻胶作为掩膜层，先采用ICP刻蚀方法刻蚀钝化层，当刻蚀快结束即钝化层仅剩薄薄一层时，改用湿法腐蚀，直到开口区域的钝化层腐蚀干净，一方面可有效减少ICP刻蚀带来的损伤，另一方面可通过钝化腐蚀溶液在一定程度腐蚀开口区域的电流扩展层。
 附图说明
图1是实例1提供的一种具有环状类Y型电极的微尺寸LED器件结构的横截面示意图；
图2a~图2f是实例1提供的一种具有环状类Y型电极的微尺寸LED器件的制备过程示意图；
图3是实例1提供的N型电极的俯视图；
图4是实例1提供的圆环状类Y型电极的俯视图；
图5是实例2提供的圆环状类Y型电极的俯视图；
图6是实例3提供的圆环状类Y型电极的俯视图；
图1至图2f中，1-衬底；2-缓冲层；3-未掺杂N型GaN层； 401-第一N-GaN层；402-第二N-GaN层；5-多量子阱层；6-P型AlGaN层；7-P-GaN层；8-电流扩展层；9-钝化层；10-N电极；11-P电极；图4中，1120-圆环状接触环；1121-底臂；1122-第一分叉；1123-第二分叉；图5中，1130-圆环状接触环；1131-底臂；1132-第一分叉；1133-第二分叉；图6中，1160-圆环状接触环；1161-底臂；1162-第一分叉；1163-第二分叉。
 本发明的实施方式
以下结合附图和实例对本发明的具体实施作进一步说明，实施例不能在此一一赘述，但本发明的实施和保护范围并不因此限定于以下实施例，以下若有未特备详细说明之过程或参数，均是本领域技术人员可参照现有技术实现的。
实施例1：
本实施例提供了一种具有环状类Y型电极的微尺寸LED器件，如图1所示，所述器件包括衬底1和衬底上连接的凸台型结构，所述凸台型结构包括凸台下部和凸台上部，凸台上部位于凸台下部上，凸台上部的横截面积小于凸台下部的横截面积；；凸台下部包括从下到上依次排列的缓冲层2、未掺杂N型GaN层3和第一N-GaN层401；凸台上部包括从下到上依次排列分布的第二N-GaN层402、多量子阱层5、P型AlGaN层6和P-GaN层7，第一N-GaN层401和第二N-GaN层402一体成型；凸台下部的上表面上凸台上部以外的区域连接N电极10；凸台上部的上表面连接电流扩展层8，电流扩展层上连接P电极11，如图4所示，所述P电极11为环状类Y型电极，所述环状类Y型电极包括一个圆环状接触环1120和三个类Y型叉，类Y型叉包括一底臂1121以及和底臂一端分别连接的第一分叉1122和第二分叉1123，底臂的另一端和圆环状接触环1120连接，三个类Y型叉的底臂在圆环状接触环上均匀分布；凸台上除P电极11和N电极10以外的区域沉积有一层钝化层9。
所述底臂1121、第一分叉1122均为直型线条，第二分叉1123包括一直型线条以及和直型线条连接的圆弧，第一分叉1122和第二分叉1123的直型线条对称分布在底臂1121的两侧，分叉角度为60°；第二分叉的圆弧向第二分叉的直型线条的一侧沿着圆弧角度延伸，但圆弧和其他类Y型叉不接触；第一分叉的直型线条的长度大于第二分叉的直型线条的长度。
所述凸台上部和凸台下部为圆柱体结构，凸台上部位于凸台下部的中心处；电流扩展层8的面积小于凸台上部的底面面积；凸台上部的底面直径为160um，凸台下部的底面直径比凸台上部的底面直径大30um；P电极11位于电流扩展层上表面的中心处；所述N电极10为圆环，在圆环的外圆上连接一矩形凸起，凸起位于外圆的径向方向上，凸起的宽度与长度为5um，如图3所示；N电极10位于第一N-GaN层401上表面的边缘与多量子阱层5下表面的边缘之间区域的中心；P电极11下方的电流扩展层8上表面为粗化结构。
电流扩展层8为ITO，厚度为120nm，直径为90um；所述钝化层9为SiO 2，厚度为1um；P电极11和N电极10为Cr/Al/Ti/Au金属层，金属层的总厚度为1.15um；衬底1为蓝宝石材料。
环状类Y型电极中的类Y型叉的个数为3，类Y型叉之间两两成120°均匀地与圆环状接触环连接，且三个类Y型叉的大小形状完全一致，如图4所示。
本实施例还提供了所述具有环状类Y型电极的微尺寸LED器件的制备方法，包括以下步骤：
（1）取样片，样片包括从下到上依次排布的衬底1、缓冲层2、未掺杂N型GaN层3和N-GaN层、多量子阱层5、P型AlGaN层6和P-GaN层7，在P-GaN层7上利用普通紫外光刻工艺形成圆形第一光刻胶掩膜层作为刻蚀凸台型结构的掩膜层，直径为100um；利用ICP干法刻蚀方法从P-GaN层7刻蚀至N-GaN层，深度为1.3um，暴露部分N-GaN层，暴露侧壁的部分N-GaN层构成第二N-GaN层402，暴露出部分上表面的N-GaN层构成第一N-GaN层401由此形成凸台上部，凸台上部的直径为160um；然后采用丙酮异丙醇超声去除第一光刻胶掩膜层，处理后的样片的横截面如图2a所示。
（2）将步骤（1）处理后的样片经过511溶液（市售）和氨水（市售）处理后，在凸台上部的P-GaN层7和第一N-GaN层401暴露的部分上表面上结合电子束蒸发镀膜机在550℃的氮气和氧气氛围中，快速退火3分钟进行合金制备电流扩展层8，并在凸台上部的P-GaN层7上的电流扩展层8上表面制备第二光刻胶掩膜层，第二光刻胶掩膜层的面积小于凸台上部的上表面面积，利用光刻技术和湿法腐蚀技术在凸台上部中心处形成直径为90um的ITO电流扩展层8，腐蚀条件为在40℃的酸性溶液中腐蚀15分钟，当电流扩展层8外圈小于第二光刻掩膜层大小，出现电流扩展层侧腐蚀时，随后采用丙酮异丙醇超声去除第二光刻胶掩膜层，步骤（2）处理的横截面如图2b所示；
（3）利用光刻工艺以第一N-GaN层401暴露的部分上表面以及凸台上部上的P-GaN层7和电流扩展层8上表面中心为圆心形成一层直径为140um的圆形第三光刻胶掩膜层，第三光刻胶掩膜层的尺寸大于凸台上部上表面的尺寸，利用ICP干法刻蚀方法从第一N-GaN层401刻蚀至衬底1，深度为4.3um，暴露衬底1形成圆形凸台下部，随后采用丙酮异丙醇超声去除第三光刻胶掩膜层，经步骤（3）处理的样片横截面如图2c所示；
（4）在步骤（3）的基础上利用介质薄膜沉积技术在260℃的条件下沉积SiO 2钝化层9，厚度为1um，随后在钝化层9上表面形成第四光刻胶掩膜层，第四光刻胶掩膜层在凸台上部上表面中心有一个直径为40um 的圆形开口以及凸台下部上表面除连接凸台上部以外的区域设有圆环形开口，利用ICP刻蚀方法刻蚀13分钟后改用HF酸溶液（市售）进行腐蚀，直至钝化层9上开口处的ITO电流扩展层8和第一N-GaN层401暴露，经步骤（4）处理的样片横截面如图2d所示。将凸台上部上表面的部分电流扩展层8以及凸台下部上的部分第一N-GaN层401暴露；
（5）以步骤（4）制备的第四光刻胶掩膜层作为腐蚀电流扩展层8的掩膜层，通过热板对第四光刻胶掩膜层进行坚膜，温度为105℃，时间为5分钟；随后，凸台上部上表面顶部中心钝化层开9口处的ITO电流扩展8通过在35℃的ITO腐蚀液中腐蚀5分钟，形成ITO电流扩展层粗化结构，ITO电流扩展层8上表面为粗化结构，下表面为正常结构；随后采用丙酮异丙醇超声去除第四光刻胶掩膜层，步骤（5）处理后的样片横截面如图2e所示。
（6）在步骤（5）的基础上，利用负性光刻胶利用普通紫外光刻技术，在样片上形成P电极11和N电极10图案，利用电子蒸镀技术制备Cr/Al/Ti/Au电极，总厚度为1.15um；随后利用60℃丙酮和85℃去胶液进行剥离，形成P电极11和N电极10，所述器件的横截面如图2f所示。
实施例 2
本实施例提出的一种具有环状类Y型电极的微尺寸LED器件，结构如实施例1中的图1和图3所示，只是P电极11的结构不同， P电极11，如图5所示，包括一个圆环状接触环1130与三个类Y型叉；圆环状接触环位于ITO电流扩展层8的中心处；类Y型叉包括一底臂1131以及和底臂1131一端分别连接的第一分叉1132和第二分叉1133，底臂的另一端和圆环状接触环1130连接，三个类Y型叉的底臂在圆环状接触环上均匀分布，类Y型叉之间两两成120°均匀地与圆环状接触环连接，且类Y型叉大小形状完全一致；所述底臂1131、第一分叉1132和第二分叉1133均为直型线条，第一分叉1132和第二分叉1133对称分布在底臂的两侧，分叉角度为60°，第一分叉1132和第二分叉1133的长度相等，第一分叉1132的长度是底臂1131长度的2倍。
实施例 3
本实施例提出的一种具有环状类Y型电极的微尺寸LED器件，其结构和尺寸如实施例1的图1和图3所示，只是P电极11的结构不同，P电极11为环状类Y型电极，包括一个圆环状接触环1160与三个类Y型叉；圆环状接触环1160位于电流扩展层8的中心处，类Y型叉包括一底臂1161以及和底臂一端分别连接的第一分叉1162和第二分叉1163，底臂的另一端和圆环状接触环1160连接，三个类Y型叉的底臂1161在圆环状接触环1160上均匀分布，类Y型叉之间两两成120°均匀地与圆环状接触环连接，且类Y型叉大小形状完全一致；
如图6所示，所述底臂1161为直型线条，第一分叉1162和第二分叉1163均包括一直型线条以及和直型线条连接的圆弧，第一分叉1162和第二分叉1163的直型线条对称分布在底臂的两侧，分叉角度为60°；第一分叉1161的圆弧向第一分叉1161的直型线条的一侧沿着圆弧角度延伸，第二分叉1162的圆弧向第二分叉1163的直型线条的一侧沿着圆弧角度延伸，但圆弧和其他类Y型叉不接触；第一分叉1161的直型线条的长度大于第二分叉1162的直型线条的长度。
以上所述，仅为本发明的较佳实施例而已，并非对本发明做任何形式上的限定。凡本领域的技术人员利用本发明的技术方案对上述实施例作出的任何等同的变动、修饰或演变等，均仍属于本发明技术方案的范围内。

Claims (10)

  1. 一种具有环状类Y型电极的微尺寸LED器件，其特征在于，所述器件包括衬底和衬底上连接的凸台型结构，所述凸台型结构包括凸台下部和凸台上部，凸台上部位于凸台下部之上，凸台上部的横截面积小于凸台下部的横截面积；凸台下部包括从下到上依次排列的缓冲层、未掺杂N型GaN层和第一N-GaN层；凸台上部包括从下到上依次排列分布的第二N-GaN层、多量子阱层、P型AlGaN层和P-GaN层，第一N-GaN层和第二N-GaN层一体成型；凸台下部的上表面连接凸台上部以外的区域连接N电极；凸台上部的上表面连接电流扩展层，电流扩展层上连接P电极，所述P电极为环状类Y型电极，所述环状类Y型电极包括一个圆环状接触环和两个以上类Y型叉，类Y型叉包括一底臂以及和底臂一端分别连接的第一分叉和第二分叉，底臂的另一端和圆环状接触环连接；凸台型结构上除P电极和N电极以外的区域沉积有一层钝化层。
  2. 根据权利要求1所述的具有环状类Y型电极的微尺寸LED器件，其特征在于，所述底臂、第一分叉和第二分叉均为直型线条，第一分叉和第二分叉对称分布在底臂的两侧，分叉角度为30°~120°。
  3. 根据权利要求1所述的具有环状类Y型电极的微尺寸LED器件，其特征在于，所述底臂、第一分叉均为直型线条，第二分叉包括一直型线条以及和直型线条连接的圆弧，第一分叉和第二分叉的直型线条对称分布在底臂的两侧，分叉角度为30°~120°；第二分叉的圆弧向第二分叉的直型线条的一侧沿着圆弧角度延伸，但圆弧和其他类Y型叉不接触；第一分叉的直型线条的长度大于第二分叉的直型线条的长度。
  4. 根据权利要求1所述的具有环状类Y型电极的微尺寸LED器件，其特征在于，所述底臂为直型线条，第一分叉和第二分叉均包括一直型线条以及和直型线条连接的圆弧，第一分叉和第二分叉的直型线条对称分布在底臂的两侧，分叉角度为30°~120°；第一分叉的圆弧向第一分叉的直型线条的一侧沿着圆弧角度延伸，第二分叉的圆弧向第二分叉的直型线条的一侧沿着圆弧角度延伸，但圆弧和其他类Y型叉不接触；第一分叉的直型线条的长度大于第二分叉的直型线条的长度。
  5. 根据权利要求1所述的具有环状类Y型电极的微尺寸LED器件，其特征在于，所述凸台上部和凸台下部为圆柱体结构，凸台上部位于凸台下部的中心处；电流扩展层的面积小于凸台上部的底面面积；凸台上部的底面直径为20um~200um，凸台下部的底面直径比凸台上部的底面直径大30um~50um；P电极位于电流扩展层上表面的中心处；所述N电极为圆环，在圆环的外圆上连接一矩形凸起，凸起位于外圆的径向方向上，凸起的宽度与长度为5um~10um；N电极位于第一N-GaN层上表面的边缘与多量子阱层下表面的边缘之间区域的中心；P电极下方的电流扩展层上表面为粗化结构。
  6. 根据权利要求1所述的具有环状类Y型电极的微尺寸LED器件，其特征在于，电流扩展层为ITO，厚度为100～230nm；所述钝化层为SiO 2或双层介质层，所述双层介质层为从下到上排布的两个折射率不同的介质层组成，且上层介质层的折射率低于下层介质层的折射率；双层介质层为 HfO 2/MgO、HfO 2/SiO 2或MgO/SiO 2； HfO 2/MgO中下层为HfO 2，上层为MgO； HfO 2/SiO 2中下层为HfO 2，上层为SiO 2； MgO/SiO 2中下层为MgO，上层为SiO 2；P电极和N电极为Cr/Al/Ti/Au金属层，金属层的总厚度为1.15um ~1.35um；衬底为蓝宝石材料。
  7. 根据权利要求1所述的具有环状类Y型电极的微尺寸LED器件，其特征在于，环状类Y型电极中的类Y型叉的个数为3、4或5，相应的类Y型叉之间两两成120°、90°或72°均匀地与圆环状接触环连接，且类Y型叉大小形状完全一致。
  8. 制备权利要求1至7任一项所述的具有环状类Y型电极的微尺寸LED器件的方法，其特征在于，包括以下步骤：
    （1）取样片，样片包括从下到上依次排布的衬底，缓冲层、未掺杂N型GaN层和N-GaN层、多量子阱层、P型AlGaN层和P-GaN层，在P-GaN层上制备第一光刻胶掩膜层作为刻蚀凸台型结构的掩膜层，利用ICP干法刻蚀方法从P-GaN层刻蚀至N-GaN层，暴露部分N-GaN层，暴露侧壁的部分N-GaN层构成第二N-GaN层，暴露出部分上表面的N-GaN层构成第一N-GaN层，由此形成凸台上部，然后去除第一光刻胶掩膜层；
    （2）在步骤（1）凸台上部的P-GaN层和凸台下部的第一N-GaN层暴露的部分上表面上结合电子束蒸发镀膜机和快速退火炉制备电流扩展层，并在凸台上部的P-GaN层上的电流扩展层上表面制备第二光刻胶掩膜层，第二光刻胶掩膜层的面积小于凸台上部的上表面面积，在30℃~50℃的酸性溶液中进行湿法腐蚀，pH为3.9～6.1，当电流扩展层外圈小于第二光刻掩膜层大小出现电流扩展层侧腐蚀，去除第二光刻胶掩膜层；
    （3）在步骤（2）中第一N-GaN层暴露的部分上表面以及凸台上部上的P-GaN层和电流扩展层上表面制备第三光刻胶掩膜层，第三光刻胶掩膜层的尺寸大于凸台上部上表面的尺寸，利用ICP干法刻蚀方法从第一N-GaN层刻蚀至衬底，暴露部分衬底形成凸台下部，随后去除第三光刻胶掩膜层；
    （4）在步骤（3）的基础上利用介质薄膜沉积技术沉积钝化层，随后在钝化层上表面形成第四光刻胶掩膜层，第四光刻胶掩膜层在凸台上部上表面以及凸台下部上表面除连接凸台上部以外的区域分别设有开口，利用ICP刻蚀方法和湿法刻蚀方法刻蚀钝化层，将凸台上部上表面的部分电流扩展层以及凸台下部上的部分第一N-GaN层暴露；
    （5）以步骤（4）制备的第四光刻胶掩膜层作为腐蚀电流扩展层的掩膜层，通过湿法腐蚀技术将凸台上部上表面暴露的部分电流扩展层进行粗化，随后去除第四光刻胶掩膜层；
    （6）在步骤（5）的基础上，利用光刻技术和金属剥离技术在步骤（5）中粗化后的电流扩展层上表面制备P电极，在步骤（4）的凸台下部表面制备N电极。
  9. 根据权利要求8所述的制备具有环状类Y型电极的微尺寸LED器件的方法，其特征在于，光刻胶掩膜层3是单层光刻胶、双层光刻胶的一种；双层光刻胶的制备方法为：先将步骤（2）处理后的样片进行预烘、匀胶、烘烤形成单层光刻胶，再次匀胶、烘烤形成第二层光刻胶；步骤（5）中湿法腐蚀前先将光刻胶掩膜层4坚膜3～6分钟。
  10. 根据权利要求9所述的制备具有环状类Y型电极的微尺寸LED器件的方法，其特征在于，步骤（2）中的电流扩展层采用电子束蒸发镀膜机蒸镀，随后快速退火炉中退火，条件为200～250sccm N 2和30～50sccm O 2的氛围下，以500～600℃的温度退火3～5分钟；步骤（5）中的粗化电流扩展层是指将电流扩展层在30℃~50℃的ITO腐蚀液中腐蚀2~5分钟， ITO腐蚀液为酸性溶液，pH为3.9～6.1。
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