WO2021000386A1 - 显示面板及其制备方法 - Google Patents

显示面板及其制备方法 Download PDF

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Publication number
WO2021000386A1
WO2021000386A1 PCT/CN2019/101358 CN2019101358W WO2021000386A1 WO 2021000386 A1 WO2021000386 A1 WO 2021000386A1 CN 2019101358 W CN2019101358 W CN 2019101358W WO 2021000386 A1 WO2021000386 A1 WO 2021000386A1
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Prior art keywords
area
display panel
pixel
electrode
light
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PCT/CN2019/101358
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English (en)
French (fr)
Inventor
周芬
唐甲
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深圳市华星光电半导体显示技术有限公司
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Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to US16/609,225 priority Critical patent/US10964764B2/en
Publication of WO2021000386A1 publication Critical patent/WO2021000386A1/zh

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/1201Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/122Pixel-defining structures or layers, e.g. banks

Definitions

  • the invention relates to the field of display, in particular to a display panel and a preparation method thereof.
  • AMOLED active-matrix organic light-emitting
  • the material of the spacer has a specific pinning point (Pinning Point).
  • Pinning Point As shown in FIG. 1, when ink (ie, organic light-emitting material) is printed in the isolation column 10 (first limit), and then coated and baked, the ink will climb within the gradient of the isolation column.
  • area B in FIG. 1 is a climbing area
  • area A is a normal light-emitting display area.
  • the height of the climb is related to the pinning point, so the ink thickness in the light-emitting area will be uneven, that is, the middle is thin and the two sides are thick. This problem will cause uneven light emission at the edge of the pixel and the middle. That is, the area A emits bright light, and the area B emits darker light. This is because the currents in the A area and the B area are different and the brightness is different.
  • the object of the present invention is to provide a display panel and a method for manufacturing the same.
  • the process of separately manufacturing the dam is omitted, and the production time can be reduced.
  • the manufacturing cost, and the light emission of the pixel area is uniform, and the stability of the display panel is improved.
  • the present invention provides a display panel including: an array substrate having a plurality of pixel areas, the pixel area includes a light-emitting area and a limited area surrounding the light-emitting area; a first electrode provided on the array substrate; a plurality of pixels A defining block is provided on the side of the first electrode away from the array substrate; wherein the pixel defining block includes an isolation column and a bank; the isolation column corresponds to a gap between adjacent pixel regions, and the bank corresponds to the The defined area of the pixel area.
  • the cross-sectional shape of the isolation column is a trapezoid with a narrow top and a wide bottom; and the material of the pixel defining block is a hydrophobic organic photoresist.
  • an organic functional layer which is arranged on the first electrode corresponding to the light-emitting area and surrounded by the dam.
  • the first electrode is an anode, and its material is indium tin oxide.
  • the array substrate includes: a substrate; a thin film transistor layer provided on the substrate; a passivation layer provided on the side of the thin film transistor layer away from the substrate; a planarization layer provided on the passivation layer The side of the oxidization layer away from the thin film transistor layer.
  • the first electrode penetrates the planarization layer and the passivation layer to the thin film transistor layer.
  • the present invention also provides a method for manufacturing a display panel, including the following steps: providing an array substrate with a plurality of pixel areas and a halftone mask, the pixel area including a light-emitting area and a limited area surrounding the light-emitting area; Forming a first electrode on the array substrate; coating a layer of photoresist on the side of the first electrode away from the array substrate; placing the halftone mask above the photoresist; irradiating Ultraviolet rays pass through the halftone mask to the surface of the photoresist; drop a developer on the photoresist and correspond to the pixel area to form a groove exposed on the surface of the first electrode, and A pixel defining block is formed at the photoresist where no developer is dropped.
  • the pixel defining block includes an isolation column and a bank; the isolation column corresponds to the gap between adjacent pixel regions, and the bank corresponds to the pixel region Defined area; inkjet printing an organic functional layer on the first electrode in the groove.
  • the halftone mask includes an opaque area, a fully transparent area, and a semi-transparent area.
  • the opaque area corresponds to the gap between adjacent pixel areas; the fully transparent area corresponds to the light-emitting area; the semi-transmissive area corresponds to the limited area, and the transmittance of the semi-transmissive area It is 15% ⁇ 50%.
  • the groove has a groove bottom and a peripheral wall surrounding the groove bottom, and the dam is attached to the groove bottom and the peripheral wall.
  • the present invention provides a display panel and a manufacturing method thereof.
  • the process of separately manufacturing the dam is omitted, and the manufacturing time and manufacturing cost can be reduced.
  • the organic functional layer above the dam does not directly contact the first electrode.
  • the dam structure causes the restricted area to be disconnected from the first electrode, and the restricted area does not have The current passes, so the limited area does not emit light, and the light emission of the pixel area is uniform.
  • the dam material is an organic photoresist, and thus no hydrogen and oxygen elements are introduced. Therefore, it will not affect the thin film transistor of the present invention, so the stability of the display panel of the present invention is improved.
  • FIG. 1 is a schematic diagram of the structure of an isolation column used in a display panel of the prior art
  • Figure 2 is a graph of the life span of a prior art display panel
  • FIG. 3 is a schematic diagram of a structure of a display panel in the prior art forming a double-limiting isolation column
  • FIG. 4 is a schematic diagram of the structure of the display panel provided by the present invention.
  • Figure 5 is a plan view of a pixel area provided by the present invention.
  • FIG. 6 is a schematic diagram of the structure of the mask plate provided by the present invention.
  • FIG. 7 is a schematic diagram of the structure of the display panel developed by the present invention.
  • FIG. 8 is a circuit diagram of a pixel area provided by the present invention.
  • Organic functional layer 108 substrate 101; thin film transistor layer 102;
  • Passivation layer 103 planarization layer 104; isolation pillar 1071;
  • the present invention provides a display panel 100, including: an array substrate 105, a first electrode 106, a plurality of pixel defining blocks 107, and an organic functional layer 108.
  • the array substrate 105 has a plurality of pixel regions 110, and only one of the pixel regions 110 is shown in FIG. 4.
  • a gap 120 is provided between adjacent pixel areas 110; the pixel area 110 includes a light-emitting area 1101 and a limited area 1102 surrounding the light-emitting area 1101;
  • the array substrate 105 includes a substrate 101, a thin film transistor layer 102, a passivation layer 103 and a planarization layer 104.
  • the substrate 101 is a flexible substrate, and its material is polyimide, and the polyimide material is used to make the substrate 101 have flexibility.
  • the thin film transistor layer 102 is disposed on the substrate 101; the thin film transistor layer is an oxide thin film transistor. More specifically, the thin film transistor layer includes a first metal layer and a second metal layer; the first metal layer is used to form gate wiring, and the second metal layer is used to form source and drain wiring.
  • the passivation layer 103 is provided on the side of the thin film transistor layer 102 away from the substrate 101; the planarization layer 104 is provided on the side of the passivation layer 103 away from the thin film transistor layer 102.
  • the first electrode 106 is disposed on the array substrate 105; the first electrode 106 is an anode, and its material is indium tin oxide.
  • the first electrode 106 penetrates the planarization layer 104 and the passivation layer 103 to the thin film transistor layer 102, especially penetrates to the second metal layer of the thin film transistor layer 102, that is, the first The electrode 106 is electrically connected to the thin film transistor layer.
  • the thin film transistor layer can drive the organic functional layer 108 to emit light through the first electrode 106.
  • the pixel defining block 107 is disposed on a side of the first electrode 106 away from the array substrate 105.
  • the pixel defining block 107 includes an isolation column 1071 and a bank 1072; the isolation column 1071 corresponds to the gap 120 between adjacent pixel regions 110, and the bank 1072 corresponds to the limited region 1102 of the pixel region 110.
  • the cross-sectional shape of the isolation column 1071 is a trapezoid with a narrow top and a wide bottom; the material of the pixel defining block 107 is an organic photoresist.
  • the organic functional layer 108 is disposed on the first electrode 106 corresponding to the light-emitting area 1101 and is surrounded by the embankment 1072; there is also a part of the organic functional layer 108 above the embankment 1072, but due to the effect of the embankment 1072 In this structure, the organic functional layer 108 above the dam 1072 does not directly contact the first electrode 106, so the limited area 1102 does not emit light, and the pixel area 110 emits uniform light.
  • the material of the dam 1072 is an organic photoresist, and thus no hydrogen and oxygen elements are introduced, and therefore, it will not affect the thin film transistor of the present invention.
  • the present invention also provides a method for manufacturing a display panel, including the following steps:
  • an array substrate 105 having a plurality of pixel areas 110 and a halftone mask 200 are provided.
  • the pixel area 110 includes a light-emitting area 1101 and a limited area 1102 surrounding the light-emitting area 1101.
  • the halftone mask 200 includes an opaque area 220, a fully transparent area 210 and a semi-transmissive area 230.
  • the opaque area 220 corresponds to the gap 120 between the adjacent sub-pixel areas 110; the fully transparent area 210 corresponds to the light-emitting area 1101; the semi-transmissive area 230 corresponds to the limited area 1102, and the semi-transparent area
  • the transmittance of the light zone 230 is 15% ⁇ 50%.
  • the first electrode 106 is an anode, and its material is indium tin oxide.
  • the first electrode 106 is electrically connected to the thin film transistor layer of the array substrate 105.
  • the developer is dripped on the photoresist 130 corresponding to the pixel area 110 to form a photoresist exposed on the surface of the first electrode 106 without dripping the developer.
  • a pixel defining block 107 is formed.
  • the pixel defining block 107 includes an isolation column 1071 and a bank 1072; the isolation column 1071 corresponds to the gap 120 between adjacent pixel regions 110, and the bank 1072 corresponds to the limited region 1102 of the pixel region 110;
  • the groove 140 has a groove bottom and a peripheral wall surrounding the groove bottom, and the dam 1072 is attached to the groove bottom and the peripheral wall.
  • the organic functional layer 108 above the dam 1072 does not directly contact the first electrode 106, as shown in FIG. 8, in the equivalent circuit of the pixel region 110 of the present invention
  • the structure of the dam 1072 causes the restricted area 1102 to be disconnected from the first electrode 106, and no current flows through the restricted area 1102. Therefore, the restricted area 1102 does not emit light, and the pixel area 110 emits uniformly.
  • the material of the bank 1072 is an organic photoresist, and thus no hydrogen and oxygen elements are introduced. Therefore, it will not affect the thin film transistor of the present invention, so the stability of the display panel 100 of the present invention is improved.
  • the process of making the dam 1072 separately is omitted during production, which can reduce the production time and production cost. .

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一种显示面板(100),包括:具有多个像素区(110)的阵列基板(105),设于阵列基板(105)上的第一电极(106),设于第一电极(106)远离阵列基板(105)一侧的多个像素限定块(107)。像素区(110)包括发光区(1101)以及围绕发光区(1101)的限定区(1102)。像素限定块(107)包括隔离柱(1071)以及堤坝(1072)。隔离柱(1071)对应相邻像素区(110)的间隙(120),堤坝(1072)对应像素区(110)的限定区(1102)。还公开了显示面板(100)的制备方法。该显示面板(100)发光均匀,稳定性高,制作时间短,成本低。

Description

显示面板及其制备方法 技术领域
本发明涉及显示领域,尤其是涉及一种显示面板及其制备方法。
背景技术
目前主要通过喷墨打印技术制备有源矩阵有机发光二极体(Active-matrix organic light-emitting,AMOLED)显示屏。在制备的时候,由于隔离柱的材料具有特定的钉扎点(Pinning Point)。如图1所示,当墨水(即有机发光材料)打印在隔离柱10(第一限定)内,再进行涂布和烘烤之后,墨水在隔离柱坡度内会有一定的爬升。
技术问题
例如图1中的B区域为爬升区域,A区域为正常发光显示区。爬升的高度与钉扎点相关,因此会导致发光区墨水厚度会出现不均匀的现象,即中间薄两边偏厚,这种问题会造成像素边缘发光与中间发光不均。即A区域发光明亮,B区域发光较灰暗,这是由于A区域与B区域的电流不同导致亮度不同。这种像素发光不均匀性同时会导致整个像素区AMOLED的发光寿命衰减(如图2所示,曲线11为正常曲线,曲线12为具有B区的曲线,随着时间的延长,曲线12的衰减较相较于曲线11下降50%)。如图3所示,目前现有技术解决这种问题的方式是增加一道制程,即气相沉积一氧化硅层13作为第二限定材料(工业内称双限定隔离柱),利用黄光制程把边缘膜厚较厚的部分发光去除掉,从而改善像素发光不均和寿命问题,但制程增加后与原薄膜晶体管相比,引入了新的如氢元素,氧元素含量,这样会导致对氧化物薄膜晶体管电性影响风险。
因此,急需提供一种新的显示面板,用以解决像素发光不均匀的问题,提高显示面板的稳定性。
技术解决方案
本发明的目的在于,提供一种显示面板及其制备方法通过将所述隔离柱以及堤坝结构通过半色调掩膜版一次曝光形成像素限定块,省略了单独制作堤坝的流程,进而可以减少制作时间以及制作成本,并且所述像素区的发光均匀,显示面板的稳定性提高。
本发明提供一种显示面板包括:阵列基板,具有多个像素区,所述像素区包括发光区以及围绕所述发光区的限定区;第一电极,设于所述阵列基板上;多个像素限定块,设于所述第一电极远离所述阵列基板的一侧;其中,所述像素限定块包括隔离柱以及堤坝;所述隔离柱对应相邻像素区的间隙,所述堤坝对应所述像素区的限定区。
进一步地,所述隔离柱的截面形状为上窄下宽的梯形;所述像素限定块的材料为疏水性的有机光阻。
进一步地,还包括:有机功能层,设于对应所述发光区的第一电极上且被所述堤坝围绕。
进一步地,所述第一电极为阳极,其材料为氧化铟锡。
进一步地,所述阵列基板包括:基板;薄膜晶体管层,设于所述基板上;钝化层,设于所述薄膜晶体管层远离所述基板的一侧;平坦化层,设于所述钝化层远离所述薄膜晶体管层的一侧。
进一步地,所述第一电极贯穿所述平坦化层以及所述钝化层直至所述薄膜晶体管层。
本发明还提供一种显示面板的制备方法,包括如下步骤:提供一具有多个像素区的阵列基板以及半色调掩膜板,所述像素区包括发光区以及围绕所述发光区的限定区;形成一第一电极于所述阵列基板上;涂覆一层光阻于所述第一电极远离所述阵列基板的一侧;将所述半色调掩膜板设于所述光阻上方;照射紫外线穿过所述半色调掩膜板至所述光阻表面;通过滴加显影液于所述光阻且对应所述像素区处,形成一显露于所述第一电极表面的凹槽,而在并未滴加显影液的光阻处则形成像素定限定块,所述像素限定块包括隔离柱以及堤坝;所述隔离柱对应相邻像素区的间隙,所述堤坝对应所述像素区的限定区;喷墨打印一有机功能层于所述凹槽中的第一电极上。
进一步地,所述半色调掩膜板包括不透光区、全透光区以及半透光区。
进一步地,所述不透光区对应相邻像素区的间隙;所述全透光区对应所述发光区;所述半透光区对应所述限定区,所述半透光区透过率为15%~50%。
进一步地,所述凹槽具有一槽底以及围绕所述槽底的周壁,所述堤坝贴附所述槽底以及所述周壁。
有益效果
本发明提供一显示面板及其制备方法,通过将所述隔离柱以及堤坝结构通过半色调掩膜版一次曝光形成像素限定块,省略了单独制作堤坝的流程,进而可以减小制作时间以及制作成本。由于所述堤坝的结构,所述堤坝上方的有机功能层并不会直接与所述第一电极接触,所述堤坝结构导致限定区与所述第一电极断开,所述限定区不会有电流通过,因此限定区域不会发光,进而所述像素区的发光均匀。并且所述堤坝材料为有机光阻,进而不会引入氢元素以及氧元素,因此,不会对本发明的薄膜晶体管造成影响,因此本发明的显示面板的稳定性提高。
附图说明
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为现有技术显示面板采用的隔离柱的结构示意图;
图2为现有技术显示面板寿命的坐标图;
图3为现有技术显示面板形成双限定隔离柱的结构示意图;
图4为本发明提供的显示面板的结构示意图;
图5为本发明提供的像素区的平面图;
图6为本发明提供的掩膜板光照的结构示意图;
图7为本发明提供的显示面板显影的结构示意图;
图8为本发明提供的像素区的电路图;
显示面板100;半色调掩膜板200;
阵列基板105;第一电极106;像素限定块107;
有机功能层108;基板101;薄膜晶体管层102;
钝化层103;平坦化层104;隔离柱1071;
堤坝1072;像素区110;间隙120;
发光区1101;限定区1102;不透光区220;
全透光区210;半透光区230;光阻130;
凹槽140;紫外线30。
本发明实施方式
以下是各实施例的说明是参考附加的图式,用以例示本发明可以用实施的特定实施例。本发明所提到的方向用语,例如上、下、前、后、左、右、内、外、侧等,仅是参考附图式的方向。本发明提到的元件名称,例如第一、第二等,仅是区分不同的元部件,可以更好的表达。在图中,结构相似的单元以相同标号表示。
本文将参照附图来详细描述本发明的实施例。本发明可以表现为许多不同形式,本发明不应仅被解释为本文阐述的具体实施例。本发明提供实施例是为了解释本发明的实际应用,从而使本领域其他技术人员能够理解本发明的各种实施例和适合于特定预期应用的各种修改方案。
如图4和5所示,本发明提供一种显示面板100,包括:阵列基板105、第一电极106、多个像素限定块107以及有机功能层108。
所述阵列基板105具有多个像素区110,图4中仅表现出其中一个像素区110。相邻的像素区110之间设有一间隙120;所述像素区110包括发光区1101以及围绕所述发光区1101的限定区1102;
所述阵列基板105包括:基板101、薄膜晶体管层102、钝化层103以及平坦化层104。
所述基板101为柔性基板,其材料为聚酰亚胺,所述聚酰亚胺材料用以使所述基板101具有柔性特点。
所述薄膜晶体管层102设于所述基板101上;所述薄膜晶体管层为氧化物薄膜晶体管。更具体地讲,所述薄膜晶体管层包括第一金属层以及第二金属层;所述第一金属层用以形成栅极走线,所述第二金属层用以形成源漏极走线。
所述钝化层103设于所述薄膜晶体管层102远离所述基板101的一侧;所述平坦化层104设于所述钝化层103远离所述薄膜晶体管层102的一侧。
所述第一电极106设于所述阵列基板105上;所述第一电极106为阳极,其材料为氧化铟锡。
所述第一电极106贯穿所述平坦化层104以及所述钝化层103直至所述薄膜晶体管层102,尤其是贯穿至所述薄膜晶体管层102的第二金属层上,即所述第一电极106电性连接所述薄膜晶体管层。
这样所述薄膜晶体管层可以通过第一电极106驱动所述有机功能层108发光显示。
所述像素限定块107设于所述第一电极106远离所述阵列基板105的一侧。
所述像素限定块107包括隔离柱1071以及堤坝1072;所述隔离柱1071对应相邻像素区110之间的间隙120,所述堤坝1072对应所述像素区110的限定区1102。
所述隔离柱1071的截面形状为上窄下宽的梯形;所述像素限定块107的材料为有机光阻。
所述有机功能层108设于对应所述发光区1101的第一电极106上且被所述堤坝1072围绕;在所述堤坝1072的上方也具有部分有机功能层108,但由于所述堤坝1072的结构,所述堤坝1072上方的有机功能层108并不会直接与所述第一电极106接触,因此限定区1102不会发光,进而所述像素区110的发光均匀。所述堤坝1072材料为有机光阻,进而不会引入氢元素以及氧元素,因此,不会对本发明的薄膜晶体管造成影响。
本发明还提供一种显示面板的制备方法,包括如下步骤:
S1)如图6所示,提供一具有多个像素区110的阵列基板105以及半色调掩膜板200,所述像素区110包括发光区1101以及围绕所述发光区1101的限定区1102。
所述半色调掩膜板200包括不透光区220、全透光区210以及半透光区230。
所述不透光区220对应相邻子像素区110的间隙120;所述全透光区210对应所述发光区1101;所述半透光区230对应所述限定区1102,所述半透光区230透过率为15%~50%。
S2)形成一第一电极106于所述阵列基板105上;所述第一电极106为阳极,其材料为氧化铟锡。
所述第一电极106电性连接所述阵列基板105的薄膜晶体管层。
S3)涂覆一层正性光阻130于所述第一电极106远离所述阵列基板105的一侧;
S4)将所述半色调掩膜板200设于所述光阻130上方;
S5)照射紫外线30穿过所述半色调掩膜板200至所述光阻130表面;所述紫外线30的从所述半色调掩膜板200远离所述显示面板100的一侧射出。穿过所述全透光区210以及所述半透光区230直至所述光阻130表面。
S6)如图7所示,滴加显影液于对应所述像素区110的光阻130上,形成一显露于所述第一电极106表面凹槽140,而并未滴加显影液的光阻130处则形成一像素限定块107。
所述像素限定块107包括隔离柱1071以及堤坝1072;所述隔离柱1071对应相邻像素区110的间隙120,所述堤坝1072对应所述像素区110的限定区1102;
所述凹槽140具有一槽底以及围绕所述槽底的周壁,所述堤坝1072贴附所述槽底以及所述周壁。
S7)喷墨打印一有机功能层108于所述凹槽140中的第一电极106上。但是在喷墨的时候在所述堤坝1072的上方也具有部分有机功能层108。
但由于所述堤坝1072的结构,所述堤坝1072上方的有机功能层108并不会直接与所述第一电极106接触,如图8所示,在本发明的像素区110的等效电路中,所述于堤坝1072结构导致限定区1102与所述第一电极106断开,不会有电流通过所述限定区1102,因此限定区1102域不会发光,进而所述像素区110的发光均匀。并且所述堤坝1072材料为有机光阻,进而不会引入氢元素以及氧元素,因此,不会对本发明的薄膜晶体管造成影响,因此本发明的显示面板100的稳定性提高。在制作的时候省略了单独制作堤坝1072的流程,进而可以减小制作时间以及制作成本。。
本发明的技术范围不仅仅局限于所述说明中的内容,本领域技术人员可以在不脱离本发明技术思想的前提下,对所述实施例进行多种变形和修改,而这些变形和修改均应当属于本发明的范围内。

Claims (10)

  1. 一种显示面板,其中,包括:
    阵列基板,具有多个像素区,所述像素区包括发光区以及围绕所述发光区的限定区;
    第一电极,设于所述阵列基板上;
    多个像素限定块,设于所述第一电极远离所述阵列基板的一侧;
    其中,所述像素限定块包括隔离柱以及堤坝;所述隔离柱对应相邻像素区的间隙,所述堤坝对应所述像素区的限定区。
  2.     根据权利要求1所述的显示面板,其中,
    所述隔离柱的截面形状为上窄下宽的梯形;
    所述像素限定块的材料为疏水性的有机光阻。
  3.     根据权利要求1所述的显示面板,其中,还包括:
    有机功能层,设于对应所述发光区的第一电极上且被所述堤坝围绕。
  4.     根据权利要求1所述的显示面板,其特征在于,
    所述第一电极为阳极,其材料为氧化铟锡。
  5.     根据权利要求1所述的显示面板,其中,
    所述阵列基板包括:
    基板;
    薄膜晶体管层,设于所述基板上;
    钝化层,设于所述薄膜晶体管层远离所述基板的一侧;
    平坦化层,设于所述钝化层远离所述薄膜晶体管层的一侧。
  6.     根据权利要求5所述的显示面板,其中,
    所述第一电极贯穿所述平坦化层以及所述钝化层直至所述薄膜晶体管层。
  7.     一种显示面板的制备方法,其中,包括如下步骤:
    提供一具有多个像素区的阵列基板以及半色调掩膜板,所述像素区包括发光区以及围绕所述发光区的限定区;
    形成一第一电极于所述阵列基板上;
    涂覆一层光阻于所述第一电极远离所述阵列基板的一侧;
    将所述半色调掩膜板设于所述光阻上方;
    照射紫外线穿过所述半色调掩膜板至所述光阻表面;
    通过滴加显影液于所述光阻且对应所述像素区处,形成一显露于所述第一电极表面的凹槽,而在并未滴加显影液的光阻处则形成像素定限定块,所述像素限定块包括隔离柱以及堤坝;所述隔离柱对应相邻像素区的间隙,所述堤坝对应所述像素区的限定区;
    喷墨打印一有机功能层于所述凹槽中的第一电极上。
  8.     根据权利要求7所述的显示面板的制备方法,其中,
    所述半色调掩膜板包括不透光区、全透光区以及半透光区。
  9.     根据权利要求8所述的显示面板的制备方法,其中,
    所述不透光区对应相邻像素区的间隙;
    所述全透光区对应所述发光区;
    所述半透光区对应所述限定区,所述半透光区透过率为15%~50%。
  10.   根据权利要求7所述的显示面板的制备方法,其中,
    所述凹槽具有一槽底以及围绕所述槽底的周壁,所述堤坝贴附所述槽底以及所述周壁。
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