WO2020248580A1 - Cellule de silicium monocristallin présentant une surface spécifique accrue et son procédé de texturation - Google Patents

Cellule de silicium monocristallin présentant une surface spécifique accrue et son procédé de texturation Download PDF

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Publication number
WO2020248580A1
WO2020248580A1 PCT/CN2019/129546 CN2019129546W WO2020248580A1 WO 2020248580 A1 WO2020248580 A1 WO 2020248580A1 CN 2019129546 W CN2019129546 W CN 2019129546W WO 2020248580 A1 WO2020248580 A1 WO 2020248580A1
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WIPO (PCT)
Prior art keywords
grooves
surface area
texturing
specific surface
increased specific
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PCT/CN2019/129546
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English (en)
Chinese (zh)
Inventor
张元秋
谢毅
杨蕾
王岚
洪布双
张鹏
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通威太阳能（安徽）有限公司
通威太阳能（成都）有限公司
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Publication of WO2020248580A1 publication Critical patent/WO2020248580A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0236—Special surface textures
    • H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the invention relates to the technical field of photovoltaic cells, in particular to a monocrystalline silicon cell with an increased specific surface area and a texturing method thereof.
  • the conventional production process of monocrystalline silicon cells mainly includes: texturing-diffusion-etching-annealing-front SiNx coating-screen printing-sintering-sorting. In this process, a few steps are added, such as back passivation coating, back Coating, laser grooving, etc., with slight adjustments to some of these processes, can be made into high-efficiency batteries such as PERC, PERC+SE, and double-sided PERC+SE. Texturing is an indispensable step for conventional monocrystalline cells or PERC+ high-efficiency monocrystalline cells.
  • the conventionally used single crystal texturing method is alkali texturing.
  • the process steps are divided into: 1 lye initial polishing to remove the damage left by the wafer cutting; 2 pre-cleaning to remove impurities and dirt on the surface of the silicon wafer; 3 Texturing to form a pyramid; 4Alkaline washing to remove dirt; 5Pickling to remove residual alkali while removing the surface oxide layer and metal ions; 6Cleaning and drying; this conventional method will finally form on the surface of the flat silicon wafer
  • the densely arranged pyramid suede as shown in Figure 1 of the specification.
  • the surface area of the silicon wafer is limited, so the number of pyramids formed is limited. In the end, only a certain surface area can be obtained, and no more pyramids can be obtained.
  • the size and height of the pyramids are usually optimized to increase the production. The surface area after velvet, but the optimization process is more complicated, resulting in the short-circuit current of the cell and the cell conversion efficiency can not be further improved, which affects the progress of the photovoltaic industry.
  • the purpose of the present invention is to provide a single crystal silicon cell with an increased specific surface area and a method for making the same to solve the above-mentioned problems in the background art.
  • a single crystal silicon cell chip with an increased specific surface area comprising a silicon chip.
  • the surface of the silicon chip is provided with a number of grooves.
  • the surfaces of the silicon chip are provided with pyramid fleece where grooves are provided and where the grooves are not provided. ⁇ Surface structure.
  • the groove shape of the groove is any one of triangle, circle, square, rhombus and polygon.
  • the center distance between two adjacent grooves is controlled to be 40-500 ⁇ m.
  • the area of the groove is controlled within 200-20000 ⁇ m 2 .
  • the depth of the groove is controlled to be 2-15 ⁇ m.
  • a texturing method for monocrystalline silicon cell wafers with increased specific surface area Before texturing the silicon wafers, single-sided laser grooving is performed to form a number of grooves on the surface of the wafer, and the grooves are equilateral triangles Distribution, the center distance between any two adjacent grooves is equal;
  • the texturing is then carried out, forming a pyramidal suede structure in both the grooves and the flat areas where the laser is not grooved.
  • the present invention by regularly slotting the surface of the silicon wafer before texturing, more pyramid suede structures and a larger surface area can be obtained, and the shape, arrangement and size of the grooves can be controlled by special parameters.
  • the ratio requirement further increases the PN junction area, thereby further increasing the Isc short-circuit current, and finally achieving the purpose of improving the battery conversion efficiency. It is very practical and worthy of promotion.
  • Figure 1 is a schematic diagram of the surface structure of a silicon wafer prepared by using the prior art
  • Figure 2 is a schematic diagram of the surface structure of a silicon wafer prepared by the method of the present invention.
  • Fig. 3 is a schematic structural diagram of a circular groove design for the groove in the specific embodiment of the present invention.
  • a monocrystalline silicon cell chip with an increased specific surface area comprising a silicon chip 1, a surface of the silicon chip 1 is provided with a plurality of grooves 2, and the surface of the silicon chip 1 is provided with grooves 2 and not provided with grooves 2 Pyramid suede structure 12 is provided everywhere.
  • a texturing method for monocrystalline silicon cell wafers with an increased specific surface area Before texturing the silicon wafer 1, single-sided laser grooving is performed to form a certain number, composition, and depth on the surface of the silicon wafer 1 Groove 2, the groove shape of groove 2 is any one of triangle, circle, square, rhombus and polygon. The area of groove 2 is controlled within 200-20000 ⁇ m 2 , and the depth of groove 2 is controlled within 2-15 ⁇ m , A number of grooves 2 are distributed in an equilateral triangle, the center distance between any two adjacent grooves 2 is equal, and the center distance between two adjacent grooves 2 is controlled within 40-500 ⁇ m.
  • the pyramid texture 12 is formed in the groove 2 and the flat area where the laser is not grooved.
  • the side where the groove 2 is present is the front side.
  • a single-sided laser grooving is performed on the silicon wafer 1 to form grooves 2 on the surface of the silicon wafer 1.
  • the grooves 2 are distributed in an equilateral triangle, and the area of each groove 2 is within 400 ⁇ m2, as shown in Figure 3 As shown, the dotted line constitutes an equilateral triangle.
  • the shape of the groove 2 is circular as an example. The distance between any two adjacent grooves 2 is equal, and the center distance of two adjacent grooves 2 is in the range of 50 ⁇ m.
  • Pyramid 12 is formed in both the groove 2 and the flat area where the laser is not hit. In the subsequent process, the side where the groove 2 exists is the front side.
  • the structure of silicon wafer 1 shown in Figure 1 of the specification the conventional texturing process single-sided etching depth is controlled at 3-7 ⁇ m, in order to avoid the obvious difference between the height of the groove 2 and the flat area without laser after texturing, the groove 2
  • the depth range is 10 ⁇ m.
  • laser grooving will inevitably cause certain damage to the surface of the silicon wafer 1.
  • the damage caused by the laser can be removed at the same time.
  • Comparative group the silicon wafer 1 was textured by the conventionally used single crystal texturing method in the background technology to obtain the structure of the silicon wafer 1 as shown in Figure 1 of the specification, and the electrical performance of the silicon wafer 1 was tested;
  • Example group the silicon wafer 1 was texturized using the method in the first embodiment, and the equipment and texturing liquid used for texturing were exactly the same as those of the comparison group, and the structure of the silicon wafer 1 as shown in Figure 2 of the specification was obtained. , And conduct electrical performance test on silicon wafer 1.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Photovoltaic Devices (AREA)
  • Weting (AREA)

Abstract

L'invention concerne une cellule de silicium monocristallin présentant une surface spécifique accrue, la cellule de silicium monocristallin comprenant une tranche de silicium (1), une surface de la tranche de silicium (1) étant pourvue de plusieurs rainures (2), et la surface de la tranche de silicium (1) étant pourvue de structures pyramidales texturées (12) se trouvant au niveau des rainures (2) et au niveau des parties où il n'y a pas de rainures (2). Selon un procédé de texturation de la cellule de silicium monocristallin présentant une surface spécifique accrue, les multiples rainures (2) sont formées sur la surface de la tranche de silicium (1), et les multiples rainures (2) sont réparties en un triangle équilatéral, ayant des distances égales entre les centres de deux rainures adjacentes quelconques (2) ; et après la texturation, les structures pyramidales texturées (12) sont formées au niveau des rainures (2) et au niveau de zones planes où le rainurage au laser n'est pas effectué. Au moyen de la formation de rainures régulières sur la surface de la tranche de silicium (1) avant la texturation, des structures pyramidales plus texturées (12) et une surface plus grande peuvent être obtenues, de manière à augmenter davantage la zone de jonction P-N et à améliorer encore le courant de court-circuit Isc, ce qui permet d'obtenir finalement l'objectif d'amélioration de l'efficacité de conversion de batterie.
PCT/CN2019/129546 2019-06-10 2019-12-28 Cellule de silicium monocristallin présentant une surface spécifique accrue et son procédé de texturation WO2020248580A1 (fr)

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CN201910495610.6A CN110137283A (zh) 2019-06-10 2019-06-10 一种增大比表面积的单晶硅电池片及其制绒方法
CN201910495610.6 2019-06-10

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CN110137283A (zh) * 2019-06-10 2019-08-16 通威太阳能（安徽）有限公司 一种增大比表面积的单晶硅电池片及其制绒方法
CN111092136A (zh) * 2020-01-07 2020-05-01 浙江爱旭太阳能科技有限公司 一种降低反射率的单晶太阳能电池制备方法
CN111799339A (zh) * 2020-06-29 2020-10-20 韩华新能源（启东）有限公司 适用于太阳能电池的硅片的表面处理方法
CN111933754A (zh) * 2020-08-14 2020-11-13 孙鹏 一种n型多晶硅太阳能电池及其制造方法
CN112466968A (zh) * 2020-11-18 2021-03-09 隆基绿能科技股份有限公司 一种光伏电池及光伏组件
CN113314626A (zh) * 2021-05-26 2021-08-27 江苏润阳世纪光伏科技有限公司 一种太阳能电池片的制造方法
CN114361273A (zh) * 2021-12-03 2022-04-15 宁夏隆基乐叶科技有限公司 硅片及其制备方法和太阳能电池
CN116978960B (zh) * 2023-09-22 2024-01-09 金阳(泉州)新能源科技有限公司 一种高转换效率的背接触太阳能电池及其制备方法和组件
CN117038799A (zh) * 2023-10-07 2023-11-10 正泰新能科技有限公司 一种bc电池制备方法及bc电池

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