WO2020248580A1 - Monocrystalline silicon cell with increased specific surface area and texturing method therefor - Google Patents

Monocrystalline silicon cell with increased specific surface area and texturing method therefor Download PDF

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WO2020248580A1
WO2020248580A1 PCT/CN2019/129546 CN2019129546W WO2020248580A1 WO 2020248580 A1 WO2020248580 A1 WO 2020248580A1 CN 2019129546 W CN2019129546 W CN 2019129546W WO 2020248580 A1 WO2020248580 A1 WO 2020248580A1
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grooves
surface area
texturing
specific surface
increased specific
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Chinese (zh)
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张元秋
谢毅
杨蕾
王岚
洪布双
张鹏
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通威太阳能（安徽）有限公司
通威太阳能（成都）有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0236—Special surface textures
    • H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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  • the invention relates to the technical field of photovoltaic cells, in particular to a monocrystalline silicon cell with an increased specific surface area and a texturing method thereof.
  • the conventional production process of monocrystalline silicon cells mainly includes: texturing-diffusion-etching-annealing-front SiNx coating-screen printing-sintering-sorting. In this process, a few steps are added, such as back passivation coating, back Coating, laser grooving, etc., with slight adjustments to some of these processes, can be made into high-efficiency batteries such as PERC, PERC+SE, and double-sided PERC+SE. Texturing is an indispensable step for conventional monocrystalline cells or PERC+ high-efficiency monocrystalline cells.
  • the conventionally used single crystal texturing method is alkali texturing.
  • the process steps are divided into: 1 lye initial polishing to remove the damage left by the wafer cutting; 2 pre-cleaning to remove impurities and dirt on the surface of the silicon wafer; 3 Texturing to form a pyramid; 4Alkaline washing to remove dirt; 5Pickling to remove residual alkali while removing the surface oxide layer and metal ions; 6Cleaning and drying; this conventional method will finally form on the surface of the flat silicon wafer
  • the densely arranged pyramid suede as shown in Figure 1 of the specification.
  • the surface area of the silicon wafer is limited, so the number of pyramids formed is limited. In the end, only a certain surface area can be obtained, and no more pyramids can be obtained.
  • the size and height of the pyramids are usually optimized to increase the production. The surface area after velvet, but the optimization process is more complicated, resulting in the short-circuit current of the cell and the cell conversion efficiency can not be further improved, which affects the progress of the photovoltaic industry.
  • the purpose of the present invention is to provide a single crystal silicon cell with an increased specific surface area and a method for making the same to solve the above-mentioned problems in the background art.
  • a single crystal silicon cell chip with an increased specific surface area comprising a silicon chip.
  • the surface of the silicon chip is provided with a number of grooves.
  • the surfaces of the silicon chip are provided with pyramid fleece where grooves are provided and where the grooves are not provided. ⁇ Surface structure.
  • the groove shape of the groove is any one of triangle, circle, square, rhombus and polygon.
  • the center distance between two adjacent grooves is controlled to be 40-500 ⁇ m.
  • the area of the groove is controlled within 200-20000 ⁇ m 2 .
  • the depth of the groove is controlled to be 2-15 ⁇ m.
  • a texturing method for monocrystalline silicon cell wafers with increased specific surface area Before texturing the silicon wafers, single-sided laser grooving is performed to form a number of grooves on the surface of the wafer, and the grooves are equilateral triangles Distribution, the center distance between any two adjacent grooves is equal;
  • the texturing is then carried out, forming a pyramidal suede structure in both the grooves and the flat areas where the laser is not grooved.
  • the present invention by regularly slotting the surface of the silicon wafer before texturing, more pyramid suede structures and a larger surface area can be obtained, and the shape, arrangement and size of the grooves can be controlled by special parameters.
  • the ratio requirement further increases the PN junction area, thereby further increasing the Isc short-circuit current, and finally achieving the purpose of improving the battery conversion efficiency. It is very practical and worthy of promotion.
  • Figure 1 is a schematic diagram of the surface structure of a silicon wafer prepared by using the prior art
  • Figure 2 is a schematic diagram of the surface structure of a silicon wafer prepared by the method of the present invention.
  • Fig. 3 is a schematic structural diagram of a circular groove design for the groove in the specific embodiment of the present invention.
  • a monocrystalline silicon cell chip with an increased specific surface area comprising a silicon chip 1, a surface of the silicon chip 1 is provided with a plurality of grooves 2, and the surface of the silicon chip 1 is provided with grooves 2 and not provided with grooves 2 Pyramid suede structure 12 is provided everywhere.
  • a texturing method for monocrystalline silicon cell wafers with an increased specific surface area Before texturing the silicon wafer 1, single-sided laser grooving is performed to form a certain number, composition, and depth on the surface of the silicon wafer 1 Groove 2, the groove shape of groove 2 is any one of triangle, circle, square, rhombus and polygon. The area of groove 2 is controlled within 200-20000 ⁇ m 2 , and the depth of groove 2 is controlled within 2-15 ⁇ m , A number of grooves 2 are distributed in an equilateral triangle, the center distance between any two adjacent grooves 2 is equal, and the center distance between two adjacent grooves 2 is controlled within 40-500 ⁇ m.
  • the pyramid texture 12 is formed in the groove 2 and the flat area where the laser is not grooved.
  • the side where the groove 2 is present is the front side.
  • a single-sided laser grooving is performed on the silicon wafer 1 to form grooves 2 on the surface of the silicon wafer 1.
  • the grooves 2 are distributed in an equilateral triangle, and the area of each groove 2 is within 400 ⁇ m2, as shown in Figure 3 As shown, the dotted line constitutes an equilateral triangle.
  • the shape of the groove 2 is circular as an example. The distance between any two adjacent grooves 2 is equal, and the center distance of two adjacent grooves 2 is in the range of 50 ⁇ m.
  • Pyramid 12 is formed in both the groove 2 and the flat area where the laser is not hit. In the subsequent process, the side where the groove 2 exists is the front side.
  • the structure of silicon wafer 1 shown in Figure 1 of the specification the conventional texturing process single-sided etching depth is controlled at 3-7 ⁇ m, in order to avoid the obvious difference between the height of the groove 2 and the flat area without laser after texturing, the groove 2
  • the depth range is 10 ⁇ m.
  • laser grooving will inevitably cause certain damage to the surface of the silicon wafer 1.
  • the damage caused by the laser can be removed at the same time.
  • Comparative group the silicon wafer 1 was textured by the conventionally used single crystal texturing method in the background technology to obtain the structure of the silicon wafer 1 as shown in Figure 1 of the specification, and the electrical performance of the silicon wafer 1 was tested;
  • Example group the silicon wafer 1 was texturized using the method in the first embodiment, and the equipment and texturing liquid used for texturing were exactly the same as those of the comparison group, and the structure of the silicon wafer 1 as shown in Figure 2 of the specification was obtained. , And conduct electrical performance test on silicon wafer 1.

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Abstract

Disclosed is a monocrystalline silicon cell with an increased specific surface area, the monocrystalline silicon cell comprising a silicon wafer (1), wherein a surface of the silicon wafer (1) is provided with several grooves (2), and the surface of the silicon wafer (1) is provided with textured pyramid structures (12) at the positions where the grooves (2) are provided and the positions where no groove (2) is provided. According to a texturing method for the monocrystalline silicon cell with an increased specific surface area, the several grooves (2) are formed in the surface of the silicon wafer (1), and the several grooves (2) are distributed in an equilateral triangle, with equal distances between the centers of any two adjacent grooves (2); and after texturing, the textured pyramid structures (12) are formed at the grooves (2) and at planar areas where laser grooving is not performed. By means of forming regular grooves in the surface of the silicon wafer (1) before texturing, more textured pyramid structures (12) and a larger surface area can be obtained, so as to further increase the P-N junction area and further improve the Isc short-circuit current, thereby finally achieving the purpose of improving the battery conversion efficiency.

Description

一种增大比表面积的单晶硅电池片及其制绒方法Monocrystalline silicon cell sheet with increased specific surface area and texturing method thereof 技术领域Technical field
本发明涉及光伏电池片技术领域，具体为一种增大比表面积的单晶硅电池片及其制绒方法。The invention relates to the technical field of photovoltaic cells, in particular to a monocrystalline silicon cell with an increased specific surface area and a texturing method thereof.
背景技术Background technique
单晶硅电池片的常规生产流程主要包括：制绒-扩散-刻蚀-退火-正面SiNx镀膜-丝网印刷-烧结-分选，此流程中增加几步工艺，例如背钝化镀膜、背面镀膜、激光开槽等，并对其中某些工艺稍作调整，可制成PERC、PERC+SE、双面PERC+SE等高效电池。无论对于常规单晶电池，还是PERC+高效单晶电池，制绒都是不可或缺的步骤，单晶硅片制绒后形成金字塔绒面，可降低表面反射率，增加电池对太阳光的吸收能力，同时制绒后硅片表面积增大，从而使扩散后p-n结的面积增加，电池短路电流(Isc)得以提升，进而提高转换效率。The conventional production process of monocrystalline silicon cells mainly includes: texturing-diffusion-etching-annealing-front SiNx coating-screen printing-sintering-sorting. In this process, a few steps are added, such as back passivation coating, back Coating, laser grooving, etc., with slight adjustments to some of these processes, can be made into high-efficiency batteries such as PERC, PERC+SE, and double-sided PERC+SE. Texturing is an indispensable step for conventional monocrystalline cells or PERC+ high-efficiency monocrystalline cells. After monocrystalline silicon wafers are textured, a pyramid texture is formed, which can reduce the surface reflectivity and increase the solar absorption capacity of the cell At the same time, the surface area of the silicon wafer increases after texturing, so that the area of the pn junction after diffusion increases, and the battery short-circuit current (Isc) is increased, thereby improving the conversion efficiency.
目前常规使用的单晶制绒方法是碱制绒，其工艺步骤分为：①碱液初抛，去除硅片切割时留下的损伤；②预清洗，出去硅片表面的杂质脏污；③制绒，形成金字塔；④碱洗，去除脏污；⑤酸洗，去除残留的碱，同时去除表面氧化层及金属离子；⑥清洗、烘干；此常规方法最后将在平面的硅片表面形成如说明书附图1所示的紧密排列的金字塔绒面。At present, the conventionally used single crystal texturing method is alkali texturing. The process steps are divided into: ① lye initial polishing to remove the damage left by the wafer cutting; ② pre-cleaning to remove impurities and dirt on the surface of the silicon wafer; ③ Texturing to form a pyramid; ④Alkaline washing to remove dirt; ⑤Pickling to remove residual alkali while removing the surface oxide layer and metal ions; ⑥Cleaning and drying; this conventional method will finally form on the surface of the flat silicon wafer The densely arranged pyramid suede as shown in Figure 1 of the specification.
但硅片的表平面面积有限，因此形成的金字塔数目有限，最终只能得到一定的表面积，无法获得更多的金字塔数目，而现有技术中通常对金字塔的大小及高度进行优化以增大制绒后的表面积，但是优化起来工艺比较复杂，导致电池片的短路电流和电池转换效率无法得到进一步提升，沿着影响了光伏产业的进步。However, the surface area of the silicon wafer is limited, so the number of pyramids formed is limited. In the end, only a certain surface area can be obtained, and no more pyramids can be obtained. In the prior art, the size and height of the pyramids are usually optimized to increase the production. The surface area after velvet, but the optimization process is more complicated, resulting in the short-circuit current of the cell and the cell conversion efficiency can not be further improved, which affects the progress of the photovoltaic industry.
发明内容Summary of the invention
本发明的目的在于提供一种增大比表面积的单晶硅电池片及其制绒方 法，以解决上述背景技术中提出的问题。The purpose of the present invention is to provide a single crystal silicon cell with an increased specific surface area and a method for making the same to solve the above-mentioned problems in the background art.
为实现上述目的，本发明提供如下技术方案：In order to achieve the above objectives, the present invention provides the following technical solutions:
一种增大比表面积的单晶硅电池片，包括硅片，所述硅片表面开设有若干凹槽，所述硅片表面开设有凹槽处和未开设有凹槽处均设置有金字塔绒面结构。A single crystal silicon cell chip with an increased specific surface area, comprising a silicon chip. The surface of the silicon chip is provided with a number of grooves. The surfaces of the silicon chip are provided with pyramid fleece where grooves are provided and where the grooves are not provided.面结构。 Surface structure.
优选的，所述凹槽的开槽形状为三角形、圆形、方形、菱形以及多边形的任意一种。Preferably, the groove shape of the groove is any one of triangle, circle, square, rhombus and polygon.
优选的，两个相邻所述凹槽之间的中心距离控制在40-500μm。Preferably, the center distance between two adjacent grooves is controlled to be 40-500 μm.
优选的，所述凹槽的面积控制在200-20000μm 2。 Preferably, the area of the groove is controlled within 200-20000 μm 2 .
优选的，所述凹槽的深度控制在2-15μm。Preferably, the depth of the groove is controlled to be 2-15 μm.
一种增大比表面积的单晶硅电池片的制绒方法，在对硅片制绒之前进行单面激光开槽，使硅片表面形成若干凹槽，且若干所述凹槽呈等边三角形分布，任意相邻两个所述凹槽之间的中心距离相等；A texturing method for monocrystalline silicon cell wafers with increased specific surface area. Before texturing the silicon wafers, single-sided laser grooving is performed to form a number of grooves on the surface of the wafer, and the grooves are equilateral triangles Distribution, the center distance between any two adjacent grooves is equal;
随后进行制绒，在凹槽和未进行激光开槽的平面区域均形成金字塔绒面结构。The texturing is then carried out, forming a pyramidal suede structure in both the grooves and the flat areas where the laser is not grooved.
与现有技术相比，本发明的有益效果是：Compared with the prior art, the beneficial effects of the present invention are:
本发明通过在制绒之前对硅片表面进行有规则的开槽，可以得到更多的金字塔绒面结构的数目及更大的表面积，并且通过控制凹槽的形状、排布和尺寸参数的特殊比例要求，使得P-N结面积进一步增加，从而进一步提升Isc短路电流，最终实现提高电池转换效率的目的，实用性很强，非常值得推广。In the present invention, by regularly slotting the surface of the silicon wafer before texturing, more pyramid suede structures and a larger surface area can be obtained, and the shape, arrangement and size of the grooves can be controlled by special parameters. The ratio requirement further increases the PN junction area, thereby further increasing the Isc short-circuit current, and finally achieving the purpose of improving the battery conversion efficiency. It is very practical and worthy of promotion.
附图说明Description of the drawings
图1为采用现有技术制备的硅片表面结构示意图；Figure 1 is a schematic diagram of the surface structure of a silicon wafer prepared by using the prior art;
图2为本发明方法制备的硅片表面结构示意图；Figure 2 is a schematic diagram of the surface structure of a silicon wafer prepared by the method of the present invention;
图3为本发明具体实施方式中凹槽采用圆形槽设计的结构示意图。Fig. 3 is a schematic structural diagram of a circular groove design for the groove in the specific embodiment of the present invention.
图中：1硅片、2凹槽、12金字塔绒面结构。In the picture: 1 silicon wafer, 2 grooves, 12 pyramid suede structure.
具体实施方式Detailed ways
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.
请参阅图1-3，本发明提供一种技术方案：Please refer to Figures 1-3, the present invention provides a technical solution:
一种增大比表面积的单晶硅电池片，包括硅片1，所述硅片1表面开设有若干凹槽2，所述硅片1表面开设有凹槽2处和未开设有凹槽2处均设置有金字塔绒面结构12。A monocrystalline silicon cell chip with an increased specific surface area, comprising a silicon chip 1, a surface of the silicon chip 1 is provided with a plurality of grooves 2, and the surface of the silicon chip 1 is provided with grooves 2 and not provided with grooves 2 Pyramid suede structure 12 is provided everywhere.
一种增大比表面积的单晶硅电池片的制绒方法，在对硅片1制绒之前进行单面激光开槽，使硅片1表面形成一定数量、组成一定形状、且具有一定深度的凹槽2，凹槽2的开槽形状为三角形、圆形、方形、菱形以及多边形的任意一种，凹槽2的面积控制在200-20000μm 2，且凹槽2的深度控制在2-15μm，若干凹槽2呈等边三角形分布，任意相邻两个凹槽2之间的中心距离相等，两个相邻凹槽2之间的中心距离控制在40-500μm。 A texturing method for monocrystalline silicon cell wafers with an increased specific surface area. Before texturing the silicon wafer 1, single-sided laser grooving is performed to form a certain number, composition, and depth on the surface of the silicon wafer 1 Groove 2, the groove shape of groove 2 is any one of triangle, circle, square, rhombus and polygon. The area of groove 2 is controlled within 200-20000 μm 2 , and the depth of groove 2 is controlled within 2-15 μm , A number of grooves 2 are distributed in an equilateral triangle, the center distance between any two adjacent grooves 2 is equal, and the center distance between two adjacent grooves 2 is controlled within 40-500 μm.
随后进行制绒，在凹槽2和未进行激光开槽的平面区域均形成金字塔绒面结构12，后续工艺步骤中存在凹槽2的一面为正面。Afterwards, texturing is performed, and the pyramid texture 12 is formed in the groove 2 and the flat area where the laser is not grooved. In the subsequent process steps, the side where the groove 2 is present is the front side.
实施例一：Example one:
在硅片1制绒之前对其进行单面激光开槽，使硅片1表面形成凹槽2，凹槽2分布呈等边三角形，每个凹槽2面积范围在400μm2，如说明书附图3所示，虚线部分构成等边三角形，凹槽2形状以圆形为例，任意相邻两凹槽2之间的距离相等，相邻两凹槽2的中心距离范围在50μm，经过制绒后，在凹槽2与未打激光的平面区域均形成金字塔12，后续过程中存在凹槽2的一面为正面。Before the silicon wafer 1 is texturized, a single-sided laser grooving is performed on the silicon wafer 1 to form grooves 2 on the surface of the silicon wafer 1. The grooves 2 are distributed in an equilateral triangle, and the area of each groove 2 is within 400 μm2, as shown in Figure 3 As shown, the dotted line constitutes an equilateral triangle. The shape of the groove 2 is circular as an example. The distance between any two adjacent grooves 2 is equal, and the center distance of two adjacent grooves 2 is in the range of 50μm. After texturing , Pyramid 12 is formed in both the groove 2 and the flat area where the laser is not hit. In the subsequent process, the side where the groove 2 exists is the front side.
目前如说明书附图1所示的硅片1结构，常规制绒工艺单面腐蚀深度控 制在3-7μm，为避免制绒后凹槽2与未打激光的平面区域高度差距不明显，凹槽2深度范围在10μm，另外，激光开槽不可避免的会对硅片1表面造成一定损伤，在制绒第一步碱洗初抛去除切割损伤时，激光造成的损伤可一并去除。At present, the structure of silicon wafer 1 shown in Figure 1 of the specification, the conventional texturing process single-sided etching depth is controlled at 3-7μm, in order to avoid the obvious difference between the height of the groove 2 and the flat area without laser after texturing, the groove 2 The depth range is 10μm. In addition, laser grooving will inevitably cause certain damage to the surface of the silicon wafer 1. When the cutting damage is removed by alkaline washing and initial polishing in the first step of texturing, the damage caused by the laser can be removed at the same time.
对比实验数据：Comparative experiment data:
对比组：采用背景技术中，常规使用的单晶制绒方法对硅片1进行制绒，得到如说明书附图1所示的硅片1结构，并对硅片1进行电学性能测试；Comparative group: the silicon wafer 1 was textured by the conventionally used single crystal texturing method in the background technology to obtain the structure of the silicon wafer 1 as shown in Figure 1 of the specification, and the electrical performance of the silicon wafer 1 was tested;
实施例组：采用实施例一中的方法对硅片1进行制绒，且制绒所使用的设备和制绒液均与对比组完全相同，得到如说明书附图2所示的硅片1结构，并对硅片1进行电学性能测试。Example group: the silicon wafer 1 was texturized using the method in the first embodiment, and the equipment and texturing liquid used for texturing were exactly the same as those of the comparison group, and the structure of the silicon wafer 1 as shown in Figure 2 of the specification was obtained. , And conduct electrical performance test on silicon wafer 1.
测试得到的对比组和实施例组实验数据如下表1所示：The experimental data of the comparative group and the example group obtained by the test are shown in Table 1 below:
表1Table 1
Figure PCTCN2019129546-appb-000001
Figure PCTCN2019129546-appb-000001
如表1内数据可得，相比较于常规制绒工艺得到的电池片的电性能，较为明显的是，短路电流明显提高了0.038A，且电池转换效率提高了0.25％，从数值上来说，虽然提高数值较小，但是对于光伏领域来说，却是实现了一个质的飞跃和进步，非常具有创造性的进步，且效果显著。As the data in Table 1 is available, compared with the electrical performance of the cell obtained by the conventional texturing process, it is more obvious that the short-circuit current is significantly increased by 0.038A, and the battery conversion efficiency is increased by 0.25%. In terms of value, Although the increase is small, it has achieved a qualitative leap and progress for the photovoltaic field, a very creative progress, and the effect is remarkable.
尽管已经示出和描述了本发明的实施例，对于本领域的普通技术人员而言，可以理解在不脱离本发明的原理和精神的情况下可以对这些实施例进行多种变化、修改、替换和变型，本发明的范围由所附权利要求及其等同物限定。Although the embodiments of the present invention have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, and substitutions can be made to these embodiments without departing from the principle and spirit of the present invention. And variations, the scope of the present invention is defined by the appended claims and their equivalents.

Claims (6)

  1. 一种增大比表面积的单晶硅电池片，包括硅片(1)，其特征在于：所述硅片(1)表面开设有若干凹槽(2)，所述硅片(1)表面开设有凹槽(2)处和未开设有凹槽(2)处均设置有金字塔绒面结构(12)。A single crystal silicon cell chip with increased specific surface area, comprising a silicon chip (1), characterized in that: the surface of the silicon chip (1) is provided with a plurality of grooves (2), and the surface of the silicon chip (1) is opened Pyramid suede structures (12) are arranged at the places with grooves (2) and places without grooves (2).
  2. 根据权利要求1所述的一种增大比表面积的单晶硅电池片，其特征在于：所述凹槽(2)的开槽形状为三角形、圆形、方形、菱形以及多边形的任意一种。The single crystal silicon cell with increased specific surface area according to claim 1, characterized in that: the groove shape of the groove (2) is any one of triangle, circle, square, rhombus and polygon .
  3. 根据权利要求1所述的一种增大比表面积的单晶硅电池片，其特征在于：两个相邻所述凹槽(2)之间的中心距离控制在40-500μm。The single crystal silicon cell with increased specific surface area according to claim 1, characterized in that the center distance between two adjacent grooves (2) is controlled within 40-500 μm.
  4. 根据权利要求1所述的一种增大比表面积的单晶硅电池片，其特征在于：所述凹槽(2)的面积控制在200-20000μm 2。 The single crystal silicon cell sheet with increased specific surface area according to claim 1, characterized in that the area of the groove (2) is controlled within 200-20000 μm 2 .
  5. 根据权利要求1所述的一种增大比表面积的单晶硅电池片，其特征在于：所述凹槽(2)的深度控制在2-15μm。The single crystal silicon cell sheet with increased specific surface area according to claim 1, wherein the depth of the groove (2) is controlled within 2-15 μm.
  6. 一种增大比表面积的单晶硅电池片的制绒方法，其特征在于：在对硅片(1)制绒之前进行单面激光开槽，使硅片(1)表面形成若干凹槽(2)，且若干所述凹槽(2)呈等边三角形分布，任意相邻两个所述凹槽(2)之间的中心距离相等；A texturing method for monocrystalline silicon cells with increased specific surface area, characterized in that: before texturing the silicon wafer (1), single-sided laser grooving is performed to form a number of grooves on the surface of the silicon wafer (1). 2), and a plurality of the grooves (2) are distributed in an equilateral triangle, and the center distance between any two adjacent grooves (2) is equal;
    随后进行制绒，在凹槽(2)和未进行激光开槽的平面区域均形成金字塔绒面结构(12)。Afterwards, texturing is performed, and a pyramid texturing structure (12) is formed in both the groove (2) and the flat area where the laser grooving is not performed.
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