WO2020245692A1 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
WO2020245692A1
WO2020245692A1 PCT/IB2020/054865 IB2020054865W WO2020245692A1 WO 2020245692 A1 WO2020245692 A1 WO 2020245692A1 IB 2020054865 W IB2020054865 W IB 2020054865W WO 2020245692 A1 WO2020245692 A1 WO 2020245692A1
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WIPO (PCT)
Prior art keywords
transistor
conductor
insulator
oxide
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
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PCT/IB2020/054865
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English (en)
French (fr)
Japanese (ja)
Inventor
國武寛司
津田一樹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2021524488A priority Critical patent/JP7592588B2/ja
Priority to US17/615,780 priority patent/US12283600B2/en
Publication of WO2020245692A1 publication Critical patent/WO2020245692A1/ja
Anticipated expiration legal-status Critical
Priority to JP2024202280A priority patent/JP2025019138A/ja
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733—Multi-gate TFTs
    • H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/481—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

Definitions

  • One aspect of the present invention relates to a semiconductor device.
  • One aspect of the present invention is not limited to the above technical fields.
  • the technical field of the invention disclosed in the present specification and the like relates to a product, a method, or a manufacturing method.
  • one aspect of the invention relates to a process, machine, manufacture, or composition (composition of matter).
  • the semiconductor device refers to all devices that can function by utilizing the semiconductor characteristics. Therefore, semiconductor elements such as transistors and diodes, and circuits including semiconductor elements are semiconductor devices. Further, the display device, the light emitting device, the lighting device, the electro-optical device, the image pickup device, the communication device, the electronic device, and the like may include a semiconductor element and a semiconductor circuit. Therefore, display devices, light emitting devices, lighting devices, electro-optic devices, image pickup devices, communication devices, electronic devices, and the like may also be referred to as semiconductor devices.
  • 5G 5th generation mobile communication system
  • 5G communication frequencies of 3.7 GHz band, 4.5 GHz band, and 28 GHz band are used.
  • a semiconductor device compatible with 5G is manufactured by using a semiconductor using one kind of element such as Si as a main component and a compound semiconductor using a plurality of kinds of elements such as Ga and As as main components. Furthermore, oxide semiconductors, which are a type of metal oxide, are attracting attention.
  • Non-Patent Document 1 c-axis aligned crystalline (CAAC) structures and nanocrystalline (nc) structures that are neither single crystal nor amorphous have been found (see Non-Patent Document 1 and Non-Patent Document 2).
  • Non-Patent Document 1 and Non-Patent Document 2 disclose a technique for manufacturing a transistor using an oxide semiconductor having a CAAC structure.
  • a high-frequency noise component may flow to the power supply line, which tends to cause the integrated circuit to malfunction or become unstable.
  • a high-frequency noise component may flow to the power supply line, which tends to cause the integrated circuit to malfunction or become unstable.
  • portable electronic devices such as mobile phones and tablet terminals, which have a high need for low power consumption, since the integrated circuit is operated with a low power supply voltage, malfunctions are likely to occur due to slight voltage fluctuations.
  • one of the objects of the present invention is to prevent the circuit from malfunctioning and to improve the reliability of the semiconductor device using the circuit. Further, one aspect of the present invention is aimed at realizing low power consumption of a circuit or low power consumption of a semiconductor device.
  • the circuit in order to prevent the noise component from flowing to the power supply line, even if the circuit is provided with means for bypassing the noise component, it is possible to prevent the layout area of the circuit from increasing.
  • one of the purposes is to realize miniaturization of a semiconductor device using the circuit.
  • one of the problems is to provide a novel semiconductor device.
  • One aspect of the present invention includes a transistor, a load, and a wiring having a function of supplying a power supply potential to the load.
  • the semiconductor layer of the transistor includes an oxide semiconductor, and the source and drain of the transistor. Is a semiconductor device electrically connected to the wiring, a reference potential is supplied to the first gate of the transistor, and the semiconductor layer of the transistor has a region overlapping the wiring.
  • One aspect of the present invention includes a transistor, a load, and a wiring having a function of supplying a power supply potential to the load.
  • the semiconductor layer of the transistor includes an oxide semiconductor, and the source and drain of the transistor. Is supplied with a reference potential, the first gate of the transistor is electrically connected to the wiring, and the semiconductor layer of the transistor is a semiconductor device having a region overlapping the wiring.
  • One aspect of the present invention includes a transistor, a load, and a wiring having a function of supplying a power supply potential to the load.
  • the semiconductor layer of the transistor includes an oxide semiconductor
  • the first aspect of the transistor includes an oxide semiconductor.
  • the gate has a region overlapping the second gate of the transistor via the semiconductor layer of the transistor, and the source and drain of the transistor are electrically connected to the wiring, and the first gate and the first gate of the transistor and the gate A reference potential is supplied to the second gate of the transistor, and the semiconductor layer of the transistor is a semiconductor device having a region overlapping the wiring.
  • One aspect of the present invention includes a transistor, a load, and a wiring having a function of supplying a power supply potential to the load.
  • the semiconductor layer of the transistor includes an oxide semiconductor
  • the first aspect of the transistor includes an oxide semiconductor.
  • the gate has a region that overlaps with the second gate of the transistor via the semiconductor layer of the transistor, and a reference potential is supplied to the source and drain of the transistor, and the first gate of the transistor and the transistor
  • the second gate is electrically connected to the wiring
  • the semiconductor layer of the transistor is a semiconductor device having a region overlapping the wiring.
  • One aspect of the present invention includes a first transistor, a second transistor, a load, and a wiring having a function of supplying a power supply potential to the load, and the semiconductor layer of the first transistor is
  • the semiconductor layer of the second transistor includes an oxide semiconductor, the source and drain of the first transistor are electrically connected to the wiring, and the first of the first transistor is included.
  • a reference potential is supplied to the gate of the second transistor, a reference potential is supplied to the source and drain of the second transistor, and the first gate of the second transistor is electrically connected to the wiring.
  • the semiconductor layer of the first transistor has a region overlapping the wiring, and the semiconductor layer of the second transistor is a semiconductor device having a region overlapping the wiring.
  • One aspect of the present invention includes a first transistor, a second transistor, a load, and a wiring having a function of supplying a power supply potential to the load, and the semiconductor layer of the first transistor is
  • the semiconductor layer of the second transistor includes an oxide semiconductor, and the first gate of the first transistor contains the oxide semiconductor, and the first gate of the first transistor passes through the semiconductor layer of the first transistor.
  • the first gate of the second transistor has a region overlapping with the second gate of the second transistor, and the first gate of the second transistor has a region overlapping with the second gate of the second transistor via the semiconductor layer of the second transistor.
  • the source and drain of the first transistor are electrically connected to the wiring, and a reference potential is supplied to the first gate of the first transistor and the second gate of the first transistor.
  • a reference potential is supplied to the source and drain of the second transistor, and the first gate of the second transistor and the second gate of the second transistor are electrically connected to the wiring.
  • the semiconductor layer of the first transistor has a region overlapping the wiring
  • the semiconductor layer of the second transistor is a semiconductor device having a region overlapping the wiring.
  • one aspect of the present invention it is possible to prevent a circuit from malfunctioning and improve the reliability of a semiconductor device using the circuit. Alternatively, according to one aspect of the present invention, it is possible to realize low power consumption of the circuit or low power consumption of the semiconductor device. Alternatively, according to one aspect of the present invention, it is possible to prevent the layout area of the circuit from increasing, or to realize miniaturization of the semiconductor device using the circuit. Alternatively, one aspect of the present invention can provide a novel semiconductor device.
  • FIG. 1A is a diagram showing a configuration example of a circuit according to one aspect of the present invention.
  • FIG. 1B is a diagram showing a configuration example of a capacitance portion of the circuit according to one aspect of the present invention.
  • 2A to 2C are diagrams showing a configuration example of a capacitance portion of the circuit according to one aspect of the present invention.
  • 3A and 3B are diagrams showing a configuration example of a capacitance portion of the circuit according to one aspect of the present invention.
  • FIG. 4 is a diagram showing a configuration example of a capacitance portion of the circuit according to one aspect of the present invention.
  • FIG. 5 is a diagram showing a configuration example of a capacitance portion of the circuit according to one aspect of the present invention.
  • FIG. 6 is a diagram showing a configuration example of a capacitance portion of the circuit according to one aspect of the present invention.
  • FIG. 7 is a diagram showing a configuration example of a capacitance portion of the circuit according to one aspect of the present invention.
  • FIG. 8 is a diagram showing a configuration example of a circuit according to one aspect of the present invention.
  • FIG. 9 is a diagram showing a configuration example of a semiconductor device according to one aspect of the present invention.
  • FIG. 10 is a diagram showing a configuration example of a capacitance portion of the circuit according to one aspect of the present invention.
  • FIG. 11 is a diagram showing a configuration example of a capacitance portion of the circuit according to one aspect of the present invention.
  • FIG. 11 is a diagram showing a configuration example of a capacitance portion of the circuit according to one aspect of the present invention.
  • FIG. 12 is a diagram showing a configuration example of a capacitance portion of the circuit according to one aspect of the present invention.
  • FIG. 13 is a diagram showing a configuration example of a capacitance portion of the circuit according to one aspect of the present invention.
  • FIG. 14 is a diagram showing a configuration example of a capacitance portion of the circuit according to one aspect of the present invention.
  • FIG. 15 is a diagram showing a configuration example of a semiconductor device according to one aspect of the present invention.
  • 16A to 16C are diagrams showing the structure of the OS transistor used in the simulation.
  • FIG. 17 is a diagram showing a simulation result.
  • FIG. 18A is a diagram illustrating classification of the crystal structure of IGZO.
  • FIG. 18A is a diagram illustrating classification of the crystal structure of IGZO.
  • FIG. 18B is a diagram illustrating an XRD spectrum of the CAAC-IGZO film.
  • FIG. 18C is a diagram illustrating a microelectron diffraction pattern of the CAAC-IGZO film.
  • FIG. 19A is a top view of the semiconductor wafer.
  • FIG. 19B is an enlarged view of the chip.
  • FIG. 20A is a flowchart illustrating an example of a manufacturing process of electronic components.
  • FIG. 20B is a schematic perspective view of an electronic component.
  • FIG. 21 is a diagram showing an example of an electronic device.
  • 22A to 22F are diagrams showing an example of an electronic device.
  • FIG. 23 is a diagram showing the hierarchical structure of the IoT network and the tendency of the required specifications.
  • FIG. 24 is an image diagram of factory automation.
  • the position, size, range, etc. of each configuration shown in the drawings and the like may not represent the actual position, size, range, etc. in order to facilitate understanding of the invention. Therefore, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings and the like.
  • the resist mask or the like may be unintentionally reduced due to a process such as etching, but it may not be reflected in the drawing for easy understanding.
  • top view also referred to as “plan view”
  • perspective view the description of some components may be omitted in order to make the drawing easier to understand.
  • electrode and “wiring” do not functionally limit these components.
  • an “electrode” may be used as part of a “wiring” and vice versa.
  • the terms “electrode” and “wiring” include the case where a plurality of “electrodes” and “wiring” are integrally formed.
  • the "terminal" in the electric circuit means a part where current input or output, voltage input or output, or signal reception or transmission is performed. Therefore, a part of the wiring or the electrode may function as a terminal.
  • the terms “upper” and “lower” in the present specification and the like do not limit the positional relationship of the components to be directly above or directly below and to be in direct contact with each other.
  • the electrode B does not have to be formed in direct contact with the insulating layer A, and another configuration is formed between the insulating layer A and the electrode B. Do not exclude those that contain elements.
  • source and drain functions are interchanged depending on operating conditions, such as when transistors with different polarities are used or when the direction of current changes during circuit operation, so which one is the source or drain is limited. Is difficult. Therefore, in the present specification, the terms source and drain can be used interchangeably.
  • electrically connected includes a case of being directly connected and a case of being connected via "something having some kind of electrical action".
  • the "thing having some kind of electrical action” is not particularly limited as long as it enables transmission and reception of an electric signal between the connection targets. Therefore, even when it is expressed as “electrically connected", in an actual circuit, there is a case where there is no physical connection part and only the wiring is extended.
  • parallel means, for example, a state in which two straight lines are arranged at an angle of ⁇ 10 ° or more and 10 ° or less. Therefore, the case of ⁇ 5 ° or more and 5 ° or less is also included.
  • vertical and orthogonal mean, for example, a state in which two straight lines are arranged at an angle of 80 ° or more and 100 ° or less. Therefore, the case of 85 ° or more and 95 ° or less is also included.
  • the voltage often indicates the potential difference between a certain potential and a reference potential (for example, ground potential or source potential). Therefore, it is often possible to paraphrase voltage and potential. In the present specification and the like, voltage and potential can be paraphrased unless otherwise specified.
  • semiconductor Even when the term "semiconductor” is used, for example, when the conductivity is sufficiently low, it has the characteristics of an "insulator". Therefore, it is possible to replace “semiconductor” with “insulator". In this case, the boundary between “semiconductor” and “insulator” is ambiguous, and it is difficult to make a strict distinction between the two. Therefore, the terms “semiconductor” and “insulator” described herein may be interchangeable.
  • ordinal numbers such as “first" and “second” in the present specification and the like are added to avoid confusion of the components, and do not indicate any order or order such as process order or stacking order. ..
  • terms that do not have ordinal numbers in the present specification and the like may have ordinal numbers within the scope of claims in order to avoid confusion of components.
  • different ordinal numbers may be added within the scope of claims.
  • the ordinal numbers may be omitted in the scope of claims.
  • the "on state” of the transistor means a state in which the source and drain of the transistor can be regarded as being electrically short-circuited (also referred to as “conduction state”).
  • the “off state” of the transistor means a state in which the source and drain of the transistor can be regarded as being electrically cut off (also referred to as “non-conducting state”).
  • the “on current” may mean a current flowing between the source and the drain when the transistor is in the on state.
  • the “off current” may mean a current flowing between the source and the drain when the transistor is in the off state.
  • the high power supply potential VDD (hereinafter, also simply referred to as “VDD”, “H potential”, or “H”) refers to the low power supply potential VSS (hereinafter, simply “VSS”, “L potential”). , Or also referred to as “L”), indicating a power supply potential with a higher potential.
  • VSS indicates a power supply potential having a potential lower than VDD.
  • the ground potential (simply referred to as "GND” or “GND potential”) can also be used as VDD or VSS. For example, when VDD is the ground potential, VSS is a potential lower than the ground potential, and when VSS is the ground potential, VDD is a potential higher than the ground potential.
  • gate means a part or all of the gate electrode and the gate wiring.
  • the gate wiring refers to wiring for electrically connecting the gate electrode of at least one transistor with another electrode or another wiring.
  • the source means a part or all of a source region, a source electrode, and a source wiring.
  • the source region refers to a region of the semiconductor layer having a resistivity of a certain value or less.
  • the source electrode refers to a conductive layer in a portion connected to the source region.
  • the source wiring is a wiring for electrically connecting the source electrode of at least one transistor to another electrode or another wiring.
  • the drain means a part or all of the drain region, the drain electrode, and the drain wiring.
  • the drain region refers to a region of the semiconductor layer having a resistivity of a certain value or less.
  • the drain electrode refers to a conductive layer at a portion connected to the drain region.
  • Drain wiring refers to wiring for electrically connecting the drain electrode of at least one transistor to another electrode or another wiring.
  • H indicating the H potential
  • L indicating the L potential
  • “H” or “L” may be added with enclosing characters to the wiring and electrodes where the potential change has occurred.
  • an “x” symbol may be added over the transistor.
  • FIG. 1A shows an example of the circuit configuration of the circuit 10 according to one aspect of the present invention.
  • the circuit 10 shown in FIG. 1A includes a wiring 100, a capacitance element 101 electrically connected to the wiring 100, and a load 103.
  • the wiring 100 has a function of supplying a potential from a power source (hereinafter, referred to as a power source potential) to the load 103.
  • the load 103 includes various circuits that are driven by being supplied with a power supply potential.
  • the power supply potential may be given from a power supply circuit provided in the semiconductor device, or may be given to the wiring 100 from the outside of the semiconductor device via a terminal provided in the semiconductor device. Good.
  • the power supply potential given to the wiring 100 is a low power supply potential (hereinafter referred to as VSS) lower than a reference potential (hereinafter referred to as a reference potential) such as a ground potential or a ground potential, and a high power supply potential higher than the reference potential (hereinafter referred to as a reference potential). (Called VDD) and the like.
  • FIG. 1A illustrates a case where a plurality of capacitance elements 101 are connected in parallel, and a portion having a plurality of capacitance elements 101 connected in parallel is shown as a capacitance unit 104.
  • the capacitance element 101 releases the noise component to the wiring 102 so that the noise component is supplied to the load 103. Has a function to prevent.
  • FIG. 1B shows an example of the circuit configuration of the capacitance unit 104 when a transistor is applied to the capacitance element 101 of the capacitance unit 104 shown in FIG. 1A.
  • the capacitance unit 104 shown in FIG. 1B has one or more capacitance elements 101a corresponding to one form of the capacitance element 101.
  • the capacitive element 101a has a transistor 105, and the source and drain of the transistor 105 are electrically connected to each other.
  • the source and drain of the transistor 105 function as one electrode, and the gate of the transistor 105 functions as the other electrode.
  • FIG. 1B illustrates a case where the source and drain of the transistor 105 are electrically connected to the wiring 100 and the gate of the transistor 105 is electrically connected to the wiring 102.
  • a transistor (also referred to as a Si transistor) having a channel forming region on a semiconductor film such as silicon or germanium, which is amorphous, microcrystal, polycrystalline or single crystal, can be used.
  • the transistor 105 is formed using a thin film of silicon, the thin film is subjected to a process such as laser annealing of amorphous silicon or amorphous silicon produced by a vapor phase growth method such as a plasma CVD method or a sputtering method. Crystallized polycrystalline silicon, single crystal silicon in which hydrogen ions or the like are injected into a single crystal silicon wafer and the surface layer portion is peeled off can be used.
  • a transistor having a channel forming region (also referred to as “OS transistor” or “OS-FET”) is used in a semiconductor film containing an oxide semiconductor (OS) which is a kind of metal oxide.
  • OS oxide semiconductor
  • the capacitance value per area in the plan view of the capacitance element 101a can be made higher than when the Si transistor is used for the capacitance element 101a. Therefore, in the circuit of the present invention using the OS transistor for the capacitive element 101a, it is possible to prevent the layout area from increasing. Further, it is possible to realize miniaturization of the semiconductor device using the circuit.
  • FIG. 1B the capacitance portion 104 in which the source and drain of the transistor 105 are electrically connected to the wiring 100 and the gate of the transistor 105 is electrically connected to the wiring 102 is illustrated, but the transistor 105 and the wiring 100 are illustrated.
  • the connection relationship with the wiring 102 and the wiring 102 may be opposite to that in FIG. 1B.
  • FIG. 2A shows an example of the circuit configuration of the capacitance unit 104 in which the connection relationship between the transistor 105 and the wiring 100 and the wiring 102 is opposite to that in FIG. 1B.
  • the capacitance unit 104 shown in FIG. 2A has a transistor 105 in the capacitance element 101a, and the source and drain of the transistor 105 are electrically connected to each other.
  • FIG. 2A illustrates a case where the gate of the transistor 105 is electrically connected to the wiring 100 and the source and drain of the transistor 105 are electrically connected to the wiring 102.
  • the transistor 105 may have two gates (also referred to as a front gate and a back gate) having regions overlapping each other with a channel forming region in between in a cross-sectional view.
  • the two gates may be electrically connected to each other.
  • FIG. 2B shows an example of the circuit configuration of the capacitance unit 104 when the transistor 105 having two gates is used as the capacitance element 101a.
  • the capacitance element 101a has a transistor 105, and the transistor 105 has two gates.
  • the two gates are electrically connected to each other, and the source and drain are electrically connected to each other.
  • the source and drain of the transistor 105 function as one electrode, and the two gates of the transistor 105 function as the other electrode.
  • FIG. 2B illustrates a case where the source and drain of the transistor 105 are electrically connected to the wiring 100 and the gate of the transistor 105 is electrically connected to the wiring 102.
  • the capacitance value per area in the plan view of the capacitance element 101a is higher than that when the transistor 105 having one gate is used as the capacitance element 101a. Can be done. Therefore, when the transistor 105 having two gates is used as the capacitive element 101a, it is possible to prevent the layout area of the circuit from increasing. Further, it is possible to realize miniaturization of the semiconductor device using the circuit.
  • the gate of the transistor 105 is electrically connected to the body of the transistor 105 to form a thin film in which the two gates are electrically connected to each other. Similar to the transistor 105, the capacitance value per area of the capacitance element 101a in a plan view can be increased.
  • FIG. 2B the capacitance portion 104 in which the source and drain of the transistor 105 are electrically connected to the wiring 100 and the two gates of the transistor 105 are electrically connected to the wiring 102 is illustrated.
  • the connection relationship between the wiring 100 and the wiring 102 may be opposite to that in FIG. 2B.
  • FIG. 2C shows an example of the circuit configuration of the capacitance unit 104 in which the connection relationship between the transistor 105 and the wiring 100 and the wiring 102 is opposite to that in FIG. 2B.
  • the capacitance unit 104 shown in FIG. 2C has a transistor 105 in the capacitance element 101a, and the source and drain of the transistor 105 are electrically connected to each other.
  • FIG. 2C illustrates a case where the two gates of the transistor 105 are electrically connected to the wiring 100 and the source and drain of the transistor 105 are electrically connected to the wiring 102.
  • the source and drain of the transistor 105 are electrically connected in all the capacitance elements 101a as in the capacitance unit 104 shown in FIGS. 1A and 2B.
  • a transistor 105 in which the source and drain are electrically connected to the wiring 100 and a transistor 105 in which the gate is electrically connected to the wiring 100 are mixed in the capacitance portion 104. May be good.
  • the capacitance section is used.
  • An example of the circuit configuration of 104 is shown in FIG. 3A.
  • transistors 105a among the transistors 105, those in which the source and drain are electrically connected to the wiring 100 are shown as transistors 105a, and those in which the gate is electrically connected to the wiring 100 are shown as transistors 105b. ..
  • FIG. 3A illustrates the circuit configuration of the capacitance unit 104 when the transistor 105a and the transistor 105b have a front gate and no back gate.
  • the capacitance unit 104 , Transistor 105a and transistor 105b may have a front gate and a back gate electrically connected to each other.
  • the capacitance value of the capacitance formed between the gate of the transistor and the source and drain varies according to the value of the voltage applied between the gate and source of the transistor. Therefore, as shown in FIGS. 3A and 3B, when the transistors 105a and the transistors 105b are mixed in the capacitance section 104, the capacitance value of the combined capacitance of the entire capacitance section 104 does not change even if the power supply potential of the wiring 100 fluctuates. It can be suppressed from fluctuating.
  • the periodicity of the layout pattern of the mask used for manufacturing the capacitance portion 104 can be increased.
  • the periodicity of the mask layout pattern is high, in the photolithography process using the mask, due to the interference of light emitted from the exposure apparatus, the conductive film, insulating film, semiconductor film, etc. molded by photolithography, etc. Shape defects such as partial narrowing of the width are less likely to occur. Therefore, it is possible to prevent defects in the shapes of the conductive film, the insulating film, and the semiconductor film after the photolithography process, and it is possible to increase the yield in manufacturing the circuit and the semiconductor device using the circuit.
  • the transistor 105 is provided in a region overlapping the wiring 100 or the wiring 200 in a cross-sectional view.
  • FIG. 4 shows an example of the layout of the capacitance unit 104 shown in FIG. 2B in a plan view. Further, a cross-sectional view taken along the broken line A1-A2 in FIG. 4 and a cross-sectional view taken along the broken line B1-B2 are illustrated in FIG. 4 and 5 illustrate the case where the transistor 105 is an OS transistor.
  • the insulator 516 is laminated on the insulator 514.
  • Transistors 105 are provided on the insulator 514 and the insulator 516.
  • the transistor 105 is arranged on the insulator 503 arranged so as to be embedded in the insulator 514 and the insulator 516, the insulator 522 arranged on the insulator 516 and the conductor 503, and the insulator 522.
  • the insulator 544 is arranged so as to cover the conductors 542a and 542b and the conductor 560.
  • the conductor 560 preferably has a conductor 560a on the insulator 545 and a conductor 560b on the conductor 560a.
  • the insulator 580, the insulator 574, and the insulator 581 are laminated in this order on the insulator 544.
  • the conductor 542a and the conductor 542b have a function as a source or a drain.
  • the conductor 560 has a function as a front gate.
  • oxide 530a and oxide 530b may be collectively referred to as oxide 530.
  • the conductor 503a is formed in contact with the inner wall of the recess formed by the openings of the insulator 514 and the insulator 516, and the conductor 503b is further formed inside.
  • the conductor 503a and the conductor 503b are laminated, but the present invention is not limited to this.
  • the conductor 503 may have a single layer or a laminated structure of three or more layers.
  • the conductor 503 has a function as a back gate.
  • the conductor 540a, the conductor 540b, the conductor 541a, and the conductor 541b are placed in the openings formed in the insulator 522, the insulator 524, the insulator 544, the insulator 580, the insulator 574, and the insulator 581. Deploy.
  • the conductor 540a is electrically connected to the conductor 542a
  • the conductor 540b is electrically connected to the conductor 542b.
  • the conductor 560 has a region that does not overlap with the oxide 530.
  • One of the openings formed in the insulator 544, the insulator 580, the insulator 574, and the insulator 581 overlaps the region, and the conductor 541a is electrically connected to the conductor 560 through one of the openings.
  • the conductor 503 has a region that does not overlap with the oxide 530.
  • One of the openings formed in the insulator 522, the insulator 524, the insulator 544, the insulator 580, the insulator 574, and the insulator 581 overlaps the region, and the conductor 541b is conductive through one of the openings. It is electrically connected to the body 503.
  • the conductor 590 and the conductor 592 are arranged on the insulator 581.
  • the conductor 590 is electrically connected to the conductors 540a and 540b, and the conductor 592 is electrically connected to the conductors 541a and 541b.
  • the source and drain of the transistor 105 are electrically connected to each other, and the front gate and the back gate of the transistor 105 are electrically connected to each other.
  • the same potential may not be applied to the back gate and the front gate.
  • the threshold voltage of the transistor 105 can be controlled by changing the potential applied to the back gate independently of the potential applied to the front gate. In particular, by applying a negative potential to the conductor 503, the threshold voltage of the transistor 105 can be made larger than 0 V, and the off-current can be reduced.
  • the insulator 594 is arranged on the insulator 581, the conductor 590, and the conductor 592.
  • the conductor 595a and the conductor 595b are arranged in the opening formed in the insulator 594.
  • the conductor 595a is electrically connected to the conductor 590 and the conductor 595b is electrically connected to the conductor 592.
  • the conductor 597 and the conductor 598 are arranged on the insulator 594.
  • the conductor 597 is electrically connected to the conductor 595a, and the conductor 598 is electrically connected to the conductor 595b.
  • the conductor 597 has a function as the wiring 100, and the conductor 598 has a function as the wiring 102.
  • FIGS. 4 and 5 show a configuration example of the capacitance unit 104 shown in FIG. 2B
  • the capacitance unit 104 shown in FIG. 2C can also have the same configuration as that of FIGS. 4 and 5.
  • the conductor 597 has a function as the wiring 102
  • the conductor 598 has a function as the wiring 100.
  • FIGS. 4 and 5 exemplify a configuration in which the oxide 530 of the transistor 105 overlaps with the conductor 597
  • the oxide 530 of the transistor 105 may overlap with the conductor 598.
  • the conductor 540a, the conductor 540b, and the conductor 598 are formed by stretching the conductor 590 from the region overlapping with the conductor 579 to the region overlapping with the conductor 598. , Can be electrically connected via a conductor 590.
  • FIGS. 4 and 5 illustrate the configuration in which the transistor 105 is arranged in the lower layer of the conductor 597
  • the transistor 105 may be arranged in the upper layer of the conductor 597.
  • FIG. 6 shows an example of the layout of the capacitance portion 104 shown in FIG. 2B in a plan view when the transistor 105 is arranged on the upper layer of the conductor 597.
  • a cross-sectional view taken along the broken line A1-A2 in FIG. 6 and a cross-sectional view taken along the broken line B1-B2 are illustrated in FIG. 6 and 7 illustrate the case where the transistor 105 is an OS transistor.
  • the insulator 512 is arranged under the insulator 514, and the conductors 597 and 598 are arranged under the insulator 512. ..
  • the conductor 541c is inserted into the openings formed in the insulator 522, the insulator 524, the insulator 544, the insulator 580, the insulator 574, and the insulator 581. Deploy.
  • the conductor 541c is electrically connected to the conductor 590 on the insulator 581.
  • the conductor 504 is embedded in the insulator 512, the insulator 514, and the insulator 516.
  • the conductor 504 is electrically connected to the conductor 597 located below the conductor 504. Further, the conductor 504 is electrically connected to the conductor 541c arranged on the conductor 504.
  • the conductor 504 is in contact with the inner wall of the recess formed by the conductor 597, the opening of the insulator 512, the opening of the insulator 514, and the opening of the insulator 516, and the conductor 504a is formed further inside.
  • the conductor 504b is formed on the surface. Further, the conductor 504 may have a single layer or a laminated structure of three or more layers.
  • the conductor 503 has an opening of the insulator 512, an opening of the insulator 514, and an opening of the insulator 516 in a region where the conductor 503 does not overlap with the oxide 530. Is electrically connected to a conductor 598 located below the conductor 503.
  • the transistor 105 is arranged in a region overlapping the conductor 597 having a function as a wiring 100.
  • This embodiment can be implemented in combination with other embodiments as appropriate.
  • the circuit 10 shown in FIG. 8 has a common source amplifier 103a, a wiring 100, and a capacitance unit 104.
  • the common source amplifier 103a has a matching circuit 127, a matching circuit 128, and a transistor 129.
  • the matching circuit 127 includes an inductor 132 and a capacitive element 131.
  • the matching circuit 128 includes an inductor 133 and a capacitive element 134.
  • one terminal of the inductor 132 is electrically connected to the wiring 100, and the other terminal is electrically connected to the gate of the transistor 129. Further, in the capacitive element 131, one electrode is electrically connected to the input terminal IN, and the other electrode is electrically connected to the gate of the transistor 129.
  • one terminal of the inductor 133 is electrically connected to the wiring 100, and the other terminal is electrically connected to one of the source and drain of the transistor 129. Further, in the capacitive element 134, one electrode is electrically connected to one of the source and drain of the transistor 129, and the other electrode is electrically connected to the output terminal OUT.
  • the other of the source or drain of the transistor 129 is electrically connected to the wire 130.
  • the potential given to the wiring 130 may be the same as the potential given to the wiring 102.
  • An electric potential is applied to the wiring 100 from the terminal 125.
  • the circuit 10 can be downsized by superimposing the capacitance element 101 on the region where the wiring 100 is arranged.
  • the semiconductor device 20 shown in FIG. 9 includes a DCDC converter 120, a smoothing circuit 121, and a circuit 10.
  • the circuit 10 has a wiring 100, a capacitance unit 104, and a load 103.
  • the smoothing circuit 121 includes an inductor 122 and a capacitance element 123.
  • the inductor 122 is supplied with a potential output from the DCDC converter 120 to one terminal, and the other terminal is electrically connected to the wiring 100.
  • the potential output from the DCDC converter 120 is input to the capacitance section 104 via the wiring 100 after the waveform disturbance such as ripple is removed in the smoothing circuit 121.
  • the noise component corresponding to the fluctuation of the potential that could not be completely removed by the smoothing circuit 121 is released to the wiring 102 via the capacitive element 101, and the noise component is supplied to the load 103. It can be prevented from being done.
  • the semiconductor device 20 can be downsized by superimposing the capacitance element 101 on the region where the wiring 100 is arranged.
  • This embodiment can be implemented in combination with other embodiments as appropriate.
  • FIG. 10 shows an example of a top view of the wiring 100, the wiring 102, and the capacitance portion 104 shown in FIG. 2B.
  • various insulators are omitted in order to clarify the configurations of the wiring 100, the wiring 102, and the capacitance portion 104.
  • the conductor 100a having a function as the wiring 100 has a comb-like shape in a plan view.
  • the plurality of conductors 102a to 102j having a U-shaped shape in a plan view are electrically connected to each other by the conductors 150a to 150j arranged in the lower layer of the conductors 102a to 102j, and are conductive.
  • the bodies 102a to 102j and the conductors 150a to 150j have a function as a wiring 102.
  • FIG. 10 illustrates a case where the conductors 102a to 102j and the conductors 150a to 150j have a function as the wiring 102 as a whole, various conductors necessary for functioning as the wiring 102 are illustrated. The number can be set as appropriate.
  • the convex portion of the conductor 100a and the concave portion of the conductors 102a to 102j are arranged at opposite positions in a plan view, and are further arranged so as to mesh with each other at a predetermined interval. There is.
  • FIG. 10 An enlarged view of the area 160 surrounded by the broken line in FIG. 10 is shown in FIG. Further, cross-sectional views of the broken lines L1-L2, the broken lines W1-W2, and the broken lines W3-W4 of FIG. 11 are shown in FIGS. 12 to 14, respectively.
  • FIGS. 12 to 14 the layout and the laminated structure of the wiring 100, the wiring 102, and the capacitance element 101 of the circuit 10 will be described with reference to FIGS. 11 to 14.
  • a plurality of transistors 105t are connected in parallel. Specifically, the source and drain of the plurality of transistors 105t are electrically connected to each other, and the front gate and the back gate are electrically connected to each other.
  • a plurality of transistors 105t connected in parallel can function as one transistor 105.
  • FIG. 11 illustrates a case where a plurality of transistors 105t connected in parallel function as one transistor 105, one transistor 105t may function as a transistor 105 as it is.
  • FIGS. 11 to 14 illustrate the configuration of the circuit 10 when the transistor 105t is an OS transistor.
  • FIG. 12 corresponding to the broken line L1-L2 of FIG. 11 corresponds to the cross section of the transistor 105t in the channel length direction
  • FIG. 13 corresponding to the broken line W1-W2 of FIG. 11 corresponds to the cross section of the transistor 105t in the channel width direction.
  • the insulator 512, the insulator 514, and the insulator 516 are laminated in this order.
  • the transistor 105t is an OS transistor, it is preferable to use a substance having a barrier property against oxygen or hydrogen as any one of the insulator 512, the insulator 514, and the insulator 516.
  • the insulator 514 uses a film having a barrier property so that hydrogen and impurities do not diffuse.
  • a film having a barrier property for the insulator 514 it is possible to prevent hydrogen and impurities from diffusing from the lower layer of the insulator 514 to the region where the transistor 105t is provided.
  • Silicon nitride formed by the CVD method can be used as an example of a film having a barrier property against hydrogen.
  • hydrogen may diffuse into a semiconductor element having an oxide semiconductor such as a transistor 105t, so that the electrical characteristics of the semiconductor element may deteriorate. Therefore, it is preferable to use a film that suppresses the diffusion of hydrogen in the lower layer of the transistor 105t.
  • the membrane that suppresses the diffusion of hydrogen is a membrane that desorbs a small amount of hydrogen.
  • a film having a barrier property against hydrogen for example, it is preferable to use a metal oxide such as aluminum oxide, hafnium oxide, or tantalum oxide for the insulator 514.
  • a metal oxide such as aluminum oxide, hafnium oxide, or tantalum oxide for the insulator 514.
  • aluminum oxide has a high blocking effect that does not allow both oxygen and impurities such as hydrogen and water, which cause fluctuations in the electrical characteristics of the transistor, to permeate. Therefore, aluminum oxide can prevent impurities such as hydrogen and water from being mixed into the transistor 105t during and after the transistor is manufactured. In addition, the release of oxygen from the oxides constituting the transistor 105t can be suppressed. Therefore, aluminum oxide is suitable for use as a protective film for the transistor 105t.
  • the insulator 512 and the insulator 516 for example, silicon oxide, silicon oxide nitride, silicon nitride, silicon nitride, aluminum oxide, aluminum nitride, aluminum nitride, aluminum nitride or the like may be used. Further, by applying a material having a relatively low dielectric constant to these insulators, it is possible to reduce the parasitic capacitance generated between the wirings. For example, as the insulator 512 and the insulator 516, a silicon oxide film, a silicon nitride film, or the like can be used.
  • silicon oxide refers to a material whose composition has a higher oxygen content than nitrogen
  • silicon nitride refers to a material whose composition has a higher nitrogen content than oxygen. Is shown.
  • aluminum nitride refers to a material whose composition has a higher oxygen content than nitrogen
  • aluminum nitride refers to a material whose composition has a higher nitrogen content than oxygen. Is shown.
  • a conductor (for example, a conductor 503) constituting the transistor 105t is embedded in the insulator 514 and the insulator 516.
  • a conductive material such as a metal material, an alloy material, a metal nitride material, or a metal oxide material can be used as a single layer or laminated. It is preferable to use a refractory material such as tungsten or molybdenum that has both heat resistance and conductivity, and it is preferable to use tungsten.
  • it is preferably formed of a low resistance conductive material such as aluminum or copper. Wiring resistance can be reduced by using a low resistance conductive material.
  • the conductor 503 in the region in contact with the insulator 514 is preferably a conductor having a barrier property against oxygen, hydrogen, and water.
  • the transistor 105t and the region under the transistor 105t can be separated by a layer having a barrier property against oxygen, hydrogen, and water, and the diffusion of hydrogen from the lower layer of the transistor 105t to the transistor 105t can be performed. It can be suppressed.
  • a transistor 105t is provided above the insulator 516.
  • the transistor 105t is a conductor 503 arranged so as to be embedded in the insulator 514 and the insulator 516, an insulator 522 arranged on the insulator 516 and the insulator 503, and an insulator 522.
  • Insulator 524 placed above, oxide 530a placed on insulator 524, oxide 530b placed on oxide 530a, and conductivity placed apart from each other on oxide 530b.
  • An insulator 580 arranged on the body 542a and the conductor 542b, the conductor 542a and the conductor 542b, and having an opening formed by overlapping between the conductor 542a and the conductor 542b, and arranged on the bottom surface and the side surface of the opening. It has an insulator 545 and a conductor 560 arranged on the forming surface of the insulator 545.
  • the insulator 544 is arranged between the oxide 530a, the oxide 530b, the conductor 542a, and the conductor 542b and the insulator 580.
  • the conductor 560 preferably has a conductor 560a provided inside the insulator 545 and a conductor 560b provided so as to be embedded inside the conductor 560a.
  • the insulator 574 is arranged on the insulator 580, the conductor 560, and the insulator 545.
  • oxide 530a and oxide 530b are laminated in the region where the channel is formed and in the vicinity thereof, but the present invention is not limited to this.
  • the oxide 530b may have a single layer or a laminated structure of three or more layers.
  • the transistor 105t has a two-layer laminated structure of the conductor 560, but the present invention is not limited to this.
  • the conductor 560 may have a single-layer structure or a laminated structure of three or more layers.
  • the conductor 560 is formed so as to be embedded in the opening of the insulator 580 and the region sandwiched between the conductor 542a and the conductor 542b.
  • the arrangement of the conductor 560, the conductor 542a and the conductor 542b is self-aligned with respect to the opening of the insulator 580. That is, in the transistor 105t, the gate electrode can be arranged in a self-aligned manner between the source electrode and the drain electrode. Therefore, since the conductor 560 can be formed without providing the alignment margin, the occupied area of the transistor 105t can be reduced. As a result, the circuit 10 and the semiconductor device using the circuit 10 can be miniaturized and highly integrated.
  • the conductor 560 is formed in a region between the conductor 542a and the conductor 542b in a self-aligned manner, the conductor 560 does not have a region that overlaps with the conductor 542a or the conductor 542b. Thereby, the parasitic capacitance formed between the conductor 560 and the conductors 542a and 542b can be reduced.
  • the conductor 560 may function as a first gate (also referred to as a front gate) electrode. Further, the conductor 503 may function as a second gate (also referred to as a back gate) electrode. In one aspect of the present invention, the front gate and the back gate of the transistor 105t are electrically connected to each other, and the front gate and the back gate are also electrically connected to the conductor 102a and the conductor 102b that function as wiring 102. Connected to. Specifically, as shown in FIG. 11, the conductor 503 is electrically connected to the conductor 161 via the conductor 540c, and the conductor 161 is electrically connected to the conductor 102b via the conductor 540d. Be connected.
  • the conductor 102b is electrically connected to the conductor 150a via the conductor 540e, and the conductor 150a is electrically connected to the conductor 102a via the conductor 540f. Further, the conductor 102a is electrically connected to the conductor 162 via the conductor 540 g, and the conductor 162 is electrically connected to the conductor 560a via the conductor 540 h.
  • the conductor 542a and the conductor 542b each have a function as a source electrode or a drain electrode.
  • the source electrode and the drain electrode of the transistor 105t are electrically connected to each other, and the source electrode and the drain electrode are also electrically connected to the conductor 100a that functions as the wiring 100. ..
  • the conductor 542a is electrically connected to the conductor 163 via the conductor 540a
  • the conductor 542b is electrically connected to the conductor 163 via the conductor 540b.
  • the conductor 163 is electrically connected to the conductor 100a via the conductor 540i
  • the conductor 163 is electrically connected to the conductor 100a via the conductor 540j.
  • the conductor 503 is arranged so as to overlap the oxide 530 and the conductor 560. As a result, when a potential is applied to the conductor 560 and the conductor 503, the electric field generated from the conductor 560 and the electric field generated from the conductor 503 are connected, and the connected electric field forms a channel formed in the oxide 530. The area can be covered.
  • the configuration of the transistor that electrically surrounds the channel formation region by the electric field of the pair of gate electrodes is referred to as a surroundd channel (S-channel) configuration.
  • the curved channel (S-channel) configuration makes it possible to increase the capacitance value per area of the capacitive element 101 using the transistor 105t in a plan view.
  • the capacitance value per area in a plan view can be further increased.
  • the conductor 503a is formed in contact with the inner wall of the recess formed by the openings of the insulator 514 and the insulator 516, and the conductor is further inside. 503b is formed.
  • the conductor 503a and the conductor 503b are laminated, but the present invention is not limited to this.
  • the conductor 503 may have a single layer or a laminated structure of three or more layers.
  • the conductor 503a it is preferable to use a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms (the conductive material in which the above impurities are difficult to permeate).
  • a conductive material having a function of suppressing the diffusion of oxygen for example, at least one such as an oxygen atom and an oxygen molecule
  • the function of suppressing the diffusion of impurities or oxygen is a function of suppressing the diffusion of any one or all of the above impurities or the above oxygen.
  • the conductor 503a since the conductor 503a has a function of suppressing the diffusion of oxygen, it is possible to prevent the conductor 503b from being oxidized and the conductivity from being lowered.
  • the conductor 503 also functions as a wiring, it is preferable to use a highly conductive conductive material containing tungsten, copper, or aluminum as a main component for the conductor 503b.
  • the insulator 522 and the insulator 524 have a function as a second gate insulating film.
  • the insulator 524 in contact with the oxide 530 it is preferable to use an insulator containing more oxygen than oxygen satisfying the stoichiometric composition.
  • the oxygen is easily released from the membrane by heating.
  • oxygen released by heating may be referred to as "excess oxygen”. That is, it is preferable that the insulator 524 is formed with a region containing excess oxygen (also referred to as “excess oxygen region”).
  • the defective (hereinafter sometimes referred to as V O H) serves as a donor, sometimes electrons serving as carriers are generated.
  • a part of hydrogen may be combined with oxygen that is bonded to a metal atom to generate an electron as a carrier. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen tends to have a normally-on characteristic. Further, since hydrogen in the oxide semiconductor easily moves due to stress such as heat and electric field, if the oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may deteriorate.
  • the V O H to obtain a sufficiently reduced oxide semiconductor, the moisture in the oxide semiconductor, to remove impurities such as hydrogen (also referred to as “dewatering” or “dehydrogenation process") It is important to supply oxygen to the oxide semiconductor to compensate for the oxygen deficiency (also referred to as “oxygenation treatment").
  • the V O H oxide semiconductor impurity is sufficiently reduced such by using a channel formation region of the transistor, it is possible to have stable electrical characteristics.
  • the insulator having an excess oxygen region it is preferable to use an oxide material in which a part of oxygen is desorbed by heating.
  • Oxides that desorb oxygen by heating are those in which the amount of oxygen desorbed in terms of oxygen atoms is 1.0 ⁇ 10 18 atoms / cm 3 or more, preferably 1 in TDS (Thermal Desorption Spectroscopy) analysis.
  • the oxide film is 0.0 ⁇ 10 19 atoms / cm 3 or more, more preferably 2.0 ⁇ 10 19 atoms / cm 3 or more, and even more preferably 3.0 ⁇ 10 20 atoms / cm 3 or more.
  • the surface temperature of the film during the TDS analysis is preferably in the range of 100 ° C. or higher and 700 ° C. or lower, or 100 ° C. or higher and 400 ° C. or lower.
  • the insulator having the excess oxygen region and the oxide 530 may be brought into contact with each other to perform one or more of heat treatment, microwave treatment, or RF treatment.
  • heat treatment microwave treatment, or RF treatment.
  • water or hydrogen in the oxide 530 can be removed.
  • reactions occur which bonds VoH is disconnected, when other words happening reaction of "V O H ⁇ Vo + H", it can be dehydrogenated.
  • the hydrogen generated as oxygen combines with H 2 O, it may be removed from the oxide 530 or oxide 530 near the insulator.
  • a part of hydrogen may be gettered on the conductor 542a and the conductor 542b.
  • the microwave processing for example, it is preferable to use an apparatus having a power source for generating high-density plasma or an apparatus having a power source for applying RF to the substrate side.
  • an apparatus having a power source for generating high-density plasma for example, by using a gas containing oxygen and using a high-density plasma, high-density oxygen radicals can be generated, and by applying RF to the substrate side, the oxygen radicals generated by the high-density plasma can be generated.
  • the pressure may be 133 Pa or more, preferably 200 Pa or more, and more preferably 400 Pa or more.
  • oxygen and argon are used as the gas to be introduced into the apparatus for performing microwave treatment, and the oxygen flow rate ratio (O 2 / (O 2 + Ar)) is 50% or less, preferably 10% or more and 30. It is advisable to perform microwave processing at% or less.
  • the heat treatment may be performed, for example, at 100 ° C. or higher and 450 ° C. or lower, more preferably 350 ° C. or higher and 400 ° C. or lower.
  • the heat treatment is carried out in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas.
  • the heat treatment is preferably performed in an oxygen atmosphere.
  • oxygen can be supplied to the oxide 530 to reduce oxygen deficiency ( VO ).
  • the heat treatment may be performed in a reduced pressure state.
  • the heat treatment may be carried out in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of oxidizing gas in order to supplement the desorbed oxygen after the heat treatment in an atmosphere of nitrogen gas or an inert gas.
  • the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of the oxidizing gas, and then the heat treatment may be continuously performed in an atmosphere of nitrogen gas or an inert gas.
  • the oxygen deficiency in the oxide 530 can be repaired by the supplied oxygen, in other words, the reaction "Vo + O ⁇ null" can be promoted. Further, since the oxygen supplied to the hydrogen remaining in the oxide 530 is reacted to remove the hydrogen as H 2 O (to dehydration) can. Thus, the hydrogen remained in the oxide 530 can be prevented from recombine V O H is formed by oxygen vacancies.
  • the insulator 524 has an excess oxygen region, it is preferable that the insulator 522 has a function of suppressing the diffusion of oxygen (for example, oxygen atom, oxygen molecule, etc.) (the oxygen is difficult to permeate).
  • oxygen for example, oxygen atom, oxygen molecule, etc.
  • the insulator 522 has a function of suppressing the diffusion of oxygen and impurities, the oxygen contained in the oxide 530 does not diffuse to the insulator 516 side, which is preferable. Further, it is possible to suppress the conductor 503 from reacting with the oxygen contained in the insulator 524 and the oxide 530.
  • the insulator 522 may be, for example, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), tantalum oxide, zirconate oxide, lead zirconate titanate (PZT), strontium titanate (SrTIO 3 ), or It is preferable to use an insulator containing a so-called high-k material such as (Ba, Sr) TiO 3 (BST) in a single layer or in a laminated manner. As the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulating film. By using a high-k material for the insulator that functions as a gate insulating film, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.
  • a so-called high-k material such as (Ba, Sr) TiO 3 (BST)
  • an insulator containing an oxide of one or both of aluminum and hafnium which are insulating materials having a function of suppressing diffusion of impurities and oxygen (the above oxygen is difficult to permeate).
  • the insulator containing one or both oxides of aluminum and hafnium it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate) and the like.
  • the insulator 522 is formed by using such a material, the insulator 522 suppresses the release of oxygen from the oxide 530 and the mixing of impurities such as hydrogen from the peripheral portion of the transistor 105t into the oxide 530. Acts as a layer.
  • aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, and zirconium oxide may be added to these insulators.
  • these insulators may be nitrided. Silicon oxide, silicon oxide or silicon nitride may be laminated on the above insulator.
  • the insulator 524 is preferably thermally stable.
  • silicon oxide and silicon oxide nitride are suitable because they are thermally stable.
  • by combining the insulator of the high-k material with silicon oxide or silicon oxide nitride it is possible to obtain an insulator 524 having a laminated structure that is thermally stable and has a high relative permittivity.
  • the transistor 105t has a second gate insulating film having a laminated structure of two layers shown by the insulator 522 and the insulator 524 is illustrated, but the second gate The insulating film may have a single layer, three layers, or a laminated structure of four or more layers.
  • the laminated structure is not limited to the same material, and may be a laminated structure made of different materials.
  • the transistor 105t uses a metal oxide that functions as an oxide semiconductor for the oxide 530 containing the channel forming region.
  • oxide 530 In-M-Zn oxide (element M is aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lantern, cerium, neodymium).
  • Hafnium, tantalum, tungsten, magnesium, etc. (one or more) and the like may be used.
  • the metal oxide functioning as an oxide semiconductor may be formed by a sputtering method or an ALD (Atomic Layer Deposition) method.
  • ALD Atomic Layer Deposition
  • a metal oxide having a band gap of 2 eV or more, preferably 2.5 eV or more, which functions as a channel forming region in the oxide 530 it is preferable to use a metal oxide having a band gap of 2 eV or more, preferably 2.5 eV or more, which functions as a channel forming region in the oxide 530. As described above, by using a metal oxide having a large bandgap, the off-current of the transistor can be reduced.
  • the oxide 530 can suppress the diffusion of impurities from the composition formed below the oxide 530a to the oxide 530b.
  • the oxide 530 has a laminated structure of a plurality of oxide layers having different atomic number ratios of each metal atom.
  • the atomic number ratio of the element M in the constituent elements is larger than the atomic number ratio of the element M in the constituent elements in the metal oxide used in the oxide 530b.
  • the atomic number ratio of the element M to In is preferably larger than the atomic number ratio of the element M to In in the metal oxide used for the oxide 530b.
  • the atomic number ratio of In to the element M is preferably larger than the atomic number ratio of In to the element M in the metal oxide used for the oxide 530a.
  • the energy at the lower end of the conduction band of the oxide 530a is higher than the energy at the lower end of the conduction band of the oxide 530b.
  • the electron affinity of the oxide 530a is smaller than the electron affinity of the oxide 530b.
  • the energy level at the lower end of the conduction band changes gently.
  • the energy level at the lower end of the conduction band at the junction of the oxide 530a and the oxide 530b is continuously changed or continuously bonded. In order to do so, it is preferable to reduce the defect level density of the mixed layer formed at the interface between the oxide 530a and the oxide 530b.
  • the oxide 530a and the oxide 530b have a common element other than oxygen as a main component, a mixed layer having a low defect level density can be formed.
  • the oxide 530b is an In-Ga-Zn oxide
  • the main path of the carrier is the oxide 530b.
  • the defect level density at the interface between the oxide 530a and the oxide 530b can be lowered.
  • a conductor 542a and a conductor 542b that function as a source electrode and a drain electrode are provided on the oxide 530b.
  • Examples of the conductor 542a and the conductor 542b include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, and ruthenium. , Iridium, strontium, lanthanum, or an alloy containing the above-mentioned metal element as a component, an alloy in which the above-mentioned metal element is combined, or the like is preferably used.
  • tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel, etc. are used. Is preferable.
  • tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are difficult to oxidize.
  • a metal nitride film such as tantalum nitride is preferable because it has a barrier property against hydrogen or oxygen.
  • the conductor 542a and the conductor 542b have a single-layer structure, but a laminated structure of two or more layers may be used.
  • a tantalum nitride film and a tungsten film may be laminated.
  • the titanium film and the aluminum film may be laminated.
  • a two-layer structure in which an aluminum film is laminated on a tungsten film a two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film, a two-layer structure in which a copper film is laminated on a titanium film, and a two-layer structure in which a copper film is laminated on a titanium film. It may have a two-layer structure in which copper films are laminated.
  • a molybdenum nitride film and an aluminum film or a copper film are laminated on the molybdenum film or the molybdenum nitride film, and a molybdenum film or a molybdenum nitride film is further formed on the aluminum film or the copper film.
  • a transparent conductive material containing indium oxide, tin oxide or zinc oxide may be used.
  • a region 543a and a region 543b may be formed as a low resistance region at the interface of the oxide 530 with the conductor 542a (or the conductor 542b) and its vicinity thereof.
  • the region 543a functions as one of the source region or the drain region
  • the region 543b functions as the other of the source region or the drain region.
  • a channel forming region is formed in a region sandwiched between the region 543a and the region 543b.
  • the oxygen concentration in the region 543a (or region 543b) may be reduced. Further, in the region 543a (or region 543b), a metal compound layer containing the metal contained in the conductor 542a (or the conductor 542b) and the component of the oxide 530 may be formed. In such a case, the carrier density of the region 543a (or region 543b) increases, and the region 543a (or region 543b) becomes a low resistance region.
  • the insulator 544 is provided so as to cover the conductor 542a and the conductor 542b, and suppresses the oxidation of the conductor 542a and the conductor 542b. At this time, the insulator 544 may be provided so as to cover the side surface of the oxide 530 and come into contact with the insulator 524.
  • insulator 544 a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, neodymium, lantern, magnesium, etc. Can be used. Further, as the insulator 544, silicon nitride oxide, silicon nitride or the like can also be used.
  • the insulator 544 it is preferable to use aluminum or an oxide containing one or both oxides of hafnium, such as aluminum oxide, hafnium oxide, aluminum, and an oxide containing hafnium (hafnium aluminate).
  • hafnium aluminate has higher heat resistance than the hafnium oxide film. Therefore, it is preferable because it is difficult to crystallize in the heat treatment in the subsequent step.
  • the conductors 542a and 542b are made of a material having oxidation resistance, or if the conductivity does not significantly decrease even if oxygen is absorbed, the insulator 544 is not an essential configuration. It may be appropriately designed according to the desired transistor characteristics.
  • the insulator 544 By having the insulator 544, it is possible to prevent impurities such as water and hydrogen contained in the insulator 580 from diffusing into the oxide 530b via the insulator 545. Further, it is possible to suppress the oxidation of the conductor 560 due to the excess oxygen contained in the insulator 580.
  • the insulator 545 functions as a first gate insulating film.
  • the insulator 545 is preferably formed by using an insulator that contains an excess of oxygen and releases oxygen by heating, similarly to the above-mentioned insulator 524.
  • silicon oxide with excess oxygen silicon oxide, silicon nitride, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, carbon, and silicon oxide with nitrogen added, vacancies Silicon oxide having can be used.
  • silicon oxide and silicon oxide nitride are preferable because they are stable against heat.
  • the film thickness of the insulator 545 is preferably 1 nm or more and 20 nm or less.
  • a metal oxide may be provided between the insulator 545 and the conductor 560.
  • the metal oxide preferably suppresses oxygen diffusion from the insulator 545 to the conductor 560.
  • the diffusion of excess oxygen from the insulator 545 to the conductor 560 is suppressed. That is, it is possible to suppress a decrease in the amount of excess oxygen supplied to the oxide 530.
  • oxidation of the conductor 560 due to excess oxygen can be suppressed.
  • a material that can be used for the insulator 544 may be used.
  • the insulator 545 may have a laminated structure as in the case of the second gate insulating film.
  • an insulator that functions as a gate insulating film is made of a high-k material and heat.
  • the conductor 560 that functions as the first gate electrode has a two-layer structure in the present embodiment, but may have a single-layer structure or a laminated structure of three or more layers.
  • Conductor 560a is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, nitric oxide molecule (N 2 O, NO, etc. NO 2), conductive having a function of suppressing the diffusion of impurities such as copper atoms It is preferable to use a material. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one oxygen atom, oxygen molecule, etc.). Since the conductor 560a has a function of suppressing the diffusion of oxygen, it is possible to prevent the conductor 560b from being oxidized by the oxygen contained in the insulator 545 and the conductivity from being lowered.
  • the conductive material having a function of suppressing the diffusion of oxygen for example, tantalum, tantalum nitride, ruthenium, ruthenium oxide and the like are preferably used.
  • an oxide semiconductor applicable to the oxide 530 can be used as the conductor 560a. In that case, by forming the conductor 560a into a film by a sputtering method, the electric resistance value of the conductor 560a can be lowered to form a conductor. This can be called an OC (Oxide Conductor) electrode.
  • the conductor 560b it is preferable to use a conductive material containing tungsten, copper, or aluminum as a main component. Further, since the conductor 560b also functions as wiring, it is preferable to use a conductor having high conductivity. For example, a conductive material containing tungsten, copper, or aluminum as a main component can be used. Further, the conductor 560b may have a laminated structure, for example, a laminated structure of titanium or titanium nitride and the conductive material.
  • the insulator 580 is provided on the conductor 542a and the conductor 542b via the insulator 544.
  • the insulator 580 preferably has an excess oxygen region.
  • silicon, resin, or the like silicon oxide and silicon oxide nitride are preferable because they are thermally stable.
  • silicon oxide and silicon oxide having pores are preferable because an excess oxygen region can be easily formed in a later step.
  • the insulator 580 preferably has an excess oxygen region. By providing the insulator 580 in which oxygen is released by heating, the oxygen in the insulator 580 can be efficiently supplied to the oxide 530. It is preferable that the concentration of impurities such as water and hydrogen in the insulator 580 is reduced.
  • the opening of the insulator 580 is formed so as to overlap the region between the conductor 542a and the conductor 542b.
  • the conductor 560 is formed so as to be embedded in the opening of the insulator 580 and the region sandwiched between the conductor 542a and the conductor 542b.
  • the conductor 560 may have a shape having a high aspect ratio.
  • the conductor 560 is provided so as to be embedded in the opening of the insulator 580, even if the conductor 560 has a shape having a high aspect ratio, the conductor 560 is formed without collapsing during the process. Can be done.
  • the insulator 574 is preferably provided in contact with the upper surface of the insulator 580, the upper surface of the conductor 560, and the upper surface of the insulator 545.
  • an excess oxygen region can be provided in the insulator 545 and the insulator 580.
  • oxygen can be supplied into the oxide 530 from the excess oxygen region.
  • the insulator 574 use one or more metal oxides selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium and the like. Can be done.
  • aluminum oxide has a high barrier property and can suppress the diffusion of hydrogen and nitrogen even in a thin film of 0.5 nm or more and 3.0 nm or less. Therefore, the aluminum oxide film formed by the sputtering method can have a function as a barrier film for impurities such as hydrogen as well as an oxygen supply source.
  • the insulator 581 that functions as an interlayer film on the insulator 574.
  • the insulator 581 preferably has a reduced concentration of impurities such as water or hydrogen in the film.
  • the conductor 540a and the conductor 540b are arranged in the openings formed in the insulator 581, the insulator 574, the insulator 580, and the insulator 544.
  • the conductor 540a and the conductor 540b are provided so as to face each other with the conductor 560 interposed therebetween.
  • the conductor 540c is arranged in the openings formed in the insulator 581, the insulator 574, the insulator 580, the insulator 544, the insulator 524, and the insulator 522.
  • the conductor 540h is arranged in the insulator 581 and the opening formed in the insulator 574.
  • a conductor 161 and a conductor 162 and a conductor 163 are provided on the insulator 581.
  • Insulator 650 is provided on the insulator 581, the conductor 161 and the conductor 162, and on the conductor 163.
  • a conductor 150a is provided on the insulator 650, and an insulator 651 and an insulator 652 are provided on the insulator 650 and on the conductor 150a.
  • the insulator 651, and the insulator 652 for example, silicon oxide, silicon oxide nitride, silicon nitride, silicon nitride, aluminum oxide, aluminum nitride, aluminum nitride, aluminum nitride, or the like may be used.
  • the insulator 650 As the insulator 650, the insulator 651, and the insulator 652, a silicon oxide film, a silicon nitride film, or the like can be used. Further, the insulator 652 may function as a flattening film that covers the uneven shape below the insulator 652.
  • a conductor 100a, a conductor 102a, and a conductor 102b are provided on the insulator 652.
  • An insulator 653 is provided on the conductor 100a, the conductor 102a, and the conductor 102b.
  • an insulator used as an insulator 650, an insulator 651, or an insulator 652 may be used.
  • the conductor 150a and the conductor 163 have a region that overlaps with each other via the insulator 650 in a cross-sectional view, and the region has a function as a capacitive element 600.
  • the conductor 150a is electrically connected to the conductor 102a and the conductor 102b that function as the wiring 102, and the conductor 163 is electrically connected to the conductor 100a that functions as the wiring 100. Therefore, in the capacitive element 600, one electrode is electrically connected to the wiring 100, and the other electrode is electrically connected to the wiring 102.
  • the conductor 100a, the conductor 102a, and the conductor 102b have a region facing each other via the insulator 653 in a plan view, and the region is a capacitive element. It has a function as 601.
  • the conductor 100a functions as the wiring 100
  • the conductor 102a and the conductor 102b function as the wiring 102. Therefore, in the capacitance element 601, one electrode is electrically connected to the wiring 100 and the other electrode is electrically connected to the wiring 102.
  • the conductor 560 that functions as a front gate and the conductor 503 that functions as a back gate are electrically connected to the conductor 150a, and the conductor 542a and the conductor that function as a source electrode or a drain electrode are conductive.
  • the body 542b is electrically connected to the conductor 163. Therefore, in the capacitance element 101a corresponding to the capacitance formed between the source and drain of the transistor 105 and the front gate and the back gate, one electrode is electrically connected to the wiring 100 and the other electrode is electrically connected to the wiring 102. It can be regarded as being electrically connected.
  • the capacitance element 600, the capacitance element 601 and the capacitance element 101a are electrically connected between the wiring 100 and the wiring 102, the capacitance element 600, the capacitance element 601 and the capacitance element 101a are electrically connected to each other through these capacitance elements.
  • the noise component of the potential given to the wiring 100 can be removed.
  • the transistor 105 forming the capacitance element 101a, the capacitance element 600, and the capacitance element 601 are stacked in this order and have regions that overlap each other. Therefore, in one aspect of the present invention, it is possible to suppress the layout area of the circuit in a plan view while suppressing the malfunction of the circuit 10 or the semiconductor device using the circuit 10, or to reduce the size of the semiconductor device using the circuit. can do.
  • the conductor 161, the conductor 162, the conductor 163, the conductor 150a, the conductor 100a, the conductor 102a, and the conductor 102b are selected from molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, and scandium.
  • a metal film containing the above-mentioned elements, a metal nitride film containing the above-mentioned elements as a component (tantal nitride film, titanium nitride film, molybdenum nitride film, tungsten nitride film) or the like can be used.
  • indium tin oxide indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and silicon oxide are added. It is also possible to apply a conductive material such as indium tin oxide.
  • the conductor 161 and the conductor 162, the conductor 163, the conductor 150a, the conductor 100a, the conductor 102a, and the conductor 102b are shown in a single-layer configuration, but the configuration is not limited to this.
  • a laminated structure of two or more layers may be used.
  • a conductor having a barrier property and a conductor having a high adhesion to a conductor having a high conductivity may be formed between a conductor having a barrier property and a conductor having a high conductivity.
  • a tungsten film is used for the conductor 161 and the conductor 162, the conductor 163, and the conductor 150a.
  • a titanium film, a titanium nitride film, an aluminum film, a titanium film, and a titanium nitride film are laminated in this order on the conductor 100a, the conductor 102a, and the conductor 102b.
  • the conductor 540d, the conductor 540g, the conductor 540i, and the conductor 540j are arranged in the openings formed in the insulator 652, the insulator 651, and the insulator 650.
  • the conductor 540e and the conductor 540f are arranged in the insulator 652 and the opening formed in the insulator 651.
  • an opening may be formed so as to surround the transistor 105t, and an insulator having a high barrier property to hydrogen or water may be formed so as to cover the opening.
  • an opening is formed so as to surround the transistor 105t, for example, an opening reaching the insulator 522 or the insulator 514 is formed, and the above-mentioned insulator having a high barrier property is provided so as to be in contact with the insulator 522 or the insulator 514.
  • the insulator having a high barrier property to hydrogen or water for example, the same material as the insulator 522 or the insulator 514 may be used.
  • the substrates that can be used in the semiconductor device of one aspect of the present invention include glass substrates, quartz substrates, sapphire substrates, ceramic substrates, and metal substrates (for example, stainless steel substrates, substrates with stainless still foil, and tungsten substrates. , Substrates having tungsten foil, etc.), semiconductor substrates (for example, monocrystalline semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductor substrates, etc.) SOI (Silicon on Insulator) substrates, and the like can be used. Further, a plastic substrate having heat resistance that can withstand the processing temperature of the present embodiment may be used. Examples of glass substrates include barium borosilicate glass, aluminosilicate glass, aluminosilicate glass, and soda lime glass. In addition, crystallized glass or the like can be used.
  • a flexible substrate a laminated film, paper containing a fibrous material, a base film, or the like
  • flexible substrates, laminated films, base films, etc. include the following.
  • plastics typified by polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyether sulfone (PES), and polytetrafluoroethylene (PTFE).
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • PES polyether sulfone
  • PTFE polytetrafluoroethylene
  • acrylic examples include polypropylene, polyester, polyvinyl fluoride, or polyvinyl chloride.
  • examples include polyamide, polyimide, aramid resin, epoxy resin, inorganic vapor-deposited film, and papers.
  • a transistor using a semiconductor substrate, a single crystal substrate, an SOI substrate, or the like, it is possible to manufacture a transistor having a high current capacity and a small size with little variation in characteristics, size, or shape. ..
  • the circuit is composed of such transistors, the power consumption of the circuit can be reduced or the circuit can be highly integrated.
  • a flexible substrate may be used as the substrate, and a transistor, a resistance element, and / or a capacitive element or the like may be formed directly on the flexible substrate.
  • a release layer may be provided between the substrate and a transistor, a resistance element, and / or a capacitive element. The release layer can be used to separate a part or all of the semiconductor device on the substrate, separate it from the substrate, and transfer it to another substrate. At that time, the transistor, the resistance element, and / or the capacitive element can be reprinted on a substrate having poor heat resistance or a flexible substrate.
  • release layer for example, a laminated structure of an inorganic film of a tungsten film and a silicon oxide film, a structure in which an organic resin film such as polyimide is formed on a substrate, a silicon film containing hydrogen, or the like is used. Can be done.
  • the semiconductor device may be formed on a certain substrate, and then the semiconductor device may be transposed on another substrate.
  • substrates on which semiconductor devices are transferred include paper substrates, cellophane substrates, aramid film substrates, polyimide film substrates, stone substrates, wood substrates, and cloth substrates (natural) in addition to the substrates on which the above-mentioned transistors can be formed.
  • fibers including silk, cotton, linen
  • synthetic fibers nylon, polyurethane, polyester
  • recycled fibers including acetate, cupra, rayon, recycled polyester
  • leather substrates or rubber substrates.
  • This embodiment can be implemented in combination with other embodiments as appropriate.
  • FIG. 15 A part of the cross-sectional structure of the semiconductor device is shown in FIG.
  • the semiconductor device shown in FIG. 15 includes a transistor 550 and a transistor 105t.
  • FIG. 15 illustrates the transistor 105t shown in FIG. 12, the transistor 105 shown in FIGS. 4 and 5 can also be applied. Further, with respect to the components having the same reference numerals as those shown in FIGS. 10 to 14 in FIG. 15, the description in the third embodiment can be incorporated.
  • the transistor 105t is provided above the transistor 550.
  • the transistor 550 is provided on the substrate 311 and has a semiconductor region 313 composed of a conductor 316, an insulator 315, and a part of the substrate 311, a low resistance region 314a functioning as a source region or a drain region, and a low resistance region 314b. ..
  • FIG. 15 shows a cross-sectional view of the transistor 550 in the channel length direction.
  • the upper surface of the semiconductor region 313 and the side surface in the channel width direction of the transistor 550 are covered with the conductor 316 via the insulator 315. It has been.
  • the transistor 550 By making the transistor 550 a Fin type in this way, the on-characteristics of the transistor 550 can be improved by increasing the effective channel width. Further, since the contribution of the electric field of the gate electrode can be increased, the off characteristic of the transistor 550 can be improved.
  • the transistor 550 may be either a p-channel type or an n-channel type.
  • a semiconductor such as a silicon-based semiconductor in a region in which a channel of the semiconductor region 313 is formed, a region in the vicinity thereof, a low resistance region 314a serving as a source region or a drain region, a low resistance region 314b, and the like. It is more preferable to contain crystalline silicon. Alternatively, it may be formed of a material having Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenide), or the like. A configuration using silicon in which the effective mass is controlled by applying stress to the crystal lattice and changing the lattice spacing may be used. Alternatively, the transistor 550 may be a HEMT (High Electron Mobility Transistor) by using GaAs, GaAlAs, or the like.
  • HEMT High Electron Mobility Transistor
  • an element that imparts n-type conductivity such as arsenic and phosphorus, or a p-type conductivity such as boron is imparted.
  • the conductor 316 that functions as a gate electrode is a semiconductor material such as silicon, a metal material, or an alloy that contains an element that imparts n-type conductivity such as arsenic or phosphorus, or an element that imparts p-type conductivity such as boron.
  • a material or a conductive material such as a metal oxide material can be used.
  • the threshold voltage of the transistor can be adjusted by selecting the material of the conductor. Specifically, it is preferable to use a material such as titanium nitride or tantalum nitride for the conductor. Further, in order to achieve both conductivity and embedding property, it is preferable to use a metal material such as tungsten or aluminum as a laminate for the conductor, and it is particularly preferable to use tungsten in terms of heat resistance.
  • the transistor 550 may be formed by using an SOI (Silicon on Insulator) substrate or the like.
  • the SOI substrate is formed by injecting oxygen ions into a mirror-polished wafer and then heating it at a high temperature to form an oxide layer at a certain depth from the surface and to eliminate defects generated in the surface layer.
  • SIMOX Separatation by Implanted Oxygen
  • a transistor formed using a single crystal substrate has a single crystal semiconductor in a channel forming region.
  • the transistor 550 shown in FIG. 15 is an example, and the transistor is not limited to the configuration, and an appropriate transistor may be used according to the circuit configuration and the driving method.
  • the transistor used for the load 103 may be an OS transistor having the same configuration as the transistor 105t. In that case, it is not necessary to electrically connect the front gate and the back gate of the transistor to each other, and it is not necessary to electrically connect the source, drain and back gate of the transistor to each other.
  • the connection relationship between the electrodes of the transistors used in the load 103 may be appropriately determined according to the configuration of the circuit used in the load 103.
  • the insulator 320, the insulator 322, the insulator 324, and the insulator 326 are laminated in this order so as to cover the transistor 550.
  • the insulator 320, the insulator 322, the insulator 324, and the insulator 326 for example, silicon oxide, silicon oxide, silicon nitride, silicon nitride, aluminum oxide, aluminum oxide, aluminum nitride, aluminum nitride, etc. are used. Just do it.
  • the insulator 322 may have a function as a flattening film for flattening a step generated by a transistor 550 or the like provided below the insulator 322.
  • the upper surface of the insulator 322 may be flattened by a flattening treatment using a chemical mechanical polishing (CMP) method or the like in order to improve the flatness.
  • CMP chemical mechanical polishing
  • the insulator 324 it is preferable to use a film having a barrier property so that hydrogen and impurities do not diffuse in the region where the transistor 105t is provided from the substrate 311 or the transistor 550.
  • a film having a barrier property against hydrogen for example, silicon nitride formed by the CVD method can be used.
  • hydrogen may diffuse into a semiconductor element having an oxide semiconductor such as a transistor 105t, so that the characteristics of the semiconductor element may deteriorate. Therefore, it is preferable to use a film that suppresses the diffusion of hydrogen between the transistor 105t and the transistor 550.
  • the membrane that suppresses the diffusion of hydrogen is a membrane that desorbs a small amount of hydrogen.
  • the amount of hydrogen desorbed can be analyzed using, for example, a heated desorption gas analysis method (TDS).
  • TDS heated desorption gas analysis method
  • the amount of hydrogen desorbed from the insulator 324 is such that the amount desorbed in terms of hydrogen atoms per area of the insulator 324 is 10 ⁇ when the surface temperature of the film is in the range of 50 ° C. to 500 ° C. It may be 10 15 atoms / cm 2 or less, preferably 5 ⁇ 10 15 atoms / cm 2 or less.
  • the insulator 326 preferably has a lower dielectric constant than the insulator 324.
  • the relative permittivity of the insulator 326 is preferably less than 4, more preferably less than 3.
  • the relative permittivity of the insulator 326 is preferably 0.7 times or less, more preferably 0.6 times or less, the relative permittivity of the insulator 324.
  • the insulator 320, the insulator 322, the insulator 324, and the insulator 326 are embedded with the conductor 328 connected to the conductor 503, the conductor 330, and the like.
  • the conductor 328 and the conductor 330 have a function as a plug or wiring.
  • a conductor having a function as a plug or a wiring may collectively give a plurality of configurations and give the same reference numeral.
  • the wiring and the plug connected to the wiring may be integrated. That is, a part of the conductor may function as a wiring, and a part of the conductor may function as a plug.
  • each plug and wiring As the material of each plug and wiring (conductor 328, conductor 330, etc.), a conductive material such as a metal material, an alloy material, a metal nitride material, or a metal oxide material is used as a single layer or laminated. be able to. It is preferable to use a refractory material such as tungsten or molybdenum that has both heat resistance and conductivity, and it is more preferable to use tungsten. Alternatively, it is preferably formed of a low resistance conductive material such as aluminum or copper. Wiring resistance can be reduced by using a low resistance conductive material.
  • a conductive material such as a metal material, an alloy material, a metal nitride material, or a metal oxide material is used as a single layer or laminated. be able to. It is preferable to use a refractory material such as tungsten or molybdenum that has both heat resistance and conductivity, and it is more preferable to use tungsten.
  • a wiring layer may be provided on the insulator 326 and the conductor 330.
  • the insulator 350, the insulator 352, and the insulator 354 are laminated in this order.
  • a conductor 356 is formed on the insulator 350, the insulator 352, and the insulator 354.
  • the conductor 356 has a function as a plug or wiring for connecting to the transistor 550.
  • the conductor 356 can be provided by using the same material as the conductor 328 and the conductor 330.
  • the insulator 350 it is preferable to use an insulator having a barrier property against hydrogen, similarly to the insulator 324.
  • the conductor 356 preferably contains a conductor having a barrier property against hydrogen.
  • a conductor having a barrier property against hydrogen is formed in the opening of the insulator 350 having a barrier property against hydrogen.
  • the conductor having a barrier property against hydrogen for example, tantalum nitride or the like may be used. Further, by laminating tantalum nitride and tungsten having high conductivity, it is possible to suppress the diffusion of hydrogen from the transistor 550 while maintaining the conductivity as wiring. In this case, it is preferable that the tantalum nitride layer having a barrier property against hydrogen is in contact with the insulator 350 having a barrier property against hydrogen.
  • a wiring layer may be provided on the insulator 354 and the conductor 356.
  • the insulator 360, the insulator 362, and the insulator 364 are laminated in this order.
  • a conductor 366 is formed on the insulator 360, the insulator 362, and the insulator 364.
  • the conductor 366 has a function as a plug or wiring.
  • the conductor 366 can be provided by using the same material as the conductor 328 and the conductor 330.
  • the insulator 360 it is preferable to use an insulator having a barrier property against hydrogen, similarly to the insulator 324.
  • the conductor 366 preferably contains a conductor having a barrier property against hydrogen.
  • a conductor having a barrier property against hydrogen is formed in the opening of the insulator 360 having a barrier property against hydrogen.
  • a wiring layer may be provided on the insulator 364 and the conductor 366.
  • the insulator 370, the insulator 372, and the insulator 374 are laminated in this order.
  • a conductor 376 is formed on the insulator 370, the insulator 372, and the insulator 374.
  • the conductor 376 has a function as a plug or wiring.
  • the conductor 376 can be provided by using the same material as the conductor 328 and the conductor 330.
  • the insulator 370 it is preferable to use an insulator having a barrier property against hydrogen, similarly to the insulator 324.
  • the conductor 376 preferably contains a conductor having a barrier property against hydrogen.
  • a conductor having a barrier property against hydrogen is formed in the opening of the insulator 370 having a barrier property against hydrogen.
  • a wiring layer may be provided on the insulator 374 and the conductor 376.
  • the insulator 380, the insulator 382, and the insulator 384 are laminated in this order.
  • a conductor 386 is formed on the insulator 380, the insulator 382, and the insulator 384.
  • the conductor 386 has a function as a plug or wiring.
  • the conductor 386 can be provided by using the same material as the conductor 328 and the conductor 330.
  • the insulator 380 it is preferable to use an insulator having a barrier property against hydrogen, similarly to the insulator 324.
  • the conductor 386 preferably contains a conductor having a barrier property against hydrogen.
  • a conductor having a barrier property against hydrogen is formed in the opening of the insulator 380 having a barrier property against hydrogen.
  • the semiconductor device according to the present embodiment has been described. It is not limited to this.
  • the number of wiring layers similar to the wiring layer containing the conductor 356 may be three or less, or the number of wiring layers similar to the wiring layer including the conductor 356 may be five or more.
  • Insulator 510, insulator 512, insulator 514, and insulator 516 are laminated in this order on the insulator 384.
  • any of the insulator 510, the insulator 512, the insulator 514, and the insulator 516 it is preferable to use a substance having a barrier property against oxygen and hydrogen.
  • a film having a barrier property so that hydrogen and impurities do not diffuse from the area where the substrate 311 or the transistor 550 is provided to the area where the transistor 105t is provided is used. Is preferable. Therefore, the same material as the insulator 324 can be used.
  • Silicon nitride formed by the CVD method can be used as an example of a film having a barrier property against hydrogen.
  • hydrogen may diffuse into a semiconductor element having an oxide semiconductor such as a transistor 105t, so that the characteristics of the semiconductor element may deteriorate. Therefore, it is preferable to use a film that suppresses the diffusion of hydrogen between the transistor 105t and the transistor 550.
  • the membrane that suppresses the diffusion of hydrogen is a membrane that desorbs a small amount of hydrogen.
  • the film having a barrier property against hydrogen for example, it is preferable to use metal oxides such as aluminum oxide, hafnium oxide, and tantalum oxide for the insulator 510 and the insulator 514.
  • metal oxides such as aluminum oxide, hafnium oxide, and tantalum oxide for the insulator 510 and the insulator 514.
  • aluminum oxide has a high blocking effect that does not allow both oxygen and impurities such as hydrogen and water, which cause fluctuations in the electrical characteristics of the transistor, to permeate. Therefore, aluminum oxide can prevent impurities such as hydrogen and water from being mixed into the transistor 105t during and after the transistor is manufactured. In addition, the release of oxygen from the oxides constituting the transistor 105t can be suppressed. Therefore, aluminum oxide is suitable for use as a protective film for the transistor 105t.
  • the insulator 510, the insulator 512, the insulator 514, and the insulator 516 are embedded with a conductor 503 or the like that can function as a back gate of the transistor 105t.
  • FIG. 15 illustrates a case where the conductor 503 is electrically connected to the conductor 328 via the conductor 386, the conductor 376, the conductor 366, the conductor 356, and the conductor 330. ..
  • FIG. 15 illustrates a case where the insulator 582 is provided on the insulator 581.
  • the insulator 582 it is preferable to use a substance having a barrier property against oxygen and hydrogen. Therefore, the same material as the insulator 514 can be used for the insulator 582.
  • a metal oxide such as aluminum oxide, hafnium oxide, and tantalum oxide for the insulator 582.
  • aluminum oxide has a high blocking effect that does not allow both oxygen and impurities such as hydrogen and water, which cause fluctuations in the electrical characteristics of the transistor, to permeate. Therefore, aluminum oxide can prevent impurities such as hydrogen and water from being mixed into the transistor 105t during and after the transistor is manufactured. In addition, the release of oxygen from the oxides constituting the transistor 105t can be suppressed. Therefore, aluminum oxide is suitable for use as a protective film for the transistor 105t.
  • an insulator 586 is provided on the insulator 582.
  • the same material as the insulator 320 can be used.
  • a material having a relatively low dielectric constant it is possible to reduce the parasitic capacitance generated between the wirings.
  • the insulator 586 a silicon oxide film, a silicon nitride film, or the like can be used.
  • the insulator 522, the insulator 524, the insulator 544, the insulator 580, the insulator 574, the insulator 581, the insulator 582, and the insulator 586 are combined with the conductor 540a, the conductor 540b, and the conductor.
  • the body 540c and the like are embedded.
  • the conductor 540a and the conductor 540b have a function as a plug or wiring for connecting to the conductor 163.
  • the conductor 540c has a function as a plug or wiring for connecting to the conductor 161.
  • the conductor 540a, the conductor 540b, and the conductor 540c can be provided by using the same materials as the conductor 328 and the conductor 330.
  • an opening may be formed so as to surround the transistor 105t, and an insulator having a high barrier property to hydrogen or water may be formed so as to cover the opening.
  • an opening is formed so as to surround the transistor 105t, for example, an opening reaching the insulator 522 or the insulator 514 is formed, and the above-mentioned insulator having a high barrier property is provided so as to be in contact with the insulator 522 or the insulator 514.
  • the insulator having a high barrier property to hydrogen or water for example, the same material as the insulator 522 or the insulator 514 may be used.
  • a conductor 161 and a conductor 163 are provided above the transistor 105t.
  • An insulator 650 is provided on the conductors 161 and 163, and a conductor 150a is provided on the insulator 650.
  • This embodiment can be implemented in combination with other embodiments as appropriate.
  • FIG. 16 shows the configuration of the OS transistor 500A used for the measurement.
  • 16A corresponds to a top view of the OS transistor 500A
  • FIG. 16B is a cross-sectional view taken along the broken line L1-L2 of FIG. 16A, which corresponds to a cross-sectional view of the OS transistor 500A in the channel length direction
  • FIG. 16C is a cross-sectional view taken along the broken line W1-W2 of FIG. 16A, which corresponds to a cross-sectional view of the OS transistor 500A in the channel width direction.
  • the transistor 105 shown in FIG. 12 can be referred to.
  • FIG. 12 shows a configuration in which a plurality of transistors 105 are connected in parallel
  • the capacitance value of one OS transistor 500A shown in FIG. 16 was measured.
  • the description in the third embodiment can be incorporated.
  • the OS transistor 500A shown in FIG. 16 will be described as being different from the transistor 105 shown in FIG.
  • the OS transistor 500A shown in FIG. 16 has an oxide 546a between the oxide 530b and the conductor 542a, and has an oxide 546b between the oxide 530b and the conductor 542b. Further, in the OS transistor 500A shown in FIG. 16, oxides 530c1 and oxides 530c2 are laminated in this order between the bottom surface and the side surface of the opening of the insulator 580 and the insulator 545.
  • the source and the drain are connected to each other, and the front gate and the back gate are connected to each other.
  • SILVACO's SmartSpece was used for the calculation of Cgsd of the Si transistor.
  • the Si transistor has a single gate structure having one gate electrode, and has a channel length of 60 nm and a channel width of 80 nm. It was also assumed that the Si transistor had a structure in which the source and drain were connected to each other and the gate was connected to the body.
  • FIG. 17 shows the values of Cgsd of the OS transistor 500A and the Si transistor when the gate voltage Vgs is changed.
  • the value of Cgsd is standardized by the channel length and the channel width.
  • the Si transistor had a larger Cgsd value than the OS transistor 500A. Further, in the case of the OS transistor 500A, it was found that the difference between the Cgsd value when Vgs was lower than the threshold voltage and the Cgsd value when Vgs was higher than the threshold voltage was larger than that of the Si transistor. Therefore, when the OS transistor 500A is used as the capacitance element 101a, the power supply potential of the wiring 100 can be increased by adopting a configuration in which the transistors 105a and the transistors 105b as shown in FIGS. 3A and 3B are mixed in the capacitance section 104.
  • This embodiment can be implemented in combination with other embodiments as appropriate.
  • the metal oxide preferably contains at least indium or zinc. In particular, it preferably contains indium and zinc. Further, in addition to indium and zinc, it is preferable that aluminum, gallium, yttrium, tin and the like are contained. It may also contain one or more selected from boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt and the like. ..
  • FIG. 18A is a diagram illustrating classification of crystal structures of oxide semiconductors, typically IGZO (metal oxides containing In, Ga, and Zn).
  • IGZO metal oxides containing In, Ga, and Zn
  • oxide semiconductors are roughly classified into “Amorphous (amorphous)", “Crystalline”, and “Crystal”.
  • Amorphous includes “completable amorphous”.
  • the "Crystalline” includes CAAC (c-axis-aligned crystalline), nc (nanocrystalline), and CAC (cloud-aligned crystal) (extracting single crystal crystal).
  • single crystal, poly crystal, and single crystal amorphous are excluded from the classification of "Crystalline”.
  • “Crystal” includes single crystal and poly crystal.
  • the structure in the thick frame shown in FIG. 18A is an intermediate state between "Amorphous” and “Crystal", and is a structure belonging to a new boundary region (New crystal line phase). That is, the structure can be rephrased as a structure completely different from the energetically unstable "Amorphous” and "Crystal".
  • the crystal structure of the film or substrate can be evaluated using an X-ray diffraction (XRD: X-Ray Evaluation) spectrum.
  • XRD X-ray diffraction
  • FIG. 18B the XRD spectrum obtained by GIXD (Glazing-Incidence XRD) measurement of a CAAC-IGZO film classified as "Crystalline" is shown in FIG. 18B.
  • the GIXD method is also referred to as a thin film method or a Seemann-Bohlin method.
  • the XRD spectrum obtained by the GIXD measurement shown in FIG. 18B will be simply referred to as an XRD spectrum.
  • the thickness of the CAAC-IGZO film shown in FIG. 18B is 500 nm.
  • a peak showing clear crystallinity is detected in the XRD spectrum of the CAAC-IGZO film.
  • the crystal structure of the film or substrate can be evaluated by a diffraction pattern (also referred to as a microelectron diffraction pattern) observed by a micro electron diffraction method (NBED: Nano Beam Electron Diffraction).
  • the diffraction pattern of the CAAC-IGZO film is shown in FIG. 18C.
  • FIG. 18C is a diffraction pattern observed by the NBED in which the electron beam is incident parallel to the substrate.
  • electron beam diffraction is performed with the probe diameter set to 1 nm.
  • oxide semiconductors may be classified differently from FIG. 18A.
  • oxide semiconductors are divided into single crystal oxide semiconductors and other non-single crystal oxide semiconductors.
  • the non-single crystal oxide semiconductor include the above-mentioned CAAC-OS and nc-OS.
  • the non-single crystal oxide semiconductor includes a polycrystalline oxide semiconductor, a pseudo-amorphous oxide semiconductor (a-like OS: amorphous-like oxide semiconductor), an amorphous oxide semiconductor, and the like.
  • CAAC-OS CAAC-OS
  • nc-OS nc-OS
  • a-like OS the details of the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described.
  • CAAC-OS is an oxide semiconductor having a plurality of crystal regions, the plurality of crystal regions having the c-axis oriented in a specific direction.
  • the specific direction is the thickness direction of the CAAC-OS film, the normal direction of the surface to be formed of the CAAC-OS film, or the normal direction of the surface of the CAAC-OS film.
  • the crystal region is a region having periodicity in the atomic arrangement. When the atomic arrangement is regarded as a lattice arrangement, the crystal region is also a region in which the lattice arrangement is aligned. Further, the CAAC-OS has a region in which a plurality of crystal regions are connected in the ab plane direction, and the region may have distortion.
  • the strain refers to a region in which a plurality of crystal regions are connected in which the orientation of the lattice arrangement changes between a region in which the lattice arrangement is aligned and a region in which another grid arrangement is aligned.
  • CAAC-OS is an oxide semiconductor that is c-axis oriented and not clearly oriented in the ab plane direction.
  • Each of the plurality of crystal regions is composed of one or a plurality of minute crystals (crystals having a maximum diameter of less than 10 nm).
  • the maximum diameter of the crystal region is less than 10 nm.
  • the size of the crystal region may be about several tens of nm.
  • CAAC-OS has indium (In) and oxygen. It tends to have a layered crystal structure (also referred to as a layered structure) in which a layer (hereinafter, In layer) and a layer having elements M, zinc (Zn), and oxygen (hereinafter, (M, Zn) layer) are laminated. There is. Indium and element M can be replaced with each other. Therefore, the (M, Zn) layer may contain indium. In addition, the In layer may contain the element M. In addition, Zn may be contained in the In layer.
  • the layered structure is observed as a lattice image in, for example, a high-resolution TEM image.
  • the position of the peak indicating the c-axis orientation may vary depending on the type and composition of the metal elements constituting CAAC-OS.
  • a plurality of bright spots are observed in the electron diffraction pattern of the CAAC-OS film.
  • a certain spot and another spot are observed at point-symmetrical positions with the spot of the incident electron beam passing through the sample (also referred to as a direct spot) as the center of symmetry.
  • the lattice arrangement in the crystal region is based on a hexagonal lattice, but the unit lattice is not limited to a regular hexagon and may be a non-regular hexagon. Further, in the above strain, it may have a lattice arrangement such as a pentagon or a heptagon.
  • a clear grain boundary cannot be confirmed even in the vicinity of strain. That is, it can be seen that the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is because CAAC-OS can tolerate distortion because the arrangement of oxygen atoms is not dense in the ab plane direction and the bond distance between atoms changes due to substitution of metal atoms. It is thought that this is the reason.
  • CAAC-OS for which no clear crystal grain boundary is confirmed, is one of the crystalline oxides having a crystal structure suitable for the semiconductor layer of the transistor. It is preferable to have Zn in order to form CAAC-OS.
  • In-Zn oxide and In-Ga-Zn oxide are more suitable than In oxide because they can suppress the generation of grain boundaries.
  • CAAC-OS is an oxide semiconductor having high crystallinity and no clear grain boundary is confirmed. Therefore, it can be said that CAAC-OS is unlikely to cause a decrease in electron mobility due to grain boundaries. Further, since the crystallinity of the oxide semiconductor may be lowered due to the mixing of impurities or the generation of defects, CAAC-OS can be said to be an oxide semiconductor having few impurities and defects (oxygen deficiency, etc.). Therefore, the oxide semiconductor having CAAC-OS has stable physical properties. Therefore, the oxide semiconductor having CAAC-OS is resistant to heat and has high reliability. CAAC-OS is also stable against high temperatures in the manufacturing process (so-called thermal budget). Therefore, if CAAC-OS is used for the OS transistor, the degree of freedom in the manufacturing process can be expanded.
  • nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less).
  • nc-OS has tiny crystals. Since the size of the minute crystal is, for example, 1 nm or more and 10 nm or less, particularly 1 nm or more and 3 nm or less, the minute crystal is also referred to as a nanocrystal.
  • nc-OS does not show regularity in crystal orientation between different nanocrystals. Therefore, no orientation is observed in the entire film.
  • the nc-OS may be indistinguishable from the a-like OS and the amorphous oxide semiconductor depending on the analysis method.
  • a peak indicating crystallinity is not detected in the Out-of-plane XRD measurement using a ⁇ / 2 ⁇ scan.
  • electron beam diffraction also referred to as limited field electron diffraction
  • a diffraction pattern such as a halo pattern is generated.
  • electron diffraction also referred to as nanobeam electron diffraction
  • an electron beam having a probe diameter for example, 1 nm or more and 30 nm or less
  • An electron diffraction pattern in which a plurality of spots are observed in a ring-shaped region centered on a direct spot may be acquired.
  • the a-like OS is an oxide semiconductor having a structure between nc-OS and an amorphous oxide semiconductor.
  • the a-like OS has a void or low density region. That is, the a-like OS has lower crystallinity than the nc-OS and CAAC-OS.
  • a-like OS has a higher hydrogen concentration in the membrane than nc-OS and CAAC-OS.
  • CAC-OS is, for example, a composition of a material in which the elements constituting the metal oxide are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or a size close thereto.
  • the metal oxide one or more metal elements are unevenly distributed, and the region having the metal element has a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or a size close thereto.
  • the mixed state is also called a mosaic shape or a patch shape.
  • CAC-OS has a structure in which a material is separated into a first region and a second region to form a mosaic shape, and the first region is distributed in a film (also referred to as a cloud shape).
  • CAC-OS is a composite metal oxide in which the first region and the second region are mixed.
  • the atomic number ratios of In, Ga, and Zn to the metal elements constituting CAC-OS in the In-Ga-Zn oxide are expressed as [In], [Ga], and [Zn], respectively.
  • the first region is a region in which [In] is larger than [In] in the composition of the CAC-OS film.
  • the second region is a region in which [Ga] is larger than [Ga] in the composition of the CAC-OS film.
  • the first region is a region in which [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region.
  • the second region is a region in which [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.
  • the first region is a region in which indium oxide, indium zinc oxide, or the like is the main component.
  • the second region is a region in which gallium oxide, gallium zinc oxide, or the like is the main component. That is, the first region can be rephrased as a region containing In as a main component. Further, the second region can be rephrased as a region containing Ga as a main component.
  • a region containing In as a main component (No. 1) by EDX mapping acquired by using energy dispersive X-ray spectroscopy (EDX: Energy Dispersive X-ray spectroscopy). It can be confirmed that the region (1 region) and the region containing Ga as a main component (second region) are unevenly distributed and mixed.
  • CAC-OS When CAC-OS is used for a transistor, the conductivity caused by the first region and the insulating property caused by the second region act in a complementary manner to form a switching function (a function of switching On / Off). Can be added to CAC-OS. That is, the CAC-OS has a conductive function in a part of the material, an insulating function in the other part of the material, and a semiconductor function in the whole material. By separating the conductive function and the insulating function, both functions can be maximized. Therefore, by using CAC-OS as a transistor, high on-current ( Ion ), high field-effect mobility ( ⁇ ), and high-speed switching operation can be realized.
  • Ion on-current
  • ⁇ high field-effect mobility
  • Oxide semiconductors have various structures, and each has different characteristics.
  • the oxide semiconductor according to one aspect of the present invention has two or more of amorphous oxide semiconductor, polycrystalline oxide semiconductor, a-like OS, CAC-OS, nc-OS, and CAAC-OS. You may.
  • the oxide semiconductor as a transistor, a transistor having high field effect mobility can be realized. Moreover, a highly reliable transistor can be realized.
  • the carrier concentration of the oxide semiconductor is 1 ⁇ 10 17 cm -3 or less, preferably 1 ⁇ 10 15 cm -3 or less, more preferably 1 ⁇ 10 13 cm -3 or less, and more preferably 1 ⁇ 10 11 cm ⁇ . It is 3 or less, more preferably less than 1 ⁇ 10 10 cm -3 , and more than 1 ⁇ 10 -9 cm -3 .
  • the impurity concentration in the oxide semiconductor film may be lowered to lower the defect level density.
  • a low impurity concentration and a low defect level density is referred to as high-purity intrinsic or substantially high-purity intrinsic.
  • An oxide semiconductor having a low carrier concentration may be referred to as a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor.
  • the trap level density may also be low.
  • the charge captured at the trap level of the oxide semiconductor takes a long time to disappear, and may behave as if it were a fixed charge. Therefore, a transistor in which a channel forming region is formed in an oxide semiconductor having a high trap level density may have unstable electrical characteristics.
  • Impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon and the like.
  • the concentration of silicon and carbon in the oxide semiconductor and the concentration of silicon and carbon near the interface with the oxide semiconductor are set to 2. ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 17 atoms / cm 3 or less.
  • the oxide semiconductor contains an alkali metal or an alkaline earth metal
  • a defect level may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal tends to have a normally-on characteristic. Therefore, the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor obtained by SIMS is set to 1 ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 16 atoms / cm 3 or less.
  • the nitrogen concentration in the oxide semiconductor obtained by SIMS is less than 5 ⁇ 10 19 atoms / cm 3 , preferably 5 ⁇ 10 18 atoms / cm 3 or less, and more preferably 1 ⁇ 10 18 atoms / cm 3 or less. , More preferably 5 ⁇ 10 17 atoms / cm 3 or less.
  • hydrogen contained in an oxide semiconductor reacts with oxygen bonded to a metal atom to become water, which may form an oxygen deficiency.
  • oxygen deficiency When hydrogen enters the oxygen deficiency, electrons that are carriers may be generated.
  • a part of hydrogen may be combined with oxygen that is bonded to a metal atom to generate an electron as a carrier. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have a normally-on characteristic. Therefore, it is preferable that hydrogen in the oxide semiconductor is reduced as much as possible.
  • the hydrogen concentration obtained by SIMS is less than 1 ⁇ 10 20 atoms / cm 3 , preferably less than 1 ⁇ 10 19 atoms / cm 3 , more preferably 5 ⁇ 10 18 atoms / cm. Less than 3 , more preferably less than 1 ⁇ 10 18 atoms / cm 3 .
  • FIG. 19A shows a top view of the substrate 711 before the dicing process is performed.
  • a semiconductor substrate also referred to as a "semiconductor wafer"
  • a plurality of circuit regions 712 are provided on the substrate 711.
  • a semiconductor device a CPU, an RF tag, an image sensor, or the like can be provided in the circuit area 712.
  • Each of the plurality of circuit areas 712 is surrounded by a separation area 713.
  • a separation line (also referred to as a “dicing line”) 714 is set at a position overlapping the separation region 713. By cutting the substrate 711 along the separation line 714, the chip 715 including the circuit area 712 can be cut out from the substrate 711.
  • FIG. 19B shows an enlarged view of the chip 715.
  • a conductive layer or a semiconductor layer may be provided in the separation region 713.
  • ESD that may occur during the dicing step can be alleviated, and a decrease in the yield of the dicing step can be prevented.
  • the dicing step is performed while flowing pure water in which carbon dioxide gas or the like is dissolved to reduce the specific resistance for the purpose of cooling the substrate, removing shavings, preventing antistatic, and the like.
  • the amount of pure water used can be reduced. Therefore, the production cost of the semiconductor device can be reduced. Moreover, the productivity of the semiconductor device can be increased.
  • the semiconductor layer provided in the separation region 713 it is preferable to use a material having a band gap of 2.5 eV or more and 4.2 eV or less, preferably 2.7 eV or more and 3.5 eV or less.
  • a material having a band gap of 2.5 eV or more and 4.2 eV or less preferably 2.7 eV or more and 3.5 eV or less.
  • the electronic component is also referred to as a semiconductor package or an IC package.
  • the electronic component is completed by combining the semiconductor device shown in the above embodiment and a component other than the semiconductor device.
  • a "backside grinding step” for grinding the back surface (the surface on which the semiconductor device or the like is not formed) of the element substrate is performed (step S721). ).
  • a "backside grinding step” for grinding the back surface (the surface on which the semiconductor device or the like is not formed) of the element substrate is performed (step S721). ).
  • a "dicing step” for separating the element substrate into a plurality of chips (chips 715) is performed (step S722).
  • a "die bonding step” is performed in which the separated chips are individually picked up and bonded onto the lead frame (step S723).
  • a method suitable for the product is appropriately selected, such as bonding with resin or bonding with tape.
  • the chip may be bonded on the interposer substrate instead of the lead frame.
  • a "wire bonding step” is performed in which the leads of the lead frame and the electrodes on the chip are electrically connected by a thin metal wire (wire) (step S724).
  • a silver wire or a gold wire can be used as the thin metal wire.
  • ball bonding or wedge bonding can be used as the wire bonding.
  • the wire-bonded chips are subjected to a "sealing step (molding step)" in which they are sealed with an epoxy resin or the like (step S725).
  • a sealing step molding step
  • an epoxy resin or the like step S725.
  • a "lead plating step” for plating the leads of the lead frame is performed (step S726).
  • the plating process prevents reeds from rusting, and soldering can be performed more reliably when mounting on a printed circuit board later.
  • a "molding step” of cutting and molding the lead is performed (step S727).
  • step S728 a "marking step” of printing (marking) the surface of the package is performed.
  • step S729 the electronic component is completed (step S729) through an “inspection step” (step S729) for checking whether the appearance shape is good or bad and whether or not there is a malfunction.
  • FIG. 20B shows a schematic perspective view of the completed electronic component as an example of an electronic component.
  • the electronic component 750 shown in FIG. 20B has a lead 755 and a semiconductor device 753.
  • the semiconductor device 753, the semiconductor device shown in the above embodiment can be used.
  • the electronic component 750 shown in FIG. 20B is mounted on, for example, a printed circuit board 752.
  • a plurality of such electronic components 750 are combined and electrically connected to each other on the printed circuit board 752 to complete a substrate (mounting substrate 754) on which the electronic components are mounted.
  • the completed mounting board 754 is used for electronic devices and the like.
  • a display device such as a television or a monitor, a lighting device, a desktop or notebook type personal computer, a word processor, a DVD (Digital Any Disc), or the like.
  • Image playback device portable CD player, radio, tape recorder, headphone stereo, stereo, table clock, wall clock, cordless telephone handset, transceiver, mobile phone, car phone, portable type to play still images or videos stored in the medium
  • Large game machines such as game machines, tablet terminals, pachinko machines, calculators, portable information terminals (also called “portable information terminals"), electronic notebooks, electronic book terminals, electronic translators, voice input devices, video cameras, High-frequency heating devices such as digital still cameras, electric shavers and refrigerators, electric rice cookers, electric washing machines, electric vacuum cleaners, water heaters, fans, hair dryers, air conditioners, humidifiers, dehumidifiers and other air conditioning equipment, dishwashing Vessels, tableware dryers, clothes dryers, duvet dryers, electric refrigerators, electric freezers, electric refrigerators, freezers for DNA storage, flashlights, tools such as chainsaws, smoke detectors, medical equipment such as dialysis machines, etc. Be done. Further examples include industrial equipment such as guide lights, traffic
  • moving objects propelled by electric motors using electric power from power storage devices are also included in the category of electronic devices.
  • the moving body include an electric vehicle (EV), a hybrid electric vehicle (HEV) having an internal combustion engine and an electric motor, a plug-in hybrid electric vehicle (PHEV), a tracked vehicle in which these tire wheels are changed to an infinite track, and an electric assist.
  • EV electric vehicle
  • HEV hybrid electric vehicle
  • PHEV plug-in hybrid electric vehicle
  • a tracked vehicle in which these tire wheels are changed to an infinite track and an electric assist.
  • motorized bicycles including bicycles, motorcycles, electric wheelchairs, golf carts, small or large vessels, submarines, helicopters, aircraft, rockets, artificial satellites, space probes, planetary explorers, and spacecraft.
  • the semiconductor device or electronic component according to one aspect of the present invention can be used for a communication device or the like built in these electronic devices.
  • Electronic devices include sensors (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemicals, voice, time, hardness, electric field, current, voltage, power, radiation, It may have a sensor that includes the ability to measure flow rate, humidity, slope, vibration, odor or infrared rays).
  • Electronic devices can have various functions. For example, a function to display various information (still images, moving images, text images, etc.) on the display unit, a touch panel function, a function to display a calendar, date or time, a function to execute various software (programs), wireless communication. It can have a function, a function of reading a program or data recorded on a recording medium, and the like.
  • the display device 8000 is an example of an electronic device using the semiconductor device 8004 according to one aspect of the present invention.
  • the display device 8000 corresponds to a display device for receiving TV broadcasts, and includes a housing 8001, a display unit 8002, a speaker unit 8003, a semiconductor device 8004, a power storage device 8005, and the like.
  • the semiconductor device 8004 according to one aspect of the present invention is provided inside the housing 8001.
  • the semiconductor device 8004 can hold control information, control programs, and the like.
  • the semiconductor device 8004 has a communication function, and the display device 8000 can function as an IoT device.
  • the display device 8000 can be supplied with electric power from a commercial power source, or can use the electric power stored in the power storage device 8005.
  • the display unit 8002 includes a liquid crystal display device, a light emitting display device having a light emitting element such as an organic EL element in each pixel, an electrophoresis display device, a DMD (Digital Micromirror Device), a PDP (Plasma Display Panel), and a FED (Field Emission).
  • a display device such as a Display can be used.
  • the display device includes all information display devices such as those for receiving TV broadcasts, those for personal computers, and those for displaying advertisements.
  • the stationary lighting device 8100 is an example of an electronic device using the semiconductor device 8103 according to one aspect of the present invention.
  • the lighting device 8100 includes a housing 8101, a light source 8102, a semiconductor device 8103, a power storage device 8105, and the like.
  • FIG. 21 illustrates a case where the semiconductor device 8103 is provided inside the ceiling 8104 in which the housing 8101 and the light source 8102 are installed, but the semiconductor device 8103 is provided inside the housing 8101. You may.
  • the semiconductor device 8103 can hold information such as the emission brightness of the light source 8102, a control program, and the like.
  • the semiconductor device 8103 has a communication function, and the lighting device 8100 can function as an IoT device.
  • the lighting device 8100 can be supplied with electric power from a commercial power source, or can use the electric power stored in the power storage device.
  • FIG. 21 illustrates the stationary lighting device 8100 provided on the ceiling 8104
  • the semiconductor device according to one aspect of the present invention is provided on a side wall 8405, a floor 8406, a window 8407, etc. other than the ceiling 8104. It can be used for a stationary lighting device provided, or it can be used for a desktop lighting device or the like.
  • the light source 8102 an artificial light source that artificially obtains light by using electric power can be used.
  • incandescent lamps, discharge lamps such as fluorescent lamps, and light emitting elements such as LEDs and organic EL elements are examples of the artificial light sources.
  • the air conditioner having the indoor unit 8200 and the outdoor unit 8204 is an example of an electronic device using the semiconductor device 8203 according to one aspect of the present invention.
  • the indoor unit 8200 includes a housing 8201, an air outlet 8202, a semiconductor device 8203, a power storage device 8205, and the like.
  • FIG. 21 illustrates a case where the semiconductor device 8203 is provided in the indoor unit 8200, the semiconductor device 8203 may be provided in the outdoor unit 8204. Alternatively, the semiconductor device 8203 may be provided in both the indoor unit 8200 and the outdoor unit 8204.
  • the semiconductor device 8203 can hold control information of the air conditioner, a control program, and the like.
  • the semiconductor device 8203 has a communication function, and the air conditioner can function as an IoT device. Further, the air conditioner can be supplied with electric power from a commercial power source, or can use the electric power stored in the power storage device 8205.
  • FIG. 21 illustrates a separate type air conditioner composed of an indoor unit and an outdoor unit
  • the integrated air conditioner having the functions of the indoor unit and the outdoor unit in one housing may be used.
  • a semiconductor device according to one aspect of the present invention can also be used.
  • the electric refrigerator-freezer 8300 is an example of an electronic device using the semiconductor device 8304 according to one aspect of the present invention.
  • the electric refrigerator-freezer 8300 includes a housing 8301, a refrigerator door 8302, a freezer door 8303, a semiconductor device 8304, a power storage device 8305, and the like.
  • the power storage device 8305 is provided inside the housing 8301.
  • the semiconductor device 8304 can hold control information, a control program, and the like of the electric refrigerator / freezer 8300.
  • the semiconductor device 8304 has a communication function, and the electric refrigerator / freezer 8300 can function as an IoT device.
  • the electric refrigerator / freezer 8300 can be supplied with electric power from a commercial power source, or can use the electric power stored in the power storage device 8305.
  • FIG. 22A shows an example of a wristwatch-type portable information terminal.
  • the mobile information terminal 6100 includes a housing 6101, a display unit 6102, a band 6103, an operation button 6105, and the like. Further, the portable information terminal 6100 includes a secondary battery and a semiconductor device or electronic component according to one aspect of the present invention. By using the semiconductor device or electronic component according to one aspect of the present invention for the mobile information terminal 6100, the mobile information terminal 6100 can function as an IoT device.
  • FIG. 22B shows an example of a mobile phone.
  • the personal digital assistant 6200 includes an operation button 6203, a speaker 6204, a microphone 6205, and the like, in addition to the display unit 6202 incorporated in the housing 6201.
  • the mobile information terminal 6200 includes a fingerprint sensor 6209 in an area overlapping the display unit 6202.
  • the fingerprint sensor 6209 may be an organic light sensor. Since the fingerprint differs depending on the individual, the fingerprint sensor 6209 can acquire the fingerprint pattern and perform personal authentication.
  • the light emitted from the display unit 6202 can be used as a light source for acquiring the fingerprint pattern by the fingerprint sensor 6209.
  • the portable information terminal 6200 includes a secondary battery and a semiconductor device or an electronic component according to one aspect of the present invention.
  • the portable information terminal 6200 can function as an IoT device.
  • FIG. 22C shows an example of a cleaning robot.
  • the cleaning robot 6300 has a display unit 6302 arranged on the upper surface of the housing 6301, a plurality of cameras 6303 arranged on the side surface, a brush 6304, an operation button 6305, various sensors, and the like. Although not shown, the cleaning robot 6300 is provided with tires, suction ports, and the like. The cleaning robot 6300 is self-propelled, can detect dust 6310, and can suck dust from a suction port provided on the lower surface.
  • the cleaning robot 6300 can analyze the image taken by the camera 6303 and determine the presence or absence of obstacles such as walls, furniture, and steps. Further, when an object that is likely to be entangled with the brush 6304 such as wiring is detected by image analysis, the rotation of the brush 6304 can be stopped.
  • the cleaning robot 6300 includes a secondary battery and a semiconductor device or electronic component according to one aspect of the present invention. By using the semiconductor device or electronic component according to one aspect of the present invention for the cleaning robot 6300, the cleaning robot 6300 can function as an IoT device.
  • FIG. 22D shows an example of a robot.
  • the robot 6400 shown in FIG. 22D includes an arithmetic unit 6409, an illuminance sensor 6401, a microphone 6402, an upper camera 6403, a speaker 6404, a display unit 6405, a lower camera 6406 and an obstacle sensor 6407, and a moving mechanism 6408.
  • the microphone 6402 has a function of detecting the user's voice, environmental sound, and the like. Further, the speaker 6404 has a function of emitting sound. The robot 6400 can communicate with the user by using the microphone 6402 and the speaker 6404.
  • the display unit 6405 has a function of displaying various information.
  • the robot 6400 can display the information desired by the user on the display unit 6405.
  • the display unit 6405 may be equipped with a touch panel. Further, the display unit 6405 may be a removable information terminal, and by installing the display unit 6405 at a fixed position of the robot 6400, charging and data transmission / reception are possible.
  • the upper camera 6403 and the lower camera 6406 have a function of photographing the surroundings of the robot 6400. Further, the obstacle sensor 6407 can detect the presence or absence of an obstacle in the traveling direction when the robot 6400 moves forward by using the moving mechanism 6408. The robot 6400 can recognize the surrounding environment and move safely by using the upper camera 6403, the lower camera 6406, and the obstacle sensor 6407.
  • the light emitting device of one aspect of the present invention can be used for the display unit 6405.
  • the robot 6400 includes a secondary battery and a semiconductor device or electronic component according to an aspect of the present invention inside the robot 6400.
  • the robot 6400 can function as an IoT device.
  • FIG. 22E shows an example of an air vehicle.
  • the flying object 6500 shown in FIG. 22E has a propeller 6501, a camera 6502, a battery 6503, and the like, and has a function of autonomously flying.
  • the image data taken by the camera 6502 is stored in the electronic component 6504.
  • the electronic component 6504 can analyze the image data and detect the presence or absence of an obstacle when moving.
  • the remaining battery level can be estimated from the change in the storage capacity of the battery 6503 by the electronic component 6504.
  • the flying object 6500 includes a semiconductor device or an electronic component according to an aspect of the present invention inside the flying object 6500. By using the semiconductor device or electronic component according to one aspect of the present invention for the flying object 6500, the flying object 6500 can function as an IoT device.
  • FIG. 22F shows an example of an automobile.
  • the automobile 7160 has an engine, tires, brakes, a steering device, a camera, and the like.
  • the automobile 7160 includes a semiconductor device or an electronic component according to one aspect of the present invention inside the automobile. By using the semiconductor device or the electronic component according to one aspect of the present invention in the automobile 7160, the automobile 7160 can function as an IoT device.
  • the semiconductor device includes a normally-off CPU (also referred to as “Noff-CPU”) and the like.
  • the Nonf-CPU is an integrated circuit including a normally-off type transistor that is in a non-conducting state (also referred to as an off state) even when the gate voltage is 0V.
  • the Noff-CPU can stop the power supply to the unnecessary circuit in the Noff-CPU and put the circuit in the standby state. No power is consumed in the circuit where the power supply is stopped and the circuit is in the standby state. Therefore, the Nonf-CPU can minimize the amount of power used. Further, the Nonf-CPU can retain information necessary for operation such as setting conditions for a long period of time even if the power supply is stopped. To return from the standby state, it is only necessary to restart the power supply to the circuit, and it is not necessary to rewrite the setting conditions and the like. That is, it is possible to return from the standby state at high speed. In this way, the Nonf-CPU can reduce the power consumption without significantly reducing the operating speed.
  • the Noff-CPU can be suitably used for a small-scale system such as an IoT terminal device (also referred to as an "endpoint microcomputer") 803 in the IoT field.
  • IoT terminal device also referred to as an "endpoint microcomputer" 803 in the IoT field.
  • FIG. 23 shows the hierarchical structure of the IoT network and the tendency of the required specifications.
  • power consumption 804 and processing performance 805 are shown as required specifications.
  • the hierarchical structure of the IoT network is roughly divided into a cloud field 801 which is an upper layer and an embedded field 802 which is a lower layer.
  • the cloud field 801 includes, for example, a server.
  • the embedded field 802 includes, for example, machines, industrial robots, in-vehicle devices, home appliances, and the like.
  • the semiconductor device according to one aspect of the present invention can be suitably used for a communication device of an IoT terminal device that requires low power consumption.
  • the "endpoint” refers to the terminal region of the embedded field 802. Examples of devices used for endpoints include microcomputers used in factories, home appliances, infrastructure, agriculture, and the like.
  • FIG. 24 shows an image diagram of factory automation as an application example of an endpoint microcomputer.
  • the factory 884 is connected to the cloud 883 via an internet line (Internet).
  • the cloud 883 is also connected to the home 881 and the office 882 via an internet line.
  • the Internet line may be a wired communication system or a wireless communication system.
  • the semiconductor device according to one aspect of the present invention is used as the communication device in accordance with communication standards such as the 4th generation mobile communication system (4G) and the 5th generation mobile communication system (5G). Wireless communication should be performed.
  • the factory 884 may be connected to the factory 885 and the factory 886 via an internet line.
  • the Factory 884 has a master device (control device) 831.
  • the master device 831 has a function of connecting to the cloud 883 and transmitting / receiving information. Further, the master device 831 is connected to a plurality of industrial robots 842 included in the IoT terminal device 841 via an M2M (Machine to Machine) interface 832.
  • M2M interface 832 for example, industrial Ethernet (“Ethernet” is a registered trademark) which is a kind of wired communication method, local 5G which is a kind of wireless communication method, or the like may be used.
  • the factory manager can connect to the factory 884 from the home 881 or the office 882 via the cloud 883 and know the operating status and the like. In addition, it is possible to check for incorrect or missing items, indicate the location, and measure the tact time.

Landscapes

  • Thin Film Transistor (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
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US17/615,780 US12283600B2 (en) 2019-06-07 2020-05-22 Semiconductor device comprising transistor, load, and wiring configured to supply power supply potential to the load
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US20220238560A1 (en) 2022-07-28

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