WO2020232944A1 - 显示面板处理方法和显示面板处理系统 - Google Patents

显示面板处理方法和显示面板处理系统 Download PDF

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Publication number
WO2020232944A1
WO2020232944A1 PCT/CN2019/108466 CN2019108466W WO2020232944A1 WO 2020232944 A1 WO2020232944 A1 WO 2020232944A1 CN 2019108466 W CN2019108466 W CN 2019108466W WO 2020232944 A1 WO2020232944 A1 WO 2020232944A1
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Prior art keywords
display panel
target
input terminal
array substrate
common electrode
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French (fr)
Inventor
刘强
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/1306—Details
    • G02F1/1309—Repairing; Testing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections

Definitions

  • the present invention relates to the field of display technology, in particular to a display panel processing method and a display panel processing system.
  • the liquid crystal display panel generally includes a color filter (CF) substrate, an array substrate, and a liquid crystal layer disposed between the two.
  • the liquid crystal display panel includes multiple manufacturing processes such as an array manufacturing process, a panel manufacturing process, and a module manufacturing process. After each manufacturing process, the internal circuits of the LCD panel will be tested, and if any problems are found, repairs will be made.
  • the CF-COM (color filter substrate common electrode) traces in the liquid crystal display panel may be short-circuited, resulting in abnormal alignment of the panel liquid crystal, and damage to other panels around the panel, and liquid crystal alignment also appears abnormal.
  • the object of the present invention is to provide a display panel processing method and a display panel processing system, which improves the yield of the display panel.
  • the embodiment of the present invention provides a display panel processing method for processing a plurality of display panels, each display panel includes an array substrate, the array substrate is provided with a color film substrate common electrode wiring, which includes:
  • a laser is used to disconnect the corresponding wiring input terminal in the target display panel.
  • the step of disconnecting the corresponding wiring input terminal in the target display panel if an abnormal alignment occurs includes: if an abnormal alignment occurs, all the lines on the array substrate in the target display panel are routed. The line input is disconnected.
  • the step of disconnecting the corresponding wiring input terminal in the target display panel includes: if an abnormal alignment occurs, disconnect the low-level signal line in the target display panel The input is disconnected.
  • the step of disconnecting the corresponding wiring input terminal in the target display panel includes: if an abnormal alignment occurs, disconnect the high-level signal line in the target display panel The input is disconnected.
  • the step of disconnecting the corresponding wiring input terminal in the target display panel includes:
  • the embodiment of the present invention provides a display panel processing method for processing a plurality of display panels, each display panel includes an array substrate, the array substrate is provided with a color film substrate common electrode wiring, the method include:
  • the step of disconnecting the corresponding wiring input terminal in the target display panel if an abnormal alignment occurs includes: if an abnormal alignment occurs, all the lines on the array substrate in the target display panel are routed. The line input is disconnected.
  • the step of disconnecting the corresponding wiring input terminal in the target display panel includes: if an abnormal alignment occurs, disconnect the low-level signal line in the target display panel The input is disconnected.
  • the step of disconnecting the corresponding wiring input terminal in the target display panel includes: if an abnormal alignment occurs, disconnect the high-level signal line in the target display panel The input is disconnected.
  • the step of disconnecting the corresponding wiring input terminal in the target display panel includes:
  • the embodiment of the present invention also provides a display panel processing system, which includes:
  • each display panel includes an array substrate, and a color filter substrate common electrode wiring is provided on the array substrate;
  • the display panel processing device includes:
  • the detection module is configured to sequentially obtain the resistance value of the common electrode wiring of the color filter substrate in each array substrate, and determine whether the resistance value is less than a preset resistance;
  • a setting module for setting the display panel corresponding to the array substrate as the target display panel when the resistance value is less than a preset resistance value
  • a judging module for inputting a high-level signal to the common electrode wiring of the color filter substrate, and judging whether the multiple display panels have abnormal alignment
  • the disconnection module is used to disconnect the corresponding wiring input terminal in the target display panel when an abnormal alignment occurs.
  • the disconnection module includes a first disconnection sub-module, which is used to disconnect all the wiring input terminals on the array substrate in the target display panel when an abnormal alignment occurs.
  • the disconnection module includes a second disconnection sub-module for disconnecting the low-level signal line input terminal in the target display panel when an abnormal alignment occurs.
  • the disconnection module includes a third disconnection sub-module, which is used to disconnect the high-level signal line input terminal in the target display panel when an abnormal alignment occurs.
  • the disconnection module includes a fourth disconnection sub-module, which is used to determine the target trace in the target display panel that is short-circuited with the common electrode trace of the color filter substrate when an abnormal alignment occurs; The input terminal of the target trace is disconnected.
  • the display panel processing method and display panel processing system of the embodiments of the present invention prevent other display panels from being damaged by disconnecting the corresponding wiring input terminals in the target display panel when the alignment of multiple display panels is abnormal.
  • FIG. 1 is a schematic flowchart of a display panel processing method provided by an embodiment of the present invention.
  • FIG. 2 is a schematic diagram of a scene of a display panel processing method provided by an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of disconnection of all wires in a display panel processing method provided by an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of another scene of a display panel processing method provided by an embodiment of the present invention.
  • FIG. 5 is a schematic diagram of a low-level signal line disconnection in a display panel processing method provided by an embodiment of the present invention.
  • FIG. 6 is a schematic diagram of a disconnection of a high-level signal line in a display panel processing method provided by an embodiment of the present invention.
  • FIG. 7 is a schematic diagram of electrostatic breakdown simulation of a display panel processing method provided by an embodiment of the present invention.
  • FIG. 1 is a schematic flowchart of a display panel processing method according to an embodiment of the present invention.
  • the display panel processing method is used to process multiple display panels.
  • each display panel 1 includes an array substrate 11, a color filter substrate 12, and a liquid crystal layer 13 sandwiched between the two.
  • a large number of wiring lines are provided on the array substrate 11, such as red pixel wiring, blue pixel wiring, green pixel wiring, color film substrate common electrode wiring, array substrate common electrode wiring, liquid crystal control wiring, and clock wiring. Line and so on.
  • the above wirings have their own input terminals, as shown in Figure 3, which specifically include the input terminal R of the red pixel wiring, the input terminal B of the blue pixel wiring, the input terminal G of the green pixel wiring, and the common electrode of the color film substrate
  • step S101 the resistance value of the common electrode wiring of the color filter substrate in each array substrate is sequentially obtained, and it is determined whether the resistance value is less than a preset resistance value.
  • the liquid crystal in the liquid crystal layer 13 can be rotated to form a pretilt angle, and liquid crystal alignment can be realized.
  • the input voltage of different traces is different, if crosstalk occurs, it will cause abnormal liquid crystal alignment.
  • the common electrode trace of the color filter substrate is short-circuited with other traces, the voltage on the common electrode trace of the color filter substrate will be abnormal, which will lead to abnormal alignment of the display panel.
  • the display panel 6 if the display panel 6 has an abnormal alignment, the display panel 6 will not light up, and the display panel 5 located around the display panel 6 can only see pixels. Contour, the display panel 4 will have slight dark lines. Even if the display panel is abnormally aligned, the surrounding display panel will also be damaged.
  • the common electrode wiring of the color filter substrate can be preliminarily determined by sequentially detecting whether the resistance value of the common electrode wiring of the color filter substrate in each array substrate is less than the preset resistance value. Whether there is a short circuit.
  • the preset resistance value can be set based on the change in the resistance value of the common electrode wiring of the color filter substrate before and after multiple short-circuit tests, and is not specifically limited in this embodiment. Since the preset resistance value is not the only standard value, it can be considered that an array substrate with a smaller resistance value in the common electrode wiring of the color filter substrate has a greater possibility of abnormal alignment during the display panel manufacturing process.
  • step S102 if the resistance value is less than the preset resistance value, the display panel corresponding to the array substrate is set as the target display panel.
  • the display panel corresponding to the array substrate may have an abnormal alignment, so it is set as the target display panel. If an alignment exception occurs during subsequent alignment of multiple display panels, the target display panel can be processed first.
  • step S103 a high-level signal is input to the common electrode wiring of the color filter substrate, and it is determined whether the alignment abnormality of the multiple display panels occurs.
  • the display panel 1 further includes a first metal layer 14, a second metal layer 15 and a third metal layer 16.
  • the above-mentioned various wirings can be formed.
  • the first metal layer 14 and the second metal layer 15 are disposed on the array substrate, with an insulating layer 17 between them.
  • An anisotropic conductive adhesive 18 is provided between the second metal layer 15 and the third metal layer 16.
  • the wiring located on the first metal layer 14 transmits a high-level signal
  • the wiring located on the second metal layer 15 transmits a low-level signal.
  • the common electrode wiring of the color filter substrate is formed on the first metal layer 14, that is, the common electrode wiring of the color filter substrate should transmit a high-level signal.
  • the third metal layer 16 is disposed on the color filter substrate 12.
  • the third metal layer 16 includes a first area 161 and a second area 162.
  • the wires located in the first area 161 are used to transmit high-level signals, and the wires located in the second area 162 are used to transmit low-level signals.
  • the common electrode traces of the color filter substrate are connected to the traces on the second metal layer 15 and a short circuit occurs.
  • the high-level signal transmitted by the common electrode wiring of the color filter substrate will be transmitted to the wiring on the second metal layer 15 and the wiring on the second region 162 of the third metal layer 16, causing signal crosstalk and abnormal alignment.
  • Step S104 if an abnormal alignment occurs, disconnect the corresponding wiring input terminal in the target display panel.
  • the target display panel that may be short-circuited in the common electrode wiring of the color filter substrate can be quickly located. Then, the corresponding wiring input terminal in the target display panel is disconnected to avoid damage to other display panels. Specifically, a high-energy laser is used to perform laser heating and vaporization to remove all the film layers deposited at the defective position on the array substrate.
  • the target trace that is short-circuited with the common electrode trace of the color filter substrate in the target display panel can be determined first. Then directly disconnect the input terminal of the target trace.
  • the signal line that needs to be disconnected can be determined according to the common electrode short circuit of the common color filter substrate. As shown in FIG. 5, the Low input terminal of the low-level signal line in the target display panel can be disconnected. Or as shown in FIG. 6, the high input terminal of the high level signal line in the target display panel can be disconnected.
  • the low voltage in the target display panel can be The input terminal of the flat signal line is disconnected to ensure that the high-level signal is unblocked and other display panels will not be damaged.
  • all the wiring input terminals on the array substrate in the target display panel can also be disconnected.
  • the display panel processing method and display panel processing system of the embodiments of the present invention prevent other display panels from being damaged by disconnecting the corresponding wiring input terminals in the target display panel when the alignment of multiple display panels is abnormal.

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  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
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Abstract

提供一种显示面板（1）处理方法，对多个显示面板（1）进行处理，显示面板（1）包括阵列基板（11），包括：依次获取每个阵列基板（11）中彩膜基板公共电极走线的电阻值；如电阻值小于预设电阻值，将阵列基板（11）对应的显示面板（1）设为目标显示面板；对彩膜基板公共电极走线输入高电平信号，若显示面板（1）配向异常，断开目标显示面板中相应走线输入端。还提供一种显示面板处理系统。

Description

显示面板处理方法和显示面板处理系统 技术领域
本发明涉及显示技术领域，特别是涉及一种显示面板处理方法和显示面板处理系统。
 背景技术
液晶显示面板一般包括一彩色滤光片（Color Filter，CF）基板，一阵列基板，以及配置在二者之间的液晶层。液晶显示面板包括阵列制程、面板制程以及模块制程等多个制程。每一制程结束后，会对液晶显示面板内部电路进行检测，如发现问题，则进行修复。
其中，在面板制程中，液晶显示面板中的CF-COM（彩膜基板公共电极）走线可能会发生短路，导致面板液晶配向异常，并使该面板周围的其他面板受到损害，也出现液晶配向异常。
故，有必要对发生CF-COM走线短路的液晶显示面板进行处理，以避免其对其他面板的损害。
 技术问题
本发明的目的在于提供一种显示面板处理方法和显示面板处理系统，提高了显示面板的良率。
 技术解决方案
本发明实施例提供了一种显示面板处理方法，用于对多个显示面板进行处理，每一显示面板包括一阵列基板，所述阵列基板上设有彩膜基板公共电极走线，其包括：
依次获取每一个阵列基板中彩膜基板公共电极走线的电阻值，并判断所述电阻值是否小于预设电阻值；
如小于预设电阻值，则将所述阵列基板对应的显示面板设置为所述目标显示面板；
对所述彩膜基板公共电极走线输入高电平信号，判断所述多个显示面板是否发生配向异常；
如发生配向异常，则采用激光将所述目标显示面板中相应走线输入端断开。
在一实施例中，所述如发生配向异常，则将所述目标显示面板中相应走线输入端断开步骤，包括：如发生配向异常，将所述目标显示面板中阵列基板上的全部走线输入端断开。
在一实施例中，所述如发生配向异常，则将所述目标显示面板中相应走线输入端断开步骤，包括：如发生配向异常，将所述目标显示面板中的低电平信号线输入端断开。
在一实施例中，所述如发生配向异常，则将所述目标显示面板中相应走线输入端断开步骤，包括：如发生配向异常，将所述目标显示面板中的高电平信号线输入端断开。
在一实施例中，所述将所述目标显示面板中相应走线输入端断开步骤，包括：
确定所述目标显示面板中与所述彩膜基板公共电极走线发生短路的目标走线；
将所述目标走线的输入端断开。
本发明实施例提供了一种显示面板处理方法，用于对多个显示面板进行处理，每一显示面板包括一阵列基板，所述阵列基板上设有彩膜基板公共电极走线，所述方法包括：
依次获取每一个阵列基板中彩膜基板公共电极走线的电阻值，并判断所述电阻值是否小于预设电阻值；
如小于预设电阻值，则将所述阵列基板对应的显示面板设置为所述目标显示面板；
对所述彩膜基板公共电极走线输入高电平信号，判断所述多个显示面板是否发生配向异常；
如发生配向异常，则将所述目标显示面板中相应走线输入端断开。
在一实施例中，所述如发生配向异常，则将所述目标显示面板中相应走线输入端断开步骤，包括：如发生配向异常，将所述目标显示面板中阵列基板上的全部走线输入端断开。
在一实施例中，所述如发生配向异常，则将所述目标显示面板中相应走线输入端断开步骤，包括：如发生配向异常，将所述目标显示面板中的低电平信号线输入端断开。
在一实施例中，所述如发生配向异常，则将所述目标显示面板中相应走线输入端断开步骤，包括：如发生配向异常，将所述目标显示面板中的高电平信号线输入端断开。
在一实施例中，所述将所述目标显示面板中相应走线输入端断开步骤，包括：
确定所述目标显示面板中与所述彩膜基板公共电极走线发生短路的目标走线；
将所述目标走线的输入端断开。
本发明实施例还提供了一种显示面板处理系统，其包括：
多个显示面板，每一显示面板包括一阵列基板，所述阵列基板上设有彩膜基板公共电极走线；
显示面板处理装置包括：
检测模块，用于依次获取每一个阵列基板中彩膜基板公共电极走线的电阻值，并判断所述电阻值是否小于预设电阻；
设置模块，用于在小于预设电阻值时，将所述阵列基板对应的显示面板设置为所述目标显示面板；
判断模块，用于对所述彩膜基板公共电极走线输入高电平信号，判断所述多个显示面板是否发生配向异常；
断开模块，用于在发生配向异常时，将所述目标显示面板中相应走线输入端断开。
在一实施例中，所述断开模块包括第一断开子模块，用于在发生配向异常时，将所述目标显示面板中阵列基板上的全部走线输入端断开。
在一实施例中，所述断开模块包括第二断开子模块，用于在发生配向异常时将所述目标显示面板中的低电平信号线输入端断开。
在一实施例中，所述断开模块包括第三断开子模块，用于在发生配向异常时，将所述目标显示面板中的高电平信号线输入端断开。
在一实施例中，断开模块包括第四断开子模块，用于在发生配向异常时，确定所述目标显示面板中与所述彩膜基板公共电极走线发生短路的目标走线；将所述目标走线的输入端断开。
 有益效果
本发明实施例的显示面板处理方法和显示面板处理系统，通过在多个显示面板发生配向异常时，将目标显示面板中相应走线输入端断开，避免其他显示面板受到损害。
 附图说明
为让本发明的上述内容能更明显易懂，下文特举优选实施例，并配合所附图式，作详细说明如下：
图1为本发明实施例提供的显示面板处理方法的流程示意图。
图2为本发明实施例提供的显示面板处理方法的场景示意图。
图3为本发明实施例提供的显示面板处理方法的全部走线断开示意图。
图4为本发明实施例提供的显示面板处理方法的另一场景示意图。
图5为本发明实施例提供的显示面板处理方法的低电平信号线断开示意图。
图6为本发明实施例提供的显示面板处理方法的高电平信号线断开示意图。
图7为本发明实施例提供的显示面板处理方法的静电击穿模拟示意图。
 本发明的实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。
在图中，结构相似的单元是以相同标号表示。
在本文中提及“实施例”意味着，结合实施例描述的特定特征、结构或特性可以包含在本发明的至少一个实施例中。在说明书中的各个位置出现该短语并不一定均是指相同的实施例，也不是与其它实施例互斥的独立的或备选的实施例。本领域技术人员显式地和隐式地理解的是，本文所描述的实施例可以与其它实施例相结合。
请参照图1，图1为本发明实施例提供的显示面板处理方法的流程示意图。该显示面板处理方法用于对多个显示面板进行处理。
如图2所示，每一显示面板1包括一阵列基板11、一彩膜基板12，以及夹在二者之间的液晶层13。其中，阵列基板11上设有大量走线，比如红像素走线、蓝像素走线、绿像素走线、彩膜基板公共电极走线、阵列基板公共电极走线、液晶控制走线以及时钟走线等等。
上述走线都具有各自的输入端，如图3所示，具体包括红像素走线的输入端R、蓝像素走线的输入端B、绿像素走线的输入端G、彩膜基板公共电极走线的输入端CFcom、阵列基板公共电极走线输入端Acom、液晶控制走线输入端LC1、液晶控制走线输入端LC2以及时钟走线输入端CK等多种输入端。
步骤S101，依次获取每一个阵列基板中彩膜基板公共电极走线的电阻值，并判断电阻值是否小于预设电阻值。
在显示面板1的制程中，通过对上述输入端输入电压，可以使液晶层13中的液晶旋转形成预倾角，实现液晶配向。不同走线输入的电压不同，如果发生串扰，会造成液晶配向异常。
其中，如果彩膜基板公共电极走线与其他走线发生短路，会造成彩膜基板公共电极走线上电压异常，即导致该显示面板发生配向异常。
进一步的，在如图4所示的显示面板1-6中，如果显示面板6发生配向异常，则显示面板6将出现点不亮的情况，位于显示面板6周围的显示面板5只能看见像素轮廓，显示面板4会出现轻微的暗纹。即发生配向异常的显示面板，其周围的显示面板也会受到损害。
综上，在显示面板制程之前，有必要对阵列基板进行彩膜基板公共电极走线短路检测。
需要说明的是，如果一个显示面板中阵列基板上的彩膜基板公共电极走线发生短路，其电阻值会变小。因此，在显示面板制程之前的阵列基板检测过程中，可以通过依次检测每一个阵列基板中彩膜基板公共电极走线电阻值是否小于预设电阻值，来初步判断该彩膜基板公共电极走线是否发生短路。
预设电阻值可以根据多次短路试验前后，彩膜基板公共电极走线电阻值的变化，进行设置，在本实施例中不做具体限定。由于预设电阻值不是唯一的标准值，因此可以认为彩膜基板公共电极走线具有较小电阻值的阵列基板，在显示面板制程中具有较大可能性发生配向异常。
步骤S102，如小于预设电阻值，则将阵列基板对应的显示面板设置为目标显示面板。
如小于预设电阻值，则认为该阵列基板对应的显示面板可能会发生配向异常，故将其设置为目标显示面板。如果后续对多个显示面板进行配向时，发生了配向异常，可以优先对该目标显示面板进行处理。
步骤S103，对彩膜基板公共电极走线输入高电平信号，判断多个显示面板是否发生配向异常。
如图2所示，显示面板1还包括第一金属层14、第二金属层15和第三金属层16。通过对上述金属层进行图案化，可以形成上述各类走线。其中，第一金属层14和第二金属层15设置在阵列基板上，二者之间具有绝缘层17。第二金属层15和第三金属层16之间具有异方性导电胶18。其中，位于第一金属层14的走线传输高电平信号，位于第二金属层15的走线传输低电平信号。彩膜基板公共电极走线形成在第一金属层14上，即彩膜基板公共电极走线应传输高电平信号。第三金属层16设置在彩膜基板12上。其中，第三金属层16包括第一区域161和第二区域162。位于第一区域161的走线用于传输高电平信号，位于第二区域162的走线用于传输低电平信号。
当绝缘层17发生破损，彩膜基板公共电极走线与位于第二金属层15上的走线连接，发生短路。则彩膜基板公共电极走线传输的高电平信号将传输给第二金属层15上的走线、第三金属层16第二区域162上的走线，造成信号串扰，发生配向异常。
综上，彩膜基板公共电极走线输入高电平信号后，如果绝缘层17发生破损，三层金属层之间的信号将发生串扰，造成液晶层13中液晶配向异常，即对应的显示面板及其周围显示面板会发生配向异常。
步骤S104，如发生配向异常，则将目标显示面板中相应走线输入端断开。
如发生配向异常，可以快速定位到可能发生彩膜基板公共电极走线短路的目标显示面板。再通过对该目标显示面板中相应走线输入端进行断开处理，以避免其对其他显示面板造成损害。具体的，用高能量激光，对阵列基板上不良位置处沉积的所有膜层进行激光加热气化去除。
在一实施例中，可以先确定目标显示面板中与彩膜基板公共电极走线发生短路的目标走线。然后直接将目标走线的输入端断开。
在一实施例中，可以根据常见的彩膜基板公共电极走线短路情况，来确定需要断开的信号线。如图5所示，可以将目标显示面板中的低电平信号线Low输入端断开。或如图6所示，可以将目标显示面板中的高电平信号线high输入端断开。
举例来说，当彩膜基板公共电极线CFCOM_M2_H与阵列基板上Pad_M1_L信号线发生短路，或彩膜基板公共电极线CFCOM_M1_H与阵列基板上Pad_M2_L信号线发生短路时，可以将目标显示面板中的低电平信号线输入端断开，可以确保高电平信号畅通，且其他显示面板不会受损害。
在一实施例中，如图3中的虚线所示，还可以将目标显示面板中阵列基板上的全部走线输入端断开。
接下来，对上述显示面板处理方法做实验验证。如图7所示，对显示面板5和显示面板8分别做模拟静电击穿ESD。经ESD后的显示面板5和显示面板8都发生彩膜基板公共电极走线短路。其中，显示面板5未做处理，显示面板8采用上述断开处理方法做处理。如图4所示，位于显示面板6周围的显示面板5只能看见像素轮廓，显示面板4会出现轻微的暗纹。而位于显示面板8周围的显示面板7、9、10都正常显示，未受到损害。即，本发明实施例的显示面板处理方法，可以有效的避免其他显示面板受到损害。
本发明实施例的显示面板处理方法和显示面板处理系统，通过在多个显示面板发生配向异常时，将目标显示面板中相应走线输入端断开，避免其他显示面板受到损害。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (15)

  1. 一种显示面板处理方法，用于对多个显示面板进行处理，每一显示面板包括一阵列基板，所述阵列基板上设有彩膜基板公共电极走线，其包括：
    依次获取每一个阵列基板中彩膜基板公共电极走线的电阻值，并判断所述电阻值是否小于预设电阻值；
    如小于预设电阻值，则将所述阵列基板对应的显示面板设置为所述目标显示面板；
    对所述彩膜基板公共电极走线输入高电平信号，判断所述多个显示面板是否发生配向异常；
    如发生配向异常，则采用激光将所述目标显示面板中相应走线输入端断开。
  2. 根据权利要求1所述的显示面板处理方法，其中，所述如发生配向异常，则将所述目标显示面板中相应走线输入端断开步骤，包括：如发生配向异常，将所述目标显示面板中阵列基板上的全部走线输入端断开。
  3. 根据权利要求1所述的显示面板处理方法，其中，所述如发生配向异常，则将所述目标显示面板中相应走线输入端断开步骤，包括：如发生配向异常，将所述目标显示面板中的低电平信号线输入端断开。
  4. 根据权利要求1所述的显示面板处理方法，其中，所述如发生配向异常，则将所述目标显示面板中相应走线输入端断开步骤，包括：如发生配向异常，将所述目标显示面板中的高电平信号线输入端断开。
  5. 根据权利要求1所述的显示面板处理方法，其中，所述将所述目标显示面板中相应走线输入端断开步骤，包括：
    确定所述目标显示面板中与所述彩膜基板公共电极走线发生短路的目标走线；
    将所述目标走线的输入端断开。
  6. 一种显示面板处理方法，用于对多个显示面板进行处理，每一显示面板包括一阵列基板，所述阵列基板上设有彩膜基板公共电极走线，其包括：
    依次获取每一个阵列基板中彩膜基板公共电极走线的电阻值，并判断所述电阻值是否小于预设电阻值；
    如小于预设电阻值，则将所述阵列基板对应的显示面板设置为所述目标显示面板；
    对所述彩膜基板公共电极走线输入高电平信号，判断所述多个显示面板是否发生配向异常；
    如发生配向异常，则将所述目标显示面板中相应走线输入端断开。
  7. 根据权利要求6所述的显示面板处理方法，其中，所述如发生配向异常，则将所述目标显示面板中相应走线输入端断开步骤，包括：如发生配向异常，将所述目标显示面板中阵列基板上的全部走线输入端断开。
  8. 根据权利要求6所述的显示面板处理方法，其中，所述如发生配向异常，则将所述目标显示面板中相应走线输入端断开步骤，包括：如发生配向异常，将所述目标显示面板中的低电平信号线输入端断开。
  9. 根据权利要求6所述的显示面板处理方法，其中，所述如发生配向异常，则将所述目标显示面板中相应走线输入端断开步骤，包括：如发生配向异常，将所述目标显示面板中的高电平信号线输入端断开。
  10. 根据权利要求6所述的显示面板处理方法，其中，所述将所述目标显示面板中相应走线输入端断开步骤，包括：
    确定所述目标显示面板中与所述彩膜基板公共电极走线发生短路的目标走线；
    将所述目标走线的输入端断开。
  11. 一种显示面板处理系统，其包括：
    多个显示面板，每一显示面板包括一阵列基板，所述阵列基板上设有彩膜基板公共电极走线；
    显示面板处理装置包括：
    检测模块，用于依次获取每一个阵列基板中彩膜基板公共电极走线的电阻值，并判断所述电阻值是否小于预设电阻；
    设置模块，用于在小于预设电阻值时，将所述阵列基板对应的显示面板设置为所述目标显示面板；
    判断模块，用于对所述彩膜基板公共电极走线输入高电平信号，判断所述多个显示面板是否发生配向异常；
    断开模块，用于在发生配向异常时，将所述目标显示面板中相应走线输入端断开。
  12. 根据权利要求11所述的显示面板处理系统，其中，所述断开模块包括第一断开子模块，用于在发生配向异常时，将所述目标显示面板中阵列基板上的全部走线输入端断开。
  13. 根据权利要求11所述的显示面板处理系统，其中，所述断开模块包括第二断开子模块，用于在发生配向异常时将所述目标显示面板中的低电平信号线输入端断开。
  14. 根据权利要求11所述的显示面板处理系统，其中，所述断开模块包括第三断开子模块，用于在发生配向异常时，将所述目标显示面板中的高电平信号线输入端断开。
  15. 根据权利要求11所述的显示面板处理系统，其中，断开模块包括第四断开子模块，用于在发生配向异常时，确定所述目标显示面板中与所述彩膜基板公共电极走线发生短路的目标走线；将所述目标走线的输入端断开。
PCT/CN2019/108466 2019-05-22 2019-09-27 显示面板处理方法和显示面板处理系统 Ceased WO2020232944A1 (zh)

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