WO2020218027A1 - Dispositif, procédé et programme de traitement de signaux - Google Patents

Dispositif, procédé et programme de traitement de signaux Download PDF

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Publication number
WO2020218027A1
WO2020218027A1 PCT/JP2020/016066 JP2020016066W WO2020218027A1 WO 2020218027 A1 WO2020218027 A1 WO 2020218027A1 JP 2020016066 W JP2020016066 W JP 2020016066W WO 2020218027 A1 WO2020218027 A1 WO 2020218027A1
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Prior art keywords
signal
pwm
period
pdm
level
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PCT/JP2020/016066
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English (en)
Japanese (ja)
Inventor
宜紀 田森
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ソニー株式会社
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    • G—PHYSICS
    • G10—MUSICAL INSTRUMENTS; ACOUSTICS
    • G10L—SPEECH ANALYSIS OR SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING; SPEECH OR AUDIO CODING OR DECODING
    • G10L19/00—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217—Class D power amplifiers; Switching amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K7/00—Modulating pulses with a continuously-variable modulating signal
    • H03K7/08—Duration or width modulation ; Duty cycle modulation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M5/00—Conversion of the form of the representation of individual digits
    • H03M5/02—Conversion to or from representation by pulses
    • H03M5/04—Conversion to or from representation by pulses the pulses having two levels
    • H03M5/06—Code representation, e.g. transition, for a given bit cell depending only on the information in that bit cell
    • H03M5/08—Code representation by pulse width
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems

Definitions

  • the present technology relates to signal processing devices and methods, and programs, and particularly to signal processing devices, methods, and programs capable of suppressing deterioration of audio characteristics.
  • DSD Direct Stream Digital
  • audio is digitized by pulse density modulation (PDM (Pulse Density Modulation)), and the resulting PDM signal is treated as an audio signal of a DSD sound source, that is, a DSD signal (direct stream digital signal).
  • PDM Pulse Density Modulation
  • PWM Pulse Width Modulation
  • DSD data is PWM-converted to cancel switching distortion that occurs when the power amplification unit is driven with the original DSD data (for example, patent documents). 1).
  • This technology was made in view of such a situation, and makes it possible to suppress the deterioration of audio characteristics.
  • the signal processing device of one aspect of the present technology is a PWM conversion unit that converts a PDM signal into a PWM signal in which the signal levels at the start and end of the period are higher than the signal level at the center of one period of the carrier frequency. To be equipped.
  • a signal processing method or program of one aspect of the present technology converts a PDM signal into a PWM signal in which the signal levels at the start and end of the period are higher than the signal level at the center of one period of the carrier frequency. including.
  • the PDM signal is converted into a PWM signal in which the signal levels at the start and end of the period are higher than the signal level at the center of one period of the carrier frequency.
  • the DSD sound source format that is, the DSD sound source signal is explained as a PDM signal in the [256Fs, 1bit] format.
  • the clock frequency of the master clock of the system required to generate the PWM signal has some values adopted within a practical range, but 2048Fs (90.3168MHz) will be described below as an example.
  • FIG. 1 is a diagram showing a configuration example of an embodiment of an audio playback system to which the present technology is applied.
  • the audio reproduction system shown in FIG. 1 has a signal processing device 11 and headphones 12.
  • the signal processing device 11 comprises, for example, an acoustic reproduction control device such as a portable player or a smart phone, and is driven by one or a plurality of drives including at least a single-ended drive system based on a PWM signal obtained from a PDM signal as a digital audio source.
  • the headphones 12 are driven by the method. That is, the signal processing device 11 outputs an analog output signal obtained from the PWM signal to the headphones 12.
  • a balanced drive method or the like can be adopted, and it is also possible to drive the headphone 12 by appropriately switching a plurality of drive methods.
  • the signal processing device 11 has a PWM conversion unit 21 and an amplification unit 22.
  • a PDM signal (digital audio source) for reproducing sound such as music is input (supplied) to the PWM conversion unit 21 from a recording unit or the like (not shown).
  • the PWM conversion unit 21 generates a PWM signal, which is a pulse signal, by performing PWM conversion on the input PDM signal according to the supplied master clock, and supplies the obtained PWM signal to the amplification unit 22. ..
  • the amplification unit 22 amplifies the PWM signal supplied from the PWM conversion unit 21 according to the supplied master clock, performs DA (Digital to Analog) conversion, and based on the output signal obtained as a result, the speaker of the headphone 12 That is, the driver 31 is driven.
  • DA Digital to Analog
  • the power amplification unit is realized by the PWM conversion unit 21 and the amplification unit 22.
  • the headphones 12 are driven by the signal processing device 11 and output sound from the built-in driver 31.
  • the reproduction device to which the output signal obtained by the signal processing device 11 is output is not limited to the headphones 12, and may be a normal speaker or the like.
  • amplification unit 22 is configured as shown in FIG. 2, for example.
  • the amplification unit 22 has a gate driver 61, a FET (Field Effect Transistor) 62-1, a FET 62-2, and an LPF (Low Pass Filter) 63.
  • the gate driver 61 drives FET62-1 and FET62-2 in response to the PWM signal supplied from the PWM conversion unit 21.
  • FET62-1 and FET62-2 consist of field effect transistors and are driven under the control of the gate driver 61.
  • the FET62-1 is a high-side FET in which the power supply is connected to the end opposite to the end to which the LPF63 is connected, and the gate of the FET62-1 is connected to the gate driver 61.
  • FET62-2 is a low-side FET in which a ground or negative power supply is connected to the end opposite to the end to which LPF63 is connected, and the gate of FET62-2 is connected to the gate driver 61.
  • FET62 when it is not necessary to distinguish between FET62-1 and FET62-2, they are also simply referred to as FET62.
  • the gate driver 61 when the gate driver 61 performs single-ended drive, the gate driver 61 turns on the FET 62-1 when the PWM signal value is "1", that is, the H level (High level), and the PWM signal value is "0". That is, when it is L level (Low level), FET62-2 is turned on.
  • FET62-1 becomes conductive and the power supply voltage is supplied to LPF63.
  • FET62-2 becomes conductive and LPF63 Is supplied with ground level or negative power supply voltage.
  • the PWM signal is amplified, and the amplified PWM signal, that is, the signal of the waveform corresponding to the PWM signal is supplied to the LPF63.
  • FIG. 3 shows a general PWM conversion performed when the clock frequency of the master clock at the time of PWM conversion is 2048Fs.
  • the period T11 indicates one sampling period of the PDM signal whose sampling frequency is 256 Fs (11.2896 MHz), that is, one cycle of the carrier frequency of the PWM signal.
  • this period is one carrier cycle. It will also be referred to as the period of.
  • the period T12 indicates the period for one clock of the master clock whose clock frequency is 2048Fs (90.3168MHz).
  • one of the values "1" and "0" which is a 1-bit value for each carrier cycle, is output as a sample value of one sample of the PDM signal.
  • the audio waveform of the sound based on the PDM signal is determined by the density of the pulses corresponding to the sample values in the time direction.
  • PWM conversion will be described here as a conversion method of sample values "1" and "0" in one sample.
  • the PWM signal obtained by PWM conversion when the sample value "1" of the PDM signal is input is also referred to as a PWM (+) signal, and when the sample value "0" of the PDM signal is input.
  • the PWM signal obtained by PWM conversion is also referred to as a PWM (-) signal.
  • the resolution that determines the shape of the pulse waveform of the PWM signal (hereinafter, also referred to as the PWM waveform) is referred to as a "slot". This resolution is uniquely determined by the clock frequency of the master clock and the carrier frequency of the PWM signal, that is, the sampling frequency of the PDM signal.
  • the length of the period T12 which is the period of one clock of the master clock, is one slot.
  • the PWM (-) signal indicated by the polygonal line L11 is a pulse signal with a pulse width of two slots centered on the time (position) at the center of the period T11.
  • the PWM (+) signal indicated by the polygonal line L12 is a pulse signal with a pulse width of 6 slots centered on the time (position) at the center of the period T11.
  • the PWM waveforms of the PWM signals indicated by these polygonal lines L11 and L12 are all line-symmetrical with respect to the time at the center of the period T11.
  • the PWM conversion pattern shape which is optimal for single-ended drive of a driver (speaker), is such that each waveform of the PWM (-) signal and PWM (+) signal is centered within one cycle of the carrier frequency of the PWM signal.
  • PWM waveform which is optimal for single-ended drive of a driver (speaker)
  • each waveform of the PWM (-) signal and PWM (+) signal is centered within one cycle of the carrier frequency of the PWM signal.
  • it is known to be line-symmetric (see, for example, Japanese Patent Application Laid-Open No. 2000-68835).
  • the period T11 indicates the period of one cycle of the carrier frequency, and hereinafter, the time (position) at the center of the period of one cycle (one carrier cycle) of the carrier frequency of the PWM signal is also referred to as the cycle center. I will do it.
  • the signal level is H level for a period of 3 slots in each direction from the center of the cycle to the left and right, and the signal level is L level in other periods. It has become.
  • the signal level is H level in each of the left and right directions from the center of the cycle for one slot, and in other periods.
  • the signal level is L level.
  • the PWM waveforms of both the PWM (-) signal and the PWM (+) signal have the periodic center as the center of the pulse and the sudden waveform, that is, the predetermined width centered on the periodic center. It can be seen that the period of is a waveform with H level.
  • both the PWM (+) signal and the PWM (-) signal are PWM waveform signals that are line-symmetric with respect to the center within the period of one cycle of the carrier frequency.
  • the signal level at the start end and the end of the period of one carrier cycle is lower than the signal level near the center of the cycle, and the PDM signal is axisymmetric in the period of one carrier cycle. It is converted into a PWM signal with a PWM waveform.
  • the general PWM conversion method shown in FIG. 3 will also be referred to as a two-sided modulation method.
  • the minimum pulse width of the PWM signal for driving the driver is a very narrow width of 22 [nsec].
  • the PDM signal for reproducing the DSD sound source is a PDM signal that expresses the audio waveform with the pulse density, and the frequency of narrow pulses generated in the PWM signal is high.
  • the driving difficulty when driving the driver by the power amplification unit becomes high, and as a result, the audio characteristics deteriorate (deteriorate). That is, noise and harmonic distortion occur, and the quality of the reproduced sound deteriorates.
  • the sampling frequency of the DSD sound source to be reproduced that is, the PDM signal
  • the clock frequency of the master clock of the system required for generating the PWM signal also tends to be high. Therefore, in such a case, the minimum pulse width of the PWM signal becomes narrower, which further increases the difficulty of driving the driver by the power amplification unit.
  • the waveform of the signal output from the FET should ideally be a rectangular waveform as shown in, for example, the polygonal line WS11 in FIG. Is.
  • the shaded area represents the error between the ideal signal waveform shown on the polygonal line WS11 and the actual signal waveform shown on the curve WS12, and such an error reduces the audio characteristics. cause.
  • the narrower the width of the pulse signal output from the FET that is, the narrower the pulse width of the PWM signal
  • the narrower the pulse width of the PWM signal the greater the influence of the error between the ideal signal waveform and the actual signal waveform, and the deterioration of audio characteristics becomes remarkable. turn into.
  • the input PDM signal is lined at the end of the period of one carrier cycle, that is, the signal level at the start end and the end is higher than the signal level near the center of the cycle, and during the period of one carrier cycle. Converted to a PWM signal with a symmetric PWM waveform. As a result, the frequency of occurrence of narrow pulses in the PWM signal can be reduced, and deterioration of audio characteristics can be suppressed.
  • PWM conversion is performed by the PWM conversion unit 21 as shown in FIG.
  • the PWM conversion unit 21 when the sample value "0" of the PDM signal is supplied to the PWM conversion unit 21, the PWM conversion unit 21 outputs the PWM signal (-) of the waveform shown in the polygonal line L21.
  • the PWM (-) signal indicated by the polygonal line L21 has the L level signal level at the time at the center of the period T11, that is, the signal level for the period of 6 slots centered on the periodic center, and the signal level at the other periods is the H level. It is a pulse signal with a sudden waveform below.
  • the signal level is H level in the period of one cycle of the carrier frequency, that is, the period of one slot immediately after the start of the period T11 which is the period of one carrier cycle. Increase to.
  • the signal level is set to L level in the period of 6 slots, and the signal level is increased to H level in the period of 1 slot immediately before the end of the period T11.
  • the PWM conversion unit 21 outputs the PWM signal (+) of the waveform shown in the polygonal line L22.
  • the PWM (+) signal indicated by the polygonal line L22 has the L level signal level at the time at the center of the period T11, that is, the signal level for two slots centered on the periodic center, and the H level signal level at the other periods. It is a pulse signal with a sudden waveform below.
  • the signal level increases to H level in the period of 3 slots immediately after the start of period T11, and then the signal level increases to L level in the period of 2 slots. Furthermore, the signal level increases to the H level in the period of 3 slots immediately before the end of the period T11.
  • the PWM signal shown on the polygonal line L21 and the polygonal line L22 is line-symmetric with respect to the cycle center within a period of one cycle of the carrier frequency, similar to the PWM signal obtained by the general PWM conversion shown in FIG. It is a signal with a good waveform.
  • the PWM signal obtained by the PWM conversion unit 21 is a PWM signal suitable for single-ended drive.
  • the PWM conversion method shown in FIG. 5 will also be referred to as a double-sided reverse modulation method.
  • the two-sided modulation method shown in FIG. 3 is compared with the two-sided inverse modulation method performed by the PWM conversion unit 21 described with reference to FIG.
  • the signal level of the pulse is increased from the L level to the H level at the center of the cycle, based on the L level within one carrier cycle.
  • the signal level of the pulse at the center of the cycle is based on the H level within one carrier cycle. Is reduced from H level to L level.
  • the modulation factor when converting the PDM signal into the PWM signal is the same. .. That is, it can be seen that the signal level of the output signal does not decrease in any PWM conversion.
  • the modulation factors of the two-sided modulation method and the two-sided inverse modulation method are calculated as follows.
  • the pulse width of the PWM (+) signal is 6 slots out of 8 slots which are one cycle of the carrier frequency, and similarly, the pulse width of the PWM (-) signal is 8 slots which is one cycle of the carrier frequency. Two of them.
  • the S / N ratio (Signal to Noise Ratio) of the audio performance decreases due to the decrease in the signal level during playback of the DSD sound source.
  • the PWM signal obtained by the double-sided reverse modulation method is line-symmetrical in the period of one carrier cycle.
  • the signal levels at the start and end of the period of one carrier cycle are higher than the signal level at the center of the cycle, and the H level at the start of the period of one carrier cycle.
  • the signal may be different from the period (width) to be the H level at the end of the period of one carrier cycle.
  • the PWM signal obtained by the general PWM conversion that is, the two-sided modulation method and the PWM conversion by the PWM conversion unit 21, that is, the PWM obtained by the two-sided reverse modulation method.
  • the horizontal direction that is, the horizontal axis indicates the time axis (time direction)
  • the vertical direction in the drawings indicates the signal level
  • FIG. 6 shows a PDM signal consisting of 12 sample values arranged in succession, that is, a PWM signal when "000101010101" is PWM-converted as a PDM signal.
  • the broken line L31 shows the PWM signal obtained by the general PWM conversion (two-sided modulation method) described with reference to FIG. 3, and the broken line L32 is the PWM conversion unit 21 described with reference to FIG. The PWM signal obtained by the PWM conversion (two-sided reverse modulation method) of.
  • a narrow pulse is generated at the same frequency as the occurrence frequency of the sample value "0" in the PDM signal.
  • the sample value "0" is used when the sample value in the PDM signal changes from “0” to “1” or from “1” to “0". And when the sample value "1" occurs alternately, a narrow pulse with a pulse width of 2 slots does not occur.
  • a pulse is not generated at the center of the cycle in the period of one carrier cycle, and a pulse is generated at the start portion and the end portion of the period of one carrier cycle. Is generated, and these pulses are connected with the pulses generated in the period of one carrier cycle before or after the time.
  • the sample values of the PDM signal are alternately “0” and “1” as sample values such as “0" to “1” or “1” to “0".
  • a narrow pulse with a pulse width of 2 slots will be generated at the timing of the sample value "0".
  • a narrow pulse with a pulse width of 2 slots is generated only when "0" is continuous as the sample value of the PDM signal.
  • the number of times a narrow pulse having a pulse width of 2 slots is generated in the PWM signal shown by the polygonal line L31 is 7 times in the entire section.
  • the number of occurrences of narrow pulses with a pulse width of 2 slots is 2, and it can be seen that the frequency of occurrence of narrow pulses can be significantly reduced as a whole.
  • FIG. 7 shows a PDM signal consisting of 12 sample values arranged in succession, that is, a PWM signal when "000111001100" is PWM-converted as a PDM signal.
  • the broken line L41 shows the PWM signal obtained by the general PWM conversion (two-sided modulation method) described with reference to FIG. 3, and the broken line L42 is the PWM conversion unit 21 described with reference to FIG. The PWM signal obtained by the PWM conversion (two-sided reverse modulation method) of.
  • a narrow pulse with a pulse width of 2 slots is generated every time the sample value "0" of the PDM signal is generated.
  • the two-sided reverse modulation method does not require PCM (Pulse Code Modulation) conversion, and has a pulse width of 2 slots, which is the minimum pulse width, and a pulse width of 6 slots, which is the maximum pulse width. It is possible to obtain a multi-bit (multi-value) representation in which a pulse of 4 and a pulse having a pulse width of 4 slots in the middle appear, in particular, a ternary PWM signal here.
  • PCM Pulse Code Modulation
  • the difficulty of driving the driver 31 by the amplification unit 22 can be reduced, and the power supply fluctuation on the high-side FET 62-1 side can be suppressed.
  • deterioration of the audio characteristics of the output signal input from the amplification unit 22 to the driver 31 can be suppressed. In other words, it is possible to suppress the occurrence of noise and harmonic distortion in the output signal.
  • the width of the pulse appearing as a PWM signal suddenly changes from the width of 2 slots to the width of 6 slots, noise and distortion occur due to power supply fluctuations on the FET62-1 side. , The audio characteristics of the output signal are degraded.
  • a multi-bit (multi-value) PWM signal can be obtained by a two-sided modulation method, for example, when the width of the appearing pulse changes from 2 slots to 4 slots and further to 6 slots.
  • the change of the PWM waveform becomes slower than that of the PWM signal.
  • the transition of the PWM waveform is such that the PWM signal is filtered by an LPF (low-pass filter).
  • the double-sided reverse modulation method can prevent sudden changes in the PWM waveform, so that power supply fluctuations on the high-side FET62-1 side can be suppressed, and as a result, the audio characteristics of the output signal deteriorate. Can be suppressed.
  • the PDM signal is converted into a PWM signal having three pulse-shaped patterns by the two-sided reverse modulation method
  • a pulse-shaped pattern in which the PDM signal has four or more pulse-shaped patterns is described by the two-sided reverse modulation method. It may be converted into a PWM signal having.
  • the audio playback system When the audio playback system is instructed to play music or the like, the audio playback system performs a playback process to play the instructed music or the like.
  • the reproduction process by the audio reproduction system will be described with reference to the flowchart of FIG.
  • the designated PDM signal such as music is read out and input to the PWM conversion unit 21.
  • step S11 the PWM conversion unit 21 performs PWM conversion on the input PDM signal, and supplies the PWM signal obtained as a result to the gate driver 61 of the amplification unit 22.
  • PWM conversion is performed by the double-sided reverse modulation method.
  • step S12 the amplification unit 22 amplifies the PWM signal supplied from the PWM conversion unit 21 and DA-converts the amplified PWM signal.
  • the gate driver 61 amplifies the PWM signal by driving the FET 62 in response to the PWM signal supplied from the PWM conversion unit 21. Further, the LPF 63 performs DA conversion on the signal from the FET 62 by performing a filtering process on the signal supplied from the FET 62.
  • step S13 the LPF 63 of the amplification unit 22 drives the driver 31 provided in the headphones 12 based on the analog output signal obtained by the DA conversion, and causes the driver 31 to play music or the like.
  • the playback process ends.
  • the audio playback system converts the PDM signal into PWM and generates a PWM signal.
  • the PDM signal is treated as a digital audio source, and when the PDM signal is used as it is to drive the power amplification unit, the frequency of narrow pulse generation is performed by performing PWM conversion that lowers the signal level at the center of the cycle. Can be reduced.
  • the driving difficulty of the driver 31 can be lowered, and the deterioration of the audio characteristics of the output signal output from the amplification unit 22 can be suppressed.
  • the PWM conversion unit 21 can obtain a multi-valued PWM signal, that is, a PWM signal with multi-bit expression without performing PCM conversion, the audio characteristics of the output signal output from the amplification unit 22 are deteriorated. It can be further suppressed.
  • the modulation rate in PWM conversion does not decrease, so the signal level of the output signal does not decrease, and the frequency of narrow pulse generation does not require an additional circuit. Can be reduced.
  • the sampling frequency of the PWM signal does not change, so that the information (information amount) of the original DSD sound source itself can be retained. ..
  • one of the two-sided modulation method and the two-sided inverse modulation method may be dynamically selected and switched as appropriate.
  • the audio reproduction system is configured as shown in FIG. 9, for example.
  • the parts corresponding to the case in FIG. 1 are designated by the same reference numerals, and the description thereof will be omitted as appropriate.
  • the audio reproduction system shown in FIG. 9 has a signal processing device 91 and headphones 12.
  • the signal processing device 91 has a PWM conversion unit 21, an amplification unit 22, and a selection unit 101.
  • the selection unit 101 contains DSD sound source information regarding the PDM signal to be reproduced, power quality information supplied from the amplification unit 22, driver information supplied from the headphones 12, and output signals output from the amplification unit 22 to the headphones 12.
  • the PWM conversion by the PWM conversion unit 21 is controlled based on at least one of them.
  • the selection unit 101 uses either the two-sided modulation method or the two-sided reverse modulation method described above based on the DSD sound source information, the power supply quality information, the driver information, and the output signal.
  • the PWM conversion method is selected, and the PWM conversion unit 21 is controlled so that the PWM conversion is performed by the selected PWM conversion method. In other words, the PWM conversion method is switched.
  • the DSD sound source information is information indicating the sampling rate (sampling frequency) of the PDM signal.
  • sampling rate sampling frequency
  • the selection unit 101 selects the double-sided inverse modulation method as the PWM conversion method, and when the sampling rate is less than the threshold value, the selection unit 101 performs double-sided modulation as the PWM conversion method. Select a method.
  • the power supply quality information is information on the power supply quality on the high-side FET62-1 side of the amplification unit 22, more specifically, for example, information indicating the magnitude of power supply fluctuation.
  • the selection unit 101 reverses both sides as a PWM conversion method.
  • the two-sided modulation method is selected as the PWM conversion method.
  • the driver information is information about the driver 31, for example, an impedance value in the driver 31.
  • the impedance value (resistance value) when driving the driver 31 is high, it is necessary to raise the power supply voltage, that is, the voltage of the output signal in order to output the output signal with a sufficiently large sound pressure. Then, the driving difficulty of the driver 31 becomes high, which causes a decrease in the audio characteristics of the output signal.
  • the selection unit 101 selects the two-sided reverse modulation method as the PWM conversion method, and when the impedance value is less than the threshold value, the two-sided modulation method is used as the PWM conversion method. Select.
  • the selection unit 101 may obtain, for example, the noise level or distortion level of the output signal, that is, the magnitude of noise or distortion as the audio characteristics of the output signal, based on the output signal output from the LPF 63.
  • the selection unit 101 selects the double-sided inverse modulation method as the PWM conversion method, and the magnitude of noise or distortion is less than the threshold value.
  • the two-sided modulation method is selected as the PWM conversion method.
  • a double-sided reverse modulation method is selected as the PWM conversion method. If the conditions are not satisfied, the two-sided modulation method may be selected as the PWM conversion method.
  • the selection unit 101 may be provided in common for the left and right channels. In such a case, for example, when the selection unit 101 selects the two-sided modulation method in one channel, the two-sided reverse modulation method may be selected in the other channel.
  • the selection unit 101 is at least one of the DSD sound source information supplied, the power supply quality information supplied from the amplification unit 22, the driver information supplied from the headphones 12, and the output signal supplied from the amplification unit 22. Based on one of these, the PWM conversion method by the PWM conversion unit 21 is selected, and the selection result is supplied to the PWM conversion unit 21.
  • the headphones 12 are driven by a single end, a two-sided reverse modulation method or a two-sided modulation method is selected as the PWM conversion method.
  • step S42 the PWM conversion unit 21 performs PWM conversion on the input PDM signal by the PWM conversion method indicated by the selection result supplied from the selection unit 101, and the PWM signal obtained as a result is amplified by the amplification unit 22. It is supplied to the gate driver 61 of.
  • step S42 when the two-sided modulation method is selected as the PWM conversion method, PWM conversion is performed as described with reference to FIG. 3, and when the two-sided inverse modulation method is selected as the PWM conversion method, the PWM conversion is performed. PWM conversion is performed as described with reference to FIG.
  • steps S43 and S44 are then performed to end the reproduction process, but these processes are the same as the processes of steps S12 and S13 of FIG. 8, so the description thereof is omitted. To do.
  • the audio playback system selects an appropriate PWM conversion method based on the DSD sound source information, power supply quality information, driver information, and output signal. As a result, sufficient audio characteristics can be obtained.
  • the series of processes described above can be executed by hardware or software.
  • the programs that make up the software are installed on the computer.
  • the computer includes a computer embedded in dedicated hardware and, for example, a general-purpose personal computer capable of executing various functions by installing various programs.
  • FIG. 11 is a block diagram showing a configuration example of computer hardware that executes the above-mentioned series of processes programmatically.
  • a CPU Central Processing Unit
  • ROM ReadOnly Memory
  • RAM RandomAccessMemory
  • An input / output interface 505 is further connected to the bus 504.
  • An input unit 506, an output unit 507, a recording unit 508, a communication unit 509, and a drive 510 are connected to the input / output interface 505.
  • the input unit 506 includes a keyboard, a mouse, a microphone, an image sensor, and the like.
  • the output unit 507 includes a display, a speaker, and the like.
  • the recording unit 508 includes a hard disk, a non-volatile memory, and the like.
  • the communication unit 509 includes a network interface and the like.
  • the drive 510 drives a removable recording medium 511 such as a magnetic disk, an optical disk, a magneto-optical disk, or a semiconductor memory.
  • the CPU 501 loads the program recorded in the recording unit 508 into the RAM 503 via the input / output interface 505 and the bus 504 and executes the above-described series. Is processed.
  • the program executed by the computer (CPU501) can be recorded and provided on a removable recording medium 511 as a package medium or the like, for example. Programs can also be provided via wired or wireless transmission media such as local area networks, the Internet, and digital satellite broadcasting.
  • the program can be installed in the recording unit 508 via the input / output interface 505 by mounting the removable recording medium 511 in the drive 510. Further, the program can be received by the communication unit 509 and installed in the recording unit 508 via a wired or wireless transmission medium. In addition, the program can be pre-installed in the ROM 502 or the recording unit 508.
  • the program executed by the computer may be a program that is processed in chronological order in the order described in this specification, or may be a program that is processed in parallel or at a necessary timing such as when a call is made. It may be a program in which processing is performed.
  • the embodiment of the present technology is not limited to the above-described embodiment, and various changes can be made without departing from the gist of the present technology.
  • this technology can have a cloud computing configuration in which one function is shared by a plurality of devices via a network and processed jointly.
  • each step described in the above flowchart can be executed by one device or can be shared and executed by a plurality of devices.
  • one step includes a plurality of processes
  • the plurality of processes included in the one step can be executed by one device or shared by a plurality of devices.
  • this technology can also have the following configurations.
  • a signal processing device including a PWM converter that converts a PDM signal into a PWM signal whose signal levels at the start and end of the period are higher than the signal level at the center of one period of the carrier frequency.
  • the signal processing device according to (1) wherein the waveform of the PWM signal in the period is line symmetric.
  • the PWM conversion unit converts the PDM signal into the PWM signal having a pulse-shaped pattern of 3 or more.
  • the PDM signal is transmitted by the PWM converter. Convert to the PWM signal where the signal levels at the start and end are higher than the signal level at the center.
  • the signal processing apparatus according to (4) further comprising a selection unit for selecting whether to convert a PWM signal whose start end and end signal levels are lower than the central signal level.
  • the selection unit is based on at least one of the output from the amplification unit to the reproduction device, information on the reproduction device, information on power supply quality in the amplification unit, and sampling rate of the PDM signal.
  • the signal processing device A signal processing method for converting a PDM signal into a PWM signal in which the signal levels at the start and end of the period are higher than the signal level at the center of one period of the carrier frequency.
  • 11 signal processing device 12 headphones, 21 PWM conversion unit, 22 amplification unit, 31 driver, 61 gate driver, 62-1, 62-2, 62 FET, 63 LPF, 101 selection unit

Abstract

La présente invention concerne un dispositif, un procédé et un programme de traitement de signaux, permettant de supprimer la détérioration des caractéristiques audios. Le dispositif de traitement de signaux comprend un convertisseur PWM qui convertit un signal PDM en un signal PWM pour lequel le niveau de signal du début et de la fin d'une période d'un cycle d'une fréquence porteuse est supérieur au niveau de signal au centre de la période. La présente invention peut s'appliquer à des dispositifs de traitement de signaux.
PCT/JP2020/016066 2019-04-24 2020-04-10 Dispositif, procédé et programme de traitement de signaux WO2020218027A1 (fr)

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JP2019-082840 2019-04-24

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003110376A (ja) * 2001-09-28 2003-04-11 Sony Corp 信号増幅装置
JP2007142996A (ja) * 2005-11-22 2007-06-07 Seiko Epson Corp オーディオミキシング装置
JP2016063299A (ja) * 2014-09-16 2016-04-25 ローム株式会社 オーディオアンプ、電子機器、オーディオ信号の再生方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003110376A (ja) * 2001-09-28 2003-04-11 Sony Corp 信号増幅装置
JP2007142996A (ja) * 2005-11-22 2007-06-07 Seiko Epson Corp オーディオミキシング装置
JP2016063299A (ja) * 2014-09-16 2016-04-25 ローム株式会社 オーディオアンプ、電子機器、オーディオ信号の再生方法

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