WO2020187815A1 - Optoelektronisches halbleiterbauelement mit isolierender schicht und verfahren zur herstellung des optoelektronischen halbleiterbauelements - Google Patents
Optoelektronisches halbleiterbauelement mit isolierender schicht und verfahren zur herstellung des optoelektronischen halbleiterbauelements Download PDFInfo
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- H10H20/80—Constructional details
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- H10H20/8314—Electrodes characterised by their shape extending at least partially onto an outer side surface of the bodies
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- H10H20/80—Constructional details
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- H10H20/80—Constructional details
- H10H20/81—Bodies
- H10H20/816—Bodies having carrier transport control structures, e.g. highly-doped semiconductor layers or current-blocking structures
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- H10H20/80—Constructional details
- H10H20/81—Bodies
- H10H20/819—Bodies characterised by their shape, e.g. curved or truncated substrates
- H10H20/82—Roughened surfaces, e.g. at the interface between epitaxial layers
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- H10H20/80—Constructional details
- H10H20/84—Coatings, e.g. passivation layers or antireflective coatings
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- H10H20/01—Manufacture or treatment
- H10H20/036—Manufacture or treatment of packages
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- H10H20/01—Manufacture or treatment
- H10H20/036—Manufacture or treatment of packages
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- H10H20/80—Constructional details
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- H10H20/855—Optical field-shaping means, e.g. lenses
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- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/858—Means for heat extraction or cooling
- H10H20/8582—Means for heat extraction or cooling characterised by their shape
Definitions
- a light emitting diode is a light emitting device based on semiconductor materials.
- an LED includes a pn junction. When electrons and holes recombine with one another in the area of the pn junction, for example because a corresponding voltage is applied, electromagnetic radiation is generated.
- a problem with the operation of LEDs is the generation of heat.
- concepts are being sought with which the heat generated can be removed in an improved manner.
- the present invention is based on the object of providing an improved optoelectronic semiconductor component and an improved method for producing an optoelectronic semiconductor component.
- An optoelectronic semiconductor component comprises a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, wherein the first and the second semiconductor layer are stacked on top of one another to form a semiconductor layer stack.
- the optoelectronic semiconductor component further comprises a first contact layer which is arranged in direct contact with the first semiconductor layer and is electrically conductive, a first insulating layer which is formed over the first and the second semiconductor layer, and a second current spreading structure which is connected to the second Semi-conductive layer is electrically connected.
- a maximum lateral extension of the second semiconductor layer is greater than the maximum lateral extension of the first semiconductor layer, so that a step structure is formed.
- the first isolating layer is formed as a conformal layer over the step structure of the first and second semiconductor layers.
- the optoelectronic semiconductor component also has a second insulating layer between a horizontal surface of the first contact layer and the second current expansion structure, a layer thickness of the second insulating layer being smaller than the smallest layer thickness of the first insulating layer above the step structure.
- the optoelectronic semiconductor component also has a first current spreading layer, which is arranged on a side of the first contact layer facing away from the first semiconductor layer and in direct contact with the first contact layer.
- the lateral extent of the Stromaufwei processing layer is smaller than the lateral extent of the contact layer.
- the current spreading layer can adjoin at least two side surfaces of the contact layer.
- the optoelectronic semiconductor component further comprises a passivation layer which adjoins exposed regions of the steps structure.
- the passivation layer can be removed from a horizontal surface of the current spreading layer.
- an optoelectronic semiconductor component comprises a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, the first and second semiconductor layers being stacked on top of one another to form a semiconductor layer stack.
- the optoelectronic semiconductor component also has a first contact layer, which is arranged in direct contact with the first semiconductor layer and is electrically conductive.
- the optoelectronic semiconductor component also comprises a passivation layer, a first insulating layer
- the optoelectronic semiconductor component also has a second insulating layer between a horizontal surface of the first contact layer and the second current spreading structure, where a layer thickness of the second insulating layer is smaller than the smallest layer thickness of the first insulating layer above the step structure.
- the optoelectronic semiconductor component also has a first current spreading layer which is arranged on a side of the first contact layer facing away from the first semiconductor layer and in direct contact with the first contact layer, the first current spreading layer adjoining a side surface of the contact layer.
- the lateral extent of the Stromaufwei processing layer is smaller than the lateral extent of the contact layer.
- the current spreading layer can adjoin at least two side surfaces of the contact layer.
- the passivation layer is removed from a horizontal surface of the current spreading layer.
- the layer thickness of the second insulating layer is less than half the smallest layer thickness of the first insulating layer above the step structure. According to further embodiments, the layer thickness of the second insulating layer is less than a third of the smallest layer thickness of the first insulating layer above the step structure.
- the second current spreading structure is arranged at least in sections on a side of the horizontal surface of the first contact layer facing away from the first semiconductor layer.
- a method for producing an optoelectronic semiconductor component comprises the formation of a layer stack which comprises a first semiconductor layer from a first conductive type and a second semiconductor layer of a second conductivity type, the formation of an electrically conductive first contact layer in direct contact with the first semiconductor layer, wherein a maximum lateral expansion of the second semiconductor layer is greater than the maximum lateral expansion of the first semiconductor layer, so that a Workpiece is formed with a step structure, and conformally forming a first insulating layer over the step structure of the first and second semiconductor layers.
- the method further comprises forming a second insulating layer over a horizontal surface of the first contact layer, wherein a layer thickness of the second insulating layer is less than the smallest layer thickness of the first insulating layer over the step structure, and forming a second current spreading structure over the second insulating layer, the second contact structure being electrically connected to the second semiconductor layer.
- the method may further include forming a first current expansion layer after forming the contact layer.
- the method can additionally include forming a sacrificial metal layer prior to forming the first insulating layer.
- the method may further include forming a passivation layer prior to forming the first insulating layer.
- the first insulating layer is formed over horizontal areas of the contact layer, and the method includes a subsequent removal of the first insulating layer from horizontal areas of the workpiece before the application of the second insulating layer.
- a method for producing an optoelectronic semiconductor component comprises the formation of a layer stack comprising a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, formation of an electrically conductive first contact layer in direct contact with the first semiconductor layer , wherein a maximum lateral extent of the second semiconductor layer is greater than the maximum lateral extent of the first semiconductor layer, so that a workpiece is formed with a step structure, and conformal formation of a passivation layer over a side surface of the first contact layer.
- the method further includes forming a first insulating layer over the resulting workpiece, removing portions of the first insulating layer from a horizontal surface of the workpiece, forming a second insulating layer over a horizontal surface of the first contact layer, a layer thickness of the second insulating layer is smaller than the smallest layer thickness of the first insulating layer over the step structure, and forming a second current spreading structure over the second insulating layer, wherein the first contact layer is electrically connected to the second semiconductor layer.
- the formation of the first insulating layer can comprise the formation of a first insulating layer so that a horizontal surface of the first insulating layer has a minimum distance from a first main surface of the second semiconductor layer that is greater than a maximum distance between a first main surface the passivation layer and the first main surface of the second semiconductor layer.
- an optoelectronic semiconductor device comprises the optoelectronic semiconductor component as described above.
- FIG. 1A shows a schematic cross-sectional view of an optoelectronic semiconductor component according to embodiments.
- FIG. 1B shows a schematic cross-sectional view of an optoelectronic semiconductor component according to further embodiments.
- FIGS. 2A to 2F illustrate schematic cross-sectional views of a workpiece when carrying out a method according to embodiments.
- FIGS. 3A to 3D illustrate schematic cross-sectional views of a workpiece when carrying out the method according to embodiments.
- FIGS. 4A to 4D illustrate schematic cross-sectional views of a workpiece when carrying out a method according to embodiments.
- FIG. 5 illustrates a schematic horizontal cross-sectional view of an optoelectronic semiconductor component in accordance with an embodiment.
- FIGS. 6A and 6B show flow charts to illustrate the method according to embodiments.
- FIG. 7 shows an optoelectronic device according to the embodiment.
- the semiconductor materials mentioned in the context of the present description can in particular be based on a direct semiconductor based on conductor material.
- semiconductor materials particularly suitable for generating electromagnetic radiation include, in particular, nitride semiconductor compounds, which can be used to generate ultraviolet, blue or long-wave light, such as GaN, InGaN, A1N, AlGaN, AlGalnN, AlGalnBN, phosphide semiconductor compounds, which can be generated, for example, green or longer-wave light, such as GaAsP, AlGalnP, GaP, AlGaP, and other semiconductor materials such as GaAs, AlGaAs, InGaAs, AlInGaAs, SiC, ZnSe, ZnO, Ga 2 0 3 , diamond, hexagonal BN and combinations of the mentioned materials.
- the stoichiometric ratio of the compound semiconductor materials can vary.
- semiconductor materials can include silicon, silicon-germanium and ger manium. In the context of the present description, the term “s
- lateral and horizontal are intended to describe an orientation or alignment which runs essentially parallel to a first surface of a substrate or semiconductor body. This can be the surface of a wafer or a chip (die), for example.
- the horizontal direction can for example be in a plane perpendicular to a growth direction when growing
- vertical is intended to describe an orientation which is essentially perpendicular to the first surface of a substrate or semiconductor body.
- the vertical direction can be for example a direction of growth when growing
- Electrically connected a low-resistance electrical connection between the connected elements.
- the electrically connected elements do not necessarily have to be directly connected to one another. Further elements can be arranged between electrically connected elements.
- electrically connected also includes tunnel contacts between the connected elements.
- FIG. 1A shows a vertical cross-sectional view of an opto-electronic semiconductor component according to embodiments.
- the optoelectronic semiconductor component 10 comprises a first semiconductor layer 110 of a first conductivity type, for example p-conductive, and a second semiconductor layer 120 of a second conductivity type, for example n-conductive.
- the first semiconductor layer 110 and the second semiconductor layer 120 are stacked on top of one another to form a semiconductor layer stack.
- An active zone 115 can be arranged between the first semiconductor layer 110 and the second semiconductor layer 120.
- the active zone can be suitable for receiving electromagnetic radiation 20 generate or record.
- the generated electromagnetic radiation 20 can be output via a first main surface 25 of the optoelectronic semiconductor component 10.
- incident electromagnetic radiation can penetrate into the semiconductor layer stack via the main surface 25 of the optoelectronic semiconductor component 10.
- the first main surface 25 of the optoelectronic semiconductor component 10 can be structured in order to increase the coupling-out efficiency.
- the active zone can have, for example, a pn junction, a double heterostructure, a single quantum well structure (SQW, single quantum well) or a multiple quantum well structure (MQW, multi quantum well) for generating radiation.
- Quantum well structure has no meaning here with regard to the dimensionality of the quantization. It thus includes, among other things, quantum wells, quantum wires and quantum dots and any combination of these layers.
- a first contact layer 130 is formed directly adjoining the first semiconductor layer 110.
- the first contact layer 130 can contain a highly reflective material such as silver.
- the first contact layer 130 can also comprise a plurality of partial layers, for example a transparent partial layer on the side of the first semiconductor layer 130 and a partial layer that contains a highly reflective material.
- the transparent partial layer can contain, for example, zinc oxide or indium tin oxide (ITO).
- a first current spreading layer 132 can furthermore be arranged on the first main surface 131 of the contact layer 130 facing away from the first semiconductor layer 110.
- a lateral extent d2 of the second semiconductor layer 120 is greater than a lateral extent dl of the first semiconductor layer 110.
- the lateral extent dl of the first semiconductor layer 110 is greater than the lateral extent d3 of the contact layer 130.
- the second semiconductor layer 120, the first semiconductor layer 110 and the first contact layer 130 form a step structure.
- a lateral extent d4 of the first current expansion layer 132 can furthermore be smaller than the lateral extent d3 of the first contact layer 130.
- the step structure in this case also includes the first current spreading layer 132.
- the first current spreading layer 132 can also form over the first contact layer 130.
- a part of the first current spreading layer 132 is arranged adjacent to side walls 129 of the first contact layer 130 and thus encapsulates them. This is illustrated in more detail with reference to FIGS. 3A to 3D.
- a material of the first current spreading layer 132 can be Au, Cu, Al,
- the first insulation layer 125 is now arranged on a side flank of the resulting layer structure and covers the step structure.
- the optoelectronic semiconductor component 10 furthermore comprises a second current expansion structure 135, which is connected to the second semiconductor layer 120 in an electrically conductive manner.
- the second current spreading structure 135 is arranged on a side of the first contact layer 130 or the first current spreading layer 132 facing away from the first semiconductor layer.
- a material of the second current spreading structure 135 can comprise aluminum, for example.
- a second insulating layer 127 is between a horizontal surface 131 of the first contact layer 130 and the second flow expansion structure 135 arranged.
- the second insulating layer 127 may adjoin the horizontal surface 133 of the first current spreading layer 132.
- a layer thickness of the second insulating layer 127 is smaller than the smallest layer thickness of the first insulating layer 125 above the step structure.
- a material of the second insulating layer 127 can be identical to the material of the first insulating layer 125.
- the material of the second insulating layer 127 can also be different from the material of the first insulating layer 125.
- the first insulating layer 125 can comprise a layer stack that comprises silicon oxide, silicon nitride or a combination of these materials.
- a passivation layer 123 can be formed over at least a portion of the step structure.
- the passivation layer 123 can contain an insulating material, for example aluminum oxide.
- the passivation layer 123 can have side surfaces
- the passivation layer can over exposed surface areas of the first contact layer
- the passivation layer 123 can further cover the horizontal surface 133 of the first current spreading layer 132.
- the passivation layer 123 can be formed, for example, as a conformal layer, for example by ALD (“Atomic Layer Deposition”) processes, so that the first contact layer 130 is encapsulated by the passivation layer and migration of silver ions is suppressed or prevented.
- the passivation layer 123 can be suitable, a chemical barrier against corrosive To represent gases.
- the passivation layer 123 represents a protective layer against environmental influences.
- the second insulating layer 127 is used for electrical insulation between conductive layers that are electrically connected to the first semiconductor layer 110 and the second current spreading structure 135.
- a layer thickness s2 of the second insulating layer 127 can be dimensioned such that that it avoids an electrical breakdown between the second current spreading structure 135 and electrically conductive layers which are connected to the first semiconductor layer 110.
- a layer thickness s2 of the second insulating layer 127 can be smaller than 300 nm, for example smaller than 200 nm or smaller than 150 nm.
- a layer thickness S2 of approximately 100 nm, effective protection against breakdown at a voltage of up to approximately 50 V can be prevented.
- the first insulating layer 125 which covers the step structure of the first and the second semiconductor layer, likewise prevents an electrical breakdown between the second current expansion structure 135 and the first semiconductor layer 110 and the conductive layers connected to the first semiconductor layer
- a layer thickness sl is used that is greater than one
- Layer thickness s2 of the second insulating layer 127 which is arranged above the horizontal main surface of the first contact layer 130 or first current spreading layer 132.
- the first insulating layer 125 is designed as a conformal layer. That is to say, a step structure is formed in the first insulating layer 125, which approximately corresponds to the step structure of the substrate material, ie the second semiconductor layer 120, the first semiconductor layer 110 and the first contact layer 130 and optionally the first current distribution.
- processing layer 132 corresponds.
- the thickness s2 of the second insulating layer 127 can be less than half the thickness sl or even less than a third of the thickness sl of the first insulating layer 125.
- the first insulating layer 125 and the second insulating layer 127 can each be produced by different processes. Accordingly, the first and the second insulating layer 125, 127 can be optimized depending on the application. Due to the reduced layer thickness of the second insulating layer 127, the thermal resistance between the first contact layer 130 and the second Stromaufwei processing structure 135 is greatly reduced. For example, a smallest layer thickness sl of the first insulating layer 125 can be approximately 600 nm. If the layer thickness s2 of the second insulating layer 127 is reduced compared to this value to values as described above, the thermal resistance of the insulating layer can be reduced by approximately 80%. For example, the thermal resistance of the first insulating layer 125, 126 can be 0.6 K / W. The thermal
- the resistance of the second insulating layer 127 can be 0.1 K / W.
- the second insulating layer 127 overlaps with the active zone 115 in which the electromagnetic radiation is generated. As a result, the heat in the area in which it is generated can be dissipated immediately. As a result, the optoelectronic semiconductor component is cooled, and the optical output power and thus the efficiency of the optoelectronic semiconductor component are increased. Furthermore, the reduced thermal resistance also allows a conversion layer over the first main surface 25 of the optoelectronic semiconductor component in an improved manner be cooled down. As a result, the temperature in the optoelectronic semiconductor device in the converter material and in packaging materials is reduced. As a result, the LED has a longer service life.
- the passivation layer 123 adjoins the side surface 129 and adjacent horizontal surfaces of adjacent layers, efficient encapsulation of the first contact layer 130 can be brought about.
- the layer thickness of the first insulating layer 125 and the second insulating layer 127 are set independently of one another, the layer thickness of the first insulating layer 125 can be selected to be comparatively large without increasing the thermal resistance of the second insulating layer 127. Accordingly, the robustness of the component against dielectric breakdown or against corrosive chemicals is not impaired.
- the layer thickness of the first current spreading layer 132 can also be increased further.
- the first current spreading layer can have a layer thickness of approximately 400 to 600 nm, for example 500 nm.
- the current spread in the first semiconductor layer 110 can be improved and made more uniform.
- the maximum current can be increased, whereby the emission from the opto-electronic semiconductor device can be increased.
- the optoelectronic semiconductor component 10 can furthermore comprise a carrier 100, for example a silicon carrier.
- the silicon carrier 100 can be connected to the second current expansion structure 135 by a suitable connecting material 105, for example solder.
- FIG. 1B shows a vertical cross-sectional view of an optoelectronic semiconductor component according to further embodiments.
- the first insulating layer 126 is not formed here as a conformal layer over the step structure. Rather, the first insulating layer 126 is designed as a planarizing layer over the step structure.
- the passivation layer 123 is arranged adjacent to the side surfaces 129 of the first contact layer 130 and over exposed horizontal surface areas of the adjoining first semiconductor layer 110 and over an exposed part of the first main surface 131 of the first contact layer 130. Furthermore, the passivation layer 123 can be arranged adjacent to side surfaces 134 of the first current expansion layer 132.
- a part of the passivation layer can also be adjacent to the first main surface 133 of the first current spreading layer 132 or adjacent to the first
- Main surface 131 of the first contact layer 130 can be arranged.
- FIGS. 2A to 2F illustrate vertical cross-sectional views of a workpiece during the production of the optoelectronic semiconductor component according to embodiments.
- a second semiconductor layer 120 is applied over a growth substrate (not shown in FIG. 2) by an epitaxial process, optionally followed by layers to form the active zone (not shown in the following figures) and the first semiconductor layer 110 the first contact layer 130 and optionally the first current spreading layer 132 are applied over the first semiconductor layer 110.
- a sacrificial metal layer 137 may be provided over the first current spreading layer 132 be formed.
- the first power spreading layer 132 may include gold.
- the sacrificial metal layer 137 may, for example, contain a harder metal than gold, for example chromium or nickel.
- a layer thickness of the sacrificial metal layer 137 can be a maximum of 200 nm, for example less than 150 nm, for example.
- the applied layers are structured with the formation of a step structure as shown in FIG. 2A.
- a part of a surface of the second semiconductor layer 120 is not covered with the first semiconductor layer 110, for example.
- a part of a surface of the first semiconductor layer 110 cannot be covered with the first contact layer 130.
- Part of the first contact layer 130 cannot be covered with the first current spreading layer 132.
- a passivation layer for example made of Al O, is applied conformally over the first semiconductor layer 110, the exposed areas of the first contact layer 130, possibly the first current expansion layer 132 and over the sacrificial metal layer 137.
- a conformal layer is formed.
- a layer thickness of the passivation layer 123 can be more than 20 nm, for example approximately 30 to 50 nm, for example 40 nm.
- a layer thickness of the passivation layer 123 can be less than 100 nm, for example.
- the first insulating layer 125 is then applied over the entire area.
- a layer thickness of the first insulating layer 125 can be more than 400 nm, for example approximately 600 nm.
- Layer 125 can have multiple layers, for example.
- the layers can contain silicon oxide and silicon nitride.
- the first insulating layer 125 may be formed conformally over the step structure. Part of the first insulating layer 125 directly adjoins the first and second semiconductor layers 110, 120.
- Figure 2A shows an example of a resulting cross
- a surface of the sacrificial metal layer 137 is then exposed. For example, this can be done by a polishing process, for example a CMP process (“chemical-mechanical polishing”). An end of this polishing step can be recognized, for example, by a reduced resistance. The end of this polishing step can also be recognized by the fact that the surface of the sacrificial metal layer 137 has been reached.
- a polishing process for example a CMP process (“chemical-mechanical polishing”).
- An end of this polishing step can be recognized, for example, by a reduced resistance.
- the end of this polishing step can also be recognized by the fact that the surface of the sacrificial metal layer 137 has been reached.
- Figure 2B shows a cross-sectional view of a resulting workpiece.
- a horizon tal surface is now exposed over the first contact layer or not covered with insulating material.
- the remaining sacrificial metal layer 137 can then be removed from the surface of the first current spreading layer 132, for example by means of a selective etching process. According to further embodiments, however, it can also remain.
- Figure 2C shows an example of a resulting workpiece.
- the second insulating layer 127 is then applied.
- the second insulating layer 127 has a layer thickness s2 which is smaller than the smallest vertical layer thickness sl of the first insulating layer 125 horizontal surface would be in front.
- the step structure can have larger horizontal areas, over which the first insulating layer 125 is always the smallest
- Layer thickness sl is deposited.
- Figure 2D shows cross-sectional view of a resulting example.
- the first insulating layer can then be further structured using, for example, photolithographic methods. For example, part of the first insulating layer 125 can be removed over horizontal regions of the second semiconductor layer 120.
- Figure 2E shows a cross-sectional view of a resulting workpiece.
- the electrically conductive material of the second current spreading structure 135 can then be formed over the resulting surface.
- Figure 2F shows an example of a cross-sectional view of a resulting workpiece.
- the second current expansion structure 135 is electrically connected to the second semiconductor layer 120.
- FIGS. 3A to 3D illustrate a method in which the first insulating layer 126 is not deposited as a conformal layer, but rather by a leveling method or with a greater layer thickness than the layer stack to be overmolded. If the first insulating layer 126 has a layer thickness that is greater than the height of the stack to be overmolded, the intermediate space generated between two stacks to be overmolded is completely filled by the first insulating layer 126.
- FIG. 3A shows a workpiece with a layer stack which is designed in a manner similar to that in FIG. 2A.
- a conformal passivation layer 123 is provided both over the horizontal surface 133 of the first current spreading layer 132 and over the side flanks and exposed surface areas of the study Formed fen structure of the layer stack.
- the first insulating layer 126 is thicker than the height of the layer to be overmolded
- a sacrificial metal layer (not shown in FIG. 3A) can additionally be formed over the first main surface 133 of the first upstream widening layer 132.
- a polishing process for example a CMP process, is carried out, as a result of which a smooth, topography-free horizontal surface of the workpiece is obtained, for example.
- an end point of this polishing process can be recognized by the fact that the frictional force is minimal.
- FIG. 3B shows a cross-sectional view of an example of a resulting workpiece with photoresist mask 139.
- the further processing can also take place without a photo resist mask 139.
- An etching process is then carried out in order to expose a first main surface 133 of the first current spreading layer 132 or, if appropriate, of the sacrificial metal layer 137.
- this can include an isotropic etching process, for example also a plasma etching process.
- this process can stop on the sacrificial metal layer 137.
- Figure 30 shows an example of a resulting workpiece.
- a thin second insulating layer 127 is formed over the resulting surface.
- a layer thickness s2 of the second iso- insulating layer 127 can be selected, for example, in order to ensure sufficient insulation between the first
- a layer thickness s2 of the second insulating layer 127 can be smaller than the layer thickness sl of the first insulating layer
- the layer thickness sl of the first insulating layer 126 can correspond to the smallest vertical dimension of the first insulating layer 126 above the step structure.
- the layer thickness s2 of the second insulating layer can be less than half or a third of the layer thickness s1 of the first insulating layer 126.
- the layer thickness s2 of the second insulating layer can be less than 200 nm, for example less than 150 nm, for example approximately 100 nm.
- Figure 3D shows a cross-sectional view of a resulting workpiece. Further machining of the workpiece can take place as described with reference to FIGS. 2E to 2F.
- the polishing method can also be carried out until a surface of the first current spreading layer 132 or the sacrificial metal layer 137 is uncovered. Then, as described with reference to FIGS. 3C and 3D, the second insulating layer 127 can be formed.
- the first insulating layer 125 is again deposited as a conformal layer and then structured by a masked etch.
- FIG. 4A shows a workpiece which is designed similarly to that shown in FIG. 2A.
- a sacrificial metal layer 137 may be formed over the first major surface 133 of the first current spreading layer 132.
- the sacrificial metal layer 137 can also be omitted.
- a photomask 139 is formed, which leaves the horizontal surface 133 of the first current spreading layer 132 largely uncovered.
- Figure 4B shows an example of a resulting workpiece.
- An etching process is then carried out, as a result of which a horizontal surface 133 of the first current spreading layer 132 is exposed. If the sacrificial metal layer 137 is present, a surface of the sacrificial metal layer 137 is also exposed in this step.
- Figure 40 shows an example of a resulting workpiece. After removing the photoresist material 139, a thin second insulating layer 127 is deposited over the resulting structure.
- Figure 4D shows an example of a resulting workpiece. Methods similar to those described with reference to FIGS. 2E and 2F can then be carried out.
- the second insulating layer 127 can be deposited by a different method than the first insulating layer 125, 126. For example, to form the second insulating
- FIG. 5 illustrates a horizontal cross-sectional view of the optoelectronic semiconductor component.
- FIG. 5 illustrates in particular the area proportions of the second insulating layer 127 in comparison to the area proportions of the first insulating layer 125, 126.
- Layer 127 takes up a significantly larger area than the first insulating layer 125, 126.
- the thermal resistance can be significantly improved.
- the presence of the second insulating layer 127 with a reduced layer thickness can reduce the thermal resistance in an area of approximately 90% of the chip surface.
- the thermal resistance can be reduced by about 70 to 80%. Accordingly, the efficiency and service life of the semiconductor component can be greatly increased.
- heat can be dissipated via the second contact structures 135.
- FIG. 6A summarizes a method according to embodiments.
- a method for producing an optoelectronic semiconductor component comprises the formation of a layer stack (S100) which comprises a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type and the formation (S110) of an electrically conductive first contact layer in direct contact with of the first semiconductor layer, a lateral extension of the second semiconductor layer being greater than the lateral extension of the first semiconductor layer, so that a workpiece with a step structure is formed.
- the method further comprises a conformal formation (S120) of a first insulating layer over the step structure of the first and the second semiconductor layer, the formation (S130) of a second insulating layer over a horizontal surface.
- a layer thickness of the second insulating layer is smaller than the smallest layer thickness of the first insulating layer over the step structure, and the formation (S140) of a second current expansion structure over the second insulating layer, wherein the second contact structure with the second Semiconductor layer is electrically connected.
- FIG. 6B summarizes a method in accordance with further embodiments.
- a method for producing an optoelectronic semiconductor component comprises the formation (S100) of a layer stack which comprises a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type and the formation (S110) of an electrically conductive first contact layer in direct contact with the first semiconductor layer, wherein a lateral extent of the second semiconductor layer is greater than the lateral extent of the first semiconductor layer, so that a workpiece is formed with a step structure.
- the method further comprises conformally forming (S115) a passivation layer over a side surface of the first contact layer, forming (S125) a first insulating layer over the resulting workpiece.
- the method further comprises removing (S127) parts of the first insulating layer from a horizontal surface of the workpiece, forming (S130) a second insulating layer over a horizontal surface of the first contact layer, wherein a layer thickness of the second insulating layer is less than is the smallest layer thickness of the first insulating layer over the step structure, and the formation (S140) of a second current spreading structure over the second insulating layer, wherein the first contact layer is electrically connected to the second semiconductor layer.
- FIG. 7 shows an optoelectronic semiconductor device 30 according to embodiments.
- the optoelectronic semiconductor device 30 comprises the optoelectronic semiconductor component 10, 15 described above.
- the optoelectronic semiconductor device 30 can be, for example, a motor vehicle headlight or a very powerful lighting device, for example a headlight for stage shows. Because of the improved heat dissipation, the power density of the optoelectronic semiconductor device can be increased. For example, the optoelectronic semiconductor device in a
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Abstract
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Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2021556680A JP7254960B2 (ja) | 2019-03-19 | 2020-03-16 | 絶縁層を備えるオプトエレクトロニクス半導体構成素子、およびオプトエレクトロニクス半導体構成素子を製造するための方法 |
| US17/440,190 US12382754B2 (en) | 2019-03-19 | 2020-03-16 | Optoelectronic semiconductor device comprising an insulating layer and method of manufacturing the optoelectronic semiconductor device |
| DE112020001324.3T DE112020001324B4 (de) | 2019-03-19 | 2020-03-16 | Optoelektronisches halbleiterbauelement mit isolierender schicht und verfahren zur herstellung des optoelektronischen halbleiterbauelements |
| CN202080021800.5A CN113614934B (zh) | 2019-03-19 | 2020-03-16 | 具有绝缘层的光电半导体组件和用于制造光电半导体组件的方法 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE102019106938.6 | 2019-03-19 | ||
| DE102019106938.6A DE102019106938A1 (de) | 2019-03-19 | 2019-03-19 | Optoelektronisches Halbleiterbauelement mit isolierender Schicht und Verfahren zur Herstellung des optoelektronischen Halbleiterbauelements |
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| Publication Number | Publication Date |
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| WO2020187815A1 true WO2020187815A1 (de) | 2020-09-24 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/EP2020/057033 Ceased WO2020187815A1 (de) | 2019-03-19 | 2020-03-16 | Optoelektronisches halbleiterbauelement mit isolierender schicht und verfahren zur herstellung des optoelektronischen halbleiterbauelements |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US12382754B2 (de) |
| JP (1) | JP7254960B2 (de) |
| CN (1) | CN113614934B (de) |
| DE (2) | DE102019106938A1 (de) |
| WO (1) | WO2020187815A1 (de) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102015100578A1 (de) * | 2015-01-15 | 2016-07-21 | Osram Opto Semiconductors Gmbh | Bauelement und Verfahren zur Herstellung eines Bauelements |
| WO2017060355A1 (de) * | 2015-10-08 | 2017-04-13 | Osram Opto Semiconductors Gmbh | Bauelement und verfahren zur herstellung eines bauelements |
| DE102016111113A1 (de) * | 2016-06-17 | 2017-12-21 | Osram Opto Semiconductors Gmbh | Optoelektronisches Halbleiterbauelement |
| DE102016124380A1 (de) * | 2016-12-14 | 2018-06-14 | Osram Opto Semiconductors Gmbh | Halbleiterbauelement und Verfahren zur Herstellung eines Halbleiterbauelements |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8368100B2 (en) | 2007-11-14 | 2013-02-05 | Cree, Inc. | Semiconductor light emitting diodes having reflective structures and methods of fabricating same |
| KR20120015651A (ko) | 2010-08-12 | 2012-02-22 | 서울옵토디바이스주식회사 | 개선된 광 추출 효율을 갖는 발광 다이오드 |
| KR101114191B1 (ko) * | 2010-09-17 | 2012-03-13 | 엘지이노텍 주식회사 | 발광소자 |
| DE102012217533B4 (de) | 2012-09-27 | 2026-06-11 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Verfahren zur Herstellung eines optoelektronischen Bauelements |
| KR101958419B1 (ko) | 2013-01-29 | 2019-03-14 | 삼성전자 주식회사 | 반도체 발광 소자 |
| JP6221926B2 (ja) * | 2013-05-17 | 2017-11-01 | 日亜化学工業株式会社 | 半導体発光素子およびその製造方法 |
| KR102468071B1 (ko) | 2017-01-09 | 2022-11-17 | 글로 에이비 | 다이렉트 뷰 디스플레이를 위한 집적 반사기를 갖는 발광 다이오드 및 이의 제조 방법 |
| FR3069379B1 (fr) | 2017-07-21 | 2019-08-23 | Aledia | Dispositif optoelectronique |
-
2019
- 2019-03-19 DE DE102019106938.6A patent/DE102019106938A1/de not_active Withdrawn
-
2020
- 2020-03-16 JP JP2021556680A patent/JP7254960B2/ja active Active
- 2020-03-16 US US17/440,190 patent/US12382754B2/en active Active
- 2020-03-16 DE DE112020001324.3T patent/DE112020001324B4/de active Active
- 2020-03-16 CN CN202080021800.5A patent/CN113614934B/zh active Active
- 2020-03-16 WO PCT/EP2020/057033 patent/WO2020187815A1/de not_active Ceased
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102015100578A1 (de) * | 2015-01-15 | 2016-07-21 | Osram Opto Semiconductors Gmbh | Bauelement und Verfahren zur Herstellung eines Bauelements |
| WO2017060355A1 (de) * | 2015-10-08 | 2017-04-13 | Osram Opto Semiconductors Gmbh | Bauelement und verfahren zur herstellung eines bauelements |
| DE102016111113A1 (de) * | 2016-06-17 | 2017-12-21 | Osram Opto Semiconductors Gmbh | Optoelektronisches Halbleiterbauelement |
| DE102016124380A1 (de) * | 2016-12-14 | 2018-06-14 | Osram Opto Semiconductors Gmbh | Halbleiterbauelement und Verfahren zur Herstellung eines Halbleiterbauelements |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113614934A (zh) | 2021-11-05 |
| CN113614934B (zh) | 2025-04-25 |
| JP7254960B2 (ja) | 2023-04-10 |
| US12382754B2 (en) | 2025-08-05 |
| JP2022525959A (ja) | 2022-05-20 |
| US20220158034A1 (en) | 2022-05-19 |
| DE112020001324A5 (de) | 2021-12-02 |
| DE102019106938A1 (de) | 2020-09-24 |
| DE112020001324B4 (de) | 2026-07-02 |
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