WO2020181422A1 - 面板组件及电子装置 - Google Patents

面板组件及电子装置 Download PDF

Info

Publication number
WO2020181422A1
WO2020181422A1 PCT/CN2019/077517 CN2019077517W WO2020181422A1 WO 2020181422 A1 WO2020181422 A1 WO 2020181422A1 CN 2019077517 W CN2019077517 W CN 2019077517W WO 2020181422 A1 WO2020181422 A1 WO 2020181422A1
Authority
WO
WIPO (PCT)
Prior art keywords
reference signal
signal
terminal
circuit
display panel
Prior art date
Application number
PCT/CN2019/077517
Other languages
English (en)
French (fr)
Inventor
郭星灵
Original Assignee
深圳市柔宇科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市柔宇科技有限公司 filed Critical 深圳市柔宇科技有限公司
Priority to CN201980073113.5A priority Critical patent/CN113316887A/zh
Priority to PCT/CN2019/077517 priority patent/WO2020181422A1/zh
Publication of WO2020181422A1 publication Critical patent/WO2020181422A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators

Definitions

  • This application relates to the field of display panels, and in particular to a panel assembly and an electronic device.
  • An electronic device usually includes a display panel, and the display panel is used to display videos, pictures, or text. Then, when the traditional display panel displays video, pictures or text, the power supply voltage is unstable due to the coupling effect between the wiring and the device, and the display picture is often poor.
  • the embodiment of the application discloses a panel assembly.
  • the panel assembly includes a display panel, a reference signal generation circuit, and a compensation circuit.
  • the display panel includes an array of light-emitting units.
  • the reference signal generation circuit is used to generate a first reference signal and a second reference signal. A reference signal and the second reference signal cooperate to drive the light-emitting unit to emit light
  • the compensation circuit includes a first compensation circuit, and the first compensation circuit is used according to the first reference signal in the display panel A first compensation signal is generated, and the first compensation signal is used to output to the display panel to compensate the first reference signal.
  • the application also discloses an electronic device including the panel assembly.
  • the panel assembly of the present application uses the first compensation signal to compensate the first reference signal in the display panel, when the compensated first reference signal drives the light-emitting unit to emit light, the stability of the light-emitting performance of the light-emitting unit is ensured. Furthermore, the panel assembly of the present application has a relatively stable display effect.
  • FIG. 1 is a schematic diagram of a circuit structure of a panel assembly provided by an embodiment of the application.
  • FIG. 2 is a schematic diagram of a first compensation circuit in the panel assembly provided in FIG. 1.
  • FIG. 3 is a schematic diagram of the first inverter circuit in FIG. 2.
  • FIG. 4 is a schematic diagram of a circuit structure of a panel assembly provided by another embodiment of the application.
  • FIG. 5 is a schematic diagram of a second compensation circuit in the panel assembly provided in FIG. 4.
  • FIG. 6 is a schematic diagram of the second inverter circuit in FIG. 5.
  • FIG. 7 is a schematic diagram of a circuit structure of a panel assembly provided by another embodiment of this application.
  • FIG. 8 is a schematic diagram of waveforms of various signals in the display panel of this application.
  • FIG. 9 is a schematic structural diagram of the panel assembly provided by this application in a state.
  • FIG. 10 is a schematic structural diagram of the panel assembly provided by this application in another state.
  • FIG. 11 is a schematic diagram of a display panel in a panel assembly in an embodiment of the application.
  • FIG. 12 is a schematic diagram of a circuit structure of a driving circuit for driving a light-emitting unit in a display panel in an embodiment of the application.
  • FIG. 13 is a schematic diagram of a circuit structure of a driving circuit for driving a light-emitting unit in a display panel in another embodiment of the application.
  • FIG. 14 is a schematic diagram of an electronic device provided by an embodiment of the application.
  • FIG. 1 is a schematic diagram of a circuit structure of a panel assembly provided by an embodiment of the application.
  • the panel assembly provided in the present application will be described in detail below with reference to the drawings.
  • the panel assembly 10 includes a display panel 100, a reference signal generating circuit 200, and a compensation circuit 300.
  • the display panel 100 includes light emitting units 110 distributed in an array.
  • the reference signal generating circuit 200 is used to generate a first reference signal and a second reference signal, and the first reference signal and the second reference signal cooperate to drive the light emitting unit 110 to emit light.
  • the compensation circuit 300 includes a first compensation circuit 310 for generating a first compensation signal according to the first reference signal in the display panel 100, and the first compensation signal is used for outputting To the display panel 100 to compensate the first reference signal.
  • the display panel 100 may be an organic light emitting diode display panel 100.
  • the light emitting unit 110 is an organic light emitting diode.
  • the first reference signal and the second reference signal drive the light emitting unit 110 to emit light
  • the first reference signal is applied to the anode of the light emitting unit 110
  • the second reference signal is applied to the The negative electrode of the light-emitting unit 110, wherein the first reference signal is a positive voltage
  • the second reference signal is a negative voltage
  • the first reference signal and the second reference signal drive the light emitting unit 110 to emit light
  • the first reference signal is applied to the negative electrode of the light emitting unit 110
  • the second reference signal is applied to The positive electrode of the light-emitting unit 110, wherein the first reference signal is a negative voltage
  • the second reference signal is a positive voltage.
  • the first reference signal and the second reference signal drive the light emitting unit 110 to emit light
  • the first reference signal and the second reference signal are transmitted to the inside of the display panel 100, and the first reference signal
  • the reference signal and the second reference signal will be affected by other signals (such as scanning signals) inside the panel and become unstable.
  • the stability of the first reference signal and the second reference signal will affect the light emission The light-emitting effect of the unit 110.
  • the first compensation signal is used to compensate the first reference signal to ensure the stability of the light-emitting performance of the light-emitting unit 110.
  • FIG. 2 is a schematic diagram of the first compensation circuit in the panel assembly provided in FIG. 1.
  • the first compensation circuit 310 includes a first sampling circuit 311 and a first inverter circuit 312.
  • the first sampling circuit 311 is used to receive the first reference signal in the display panel 100, and sample the AC component in the first reference signal received from the display panel 100 to obtain the first interference signal.
  • An inverting circuit 312 is used to invert the first interference signal to obtain the first compensation signal.
  • the first reference signal is a DC voltage signal.
  • the first sampling circuit 311 samples the AC component in the first reference signal to obtain the first interference signal
  • the first inverting circuit 312 inverts the first interference signal to obtain the first compensation signal, that is, The amplitudes of the first compensation signal and the first interference signal are equal and opposite.
  • the panel assembly of the present application has a relatively stable display effect.
  • the first AC component is sampled, which can reduce the workload of the first sampling circuit 311 compared to sampling the first reference signal. Moreover, only sampling the first AC component will not affect the amplitude of the first reference signal, thereby avoiding an impact on the stability of the light-emitting performance of the light-emitting unit 110.
  • FIG. 3 is a schematic diagram of the first inverter circuit in FIG. 2.
  • the first inverter circuit 312 includes a first amplifier A1, a first resistor R1, and a second resistor R2.
  • the first amplifier A1 includes a non-inverting input terminal (indicated by "+” in the figure), an inverting input terminal (indicated by "-” in the figure), and an output terminal.
  • the non-inverting input terminal of the first amplifier A1 is grounded, the inverting input terminal of the first amplifier A1 receives the first interference signal through the first resistor R1, and one end of the second resistor R2 is electrically connected to the first The inverting input terminal of an amplifier A1, the other end of the second resistor R2 is electrically connected to the output terminal of the first amplifier A1, and the output terminal of the first amplifier A1 is used to output the first compensation signal.
  • the resistance value of the first resistor R1 is equal to the resistance value of the second resistor R2.
  • the first compensation signal and the first interference signal have the same amplitude and opposite phase.
  • the first resistor R1 and the second resistor R2 are programmable variable resistors.
  • the amplitude of the first compensation signal can be adjusted, which is beneficial to the compensation of the first reference signal.
  • the display panel 100 has a display time period for displaying each frame of pictures and an idle time period when two adjacent frames of pictures are displayed.
  • the panel assembly 10 further includes a control circuit 600 for controlling the first sampling circuit 311 to work in the display time period, and controlling the first sampling circuit 311 not to work during the idle time period. jobs.
  • the control circuit 600 controls the first sampling circuit 311 to work in the display period but not in the idle period, thereby reducing the energy consumption of the first sampling circuit 311.
  • the display panel 100 has a display time period for displaying each frame of picture, and the sampling frequency of the first sampling circuit 311 is greater than or equal to the frequency of the scanning signal of the display panel 100 during the display period of displaying one frame of picture Twice.
  • the presence of the scan signal in the display panel 100 will cause interference to the first reference signal.
  • the scan frequency of the first scan signal determines the frequency of the first interference signal generated in the first reference signal.
  • the sampling frequency of the first sampling circuit 311 is greater than or equal to twice the frequency of the scanning signal, thereby ensuring that the waveform of the first interference signal obtained when the first reference signal is sampled is not distorted, and ensuring that the first interference signal is not distorted.
  • the accuracy of the first compensation signal compensated by the reference signal further ensures the stability of the light-emitting performance of the light-emitting unit 110.
  • FIG. 4 is a schematic diagram of a circuit structure of a panel assembly provided by another embodiment of the application.
  • the panel assembly 10 provided in this embodiment is basically the same as the panel assembly 10 described in the previous embodiments.
  • the compensation circuit 300 in the panel assembly 10 provided in this embodiment also includes a second compensation circuit 320.
  • the panel assembly 10 provided in the present application includes a display panel 100, a reference signal generating circuit 200, and a compensation circuit 300.
  • the display panel 100 includes light emitting units 110 distributed in an array.
  • the reference signal generating circuit 200 is used to generate a first reference signal and a second reference signal, and the first reference signal and the second reference signal cooperate to drive the light emitting unit 110 to emit light.
  • the compensation circuit 300 includes a first compensation circuit 310 for generating a first compensation signal according to the first reference signal in the display panel 100, and the first compensation signal is used for outputting To the display panel 100 to compensate the first reference signal.
  • the compensation circuit 300 further includes a second compensation circuit 320 for receiving a second reference signal in the display panel 100, and generating a second reference signal according to the second reference signal in the display panel 100 Two compensation signals, the second compensation signal is used to output to the display panel 100 to compensate the second reference signal.
  • FIG. 5 is a schematic diagram of the second compensation circuit in the panel assembly provided in FIG. 4.
  • the second compensation circuit 320 includes a second sampling circuit 321 and a second inverter circuit 322.
  • the second sampling circuit 321 is used to receive the second reference signal in the display panel 100, and sample the AC component in the second reference signal received from the display panel 100 to obtain the second interference signal.
  • the second inverting circuit 322 is used for inverting the second interference signal to obtain the second compensation signal.
  • FIG. 6 is a schematic diagram of the second inverter circuit in FIG. 5.
  • the second inverter circuit 322 includes a second amplifier A2, a third resistor R3, and a fourth resistor R4.
  • the second amplifier A2 includes a non-inverting input terminal (indicated by "+” in the figure), an inverting input terminal (indicated by "-” in the figure), and an output terminal.
  • the non-inverting input terminal of the second amplifier A2 is grounded, the inverting input terminal of the second amplifier A2 receives the second interference signal through the third resistor R3, and one end of the fourth resistor R4 is electrically connected to the The inverting input end of the second amplifier A2, the other end of the fourth resistor R4 is electrically connected to the output end of the second amplifier A2, and the output end of the second amplifier A2 is used to output the second compensation signal .
  • the third resistor R3 is equal to the fourth resistor R4.
  • the second compensation signal and the second interference signal have the same amplitude and opposite phase.
  • the third resistor R3 and the fourth resistor R4 are both programmable variable resistors.
  • the third resistor R3 and the second party group R4 are programmable logic resistors, the amplitude of the second compensation signal can be adjusted, which is beneficial to the compensation of the second reference signal.
  • FIG. 7 is a schematic diagram of a circuit structure of a panel assembly provided by another embodiment of this application.
  • the panel assembly 10 provided in this embodiment is basically the same as the panel assembly 10 provided in other ways. The difference is that in this embodiment, the panel assembly 10 further includes a detection circuit 400, a judgment circuit 500, and a control circuit 600. .
  • the panel assembly 10 provided in this embodiment is illustrated by adding a detection circuit 400, a determination circuit 500, and a control circuit 600 in FIG. 1 as an example. Understandably, the panel assembly 10 also includes a detection circuit 400, a determination circuit 500, and The control circuit 600 can be incorporated into the panel assembly 10 provided in any of the foregoing embodiments.
  • the detection circuit 400 is used to detect the current flowing through the light-emitting unit 110 to obtain a detection current, and the judgment circuit 500 compares the detection current with a preset current to determine whether the detection current fluctuates.
  • the preset current represents the rated operating current of the light-emitting unit 110.
  • the detection current is equal to the preset current, the detection current does not fluctuate and the light-emitting unit 110 works normally; when the absolute value of the difference between the detection current and the preset current is less than or equal to the preset
  • it is a numerical value it indicates that although the detection current fluctuates, the fluctuation of the detection current is very small. At this time, it can be considered that the light-emitting unit 110 can still work normally.
  • the control circuit 600 controls the compensation circuit 300 not to work.
  • the selection of the preset threshold is related to the changes that the human eye can feel.
  • the ratio of the absolute value of the preset threshold to the detection current may be, but is not limited to, 1%.
  • the control circuit 600 controls the compensation circuit 300 not to work, which can save the energy loss caused by the work of the compensation circuit 300.
  • the control circuit 600 controls the compensation circuit 300 to work. Please refer to the foregoing description for the compensation circuit 300, and will not be repeated here.
  • FIG. 8 is a schematic diagram of waveforms of various signals in the display panel of this application. It can be seen from the figure that the first reference signal is affected by the scan signal in the display panel 100 to generate an AC noise signal, and the second reference signal is affected by the scan signal of the display panel 100 to generate an AC noise signal. At this time, when the first reference signal and the second reference signal drive the light emitting unit 110 to emit light, the light emitting effect of the light emitting unit 110 is unstable.
  • the signal after the compensation of the first reference signal by the first compensation signal is referred to as the first reference signal after compensation
  • the signal after the compensation of the second reference signal by the second compensation signal is referred to as the second reference signal after compensation.
  • the compensated first reference signal tends to be gentle, and the compensated second reference signal tends to be gentle.
  • the compensated first reference signal and the compensated second reference signal drive the light-emitting unit 110 to emit light
  • the light-emitting effect of the light-emitting unit 110 is stable, thereby improving the display effect of the display panel 100.
  • the first reference signal is at a high level and the second reference signal is at a low level; it is understandable that the first reference signal may also be at a low level, and accordingly, The second reference signal is at a high level.
  • FIG. 9 is a schematic structural diagram of the panel assembly provided by this application in one state
  • FIG. 10 is a structural schematic diagram of the panel assembly provided by this application in another state.
  • the panel assembly 10 shown in FIG. 9 is a schematic diagram of the structure of the display panel 100, the flexible connector 800, and the adapter plate 900 when they are all unfolded.
  • the panel assembly 10 shown in FIG. 10 is a schematic diagram of the state when the display panel 100, the flexible connector 800, and the adapter plate 900 are folded. In combination with the panel assembly 10 introduced in the previous embodiments, the panel assembly 10 introduced in this embodiment will be introduced.
  • the panel assembly 10 also includes a driver IC (Driver IC), and the driver IC 710 includes a scan signal generating circuit 710a.
  • the scanning signal generating circuit 710a is used to generate a scanning signal for driving the display panel 100 to work, and the compensation circuit 300 is integrated in the driving chip 710.
  • the compensation circuit 300 of the present application is integrated in the driving chip 710, and the architecture of the traditional panel assembly 10 can be used.
  • the display panel 100 has a display surface 100 a
  • the panel assembly 10 further includes a flexible connector 800.
  • One end of the flexible connector 800 is connected to the display panel 100, the other end of the flexible connector 800 is bent to the side of the display panel 100 away from the display surface 100a, and the driving chip 710 is arranged On the flexible connecting member 800 and located on the side away from the display surface 100a.
  • the flexible connecting member 800 may be, but is not limited to, a flexible film.
  • one end of the flexible connector 800 is bent to the side of the display panel 100 away from the display surface, and the driving chip 710 is disposed on the flexible connector 800 and located away from the display surface.
  • the panel assembly 10 further includes an adapter plate 900.
  • the adapter board 900 is connected to the display panel 100 through the flexible connector 800, the reference signal generating circuit 200 is disposed on the adapter board 900, and the reference signal generating circuit 200 is connected through a first transmission wire 910 transmits the first reference signal to the display panel 100, and transmits the second reference signal to the display panel 100 through a second transmission wire 920, and the input terminal of the first compensation circuit 310 is connected to the The first transmission wire 910 in the display panel 100 receives the first reference signal, and the output terminal of the first compensation circuit 310 is connected to the first transmission wire 910 outside the display panel 100 to connect the first The compensation signal is output to the display panel 100.
  • the adapter board 900 may be a flexible circuit board or a printed circuit board.
  • the panel assembly 10 further includes a power chip 720 (Power IC).
  • the reference signal generating circuit 200 is integrated in the power chip 720.
  • the first reference signal and the second reference signal cooperate to drive the light-emitting unit 110 to emit light: the first reference signal is loaded on the The anode of the light-emitting unit 110, the second reference signal is loaded on the cathode of the light-emitting unit 110; or, the first reference signal is loaded on the cathode of the light-emitting unit 110, and the second reference signal is loaded At the negative electrode of the light-emitting unit 110.
  • FIG. 11 is a schematic diagram of a display panel in the panel assembly in an embodiment of the application
  • FIG. 12 is a display panel in an embodiment of the application.
  • the display panel 100 includes a plurality of scan lines 120 arranged at intervals, and a plurality of data lines 130 arranged at intervals, and the data lines 130 and the scan lines 120 are arranged crosswise and insulated.
  • the scan line 120 is used to transmit scan signals
  • the data line 130 is used to transmit data signals.
  • Two adjacent data lines 130 and two adjacent scan lines 120 define a sub-pixel area.
  • the sub-pixel area is further provided with a first thin film transistor Q1 and a second thin film transistor Q2.
  • the first thin film transistor Q1 is turned on under the control of the scan signal
  • the second thin film transistor Q2 is turned on under the control of the data signal
  • the first reference signal and the first compensation signal The signal is loaded to the anode of the light-emitting unit 110, and the cathode of the light-emitting unit 110 is used to receive the second reference signal.
  • the first reference signal is applied to the anode of the light-emitting unit 110
  • the second reference signal is applied to the cathode of the light-emitting unit 110 as an example for illustration. At this time, the first reference signal is high.
  • the second reference signal is at a low level; understandably, in other embodiments, the first reference signal may also be applied to the negative electrode of the light-emitting unit 110, and the second reference signal is applied to The anode of the light-emitting unit 110, at this time, the first reference signal is at a low level, and the second reference signal is at a high level.
  • the sub-pixel area is further provided with a first capacitor C1, the first thin film transistor Q1 includes a first gate g1, a first terminal p1, and a second terminal p2, and the second thin film transistor Q2 includes a first The second gate g2, the third terminal p3, and the fourth terminal p4.
  • the first gate g1 is electrically connected to the scan line 120 to receive the scan signal
  • the first terminal p1 is electrically connected to the data line 130 to receive data signals
  • the second terminal p2 is electrically connected to the The second gate g2
  • the third terminal p3 is used to receive the first compensation signal and the first reference signal
  • the fourth terminal p4 is electrically connected to the anode of the light-emitting unit 110
  • the first capacitor One end of C1 is electrically connected to the second gate g2, and the other end of the first capacitor C1 is electrically connected to the third end p3; wherein, the first end p1 is a source and the second end p2 is Drain, or, the first terminal p1 is a drain and the second terminal p2 is a source; the third terminal p3 is a source and the fourth terminal p4 is a drain, or, the The third terminal p3 is the drain and the fourth terminal p4 is the source.
  • the driving circuit includes a first thin film transistor Q1, a second thin film transistor Q2, and a first capacitor C1.
  • the first thin film transistor Q1 may be an N-type thin film transistor or a P-type thin film transistor; correspondingly, the second thin film transistor Q2 may be an N-type thin film transistor or a P-type thin film transistor.
  • the first thin film transistor Q1 and the second thin film transistor Q2 are both N-type thin film transistors for illustration.
  • the source and drain of the P-type thin film transistor are turned on; when the gate of the P-type thin film transistor receives a high-level signal, the The source and drain are disconnected.
  • FIG. 13 is a schematic diagram of a circuit structure of a driving circuit for driving a light-emitting unit in a display panel in another embodiment of the application.
  • the display panel 100 includes a plurality of scan lines 120 arranged at intervals, and a plurality of data lines 130 arranged at intervals.
  • the data lines 130 and the scan lines 120 are cross-insulated, and the scan lines 120 are used to generate scan signals.
  • the data line 130 is used to transmit data signals, two adjacent data lines 130 and two adjacent scan lines 120 define a sub-pixel area, and the sub-pixel area is used to set the light-emitting unit 110, so
  • the sub-pixel area is also provided with a first thin film transistor Q1, a second thin film transistor Q2, and a third thin film transistor Q3.
  • the first thin film transistor Q1 is turned on under the control of the scan signal
  • the second thin film transistor When Q2 is turned on under the control of the data signal and the third thin film transistor Q3 is turned on, the first reference signal and the first compensation signal are applied to the anode of the light emitting unit 110, and the light emitting The negative pole of the unit 110 is used to receive the second reference signal.
  • the sub-pixel area is also provided with a second capacitor C2.
  • the first thin film transistor Q1 includes a first gate g1, a first terminal p1, and a second terminal p2, and the second thin film transistor Q2 includes a second gate g2, a third terminal p3, and a fourth terminal p4,
  • the third thin film transistor Q3 includes a third gate g3, a fifth terminal p5, and a sixth terminal p6.
  • the first gate g1 is electrically connected to the scan line 120 to receive scan signals
  • the first terminal p1 is electrically connected to the data line 130 to receive data signals
  • the second terminal p2 is electrically connected to the first terminal p2.
  • the third terminal p3 is electrically connected to the sixth terminal p6
  • the fourth terminal p4 is electrically connected to the anode of the light-emitting unit 110
  • the third grid g3 is used to receive switch control Signal
  • the fifth terminal p5 is used to receive the first reference signal and the first compensation signal
  • one end of the second capacitor C2 is electrically connected to the second gate g2
  • the other end of the second capacitor C2 is electrically connected
  • the switch control signal is used to control the fifth terminal p5 and the sixth terminal p6 to be turned on or off.
  • the driving circuit includes a first thin film transistor Q1, a second thin film transistor Q2, a third thin film transistor Q3, and a second capacitor C2.
  • FIG. 14 is a schematic diagram of an electronic device provided by an embodiment of the application.
  • the electronic device 1 includes the panel assembly 10 described in any of the foregoing embodiments.
  • the electronic device 1 may be, but is not limited to, a mobile phone, a computer, or the like.
  • the electronic device 1 may be flexible, foldable, or conventional non-foldable.

Abstract

本申请涉及一种面板组件(10)及包括所述面板组件(10)的电子装置(1)。所述面板组件(10)包括显示面板(100)、基准信号产生电路(200)、及补偿电路(300)，所述显示面板(100)包括阵列分布的发光单元(110)，所述基准信号产生电路(200)用于产生第一基准信号及第二基准信号，所述第一基准信号及所述第二基准信号配合以驱动所述发光单元(300)发光，所述补偿电路(300)包括第一补偿电路(310)，所述第一补偿电路(310)用于根据所述显示面板(10)内的所述第一基准信号产生第一补偿信号，所述第一补偿信号用于输出至所述显示面板(100)以对所述第一基准信号进行补偿。本申请的面板组件(10)具有较稳定的显示效果。

Description

面板组件及电子装置 技术领域
本申请涉及显示面板领域，特别是涉及一种面板组件及电子装置。
背景技术
随着技术的进步，具有显示功能的电子装置逐渐进入到人们的生活当中。电子装置通常包括显示面板，所述显示面板用于显示视频、图片、或者文字。然后，传统显示面板在显示视频、图片或者文字的时候，由于线路、器件间的耦合作用，会导致电源电压不稳定，常常会出现显示画面不佳的情况。
发明内容
本申请实施例公开了一种面板组件。所述面板组件包括显示面板、基准信号产生电路、及补偿电路，所述显示面板包括阵列分布的发光单元，所述基准信号产生电路用于产生第一基准信号及第二基准信号，所述第一基准信号及所述第二基准信号配合以驱动所述发光单元发光，所述补偿电路包括第一补偿电路，所述第一补偿电路用于根据所述显示面板内的所述第一基准信号产生第一补偿信号，所述第一补偿信号用于输出至所述显示面板以对所述第一基准信号进行补偿。
本申请还公开了一种包括所述面板组件的电子装置。
由于本申请的面板组件使用第一补偿信号对所述显示面板中的第一基准信号进行补偿，补偿后的第一基准信号驱动所述发光单元发光时，进而保证了发光单元发光性能的稳定性，进而，本申请的面板组件具有较稳定的显示效果。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为本申请一实施方式提供的面板组件的电路结构示意图。
图2为图1中提供的面板组件中的第一补偿电路的示意图。
图3为图2中的第一反相电路的示意图。
图4为本申请另一实施方式提供的面板组件的电路结构示意图。
图5为图4中提供的面板组件中的第二补偿电路的示意图。
图6为图5中第二反相电路的示意图。
图7为本申请又一实施方式提供的面板组件的电路结构示意图。
图8为本申请的显示面板中各个信号的波形示意图。
图9为本申请提供的面板组件的一状态下的结构示意图。
图10为本申请提供的面板组件的另一状态下的结构示意图。
图11为本申请一实施方式中面板组件中显示面板的示意图。
图12为本申请一实施方式中显示面板中驱动发光单元的驱动电路的电路架构示意图。
图13为本申请另一实施方式中显示面板中驱动发光单元的驱动电路的电路架构示意图。
图14为本申请一实施方式提供电子装置的示意图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
请一并参阅图1，图1为本申请一实施方式提供的面板组件的电路结构示意图。下面结合附图，具体说明本申请提供的面板组件。所述面板组件10包括显示面板100、基准信号产生电路200、及补偿电路300。所述显示面板100包括阵列分布的发光单元110。所述基准信号产生电路200用于产生第一基准信号及第二基准信号，所述第一基准信号及所述第二基准信号配合以驱动所述发光单元110发光。所述补偿电路300包括第一补偿电路310，所述第一补偿电路310用于根据所述显示面板100内的所述第一基准信号产生第一补偿信号，所述第一补偿信号用于输出至所述显示面板100以对所述第一基准信号进行补偿。
所述显示面板100可以为有机发光二极管显示面板100，当所述显示面板100为有机发光二极管显示面板100时，所述发光单元110为有机发光二极管。
所述第一基准信号及所述第二基准信号驱动所述发光单元110发光时，所述第一基准信号被加载在所述发光单元110的正极，所述第二基准信号被加载在所述发光单元110的负极，其中，所述第一基准信号为正电压，所述第二基准信号为负电压。或者，所述第一基准信号及所述第二基准信号驱动所述发光单元110发光时，所述第一基准信号被加载在所述发光单元110的负极，所述第二基准信号被加载在所述发光单元110的正极，其中，所述第一基准信号为负电压，所述第二基准信号为正电压。
所述第一基准信号及所述第二基准信号驱动所述发光单元110发光时，所述第一基准信号及所述第二基准信号被传输至所述显示面板100的内部，所述第一基准信号及所述第二基准信号会受到面板内部的其他信号(比如，扫描信号)的影响而变得不稳定，所述第一基准信号及所述第二基准信号的稳定性会影响到发光单元110的发光效果。本申请通过用第一补偿信号对所述第一基准信号进行补偿，以保证所述发光单元110发光性能的稳定性。
进一步地，请一并参阅图2，图2为图1中提供的面板组件中的第一补偿电路的示意图。 所述第一补偿电路310包括第一采样电路311、及第一反相电路312。所述第一采样电路311用于接收显示面板100内的第一基准信号，并将从显示面板100内接收到的第一基准信号中的交流分量进行采样以得到第一干扰信号，所述第一反相电路312用于将所述第一干扰信号进行反相以得到所述第一补偿信号。
通常情况下，所述第一基准信号为直流电压信号，当所述第一基准信号受到面板内部的其他信号影响的时候，会产生波动，这些波动可被视为交流分量，因此，本申请中的第一采样电路311对第一基准信号中的交流分量进行采样可得到第一干扰信号，第一反相电路312再对第一干扰信号进行反相得到所述第一补偿信号，也就是说第一补偿信号和第一干扰信号的幅值相等方向相反。当所述第一补偿信号与所述第一基准信号一起被输出至所述发光单元110时，由于第一补偿信号与第一干扰信号的幅值相等方向相反，第一补偿信号和第一干扰信号的叠加作用会消除所述第一干扰信号，进而保证了发光单元110发光性能的稳定性，因此，本申请的面板组件具有较为稳定的显示效果。
进一步地，本实施方式中仅仅对第一交流分量进行采样，相较于对第一基准信号进行采样而言，可减小所述第一采样电路311的工作量。且，仅仅对第一交流分量进行采样不会影响到第一基准信号的幅值，进而避免对发光单元110的发光性能的稳定性造成影响。
请一并参阅图3，图3为图2中的第一反相电路的示意图。所述第一反相电路312包括第一放大器A1、第一电阻R1、及第二电阻R2。所述第一放大器A1包括同相输入端(图中用“+”表示)、反相输入端(图中用“-”表示)、及输出端。所述第一放大器A1的同相输入端接地，所述第一放大器A1的反相输入端通过所述第一电阻R1接收所述第一干扰信号，所述第二电阻R2一端电连接所述第一放大器A1的反相输入端，所述第二电阻R2的另一端电连接所述第一放大器A1的输出端，所述第一放大器A1的输出端用于将所述第一补偿信号输出。
进一步地，在一实施方式中，所述第一电阻R1的阻值等于所述第二电阻R2的阻值。当所述第一电阻R1的阻值等于所述第二电阻R2的阻值时，所述第一补偿信号与所述第一干扰信号的幅值相等，相位相反。
进一步地，在另一实施方式中，所述第一电阻R1及所述第二电阻R2为可编程可变电阻。当所述第一电阻R1及所述第二电阻R2为可编程逻辑电阻时，可以使得所述第一补偿信号的幅值可调，有利于对所述第一基准信号的补偿。
进一步地，所述显示面板100具有显示每一帧画面的显示时间段及相邻的两帧画面时的空闲时间段。所述面板组件10还包括控制电路600，所述控制电路600用于控制所述第一采样电路311工作在所述显示时间段，并且控制所述第一采样电路311在所述空闲时间段不工作。
显示面板100显示画面的时候，会一帧画面一帧画面地进行显示，相邻的两帧画面之间存时间间隔。显示每一帧画面的时间段定义为显示时间段，相邻的两帧画面之间的时间间隔定义为空闲时间段。由于人眼视觉暂留，不会觉察到相邻两帧画面之间的时间间隔。所述控制电路600控制所述第一采样电路311工作在所述显示时间段而在所述空闲时间段 不工作，从而减小了所述第一采样电路311的能量损耗。
进一步地，所述显示面板100具有显示每一帧画面的显示时间段，所述第一采样电路311的采样频率大于或等于在显示一帧画面的显示时间段内显示面板100的扫描信号的频率的两倍。
所述显示面板100内扫描信号的存在会对第一基准信号造成干扰，所述第一扫描信号的扫描频率决定了所述第一基准信号中产生的第一干扰信号的频率，本申请中的第一采样电路311的采样频率大于或等于扫描信号的频率的两倍，从而保证了对所述第一基准信号进行采样时得到的第一干扰信号的波形不失真，保证了对所述第一基准信号进行补偿的第一补偿信号的精确性，进而保证了所述发光单元110发光性能的稳定性。
请参阅图4，图4为本申请另一实施方式提供的面板组件的电路结构示意图。本实施方式提供的面板组件10与前面实施方式介绍的面板组件10基本相同，不同指出在于，本实施方式提供的面板组件10中的补偿电路300还包括第二补偿电路320。具体地，本申请提供的面板组件10包括显示面板100、基准信号产生电路200、及补偿电路300。所述显示面板100包括阵列分布的发光单元110。所述基准信号产生电路200用于产生第一基准信号及第二基准信号，所述第一基准信号及所述第二基准信号配合以驱动所述发光单元110发光。所述补偿电路300包括第一补偿电路310，所述第一补偿电路310用于根据所述显示面板100内的所述第一基准信号产生第一补偿信号，所述第一补偿信号用于输出至所述显示面板100以对所述第一基准信号进行补偿。所述补偿电路300还包括第二补偿电路320，所述第二补偿电路320用于接收显示面板100内的第二基准信号，并根据所述显示面板100内的所述第二基准信号产生第二补偿信号，所述第二补偿信号用于输出至所述显示面板100以对所述第二基准信号进行补偿。
请一并参阅图5，图5为图4中提供的面板组件中的第二补偿电路的示意图。所述第二补偿电路320包括第二采样电路321、及第二反相电路322。所述第二采样电路321用于接收显示面板100内的第二基准信号，并将从显示面板100内接收到的第二基准信号中的交流分量进行采样以得到第二干扰信号，所述第二反相电路322用于将所述第二干扰信号进行反相以得到所述第二补偿信号。
请一并参阅图6，图6为图5中第二反相电路的示意图。所述第二反相电路322包括第二放大器A2、第三电阻R3及第四电阻R4。所述第二放大器A2包括同相输入端(图中以“+”表示)、反相输入端(图中以“-”表示)、及输出端。所述第二放大器A2的同相输入端接地，所述第二放大器A2的反相输入端通过所述第三电阻R3接收所述第二干扰信号，所述第四电阻R4的一端电连接所述第二放大器A2的反相输入端，所述第四电阻R4的另一端电连接所述第二放大器A2的输出端，所述第二放大器A2的输出端用于将所述第二补偿信号输出。
进一步地，在一实施方式中，所述第三电阻R3等于第四电阻R4。当所述第三电阻R3的阻值等于所述第四电阻R4的阻值时，所述第二补偿信号与所述第二干扰信号的幅值相等，相位相反。
进一步地，在一实施方式中，所述第三电阻R3及所述第四电阻R4均为可编程可变电阻。当所述第三电阻R3及所述第二党组R4为可编程逻辑电阻时，可以使得所述第二补偿信号的幅值可调，有利于对所述第二基准信号的补偿。
进一步地，请参阅图7，图7为本申请又一实施方式提供的面板组件的电路结构示意图。在本实施方式提供的面板组件10与其他方式提供的面板组件10基本相同，不同之处在于，在本实施方式中，所述面板组件10还包括检测电路400、判断电路500、及控制电路600。本实施方式提供的面板组件10以在图1中增加检测电路400、判断电路500以及控制电路600为例进示意，可理解地，所述面板组件10还包括检测电路400、判断电路500、及控制电路600可以结合到前述任意实施方式提供的面板组件10中。所述检测电路400用于检测流经所述发光单元110的电流以得到检测电流，所述判断电路500将所述检测电流与预设电流进行比较，以判断出所述检测电流是否发生波动。其中，所述预设电流为表征所述发光单元110的额定工作电流。当所述检测电流等于所述预设电流时，所述检测电流没有发生波动，发光单元110正常工作；当所述检测电流与所述预设电流的之间差值的绝对值小于等于预设数值时，则，表明所述检测电流虽然产生波动，但是所述检测电流的波动非常小，此时，可以认为所述发光单元110仍然可以正常工作。因此，当流经所述发光单元110的检测电流的波动小于或等于预设阈值时，所述控制电路600控制所述补偿电路300不工作。所述预设阈值的选取与人眼能够感受到的变化相关，当流经所述发光单元110的检测电流的波动小于或等于预设阈值时，虽然检测电流发生波动但是检测电流的波动较小，不能够被人眼感测出来。举例而言，所述预设阈值的绝对值与所述检测电流的比值可以为但不仅限于为1％。此时，所述控制电路600控制所述补偿电路300不工作，可以节约补偿电路300工作带来的能量损耗。当所述检测电流与所述预设电流之间的差值的绝对值大于所述预设数值时，则表明加载在所述发光单元110上的电流产生波动，且流经所述发光单元110的检测电流的波动大于预设阈值时，所述控制电路600控制所述补偿电路300工作。所述补偿电路300请参阅前面描述，在此不再赘述。
请一并参阅图8，图8为本申请的显示面板中各个信号的波形示意图。由图中可见，所述第一基准信号受到显示面板100中扫描信号的影响产生交流杂波信号，第二基准信号受到显示面板100的扫描信号的影响而产生交流杂波信号。此时，当第一基准信号及第二基准信号驱动所述发光单元110发光时，所述发光单元110的发光效果不稳定。为了方便描述，第一补偿信号对第一基准信号补偿后的信号简称为补偿后的第一基准信号，第二补偿信号对第二基准信号补偿后的信号简称补偿后的第二基准信号。由图中可见，补偿后的第一基准信号趋于平缓，补偿后的第二基准信号趋于平缓，当补偿后的第一基准信号及补偿后的第二基准信号驱动所述发光单元110发光时，所述发光单元110的发光效果稳定，从而提升了所述显示面板100的显示效果。为了方便示意，以所述第一基准信号为高电平，所述第二基准信号为低电平进行示意；可以理解地，所述第一基准信号也可以为低电平，相应地，所述第二基准信号为高电平。
请一并参阅图9及图10，图9为本申请提供的面板组件的一状态下的结构示意图；图 10为本申请提供的面板组件的另一状态下的结构示意图。图9所示的面板组件10为显示面板100、柔性连接件800、转接板900均展开时的结构示意图。图10所示的面板组件10为显示面板100、柔性连接件800、转接板900折叠时的状态示意图。结合前面各个实施方式介绍的面板组件10，对本实施方式介绍的面板组件10进行介绍，所述面板组件10还包括驱动芯片710(Driver IC)，所述驱动芯片710包括扫描信号产生电路710a，所述扫描信号产生电路710a用于产生驱动所述显示面板100工作的扫描信号，所述补偿电路300集成在所述驱动芯片710内。本申请的补偿电路300集成在所述驱动芯片710内，可利用传统面板组件10的架构。
进一步地，所述显示面板100具有显示面100a，所述面板组件10还包括柔性连接件800。所述柔性连接件800的一端连接于所述显示面板100，所述柔性连接件800的另一端弯折至所述显示面板100背离所述显示面100a的一侧，且所述驱动芯片710设置在所述柔性连接件800上且位于背离所述显示面100a的一侧。
所述柔性连接件800可以为但不仅限于为柔性薄膜。本实施方式中柔性连接件800的一端弯折至所述显示面板100背离所述显示面的一侧，且所述驱动芯片710设置在所述柔性连接件800上且位于背离所述显示面的一侧，从而使得所述驱动芯片710不占用所述显示面板100的非显示区的面积，从而有利于所述显示面板100的窄边框化。
进一步地，所述面板组件10还包括转接板900。所述转接板900通过所述柔性连接件800连接于所述显示面板100，所述基准信号产生电路200设置在所述转接板900上，所述基准信号产生电路200通过第一传输导线910将所述第一基准信号传输至所述显示面板100，且通过第二传输导线920将所述第二基准信号传输至所述显示面板100，所述第一补偿电路310的输入端连接所述显示面板100内的第一传输导线910以接收所述第一基准信号，所述第一补偿电路310的输出端连接位于所述显示面板100外的第一传输导线910以将所述第一补偿信号输出至所述显示面板100。所述转接板900可以为柔性电路板或者印刷电路板。
进一步地，所述面板组件10还包括电源芯片720(Power IC)。所述基准信号产生电路200集成在所述电源芯片720内。
进一步地，结合前面各个实施方式介绍的面板组件10，当所述第一基准信号及所述第二基准信号配合以驱动所述发光单元110发光时：所述第一基准信号被加载在所述发光单元110的正极，所述第二基准信号被加载在所述发光单元110的负极；或者，所述第一基准信号被加载在所述发光单元110的负极，所述第二基准信号被加载在所述发光单元110的负极。
下面对面板组件10的架构进行描述，请一并参阅图11和图12，图11为本申请一实施方式中面板组件中显示面板的示意图；图12为本申请一实施方式中显示面板中驱动发光单元的驱动电路的电路架构示意图。所述显示面板100包括间隔设置的多个扫描线120、以及多个间隔设置的数据线130，所述数据线130与所述扫描线120交叉绝缘设置。所述扫描线120用于传输扫描信号，所述数据线130用于传输数据信号，相邻的两个数据线130 及相邻的两个扫描线120定义一个子像素区，所述子像素区用于设置所述发光单元110，所述子像素区还设置第一薄膜晶体管Q1及第二薄膜晶体管Q2。当所述第一薄膜晶体管Q1在扫描信号的控制下导通时，且所述第二薄膜晶体管Q2在所述数据信号的控制下导通时，所述第一基准信号及所述第一补偿信号被加载至所述发光单元110的正极，所述发光单元110的负极用于接收所述第二基准信号。图12中以第一基准信号加载在所述发光单元110的正极，且所述第二基准信号加载在所述发光单元110的负极为例进行示意，此时，所述第一基准信号为高电平，所述第二基准信号为低电平；可以理解地，在其他实施方式中，所述第一基准信号也可加载在所述发光单元110的负极，所述第二基准信号加载在所述发光单元110的正极，此时，所述第一基准信号为低电平，所述第二基准信号为高电平。
进一步地，所述子像素区还设置有第一电容C1，所述第一薄膜晶体管Q1包括第一栅极g1、第一端p1、及第二端p2，所述第二薄膜晶体管Q2包括第二栅极g2、第三端p3、及第四端p4。所述第一栅极g1电连接所述扫描线120以接收所述扫描信号，所述第一端p1电连接至所述数据线130以接收数据信号，所述第二端p2电连接所述第二栅极g2，所述第三端p3用于接收所述第一补偿信号及所述第一基准信号，所述第四端p4电连接所述发光单元110的正极，所述第一电容C1的一端电连接所述第二栅极g2，所述第一电容C1的另一端电连接所述第三端p3；其中，所述第一端p1为源极且所述第二端p2为漏极，或者，所述第一端p1为漏极且所述第二端p2为源极；所述第三端p3为源极且所述第四端p4为漏极，或者，所述第三端p3为漏极且所述第四端p4为源极。
在本实施方式中，所述驱动电路包括第一薄膜晶体管Q1、第二薄膜晶体管Q2、及第一电容C1。所述第一薄膜晶体管Q1可以为N型薄膜晶体管，也可以为P型薄膜晶体管；相应地，所述第二薄膜晶体管Q2可以为N型薄膜晶体管，也可以为P型薄膜晶体管。在图12中以第一薄膜晶体管Q1及第二薄膜晶体管Q2均为N型薄膜晶体管为例进行示意。当N型薄膜晶体管的栅极接收高电平信号的时候，N型薄膜晶体管的源极和漏极导通；当N型薄膜晶体管的栅极接收低电平信号的时候，N型薄膜晶体管的源极和漏极断开。当P型薄膜晶体管的栅极接收低电平信号的时候，P型薄膜晶体管的源极和漏极导通；当P型薄膜晶体管的栅极接收高电平信号的时候，P型薄膜晶体管的源极和漏极断开。
请一并参阅图11及图13，图13为本申请另一实施方式中显示面板中驱动发光单元的驱动电路的电路架构示意图。所述显示面板100包括间隔设置的多个扫描线120、以及多个间隔设置的数据线130，所述数据线130与所述扫描线120交叉绝缘设置，所述扫描线120用于产生扫描信号，所述数据线130用于传输数据信号，相邻的两个数据线130及相邻的两个扫描线120定义一个子像素区，所述子像素区用于设置所述发光单元110，所述子像素区还设置第一薄膜晶体管Q1、第二薄膜晶体管Q2、及第三薄膜晶体管Q3，当所述第一薄膜晶体管Q1在扫描信号的控制下导通时，且所述第二薄膜晶体管Q2在所述数据信号的控制下导通以及所述第三薄膜晶体管Q3导通时，所述第一基准信号及所述第一补偿信号被加载至所述发光单元110的正极，所述发光单元110的负极用于接收所述第二基准信号。
进一步地，所述子像素区还设置有第二电容C2。所述第一薄膜晶体管Q1包括第一栅极g1、第一端p1、及第二端p2，所述第二薄膜晶体管Q2包括第二栅极g2、第三端p3、及第四端p4，所述第三薄膜晶体管Q3包括第三栅极g3、第五端p5、及第六端p6。所述第一栅极g1电连接所述扫描线120以接收扫描信号，所述第一端p1电连接至所述数据线130以接收数据信号，所述第二端p2电连接至所述第二栅极g2，所述第三端p3电连接至所述第六端p6，所述第四端p4电连接至所述发光单元110的正极，所述第三栅极g3用于接收开关控制信号，所述第五端p5用于接收所述第一基准信号及第一补偿信号，所述第二电容C2的一端电连接第二栅极g2，所述第二电容C2的另一端电连接所述第五端p5，所述开关控制信号用于控制所述第五端p5及所述第六端p6导通或者断开。
在本实施方式中，所述驱动电路包括第一薄膜晶体管Q1、第二薄膜晶体管Q2、第三薄膜晶体管Q3、及第二电容C2。
请参阅图14，图14为本申请一实施方式提供电子装置的示意图。所述电子装置1包括前面任意实施方式所述的面板组件10。所述电子装置1可以为但不仅限于为手机、电脑等。所述电子装置1可以是柔性的，可折叠的，也可以为常规的不可折叠的。
本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的核心思想；同时，对于本领域的一般技术人员，依据本申请的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本申请的限制。

Claims (19)

  1. 一种面板组件，其特征在于，所述面板组件包括显示面板、基准信号产生电路、及补偿电路，所述显示面板包括阵列分布的发光单元，所述基准信号产生电路用于产生第一基准信号及第二基准信号，所述第一基准信号及所述第二基准信号配合以驱动所述发光单元发光，所述补偿电路包括第一补偿电路，所述第一补偿电路用于根据所述显示面板内的所述第一基准信号产生第一补偿信号，所述第一补偿信号用于输出至所述显示面板以对所述第一基准信号进行补偿。
  2. 如权利要求1所述的面板组件，其特征在于，所述第一补偿电路包括第一采样电路、及第一反相电路，所述第一采样电路用于接收显示面板内的第一基准信号，并将从显示面板内接收到的第一基准信号中的交流分量进行采样以得到第一干扰信号，所述第一反相电路用于将所述第一干扰信号进行反相以得到所述第一补偿信号。
  3. 如权利要求2所述的面板组件，其特征在于，所述第一反相电路包括第一放大器、第一电阻、及第二电阻，所述第一放大器包括同相输入端、反相输入端、及输出端，所述第一放大器的同相输入端接地，所述第一放大器的反相输入端通过所述第一电阻接收所述第一干扰信号，所述第二电阻一端电连接所述第一放大器的反相输入端，所述第二电阻的另一端电连接所述第一放大器的输出端，所述第一放大器的输出端用于将所述第一补偿信号输出。
  4. 如权利要求3所述的面板组件，其特征在于，所述第一电阻的阻值等于所述第二电阻的阻值。
  5. 如权利要求2所述的面板组件，其特征在于，所述显示面板具有显示每一帧画面的显示时间段及相邻的两帧画面时的空闲时间段，所述面板组件还包括控制电路，所述控制电路用于控制所述第一采样电路工作在所述显示时间段，并且控制所述第一采样电路在所述空闲时间段不工作。
  6. 如权利要求2所述的面板组件，其特征在于，所述显示面板具有显示每一帧画面的显示时间段，所述第一采样电路的采样频率大于或等于在显示一帧画面的显示时间段内显示面板的扫描信号的频率的两倍。
  7. 如权利要求1-6任意一项所述的面板组件，其特征在于，所述补偿电路还包括第二补偿电路，所述第二补偿电路用于接收显示面板内的第二基准信号，并根据所述显示面板内的所述第二基准信号产生第二补偿信号，所述第二补偿信号用于输出至所述显示面板以对所述第二基准信号进行补偿。
  8. 如权利要求7所述的面板组件，其特征在于，所述第二补偿电路包括第二采样电路、及第二反相电路，所述第二采样电路用于接收显示面板内的第二基准信号，并将从显示面板内接收到的第二基准信号中的交流分量进行采样以得到第二干扰信号，所述第二反相电路用于将所述第二干扰信号进行反相以得到所述第二补偿信号。
  9. 如权利要求8所述的面板组件，其特征在于，所述第二反相电路包括第二放大器、 第三电阻及第四电阻，所述第二放大器包括同相输入端、反相输入端、及输出端，所述第二放大器的同相输入端接地，所述第二放大器的反相输入端通过所述第三电阻接收所述第二干扰信号，所述第四电阻的一端电连接所述第二放大器的反相输入端，所述第四电阻的另一端电连接所述第二放大器的输出端，所述第二放大器的输出端用于将所述第二补偿信号输出。
  10. 如权利要求1-9任意一项所述的面板组件，其特征在于，所述面板组件还包括驱动芯片，所述驱动芯片包括扫描信号产生电路，所述扫描信号产生电路用于产生驱动所述显示面板工作的扫描信号，所述补偿电路集成在所述驱动芯片内。
  11. 如权利要求10所述的面板组件，其特征在于，所述显示面板具有显示面，所述面板组件还包括柔性连接件，所述柔性连接件的一端连接于所述显示面板，所述柔性连接件的另一端弯折至所述显示面板背离所述显示面的一侧，且所述驱动芯片设置在所述柔性连接件上且位于背离所述显示面的一侧。
  12. 如权利要求10所述的面板组件，其特征在于，所述面板组件还包括转接板，所述转接板通过所述柔性连接件连接于所述显示面板，所述基准信号产生电路设置在所述转接板上，所述基准信号产生电路通过第一传输导线将所述第一基准信号传输至所述显示面板，且通过第二传输导线将所述第二基准信号传输至所述显示面板，所述第一补偿电路的输入端连接所述显示面板内的第一传输导线以接收所述第一基准信号，所述第一补偿电路的输出端连接位于所述显示面板外的第一传输导线以将所述第一补偿信号输出至所述显示面板。
  13. 如权利要求12所述的面板组件，其特征在于，所述面板组件还包括电源芯片，所述基准信号产生电路集成在所述电源芯片内。
  14. 如权利要求1所述的面板组件，其特征在于，当所述第一基准信号及所述第二基准信号配合以驱动所述发光单元发光时：所述第一基准信号被加载在所述发光单元的正极，所述第二基准信号被加载在所述发光单元的负极；或者，所述第一基准信号被加载在所述发光单元的负极，所述第二基准信号被加载在所述发光单元的负极。
  15. 如权利要求1所述的面板组件，其特征在于，所述显示面板包括间隔设置的多个扫描线、以及多个间隔设置的数据线，所述数据线与所述扫描线交叉绝缘设置，所述扫描线用于传输扫描信号，所述数据线用于传输数据信号，相邻的两个数据线及相邻的两个扫描线定义一个子像素区，所述子像素区用于设置所述发光单元，所述子像素区还设置第一薄膜晶体管及第二薄膜晶体管，当所述第一薄膜晶体管在扫描信号的控制下导通时，且所述第二薄膜晶体管在所述数据信号的控制下导通时，所述第一基准信号及所述第一补偿信号被加载至所述发光单元的正极，所述发光单元的负极用于接收所述第二基准信号。
  16. 如权利要求15所述的面板组件，其特征在于，所述子像素区还设置有第一电容，所述第一薄膜晶体管包括第一栅极、第一端、及第二端，所述第二薄膜晶体管包括第二栅极、第三端、及第四端，所述第一栅极电连接所述扫描线以接收所述扫描信号，所述第一端电连接至所述数据线以接收数据信号，所述第二端电连接所述第二栅极，所述第三端用 于接收所述第一补偿信号及所述第一基准信号，所述第四端电连接所述发光单元的正极，所述第一电容的一端电连接所述第二栅极，所述第一电容的另一端电连接所述第三端；其中，所述第一端为源极且所述第二端为漏极，或者，所述第一端为漏极且所述第二端为源极；所述第三端为源极且所述第四端为漏极，或者，所述第三端为漏极且所述第四端为源极。
  17. 如权利要求1所述的面板组件，其特征在于，所述显示面板包括间隔设置的多个扫描线、以及多个间隔设置的数据线，所述数据线与所述扫描线交叉绝缘设置，所述扫描线用于产生扫描信号，所述数据线用于传输数据信号，相邻的两个数据线及相邻的两个扫描线定义一个子像素区，所述子像素区用于设置所述发光单元，所述子像素区还设置第一薄膜晶体管、第二薄膜晶体管、及第三薄膜晶体管，当所述第一薄膜晶体管在扫描信号的控制下导通时，且所述第二薄膜晶体管在所述数据信号的控制下导通以及所述第三薄膜晶体管导通时，所述第一基准信号及所述第一补偿信号被加载至所述发光单元的正极，所述发光单元的负极用于接收所述第二基准信号。
  18. 如权利要求17所述的面板组件，其特征在于，所述子像素区还设置有第二电容，所述第一薄膜晶体管包括第一栅极、第一端、及第二端，所述第二薄膜晶体管包括第二栅极、第三端、及第四端，所述第三薄膜晶体管包括第三栅极、第五端、及第六端，所述第一栅极电连接所述扫描线以接收扫描信号，所述第一端电连接至所述数据线以接收数据信号，所述第二端电连接至所述第二栅极，所述第三端电连接至所述第六端，所述第四端电连接至所述发光单元的正极，所述第三栅极用于接收开关控制信号，所述第五端用于接收所述第一基准信号及第一补偿信号，所述第二电容的一端电连接第二栅极，所述第二电容的另一端电连接所述第五端，所述开关控制信号用于控制所述第五端及所述第六端导通或者断开。
  19. 一种电子装置，其特征在于，所述电子装置包括如权利要求1-18任意一项所述的面板组件。
PCT/CN2019/077517 2019-03-08 2019-03-08 面板组件及电子装置 WO2020181422A1 (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201980073113.5A CN113316887A (zh) 2019-03-08 2019-03-08 面板组件及电子装置
PCT/CN2019/077517 WO2020181422A1 (zh) 2019-03-08 2019-03-08 面板组件及电子装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2019/077517 WO2020181422A1 (zh) 2019-03-08 2019-03-08 面板组件及电子装置

Publications (1)

Publication Number Publication Date
WO2020181422A1 true WO2020181422A1 (zh) 2020-09-17

Family

ID=72427191

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/077517 WO2020181422A1 (zh) 2019-03-08 2019-03-08 面板组件及电子装置

Country Status (2)

Country Link
CN (1) CN113316887A (zh)
WO (1) WO2020181422A1 (zh)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050269957A1 (en) * 2004-06-02 2005-12-08 Hong-Ru Guo Driving circuits, compensation circuits and signal compensation method for pixel of active organic electro-luminescence device
CN103544927A (zh) * 2013-11-07 2014-01-29 京东方科技集团股份有限公司 显示驱动电路、显示装置和显示驱动方法
CN103681772A (zh) * 2013-12-27 2014-03-26 京东方科技集团股份有限公司 一种阵列基板和显示装置
CN104467424A (zh) * 2014-12-31 2015-03-25 矽力杰半导体技术(杭州)有限公司 用于显示面板的开关电源

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103426404A (zh) * 2013-08-23 2013-12-04 华映视讯（吴江）有限公司 电压补偿方法及使用其的有机发光二极管显示器
WO2016125640A1 (ja) * 2015-02-03 2016-08-11 シャープ株式会社 データ信号線駆動回路、データ信号線駆動方法、および表示装置
CN106898326B (zh) * 2017-05-03 2019-06-07 深圳市华星光电技术有限公司 液晶显示面板及其公共电压补偿方法、装置
CN107369424B (zh) * 2017-08-31 2019-12-03 京东方科技集团股份有限公司 一种公共电压补偿电路、补偿方法及显示装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050269957A1 (en) * 2004-06-02 2005-12-08 Hong-Ru Guo Driving circuits, compensation circuits and signal compensation method for pixel of active organic electro-luminescence device
CN103544927A (zh) * 2013-11-07 2014-01-29 京东方科技集团股份有限公司 显示驱动电路、显示装置和显示驱动方法
CN103681772A (zh) * 2013-12-27 2014-03-26 京东方科技集团股份有限公司 一种阵列基板和显示装置
CN104467424A (zh) * 2014-12-31 2015-03-25 矽力杰半导体技术(杭州)有限公司 用于显示面板的开关电源

Also Published As

Publication number Publication date
CN113316887A (zh) 2021-08-27

Similar Documents

Publication Publication Date Title
US7256778B1 (en) Reset circuit for timing controller
US6933917B2 (en) Method and circuit for LCD panel flicker reduction
WO2017020354A1 (zh) 源驱动晶片驱动电路以及液晶显示面板
JP4932365B2 (ja) 表示装置の駆動装置及びこれを含む表示装置
WO2020103205A1 (zh) 驱动电路和显示面板
US11227530B2 (en) Display panel
JP2007205902A (ja) 光検知回路、電気光学装置および電子機器
US20070008347A1 (en) Voltage generator for flat panel display
WO2022166467A1 (zh) 栅极开启电压产生电路、显示面板驱动装置及显示装置
WO2020113677A1 (zh) 显示面板驱动装置
CN101989001B (zh) 液晶显示器的共同电压产生电路
WO2020181422A1 (zh) 面板组件及电子装置
WO2022193708A1 (zh) 显示面板及其检测方法、补偿方法、显示装置
CN214226481U (zh) 一种提高输出波形稳定性的gip电路
CN210378428U (zh) 一种控制电路及显示装置
WO2019104722A1 (zh) 液晶显示板及其eoa模块
WO2014121474A1 (zh) 液晶显示器及其补偿电路、薄膜晶体管的电压的关闭方法
WO2023045169A1 (zh) 显示装置及其控制方法、显示系统
TWI690915B (zh) 畫素電路
TWI708224B (zh) 顯示面板及其升壓電路
JP3230721B2 (ja) 液晶表示装置の駆動回路
KR20180013152A (ko) 표시장치
US8654107B2 (en) Shading signal generating circuit
KR100421486B1 (ko) 게이트 하이전압 발생장치
KR100483534B1 (ko) 액정표시장치전원시퀀스회로

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19918593

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19918593

Country of ref document: EP

Kind code of ref document: A1