WO2020173202A1 - 一种显示面板的电路背板及其制备方法和显示面板 - Google Patents

一种显示面板的电路背板及其制备方法和显示面板 Download PDF

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WO2020173202A1
WO2020173202A1 PCT/CN2019/128125 CN2019128125W WO2020173202A1 WO 2020173202 A1 WO2020173202 A1 WO 2020173202A1 CN 2019128125 W CN2019128125 W CN 2019128125W WO 2020173202 A1 WO2020173202 A1 WO 2020173202A1
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Prior art keywords
welding electrode
circuit
anode
electrode
cathode
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PCT/CN2019/128125
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English (en)
French (fr)
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李海旭
曹占锋
王珂
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京东方科技集团股份有限公司
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Priority to US16/966,146 priority Critical patent/US11257852B2/en
Publication of WO2020173202A1 publication Critical patent/WO2020173202A1/zh

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    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/38Effects and problems related to the device integration
    • H01L2924/384Bump effects
    • H01L2924/3841Solder bridging
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/0066Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the present disclosure relates to the technical field of display panels, and in particular to a circuit backplane of a display panel, a preparation method thereof, and a display panel.
  • LEDs Light-Emitting Diodes
  • LEDs are designed to thin, miniaturize, and array the LED structure, and then transfer the micro LEDs to the circuit backboard in batches, and then make the protective layer and electrodes for the circuit backboard.
  • the brightness is higher, the luminous efficiency is better, and the power consumption is lower.
  • an embodiment of the present application provides a circuit backplane of a display panel.
  • the circuit backplane of the display panel includes a base substrate.
  • the base substrate has a plurality of circuit regions, and each of the circuit regions includes : The cathode welding electrode, the anode welding electrode and the baffle table located on the base substrate; wherein,
  • the spoiler is located between the cathode welding electrode and the anode welding electrode, and the height of the spoiler in the thickness direction of the circuit backplane is higher than that of the cathode welding electrode and the anode welding electrode. height.
  • the spoiler can prevent the flow of the silver paste used when welding the anode and the cathode of the micro LED light-emitting device, so as to prevent the anode and the cathode from being short-circuited due to the flow of the silver paste.
  • each of the circuit regions further includes: a drive circuit located on the base substrate, between the drive circuit and the layer where the cathode welding electrode and the anode welding electrode are located
  • the planarization layer is an electrode protection layer on the layer where the cathode welding electrode and the anode welding electrode are located;
  • the baffle table includes a protruding area of the planarization layer between the cathode welding electrode and the anode welding electrode, and an area where the electrode protection layer is located above the protruding area.
  • the choke stage can be formed by the planarization layer and the electrode protection layer on the base substrate, and does not need to be provided separately, and the manufacturing process is simplified as much as possible.
  • the protruding area has slope surfaces respectively facing the cathode welding electrode and the anode welding electrode.
  • the baffle table faces the slopes of the cathode welding electrode and the anode welding electrode, so as to increase the resistance to the flow of silver paste as much as possible.
  • the included angle range between the slope surface and the base substrate is [50°, 80°].
  • the included angle between the slope surface and the base substrate is located at [50°, 80°]. While ensuring that the resistance to the flow of silver paste is as large as possible, it limits the flow of the baffle table in the thickness direction of the base substrate. Height to facilitate welding of micro LED light-emitting devices.
  • a region of the electrode protection layer located above the slope has a plurality of choke grooves.
  • the area of the electrode protection layer on the slope surface may be provided with multiple flow blocking grooves to further prevent the flow of silver paste.
  • the orthographic projection of each of the choke grooves on the base substrate is an arc shape
  • the arc of the choke groove is provided on the slope facing the cathode welding electrode
  • the center of the circle points to the cathode welding electrode
  • the arc center of the baffle groove provided on the slope surface facing the anode welding electrode points to the anode welding electrode.
  • the baffle groove may be a groove provided at the position where the electrode protection layer faces the cathode welding electrode and the anode welding electrode, forming an enclosing arc to prevent the flow of silver paste.
  • the thickness range of the electrode protection layer is
  • the thickness of the electrode protection layer is appropriately thicker than that of the electrode protection layer in the related art, which may be In this way, the depth of the indentation of the choke groove is deeper, which improves the effect of preventing the flow of silver paste.
  • the embodiments of the present application provide a method for manufacturing a circuit backplane of a display panel, and the manufacturing method includes:
  • An electrode protection layer is formed on the layer where the cathode welding electrode and the anode welding electrode are located; wherein,
  • the planarization layer has a protruding area between the cathode welding electrode and the anode welding electrode, and the protruding area and the electrode protection layer above the protruding area constitute a baffle.
  • forming an electrode protection layer on the layer where the cathode welding electrode and the anode welding electrode are located includes:
  • the protruding area has slope surfaces respectively facing the cathode welding electrode and the anode welding electrode; and a plurality of baffle grooves are formed in the area where the electrode protection layer is located on the slope surface.
  • embodiments of the present application provide a display panel, which includes the circuit backplane as described in the first aspect and a plurality of micro LED light emitting devices, wherein the anode and cathode of each micro LED light emitting device
  • the anode welding electrode and the cathode welding electrode in the corresponding circuit regions in the circuit backplane are respectively fixed by silver paste.
  • FIG. 1 is a schematic structural diagram of a circuit backplane of a display panel provided by an embodiment of the application;
  • FIG. 2 is a schematic structural diagram of a circuit backplane of a display panel provided by an embodiment of the application;
  • FIG. 3 is a schematic diagram of a structure of a circuit backplane of a display panel provided by an embodiment of the application;
  • FIG. 4 is a schematic structural diagram of a circuit backplane of a display panel provided by an embodiment of the application.
  • FIG. 5 is a schematic diagram of a structure of a circuit backplane of a display panel provided by an embodiment of the application;
  • FIG. 6 is a schematic diagram of a structure of a circuit backplane of a display panel provided by an embodiment of the application;
  • FIG. 7 is a schematic flowchart of a manufacturing method of a circuit backplane of a display panel provided by an embodiment of the application.
  • soldering the micro LED chip to the circuit backplane is an important link.
  • soldering the micro LED chip to the TFT backplane is achieved by reflow soldering, and the adhesive used for reflow soldering is silver glue. Due to the good fluidity of the silver paste, the silver paste will flow between the cathode and the anode during the welding process, which may connect the cathode and the anode and cause a short circuit.
  • circuit backplane of a display panel a manufacturing method thereof, and a display panel, which are used to solve the problem that the circuit backplane of the display panel and the LED are prone to short circuit in the process of bonding.
  • the embodiment of the present application provides a circuit backplane of a display panel, which can prevent the flow of silver paste and avoid connecting the cathode and anode of the micro LED.
  • FIG. 1 is a schematic cross-sectional view of the circuit substrate along the thickness direction.
  • the circuit backplane provided by the embodiment of the present application includes a base substrate 10 having a plurality of circuit regions on the base substrate 10, and each circuit region of the plurality of circuit regions includes a cathode welding electrode 12 on the base substrate 10,
  • the anode welding electrode 11 and the baffle stage 13, Fig. 1 takes a circuit area as an example.
  • the baffle 13 of each circuit area is located between the cathode welding electrode 12 and the anode welding electrode 11.
  • the height of the baffle 13 in the thickness direction of the circuit backplane is higher than the height of the cathode welding electrode 12 and the anode welding electrode 11. Therefore, during the process of welding the micro LED light-emitting device on the circuit backplane, the solder, that is, the silver paste, flows between the anode and the cathode, so as to prevent the anode and the cathode from being short-circuited due to the flow of the silver paste.
  • the choke stand 13 is located in the middle of the cathode welding electrode 12 and the anode welding electrode 11, so that the effect of blocking the flow of the silver paste flowing from the cathode welding electrode 12 and the anode welding electrode 11 respectively is as the same as possible.
  • the height of the baffle stage 13 in the thickness direction of the circuit backplane is between [1um, 2um] (ie, 1um ⁇ the height ⁇ 2um), which is lower than the length of the anode and cathode of the micro LED light-emitting device, which can prevent silver paste The flow does not affect the welding of micro-LED light-emitting devices.
  • each circuit area also includes a driving circuit 20 located on the base substrate 10, and a planarization (PLN) between the driving circuit 20 and the layer where the cathode welding electrode 12 and the anode welding electrode 11 are located.
  • the dielectric layer 104 has a source electrode 203 and a drain electrode 204, and the first insulating layer 102 and the second insulating layer
  • the layers 103 are respectively provided with gates (201/202), wherein the driving circuit 20 is located on the side of the buffer layer 101 away from the base substrate 10.
  • the spoiler 13 in the embodiment of the present application includes a planarization layer 105 in the protruding area between the cathode welding electrode 12 and the anode welding electrode 11, and the electrode protection layer 106 is located between the protruding area.
  • the baffle table 13 can be formed, and there is no need to provide a separate baffle table 13 to simplify the manufacturing process as much as possible.
  • the baffle 13 that is the protruding area has slopes respectively facing the cathode welding electrode 12 and the anode welding electrode 11, so that the cross-sectional shape of the baffle 13 in the thickness direction of the circuit backplane includes a trapezoid, In order to increase the resistance to the flow of silver paste as much as possible.
  • the included angle ⁇ between the slope surface and the base substrate 10 is within the range of [50°, 80°] (ie, 50° ⁇ 80°), which ensures the resistance to the flow of silver paste. While being as large as possible, the height of the blocking stage 13 along the thickness direction of the base substrate 10 is limited to facilitate the welding of the micro LED light emitting device.
  • the embodiment of the present application is provided with a plurality of flow-blocking grooves 30 on the electrode protection layer 106 in the region above the slope, as shown in FIG. 3.
  • the orthographic projection of each of the plurality of choke grooves 30 on the base substrate 10 is an arc shape, and is on the surface facing the cathode welding electrode 12
  • the arc-shaped center of the baffle groove 30 on the slope surface points to the cathode welding electrode 12, and the arc-shaped center of the baffle groove 30 on the slope surface facing the anode welding electrode 11 points to the anode welding electrode 11.
  • the dashed lines respectively represent the projections of the choke stage on the base substrate from the top part of the choke table away from the base substrate and the bottom part close to the base substrate.
  • the baffle 30 may be a groove provided at the position where the electrode protection layer 106 faces the cathode welding electrode 12 and the anode welding electrode 11 to form an enclosing arc to prevent the flow of silver paste.
  • the principle is It is an enclosing arc, that is, the forward flow direction is a reverse arc, which can prevent the flow of the liquid after being in contact with the liquid.
  • FIG. 5 is a schematic diagram of the movement of the liquid relative to the choke groove 30. During the flow of the liquid, after encountering the arc of the choke groove 30, the choke groove 30 will generate a relatively large resistance due to the resistance.
  • the existence of the resistance of the launder 30 consumes the internal flow inertia force of the liquid and slows down the flow. Therefore, the addition of the choke 30 in the embodiment of the present application can improve the effect of preventing the flow of silver paste.
  • the arrow direction in Fig. 5 indicates the direction of liquid flow.
  • FIG. 6 is another schematic diagram of the movement of the liquid relative to the choke groove 30.
  • the contact angle between the liquid and the choke groove 30 is mostly in direct contact.
  • the flow force consumed by the flow of the liquid, the choke groove 30 The resistance to liquid flow is improved, and the flow force of the liquid itself is further consumed.
  • the direction of the arrow in Figure 6 indicates the direction of liquid flow.
  • the thickness range of the electrode protection layer 106 is (which is, ), the thickness is The left and right electrode protection layers 106 are thicker and can be In this way, the depth of the indentation of the choke groove 30 is deeper, which improves the effect of preventing the flow of silver paste.
  • the slot size of the baffle groove 30 can be 2-10 ⁇ m, so as to consume the flow force of the silver paste as much as possible.
  • each circuit area includes a baffle 13 as an example.
  • the distance between the cathode welding electrode 12 and the anode welding electrode 11 is about 80um, and the baffle 13 is far away from the base substrate 10.
  • the size of the top of one side is about 5-10um, and the size of the bottom of the side close to the base substrate 10 is about 20um.
  • a plurality of baffles 13 can be set between the cathode welding electrode 12 and the anode welding electrode 11. To maximize the effect of preventing the flow of silver paste.
  • an embodiment of the present application also provides a method for manufacturing a circuit backplane of a display panel.
  • the specific process of the method is described as follows:
  • An electrode protection layer is formed on the layer where the cathode welding electrode 12 and the anode welding electrode 11 are located; wherein the planarization layer has a protruding area between the cathode welding electrode 12 and the anode welding electrode 11, and the protruding area is protected from the electrode
  • the area of the layer above the protruding area constitutes the baffle 13.
  • the buffer layer, the driving circuit, the first insulating layer, the second insulating layer, the gate, and the source and drain are first prepared on the base substrate 10 according to a normal process. Then, the planarization layer is prepared.
  • a half-mask process is used to form the planarization layer on the driving circuit, so that the planarization layer forms a convex area with a height of about 1-2 ⁇ m at a fixed position, on both sides of the fixed position They are used to form the cathode welding electrode 12 and the anode welding electrode 11 respectively, wherein the angle between the protruding area and the base substrate 10 ranges from [50°, 80°] (that is, 50° ⁇ the angle ⁇ 80° ), that is, the angle range between the slope surface of the protruding area facing the cathode welding electrode 12 and the anode welding electrode 11 and the base substrate 10 is [50°, 80°] (ie, 50° ⁇ the included angle ⁇ 80°).
  • an electrode protection layer is formed on the layer where the cathode welding electrode 12 and the anode welding electrode 11 are located, and the thickness of the original electrode protection layer is increased. increase to From left to right, the area where the protruding area and the electrode protection layer are located above the protruding area constitute a baffle 13 to prevent the flow of silver paste as much as possible.
  • an electrode protection layer is formed on the layer where the cathode welding electrode 12 and the anode welding electrode 11 are located, which specifically includes forming a plurality of baffle grooves in the area where the electrode protection layer is located on the slope.
  • the slot size is 2-10 ⁇ m in order to consume the fluidity of the silver paste as much as possible.
  • an embodiment of the present application also provides a display panel.
  • the display panel includes any of the above-mentioned circuit backplanes and a plurality of micro LED light-emitting devices as described in the embodiments of the present application, wherein the anode of each micro LED light-emitting device The and the cathode are respectively fixed to the anode welding electrode 11 and the cathode welding electrode 12 in the corresponding circuit areas in the circuit backplane by silver paste.
  • the implementation of the display panel can refer to the above-mentioned embodiment of the circuit backplane of the display panel, and the repetition will not be repeated.

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Abstract

本公开提供了一种显示面板的电路背板及其制备方法和显示面板。所述显示面板的电路背板包括衬底基板,所述衬底基板上具有多个电路区域,每个所述电路区域包括:位于所述衬底基板上的阴极焊接电极、阳极焊接电极和阻流台;其中,所述阻流台位于所述阴极焊接电极和所述阳极焊接电极之间,所述阻流台在所述电路背板的厚度方向的高度高于所述阴极焊接电极和阳极焊接电极的高度。

Description

一种显示面板的电路背板及其制备方法和显示面板
相关申请的交叉引用
本申请要求于2019年2月28日提交的中国专利申请No.201910149604.5的优先权,该专利申请的全部内容通过引用方式合并于此。
技术领域
本公开涉及显示面板技术领域,特别涉及一种显示面板的电路背板及其制备方法和显示面板。
背景技术
微发光二极管(Light-Emitting Diode,LED)是将LED结构设计进行薄膜化、微小化、阵列化,后将微LED批量式转移至电路背板上,再制作保护层与电极,对电路背板进行封装,相较于相关的OLED技术亮度更高、发光效率更好、且功耗更低。
发明内容
第一方面,本申请实施例提供了一种显示面板的电路背板,该显示面板的电路背板包括衬底基板,所述衬底基板上具有多个电路区域,每个所述电路区域包括:位于所述衬底基板上的阴极焊接电极、阳极焊接电极和阻流台;其中,
所述阻流台位于所述阴极焊接电极和所述阳极焊接电极之间,所述阻流台在所述电路背板的厚度方向的高度高于所述阴极焊接电极和所述阳极焊接电极的高度。
本申请实施例中,电路背板上的阴极焊接电极和阳极焊接电极之间具有阻流台,且阻流台在电路背板的厚度方向的高度高于阴极焊接电极和阳极焊接电极的高度,从而在制作显示面板时,阻流台可以阻止焊接微LED发光器件的阳极和阴极时采用的银浆的流动,以防止因为银浆的流动导致阳极和阴极连通发生短路。
一种可能的实施方式中,每个所述电路区域还包括:位于所述衬底基板之上的驱动电路,位于所述驱动电路与所述阴极焊接电极和所述阳极焊接电极所在层之间的平坦化层,位于所述阴极焊接电极和所述阳极焊接电极所在层之上的电极保护层;
所述阻流台包括所述平坦化层在所述阴极焊接电极和所述阳极焊接电极之间的凸出区域,以及所述电极保护层位于所述凸出区域之上的区域。
本申请实施中,阻流台可以由衬底基板上的平坦化层和电极保护层形成,不需要另外设置,尽量简化制作工艺。
一种可能的实施方式中,所述凸出区域具有分别面向所述阴极焊接电极和所述阳极焊接电极设置的坡面。
本申请实施例中,阻流台分别面向阴极焊接电极和阳极焊接电极设置的坡面,以尽量增加阻止银浆流动的阻力。
一种可能的实施方式中,所述坡面与所述衬底基板之间的夹角范围为[50°,80°]。
本申请实施例中,坡面与衬底基板之间的夹角位于[50°,80°],在保证阻止银浆流动的阻力尽量大的同时,限制阻流台沿衬底基板厚度方向的高度,以便于焊接微LED发光器件。
一种可能的实施方式中,所述电极保护层位于所述坡面之上的区域具有多个阻流槽。
本申请实施例中,电极保护层位于坡面之上的区域可以设置多个阻流槽,进一步阻止银浆的流动。
一种可能的实施方式中,每个所述阻流槽在所述衬底基板上的正投影为圆弧形,且在面向所述阴极焊接电极的坡面上设置的阻流槽的圆弧形圆心指向所述阴极焊接电极,在面向所述阳极焊接电极的坡面上设置的阻流槽的圆弧形圆心指向所述阳极焊接电极。
本申请实施例中,阻流槽可以是在电极保护层面向阴极焊接电极和阳极焊 接电极的位置处设置的凹槽,形成包围状圆弧,以阻止银浆的流动。
一种可能的实施方式中,所述电极保护层的厚度范围为
Figure PCTCN2019128125-appb-000001
本申请实施例中,电极保护层的厚度相较于相关技术的电极保护层适当增厚,可以是
Figure PCTCN2019128125-appb-000002
左右,这样阻流槽内陷的深度就较深,提高了对银浆的流动的阻止效果。
第二方面,本申请实施例提供了一种显示面板的电路背板的制备方法,该制备方法包括:
在衬底基板上的各电路区域形成驱动电路;
在所述驱动电路上采用半掩膜工艺形成平坦化层;
在所述平坦化层上形成阴极焊接电极和阳极焊接电极;
在所述阴极焊接电极和阳极焊接电极的所在层之上形成电极保护层;其中,
所述平坦化层在所述阴极焊接电极和所述阳极焊接电极之间具有凸出区域,所述凸出区域与所述电极保护层位于所述凸出区域之上的区域构成阻流台。
一种可能的实施方式中,在所述阴极焊接电极和阳极焊接电极的所在层之上形成电极保护层,具体包括:
所述凸出区域具有分别面向所述阴极焊接电极和所述阳极焊接电极设置的坡面;在所述电极保护层位于所述坡面之上的区域形成多个阻流槽。
第三方面,本申请实施例提供了一种显示面板,该显示面板包括如第一方面所述的电路背板以及多个微LED发光器件,其中,各所述微LED发光器件的阳极和阴极分别通过银浆固定于所述电路背板中对应的各电路区域中的阳极焊接电极和阴极焊接电极。
附图说明
图1为本申请实施例提供的显示面板的电路背板的一种结构示意图;
图2为本申请实施例提供的显示面板的电路背板的一种结构示意图;
图3为本申请实施例提供的显示面板的电路背板的一种结构示意图;
图4为本申请实施例提供的显示面板的电路背板的一种结构示意图;
图5为本申请实施例提供的显示面板的电路背板的一种结构示意图;
图6为本申请实施例提供的显示面板的电路背板的一种结构示意图;
图7为本申请实施例提供的显示面板的电路背板的制备方法的流程示意图。
具体实施方式
为使本公开的目的、技术方案和优点更加清楚明白,下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述。应当理解,下面所描述的示例性实施例仅用于说明和解释本公开,并不用于限定本公开。并且在不冲突的情况下,本申请中的实施例及实施例中的特征可以相互组合。需要注意的是,附图中各层厚度和形状不反映真实比例,目的只是示意说明本公开内容。并且自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。
本公开的发明人发现,在微LED整体制作过程中,电路背板制作完成后需要与微LED进行绑定。因此,将微LED芯片焊接到电路背板,例如薄膜晶体管(Thin Film Transistor,TFT)背板是一个重要环节。目前将微LED芯片焊接到TFT背板通过回流焊接实现,回流焊接所用粘结剂为银胶。由于银胶的流动性较好,焊接过程中银浆会流动到阴极和阳极之间,可能会连通阴极和阳极,导致出现短路。因此,期望提供一种显示面板的电路背板及其制备方法和显示面板,用于解决相关技术中显示面板的电路背板和LED的绑定过程中容易出现短路的问题。
鉴于此,本申请实施例提供了一种显示面板的电路背板,可以阻止银浆的流动,避免连通微LED的阴极和阳极。
下面结合附图,对本申请实施例提供的显示面板的电路背板及其制备方法和显示面板的具体实施方式进行详细地说明。附图中各膜层的厚度和形状不反映真实比例,目的只是示意说明本公开内容。
本申请实施例提供了一种显示面板的电路背板,请参见图1,图1为电路基板沿厚度方向的截面示意图。本申请实施例提供的电路背板包括衬底基板10, 该衬底基板10上具有多个电路区域,多个电路区域中的每个电路区域包括位于衬底基板10上的阴极焊接电极12、阳极焊接电极11和阻流台13,图1以一个电路区域为例。
其中,每个电路区域的阻流台13位于阴极焊接电极12和阳极焊接电极11之间,阻流台13在电路背板的厚度方向的高度高于阴极焊接电极12和阳极焊接电极11的高度,从而可以阻止将微LED发光器件焊接在电路背板的过程中,焊接剂即银浆在阳极和阴极之间流动,以防止因为银浆的流动导致阳极和阴极连通发生短路。可能的实施方式中,阻流台13位于阴极焊接电极12和阳极焊接电极11的中间位置,以使得对分别从阴极焊接电极12和阳极焊接电极11流过来的银浆的阻流效果尽量相同。阻流台13在电路背板的厚度方向的高度位于[1um,2um]之间(即,1um≤该高度≤2um),低于微LED发光器件的阳极和阴极的长度,既可以阻止银浆的流动,又不影响微LED发光器件的焊接。
具体地,请参见图2,每个电路区域还包括位于衬底基板10之上的驱动电路20,位于驱动电路20与阴极焊接电极12和阳极焊接电极11所在层之间的平坦化(PLN)层,位于阴极焊接电极12和阳极焊接电极11所在层之上的电极保护层106,例如PVX层,当然每个电路区域还包括显示面板的电路背板其他必备的膜层,例如位于衬底基板10上依次层叠的缓存层101、第一绝缘层102、第二绝缘层103和介质层104,其中,介质层104上具有源极203和漏极204,第一绝缘层102和第二绝缘层103分别设置有栅极(201/202),其中,驱动电路20位于缓存层101远离衬底基板10一侧。
一种可能的实施方式中,本申请实施例中的阻流台13包括平坦化层105在阴极焊接电极12和阳极焊接电极11之间的凸出区域,和电极保护层106位于凸出区域之上的区域,这样制作平坦化层105时,就可以形成阻流台13,不需要设置另外单独设置阻流台13,以尽量简化制作工艺。
请继续参见图2,阻流台13也就是凸出区域具有分别面向阴极焊接电极12和阳极焊接电极11设置的坡面,使得阻流台13在电路背板的厚度方向的截 面形状包括梯形,以尽量增加阻止银浆流动的阻力。
可能的实施方式中,坡面与衬底基板10之间的夹角α较小,那么阻流台13在电路背板的厚度方向的高度较低,阻止银浆流动的效果较差,而如果α较大,阻流台13在电路背板的厚度方向的高度较高,可能高于微LED发光器件的阴极和阳极的高度,增加了焊接微LED发光器件的难度。因此本申请实施例中,坡面与衬底基板10之间的夹角α位于[50°,80°]范围内(即,50°≤α≤80°),在保证阻止银浆流动的阻力尽量大的同时,限制阻流台13沿衬底基板10厚度方向的高度,以便于焊接微LED发光器件。
为了进一步增强对银浆流动的阻止效果,本申请实施例在位于坡面之上的区域的电极保护层106上设置了多个阻流槽30,如图3所示。
具体地,请参见图4,可能的实施方式中,多个阻流槽30中的每个阻流槽30在衬底基板10上的正投影为圆弧形,且在面向阴极焊接电极12的坡面上设置的阻流槽30的圆弧形圆心指向阴极焊接电极12,在面向阳极焊接电极11的坡面上设置的阻流槽30的圆弧形圆心指向阳极焊接电极11。图4中,虚线分别为阻流台远离衬底基板的顶部和靠近衬底基板的底部在衬底基板上的投影。
本申请实施例中,阻流槽30可以是在电极保护层106面向阴极焊接电极12和阳极焊接电极11的位置处设置的凹槽,形成包围状圆弧,以阻止银浆的流动,其原理是包围状圆弧即迎流方向为反向弧形,与液体接触后可以阻止液体的流动。具体地,请参见图5,图5为液体相对阻流槽30的运动示意图,液体在流动过程中,遇到阻流槽30的圆弧后,阻流槽30将产生较大阻力,因阻流槽30阻力的存在消耗液体内部流动惯性力,减缓流动,所以本申请实施例中阻流槽30的增设可以提高对银浆的流动的阻止效果。图5中箭头方向表示液体流动方向。
进一步地,请参见图6,图6为液体相对阻流槽30的另一运动示意图,液体与阻流槽30的接触角多为直接接触,此时液体流动消耗的流动力,阻流槽 30提高了对液体流动的阻力,进一步消耗了液体本身的流动力。图6中箭头方向表示液体流动方向。
一种可能的实施方式中,电极保护层106的厚度范围为
Figure PCTCN2019128125-appb-000003
(即,
Figure PCTCN2019128125-appb-000004
),相较于相关技术中厚度是
Figure PCTCN2019128125-appb-000005
左右的电极保护层106更加厚,可以是
Figure PCTCN2019128125-appb-000006
左右,这样阻流槽30内陷的深度就较深,提高了对银浆流动的阻止效果。可选的,阻流槽30的开槽尺寸可以位于2-10μm,以尽量消耗银浆流动的流动力。
本申请上述实施例中,以每个电路区域包括一个阻流台13为例,实际中,阴极焊接电极12和阳极焊接电极11之间的距离约为80um,阻流台13远离衬底基板10一侧的顶部尺寸约为5-10um,靠近衬底基板10一侧的底部尺寸约为20um左右,可选的,阴极焊接电极12和阳极焊接电极11之间可以设置多个阻流台13,以尽量提高对银浆流动的阻止效果。
请参见图7,基于同一发明思想,本申请实施例还提供了一种显示面板的电路背板的制备方法,该制备方法的具体流程描述如下:
S701、在衬底基板10上的各电路区域形成驱动电路;
S702、在驱动电路上采用半掩膜工艺形成平坦化层;
S703、在平坦化层上形成阴极焊接电极12和阳极焊接电极11;
S704、在阴极焊接电极12和阳极焊接电极11的所在层之上形成电极保护层;其中,平坦化层在阴极焊接电极12和阳极焊接电极11之间具有凸出区域,凸出区域与电极保护层位于凸出区域之上的区域构成阻流台13。
本申请实施例在制备显示面板的电路背板时,首先按照正常工艺在衬底基板10上制备缓存层、驱动电路、第一绝缘层、第二绝缘层、栅极,以及源极和漏极,之后进行平坦化层的制备,具体地在驱动电路上采用半掩膜工艺形成平坦化层,使得平坦化层在固定位置处形成高度约为1-2μm的凸出区域,该固定位置两侧分别用于形成阴极焊接电极12和阳极焊接电极11,其中,凸出区域与衬底基板10之间的夹角范围为[50°,80°](即,50°≤该夹角≤80°), 也就是凸出区域面向阴极焊接电极12和阳极焊接电极11设置的坡面与衬底基板10之间的夹角范围为[50°,80°](即,50°≤该夹角≤80°)。
凸出区域形成后,在阴极焊接电极12和阳极焊接电极11的所在层之上形成电极保护层,将原有电极保护层的厚度增厚,由相关技术中的
Figure PCTCN2019128125-appb-000007
增加至
Figure PCTCN2019128125-appb-000008
左右,这样凸出区域与电极保护层位于凸出区域之上的区域构成阻流台13,以尽量阻止银浆的流动。
可能的实施方式中,在阴极焊接电极12和阳极焊接电极11的所在层之上形成电极保护层,具体包括在电极保护层位于坡面之上的区域形成多个阻流槽,阻流槽的开槽尺寸为2-10μm,以尽量消耗银浆流动的流动力。该显示面板的电路背板的制备方法中形成的电路背板结构可以参见上述显示面板的电路背板的实施例,重复之处不再赘述。
基于同一发明思想,本申请实施例还提供了一种显示面板,该显示面板包括如本申请实施例上述的任一电路背板以及多个微LED发光器件,其中,各微LED发光器件的阳极和阴极分别通过银浆固定于电路背板中对应的各电路区域中的阳极焊接电极11和阴极焊接电极12。该显示面板的实施可以参见上述显示面板的电路背板的实施例,重复之处不再赘述。
显然,本领域的技术人员可以对本公开进行各种改动和变型而不脱离本公开的精神和范围。这样,倘若本公开的这些修改和变型属于如所附的权利要求及其等同技术所限定的本公开的范围,则本公开也意图包含这些改动和变型在内。

Claims (10)

  1. 一种显示面板的电路背板,包括衬底基板,所述衬底基板上具有多个电路区域,每个所述电路区域包括:位于所述衬底基板上的阴极焊接电极、阳极焊接电极和阻流台;其中,
    所述阻流台位于所述阴极焊接电极和所述阳极焊接电极之间,所述阻流台在所述电路背板的厚度方向的高度高于所述阴极焊接电极和所述阳极焊接电极的高度。
  2. 如权利要求1所述的电路背板,其中,每个所述电路区域还包括:位于所述衬底基板之上的驱动电路,位于所述驱动电路与所述阴极焊接电极和所述阳极焊接电极所在层之间的平坦化层,位于所述阴极焊接电极和所述阳极焊接电极所在层之上的电极保护层;
    所述阻流台包括所述平坦化层在所述阴极焊接电极和所述阳极焊接电极之间的凸出区域,以及所述电极保护层位于所述凸出区域之上的区域。
  3. 如权利要求2所述的电路背板,其中,所述凸出区域具有分别面向所述阴极焊接电极和所述阳极焊接电极设置的坡面。
  4. 如权利要求3所述的电路背板,其中,所述坡面与所述衬底基板之间的夹角范围为[50°,80°]。
  5. 如权利要求2-4任一所述的电路背板,其中,所述电极保护层位于所述坡面之上的区域具有多个阻流槽。
  6. 如权利要求5所述的电路背板,其中,每个所述阻流槽在所述衬底基板上的正投影为圆弧形,且在面向所述阴极焊接电极的坡面上设置的阻流槽的圆弧形圆心指向所述阴极焊接电极,在面向所述阳极焊接电极的坡面上设置的阻流槽的圆弧形圆心指向所述阳极焊接电极。
  7. 如权利要求5所述的电路背板,其中,所述电极保护层的厚度范围为
    Figure PCTCN2019128125-appb-100001
  8. 一种显示面板的电路背板的制备方法,包括:
    在衬底基板上的各电路区域形成驱动电路;
    在所述驱动电路上采用半掩膜工艺形成平坦化层;
    在所述平坦化层上形成阴极焊接电极和阳极焊接电极;
    在所述阴极焊接电极和阳极焊接电极的所在层之上形成电极保护层;其中,
    所述平坦化层在所述阴极焊接电极和所述阳极焊接电极之间具有凸出区域,所述凸出区域与所述电极保护层位于所述凸出区域之上的区域构成阻流台。
  9. 如权利要求8所述的制备方法,其中,在所述阴极焊接电极和阳极焊接电极的所在层之上形成电极保护层,具体包括:
    所述凸出区域具有分别面向所述阴极焊接电极和所述阳极焊接电极设置的坡面;在所述电极保护层位于所述坡面之上的区域形成多个阻流槽。
  10. 一种显示面板,包括如权利要求1-7任一所述的电路背板以及多个微LED发光器件,其中,各所述微LED发光器件的阳极和阴极分别通过银浆固定于所述电路背板中对应的各电路区域中的阳极焊接电极和阴极焊接电极。
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