WO2020133714A1 - Panneau d'affichage et module d'affichage, et dispositif électronique - Google Patents

Panneau d'affichage et module d'affichage, et dispositif électronique Download PDF

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Publication number
WO2020133714A1
WO2020133714A1 PCT/CN2019/077909 CN2019077909W WO2020133714A1 WO 2020133714 A1 WO2020133714 A1 WO 2020133714A1 CN 2019077909 W CN2019077909 W CN 2019077909W WO 2020133714 A1 WO2020133714 A1 WO 2020133714A1
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WO
WIPO (PCT)
Prior art keywords
electrode
layer
insulating layer
display panel
film transistor
Prior art date
Application number
PCT/CN2019/077909
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English (en)
Chinese (zh)
Inventor
范英春
张晓星
Original Assignee
深圳市华星光电半导体显示技术有限公司
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Publication of WO2020133714A1 publication Critical patent/WO2020133714A1/fr

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors

Definitions

  • the present application relates to the field of display, in particular to a display panel, a display module, and an electronic device.
  • OLED Organic Light-Emitting Diode
  • the present application provides a display panel, a display module, and an electronic device to solve the technical problem of low opening ratio of the existing display panel.
  • This application provides a display panel, which includes:
  • An array substrate including a substrate, and thin film transistor units and storage capacitors on the substrate;
  • the orthographic projection surface of the storage capacitor on the light emitting device layer partially overlaps with the light emitting device layer
  • the structure of the film layer in the storage capacitor is made of a transparent material.
  • the storage capacitor includes a first electrode on the substrate, a multilayer insulating layer on the first electrode, and a fourth electrode on the multilayer insulating layer;
  • the first electrode, the fourth electrode, and the multilayer insulating layer are made of transparent materials.
  • the first electrode and the light shielding layer in the thin film transistor unit are arranged in the same layer;
  • the fourth electrode is arranged in the same layer as the source and drain in the thin film transistor unit;
  • the fourth electrode is electrically connected to the source and drain of the thin film transistor unit
  • the first electrode and the fourth electrode form the storage capacitor of the display panel.
  • the display panel further includes a first via
  • the first via is located on the fourth electrode
  • the anode layer in the light emitting device layer is electrically connected to the fourth electrode through the first via hole.
  • the display panel further includes a first via
  • the first via is located on the source and drain
  • the anode layer in the light emitting device layer is electrically connected to the source and drain through the first via.
  • the storage capacitor includes a first electrode on the substrate, a first insulating layer on the first electrode, a second electrode on the first insulating layer, and a second electrode on the second electrode Three insulating layers and a fourth electrode on the third insulating layer;
  • the first electrode, the second electrode, the fourth electrode, the first insulating layer, and the third insulating layer are made of transparent materials.
  • the first electrode and the light shielding layer in the thin film transistor unit are arranged in the same layer;
  • the second electrode is arranged in the same layer as the active layer in the thin film transistor unit;
  • the fourth electrode is arranged in the same layer as the source and drain in the thin film transistor unit;
  • the fourth electrode is electrically connected to the source and drain of the thin film transistor unit.
  • the first electrode and the light shielding layer in the thin film transistor unit are arranged in the same layer;
  • the second electrode and the gate in the thin film transistor unit are arranged in the same layer;
  • the fourth electrode is arranged in the same layer as the source and drain in the thin film transistor unit;
  • the fourth electrode is electrically connected to the source and drain of the thin film transistor unit.
  • the first electrode and the second electrode form a first capacitor of the display panel
  • the second electrode and the fourth electrode form a second capacitor of the display panel.
  • the storage capacitor includes a first electrode on the substrate, a first insulating layer on the first electrode, a second electrode on the first insulating layer, and a second electrode on the second electrode Two insulating layers, and a third electrode on the second insulating layer, a third insulating layer on the third electrode, and a fourth electrode on the third insulating layer;
  • the first electrode, the second electrode, the third electrode, the fourth electrode, the first insulating layer, the second insulating layer, and the third insulating layer are made of a transparent material.
  • the first electrode and the light shielding layer in the thin film transistor unit are arranged in the same layer;
  • the second electrode is arranged in the same layer as the active layer in the thin film transistor unit;
  • the third electrode and the gate in the thin film transistor unit are arranged in the same layer;
  • the fourth electrode is arranged in the same layer as the source and drain in the thin film transistor unit;
  • the fourth electrode is electrically connected to the source and drain of the thin film transistor unit.
  • the first electrode and the second electrode form a first capacitor of the display panel
  • the second electrode and the third electrode form a second capacitor of the display panel
  • the third electrode and the fourth electrode form a third capacitor of the display panel.
  • the present application also proposes a display module, wherein the display module includes a display panel, a polarizing layer and a cover layer on the display panel,
  • the display panel includes:
  • An array substrate including a substrate, and thin film transistor units and storage capacitors on the substrate;
  • the orthographic projection surface of the storage capacitor on the light emitting device layer partially overlaps with the light emitting device layer
  • the structure of the film layer in the storage capacitor is made of a transparent material.
  • the storage capacitor includes a first electrode on the substrate, a multilayer insulating layer on the first electrode, and a fourth electrode on the multilayer insulating layer;
  • the first electrode, the fourth electrode, and the multilayer insulating layer are made of transparent materials.
  • the storage capacitor includes a first electrode on the substrate, a first insulating layer on the first electrode, a second electrode on the first insulating layer, and a second electrode on the second electrode Three insulating layers and a fourth electrode on the third insulating layer;
  • the first electrode, the second electrode, the fourth electrode, the first insulating layer, and the third insulating layer are made of transparent materials.
  • the storage capacitor includes a first electrode on the substrate, a first insulating layer on the first electrode, a second electrode on the first insulating layer, and a second electrode on the second electrode Two insulating layers, and a third electrode on the second insulating layer, a third insulating layer on the third electrode, and a fourth electrode on the third insulating layer;
  • the first electrode, the second electrode, the third electrode, the fourth electrode, the first insulating layer, the second insulating layer, and the third insulating layer are made of a transparent material.
  • This application also proposes an electronic device, wherein,
  • the electronic device includes a display module.
  • the display module includes a display panel and a polarizing layer and a cover layer on the display panel.
  • the display panel includes:
  • An array substrate including a substrate, and thin film transistor units and storage capacitors on the substrate;
  • the orthographic projection surface of the storage capacitor on the light emitting device layer partially overlaps with the light emitting device layer
  • the structure of the film layer in the storage capacitor is made of a transparent material.
  • the storage capacitor includes a first electrode on the substrate, a multilayer insulating layer on the first electrode, and a fourth electrode on the multilayer insulating layer;
  • the first electrode, the fourth electrode, and the multilayer insulating layer are made of transparent materials.
  • the storage capacitor includes a first electrode on the substrate, a first insulating layer on the first electrode, a second electrode on the first insulating layer, and a second electrode on the second electrode Three insulating layers and a fourth electrode on the third insulating layer;
  • the first electrode, the second electrode, the fourth electrode, the first insulating layer, and the third insulating layer are made of transparent materials.
  • the storage capacitor includes a first electrode on the substrate, a first insulating layer on the first electrode, a second electrode on the first insulating layer, and a second electrode on the second electrode Two insulating layers, and a third electrode on the second insulating layer, a third insulating layer on the third electrode, and a fourth electrode on the third insulating layer;
  • the first electrode, the second electrode, the third electrode, the fourth electrode, the first insulating layer, the second insulating layer, and the third insulating layer are made of a transparent material.
  • the present application uses transparent materials to fabricate the storage capacitor area of the array substrate, and a light-emitting device layer is provided on the storage capacitor to increase the aperture ratio of the display panel and improve the display effect of the display panel.
  • Figure 1 is the first structural diagram of the display panel of this application.
  • FIG. 2 is a second structural diagram of the display panel of the present application.
  • FIG. 3 is a third structural diagram of the display panel of this application.
  • FIG. 4 is a fourth structural diagram of the display panel of the present application.
  • 5 is a fifth structural diagram of the display panel of the present application.
  • FIG. 1 is the first structural diagram of the display panel of the present application.
  • the display panel 100 includes:
  • An array substrate including a substrate 101, a thin film transistor layer 200 on the substrate 101, and a light emitting device layer 300 on the thin film transistor layer 200.
  • the thin film transistor layer 200 includes a thin film transistor unit 10, a storage capacitor 20, and a switch unit (not shown).
  • the light-opening unit is not specifically discussed in this application.
  • the orthographic projection surface of the storage capacitor 20 on the light emitting device layer 300 partially overlaps with the light emitting device layer 300.
  • the film structure in the storage capacitor 20 is made of a transparent material.
  • the raw material of the substrate 101 may be one of a glass substrate, a quartz substrate, a resin substrate, and the like.
  • the substrate 101 may also be a flexible substrate.
  • the material of the flexible substrate may be PI (polyimide).
  • the thin film transistor unit 10 includes an ESL (etch barrier layer type), BCE (back channel etch type) or Top-gate (top gate thin film transistor type) structure, which is not specifically limited. This application takes the top gate thin film transistor type as an example for description.
  • the thin film transistor unit 10 includes a light-shielding layer 102, a buffer layer 103, an active layer 104, a gate insulating layer 105, a gate 106, an inter-insulating layer 107, a source and drain 108, a passivation layer 109, and a planarization layer 110.
  • the light-shielding layer 102 is formed on the substrate 101 and is mainly used to block the light source for the thin film transistor unit 10 and affect the driving effect of the thin film transistor.
  • the buffer layer 103 is formed on the light-shielding layer 102 and is mainly used to buffer the pressure between the layer structures of the film, and may also have a certain function of blocking water and oxygen.
  • the active layer 104 is formed on the buffer layer 103.
  • the active layer 104 includes ion-doped doped regions (not shown).
  • the material of the active layer 104 may be indium gallium zinc oxide (IGZO), which is a conductive semiconductor, and also a transparent material.
  • IGZO indium gallium zinc oxide
  • the gate insulating layer 105 is formed on the active layer 104.
  • the gate insulating layer 105 covers the active layer 104.
  • the interlayer insulating layer 107 is used to isolate the active layer 104 from other metal layers.
  • the gate 106 is formed on the gate insulating layer 105.
  • the metal material of the gate 105 may generally be a metal such as molybdenum, aluminum, aluminum-nickel alloy, molybdenum-tungsten alloy, chromium, or copper, or a combination of the foregoing metal materials.
  • the metal material of the gate 106 may be molybdenum.
  • the interlayer insulating layer 107 is formed on the gate 106.
  • the interlayer insulating layer 107 covers the gate 106.
  • the interlayer insulating layer 107 is mainly used to isolate the gate 106 from the source and drain 108;
  • the source and drain 108 are formed on the inter-insulating layer 107.
  • the metal material of the source and drain 108 may generally be molybdenum, aluminum, aluminum-nickel alloy, molybdenum-tungsten alloy, chromium, copper, or titanium aluminum alloy, or a combination of the foregoing metal materials.
  • the source and drain 108 are electrically connected to the doped region on the active layer 104 through the second via 115.
  • the metal material of the source and drain 108 may be titanium aluminum titanium.
  • the passivation layer 109 and the planarization layer 110 are formed on the source and drain 108.
  • the passivation layer 109 is used to ensure the flatness of the thin film transistor process.
  • the light emitting device layer includes an anode layer 111, a light emitting layer 112, and a cathode layer 113 formed on the array substrate;
  • the anode layer 111 is formed on the flat layer 110.
  • the anode layer 111 is mainly used to provide holes for absorbing electrons.
  • the light emitting device is a bottom-emission type OLED device, so the image anode layer 111 is a transparent metal electrode.
  • the material of the anode layer 111 may be indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO) ) Or at least one of zinc oxide aluminum (AZO);
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • ZnO zinc oxide
  • In2O3 indium oxide
  • IGO indium gallium oxide
  • AZO zinc oxide aluminum
  • the light emitting layer 112 is formed on the anode layer 111.
  • the light-emitting layer 112 is divided into a plurality of light-emitting units by the pixel definition layer 114.
  • the cathode layer 113 is formed on the light-emitting layer 112.
  • the cathode layer 113 covers the light-emitting layer 112 and the pixel definition layer 114 on the array substrate.
  • the cathode layer 113 may be a non-transparent material or a transparent material.
  • the cathode layer 113 is a non-transparent material, light generated by the light-emitting layer 112 passes through the cathode layer 113 and is projected toward the substrate 101.
  • a reflective layer may be provided on the cathode layer 113 so that the light transmitted through the cathode layer 113 is projected toward the substrate 101.
  • the storage capacitor 20 includes a first electrode 201 on the substrate 101, a multilayer insulating layer on the first electrode 201, and a fourth electrode 207 on the multilayer insulating layer .
  • the first electrode 201, the fourth electrode 207, and the multilayer insulating layer are made of a transparent material.
  • the first electrode 201 and the light shielding layer 102 in the thin film transistor unit 10 are disposed in the same layer.
  • the first electrode 201 and the light shielding layer 102 are formed in different mask processes.
  • the fourth electrode 207 and the source and drain 108 in the thin film transistor unit 10 are disposed in the same layer.
  • the fourth electrode 207 is electrically connected to the source and drain 108 of the thin film transistor unit 10.
  • the fourth electrode 207 and the source/drain 108 are formed in different mask processes.
  • the first electrode 201 and the fourth electrode 207 form the storage capacitor 20 of the display panel 100.
  • the multilayer insulation layer is the buffer layer 103 and the interlayer insulation layer 107 in the thin film transistor unit 10.
  • the storage capacitor 20 further includes a third via 208.
  • the first electrode 201 is electrically connected to the fourth electrode 207 through the third via 208.
  • the third via 208 penetrates the inter-insulation layer 107 and the buffer layer 103.
  • the thin film transistor unit 10 Since the thin film transistor unit 10 is affected by light and reduces the performance of the thin film transistor, the thin film transistor unit 10 needs to be provided with a light shielding layer 102 to prevent the influence of the external light source on the thin film transistor unit 10.
  • the first electrode 201, the second electrode 203, and the buffer layer 103 between the first electrode 201 and the second electrode 203 are
  • the inter-insulation layer 107 is made of transparent material.
  • the display panel 100 further includes a first via 116.
  • the first via 116 is located on the fourth electrode 207.
  • the anode layer 111 in the light emitting device layer 300 is electrically connected to the fourth electrode 207 through the first via 116.
  • FIG. 2 is a second structural diagram of the display panel 100 of the present application.
  • the first via 116 is located on the source and drain 108.
  • the anode layer 111 in the light emitting device layer 300 is electrically connected to the source and drain 108 through the first via 116.
  • FIG. 3 is a third structural diagram of the display panel 100 of the present application.
  • the storage capacitor 20 includes a first electrode 201 on the substrate 101, a first insulating layer 202 on the first electrode 201, a second electrode 203 on the first insulating layer 202, The second insulating layer 204 on the second electrode 203 and the fourth electrode 207 on the second insulating layer 204.
  • the first electrode 201, the second electrode 203, the fourth electrode 207, the first insulating layer 202, and the second insulating layer 204 are made of a transparent material.
  • the first electrode 201 and the light shielding layer 102 in the thin film transistor unit 10 are disposed in the same layer.
  • the structure of the first electrode 201 is the same as that in FIGS. 1 and 2, and details are not described in detail.
  • the second electrode 203 is disposed in the same layer as the active layer 104 in the thin film transistor unit 10.
  • the second electrode 203 and the active layer 104 are formed in the same photomask process.
  • the material of the second electrode 203 and the active layer 104 are the same.
  • the material of the second electrode 203 is indium gallium zinc oxide (IGZO).
  • the first insulating layer 202 and the buffer layer 103 are disposed in the same layer.
  • the first insulating layer 202 and the buffer layer 103 are formed in the same photomask process.
  • the second insulating layer 204 and the inter-insulating layer 107 are provided in the same layer.
  • the second insulating layer 204 and the inter-insulating layer 107 are formed in the same mask process.
  • the fourth electrode 207 and the source and drain 108 in the thin film transistor unit 10 are disposed in the same layer.
  • the fourth electrode 207 is electrically connected to the source and drain 108 of the thin film transistor unit 10.
  • the structure of the fourth electrode 207 is the same as FIG. 1 and FIG. 2, and the details are not described in detail.
  • the first electrode 201 and the second electrode 203 form a first capacitor of the display panel 100.
  • the second electrode 203 and the fourth electrode 207 form a second capacitor of the display panel 100.
  • the first capacitor and the second capacitor are arranged in parallel to increase the capacitance of the storage capacitor 20 of the display panel 100, which can meet the panel's demand for high capacitance at high resolution.
  • the configuration of the first via 116 is the same as that in FIGS. 1 and 2, and details are not described in detail.
  • FIG. 4 is a fourth structural diagram of the display panel 100 of the present application.
  • This embodiment is the same as or similar to that in FIG. 3, except for:
  • the second electrode 203 is provided in the same layer as the gate electrode 106 in the thin film transistor unit 10.
  • the second electrode 203 and the gate electrode 106 are formed in the same photomask process.
  • the display panel 100 further includes a first via 116.
  • connection method of the first via 116 is the same as that in FIG. 1 and FIG. 2, and details are not described in detail.
  • FIG. 5 is a fifth structural diagram of the display panel 100 of the present application.
  • the storage capacitor 20 includes a first electrode 201 on the substrate 101, a first insulating layer 202 on the first electrode 201, a second electrode 203 on the first insulating layer 202, A second insulating layer 204 on the second electrode 203, a third electrode 205 on the second insulating layer 204, a third insulating layer 206 on the third electrode 205, and a third insulating layer
  • the fourth electrode 207 on the insulating layer 206.
  • the first electrode 201, the second electrode 203, the third electrode 205, the fourth electrode 207, the first insulating layer 202, the second insulating layer 204, and the third insulating layer 206 is made of transparent material.
  • the first electrode 201 and the light shielding layer 102 in the thin film transistor unit 10 are disposed in the same layer.
  • the second electrode 203 is disposed in the same layer as the active layer 104 in the thin film transistor unit 10.
  • the third electrode 205 and the gate electrode 106 in the thin film transistor unit 10 are disposed in the same layer.
  • the fourth electrode 207 and the source and drain 108 in the thin film transistor unit 10 are disposed in the same layer.
  • the fourth electrode 207 is electrically connected to the source and drain 108 of the thin film transistor unit 10.
  • the first electrode 201 and the second electrode 203 form a first capacitor of the display panel 100.
  • the second electrode 203 and the third electrode 205 form a second capacitor of the display panel 100.
  • the third electrode 205 and the fourth electrode 207 form a third capacitor of the display panel 100.
  • the first capacitor, the second capacitor, and the third capacitor are arranged in parallel to increase the capacitance of the storage capacitor 20 of the display panel 100, which can meet the panel's demand for high capacitance at high resolution.
  • the storage capacitor 20 located under the opening area of the display panel 100 is made of a transparent material.
  • the light emitted by the light emitting layer located in the opening area passes through the storage capacitor 20 and enters the outside world.
  • the opening area corresponding to the storage capacitor 20 is increased, the opening ratio of the display panel 100 is increased, and the display effect of the display panel 100 is improved.
  • any two or three of the first electrode 201, the second electrode 203, the third electrode 205, and the fourth electrode 207 may be combined to form the storage capacitor 20, Such embodiments will not be repeated in this application.
  • the present application also proposes a display module including the above-mentioned display panel, and a polarizing layer and a cover layer on the display panel.
  • the working principle of the display module is the same as or similar to that of the display panel, and the details are not repeated here.
  • the present application also proposes an electronic device including the above display and display module.
  • the working principle of the electronic device is the same as or the same as that of the display module, and the details are not repeated here.
  • the electronic device includes but is not limited to mobile phones, tablet computers, computer monitors, game consoles, televisions, display screens, wearable devices, and other household appliances or household appliances with display functions.
  • the present application proposes a display panel, a display module, and an electronic device.
  • the display panel includes an array substrate, including a substrate, and a thin film transistor unit and a storage capacitor on the substrate; a light emitting device on the array substrate
  • the storage capacitor has an orthographic projection surface on the light-emitting device layer partially overlapping with the light-emitting device layer; the structure of the film layer in the storage capacitor is made of a transparent material.
  • the present application uses transparent materials to fabricate the storage capacitor area of the array substrate, and a light-emitting device layer is provided on the storage capacitor to increase the aperture ratio of the display panel and improve the display effect of the display panel.

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  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

L'invention concerne un panneau d'affichage et un module d'affichage, et un dispositif électronique. Le panneau d'affichage (100) comprend : un substrat de matrice, comprenant un substrat (101), et une unité de transistor à couche mince (10) et un condensateur accumulateur (20) situés sur le substrat (101) ; et une couche de dispositif électroluminescent (300) située sur le substrat de matrice, le plan de projection orthographique du condensateur accumulateur (20) sur la couche de dispositif électroluminescent (300) recouvrant partiellement la couche de dispositif électroluminescent (300), et la structure de pellicule dans le condensateur accumulateur (20) étant constituée d'un matériau transparent.
PCT/CN2019/077909 2018-12-28 2019-03-13 Panneau d'affichage et module d'affichage, et dispositif électronique WO2020133714A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201811627052.6A CN109585520B (zh) 2018-12-28 2018-12-28 显示面板及显示模组、电子装置
CN201811627052.6 2018-12-28

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Publication Number Publication Date
WO2020133714A1 true WO2020133714A1 (fr) 2020-07-02

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CN110943112B (zh) * 2019-11-26 2022-07-29 深圳市华星光电半导体显示技术有限公司 一种阵列基板及其制备方法、显示面板
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CN111580304B (zh) * 2020-05-06 2021-09-24 Tcl华星光电技术有限公司 背光模组、显示面板及电子装置
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CN113224120A (zh) * 2021-04-29 2021-08-06 深圳市华星光电半导体显示技术有限公司 显示面板及其制备方法

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