WO2020125342A1 - 一种压电滤波器及电子设备 - Google Patents

一种压电滤波器及电子设备 Download PDF

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Publication number
WO2020125342A1
WO2020125342A1 PCT/CN2019/121004 CN2019121004W WO2020125342A1 WO 2020125342 A1 WO2020125342 A1 WO 2020125342A1 CN 2019121004 W CN2019121004 W CN 2019121004W WO 2020125342 A1 WO2020125342 A1 WO 2020125342A1
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Prior art keywords
heat conduction
substrate
series resonators
resonator
piezoelectric filter
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PCT/CN2019/121004
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English (en)
French (fr)
Inventor
庞慰
郑云卓
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天津大学
诺思(天津)微系统有限责任公司
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Publication of WO2020125342A1 publication Critical patent/WO2020125342A1/zh

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/02007Details of bulk acoustic wave devices
    • H03H9/02047Treatment of substrates
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/05Holders; Supports
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/05Holders; Supports
    • H03H9/0538Constructional combinations of supports or holders with electromechanical or other electronic elements
    • H03H9/0547Constructional combinations of supports or holders with electromechanical or other electronic elements consisting of a vertical arrangement
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/46Filters
    • H03H9/64Filters using surface acoustic waves
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/46Filters
    • H03H9/64Filters using surface acoustic waves
    • H03H9/6423Means for obtaining a particular transfer characteristic
    • H03H9/6433Coupled resonator filters
    • H03H9/644Coupled resonator filters having two acoustic tracks
    • H03H9/6456Coupled resonator filters having two acoustic tracks being electrically coupled

Definitions

  • Embodiments of the present invention relate to a filter device for communication, and in particular, to a filter having an improved heat conduction structure, and an electronic device having the filter.
  • the small size filters that can meet the requirements of communication terminals are mainly piezoelectric acoustic wave filters.
  • the resonators that constitute such acoustic wave filters mainly include: FBAR (Film Bulk Acoustic Resonator), SMR (Solidly Mounted) Resonator, solid state assembly resonator) and SAW (Surface Acoustic Wave, surface acoustic wave resonator).
  • FBAR and SMR filters manufactured based on the principle of bulk acoustic waves have lower insertion loss and higher power capacity than SAW filters manufactured based on the principle of surface acoustic waves.
  • the low insertion loss of the filter can ensure that under the premise of the same antenna transmission power (specified by the internationally unified communication protocol), the amplifier of the transmission channel can send less power to save the power consumption of the terminal equipment, thereby extending the same power condition Use time, and reduce the heat in the transmission link, bringing a better user experience.
  • the filter has a higher power capacity, which means that the transmission power level of the terminal equipment can be appropriately increased to expand the coverage of the signal sent by the terminal, thereby reducing the networking density of the operator's base station and saving the operator's networking cost.
  • Currently supporting higher power levels has gradually become a basic requirement for 4G or even 5G communication terminals, which requires filters applied to the transmit channel, which require a higher power capacity.
  • FIG. 1 is a circuit diagram of a piezoelectric band-pass filter 100 with a trapezoid structure that is relatively common in the prior art.
  • Reference numeral 131 is an input port of the filter
  • reference numeral 132 is an output port of the filter.
  • Between the input port 131 and the output port 132 there are a series of series resonators 101, 102, 103, 104 located in series path and connected in series, and a series of parallel resonators connected from certain nodes on the series path to Ground parallel resonators 111, 112, 113.
  • the frequency of the power signal is within the passband frequency range of the filter, the power signal will sequentially pass through the series resonator from the input port to the output port.
  • Each series resonator will be in the resonator area due to the loss, especially It is the center of the resonance that generates heat. In contrast, because most of the signal does not pass through the parallel resonator, the heat generated by the parallel resonator is relatively small.
  • Reference numeral 210 is a first substrate, which is mainly used to make a resonator (take the FBAR resonator as an example) and compose a filter.
  • Reference numeral 219 is a bottom electrode metal layer
  • reference numeral 213 is a piezoelectric layer above the bottom electrode
  • reference numerals 214 and 215 are top electrodes above the piezoelectric layer
  • reference numerals 218 and 219 are on the bottom electrode
  • the overlapping area of the top electrode 214, the piezoelectric layer 213, the bottom electrode 216, and the lower air cavity 218 forms a series resonator (first series resonator); the top electrode 215, the piezoelectric layer 213, the bottom electrode 216, and the lower air
  • the overlapping area of the cavity 219 forms another series resonator (second series resonator); the bottom electrode 216 of the two series resonators is the same, that is, the two series resonators are connected together through the bottom electrode 216 .
  • Reference numeral 209 is a second substrate, which is mainly used to form a sealed cavity structure through wafer-level packaging, so as to protect the resonator provided on the first substrate from being influenced by external factors for its normal operation.
  • Reference numerals 206 and 207 may be metal conductors such as gold, aluminum, copper, etc., which are essentially the same, except that: the metal conductor 207 is a closed ring pattern located near the outer edge of the chip and plays a sealing role; the metal conductor 206 It is the metal pattern that plays the role of electrical connection directly connected to a certain electrode of the resonator.
  • Reference numeral 205 is a metal via that passes through the second substrate 209 and is connected to the pad 202 on the outer surface of the chip.
  • the electrical signal of the resonator is conducted to the pad 202 through the bottom electrode 216, the metal conductor 206, and the metal via 205, and then connected to the external carrier board on which the chip is mounted through a gold wire bonding wire or flip-chip solder ball.
  • the two series resonators in Figure 2 will generate heat in the center of the resonator when passing high-power signals, but since air is a poor conductor of heat, the silicon material and all metals used to make the substrate are usually good conductors of heat Therefore, the heat generated by the resonator will be dissipated to the outside of the chip mainly through the arrow in the figure.
  • FIG. 3 shows a schematic top view of the filter chip 300 (which can be considered to correspond to the filter chip 200 summarized in FIG. 2).
  • Reference numeral 310 is a substrate; reference numeral 337 is a sealing ring; reference numeral 336 is a through hole and a substrate bonding area; reference numeral 344 is a top electrode pattern (thin solid line); reference numeral 346 is a bottom electrode pattern (Thick solid line); reference numeral 348 is an air cavity (dashed line); reference numerals 311-314 are series resonators of series paths; reference numerals 321-323 are parallel resonators of parallel paths.
  • the heat of the series resonator is mainly dissipated through the second substrate, between the first substrate and the second substrate
  • the heat of the series resonator except for the metal via structure between the two substrates, is difficult to reach the second substrate, which is not conducive to heat dissipation of the series resonator.
  • the invention proposes a piezoelectric filter, including: a first substrate; a second substrate opposite to the first substrate; a series resonator branch, having a plurality of series resonators; a plurality of parallel resonator branches, each Each parallel resonator branch has a parallel resonator, and the series resonator and the parallel resonator are arranged on the first substrate; the heat dissipation unit is arranged between two adjacent series resonators, forming a The heat of at least one of the adjacent series resonators is conducted to the heat conduction path of the second substrate.
  • the heat dissipation unit includes a first heat conduction portion and a second heat conduction portion, the first heat conduction portion is thermally connected to at least one of the two adjacent series resonators, and the second heat conduction portion is The first heat conduction portion is thermally connected and is adapted to conduct heat to the second substrate. Further optionally, the first heat conduction part forms a thermal connection with the first substrate.
  • the heat dissipation unit includes a second heat conduction portion that forms a thermal connection with at least one of the two adjacent series resonators and is adapted to conduct heat to the second Base. Further optionally, the second heat conduction part forms a thermal connection with the first substrate.
  • the heat dissipation unit further includes a third heat conduction portion disposed on a surface of the second substrate opposite to the first substrate, and the third heat conduction portion forms a thermal connection with the second heat conduction portion and the second substrate.
  • the third heat conduction part includes a heat conduction pattern or a heat conduction layer.
  • the two adjacent series resonators share a bottom electrode, and a portion of the common bottom electrode between the piezoelectric layers of the two adjacent series resonators constitutes the first heat conduction portion; or
  • the two adjacent series resonators share a bottom electrode, and the first heat conduction portion is thermally connected to a portion of the common bottom electrode between the piezoelectric layers of the two adjacent series resonators.
  • the two adjacent series resonators are spaced apart from each other; the top electrode of at least one series resonator of the two adjacent series resonators is thermally connected to the first heat conduction portion.
  • the two adjacent series resonators are spaced apart from each other; the bottom electrode of at least one series resonator of the two adjacent series resonators is thermally connected to the first heat conduction portion.
  • the piezoelectric filter includes a sealing ring; at least one resonator is disposed adjacent to the sealing ring, and a bottom electrode of at least one of the at least one resonator extends toward the sealing ring to seal with the sealing ring Ring thermal connection.
  • an electronic device having the above-described piezoelectric filter.
  • FIG. 1 is a circuit schematic diagram of a filter in the prior art
  • FIG. 2 is a schematic cross-sectional view of a filter chip in the prior art
  • FIG. 3 is a schematic top view of the filter chip corresponding to FIG. 2;
  • FIG. 4a is a schematic cross-sectional view of a filter chip according to an exemplary embodiment of the present invention
  • FIG. 4b is a schematic view of a modified embodiment of FIG. 4a;
  • FIG. 5 is a schematic top view of a filter chip corresponding to FIG. 4a according to an exemplary embodiment of the present invention
  • FIG. 6 is a schematic cross-sectional view of a filter chip according to an exemplary embodiment of the present invention.
  • FIG. 7 is a schematic top view of a filter chip corresponding to FIG. 6 according to an exemplary embodiment of the present invention.
  • FIG. 8 is a schematic top view of a filter chip according to an exemplary embodiment of the present invention, in which only the thermal connection between the parallel resonator and the seal ring is shown;
  • FIG. 9 is a schematic cross-sectional view of a filter chip corresponding to FIG. 8 according to an exemplary embodiment of the present invention.
  • FIG. 4a is a schematic cross-sectional view of a filter chip 400 according to an exemplary embodiment of the present invention
  • FIG. 4b is a schematic view of a modified embodiment of FIG. 4a.
  • the embodiment shown in FIG. 4b is different from that in FIG. 4a in that, in FIG. 4b, the bottom electrodes of two adjacent series resonators are provided separately, and the heat dissipating parts corresponding to reference numeral 432 are respectively
  • the electrode is thermally connected and is also directly thermally connected to the first substrate.
  • FIG. 5 is a schematic top view of a filter chip 500 corresponding to FIG. 4a according to an exemplary embodiment of the present invention.
  • reference numeral 432 is a bond added above the bottom electrode connected in the middle after the two series resonators (in FIG. 5, corresponding to the series resonators 512 and 513) are pulled away. Area, the bonding area 432 is simultaneously connected to the metal layer 430 on the second substrate 409 for heat dissipation; the metal layer 430 can also be omitted. Since the thermal resistance of the metal is small, the larger the area of the metal layer, the easier it is to help the device dissipate heat.
  • FIGS. 4a and 4b show schematic heat flow diagrams. Since the device is flip-chip mounted on the lower package carrier, the upper surface of the second substrate 409 is connected to the metal of the package carrier through solder balls, and The lower surface is in contact with the resin material for plastic packaging used for protection. Since the thermal resistance of the metal is much smaller than that of the plastic packaging material, the heat of the device is mainly dissipated into the package carrier through the second substrate 409, thus connecting the two substrates Metal becomes the main heat dissipation path.
  • This patent effectively dissipates the heat generated by the series resonator under high power input to the second substrate by adding a similar heat dissipation path in the area where there is no bonding metal, without affecting the electrical performance of the device. Distribute to package carrier board.
  • FIG. 5 shows a metal pattern and a bonding area 530 for heat dissipation, which can effectively reduce the temperature of two adjacent series resonators 512 and 513, thereby improving the power capacity of the filter.
  • FIG. 5 shows series resonators 511-514, parallel resonators 521-523, and a metal pattern 530 for heat dissipation.
  • FIG. 6 is a schematic cross-sectional view of a filter chip 600 according to an exemplary embodiment of the present invention
  • FIG. 7 is a schematic top view of a filter chip 700 corresponding to FIG. 6 according to an exemplary embodiment of the present invention.
  • reference numeral 632 is to extend the two series resonators (corresponding to the resonators 713 and 714 in FIG. 7 ), and add a bonding area (heat dissipation portion) above the bottom electrode connected in the middle. , which is connected to the metal pattern 630 for heat dissipation on the second substrate at the same time; unlike FIGS. 4a-4b, it pulls two series resonators originally connected through the top electrode and connects the top electrode To a heat dissipation structure 632.
  • the added heat dissipation structure can effectively reduce the temperature of the two series resonators 713 and 714, thereby improving the power capacity of the filter.
  • 7 shows series resonators 711-714, parallel resonators 721-723, and a metal pattern 730 for heat dissipation.
  • a filter including:
  • the first substrate 410 or 610 The first substrate 410 or 610;
  • a series resonator branch (see, for example, FIG. 1), with multiple series resonators (see, for example, 511-514 in FIG. 5, 711-714 in FIG. 7);
  • each parallel resonator branch has parallel resonators (for example, see 521-523 in Figure 5, 721-723 in Figure 7), series resonator and parallel
  • the resonator is arranged on the first substrate;
  • Heat dissipation unit the heat dissipation unit is disposed between two adjacent series resonators (for example, between 512 and 513 in FIG. 5, 713 and 714 in FIG. 7), forming a The heat of at least one of the devices is transferred to the heat conduction path of the second substrate 409.
  • the heat dissipation unit includes a first heat conduction portion (a part of the common bottom electrode 416 in FIG. 4a) and a second heat conduction portion 432, the first heat conduction portion and all At least one of the two adjacent series resonators forms a thermal connection, the second thermal conduction portion 432 is thermally connected to the first thermal conduction portion and is adapted to conduct heat to the second substrate 409.
  • the two adjacent series resonators share a bottom electrode, and the portion of the common bottom electrode between the piezoelectric layers of the two adjacent series resonators constitutes the first heat conduction portion.
  • the first heat conduction portion may directly form a thermal connection with the common bottom electrode, that is, the pressure between the first heat conduction portion and the common bottom electrode at the two adjacent series resonators The parts between the electrical layers are thermally connected.
  • the second heat conduction portion 432 is thermally connected to the bottom electrodes of the two series resonators at the same time.
  • the part of reference numeral 430 corresponds to the third heat conduction portion.
  • the third heat conduction portion may not be provided as long as the second heat conduction portion and the second substrate 409 form a thermal connection.
  • the heat dissipation unit may include only one heat conduction member that directly forms thermal connection with the corresponding series resonator and directly forms thermal connection with the second substrate. Further, the one heat conduction member may also form a thermal connection with the first substrate at the same time. For example, the third heat conduction member 430 in FIG. 4b may be removed and the second heat conduction member 432 may form a thermal connection with the second substrate.
  • two adjacent series resonators are spaced apart from each other; the top electrode of at least one series resonator of the two adjacent series resonators is thermally connected to the first heat conduction part.
  • two adjacent series resonators are spaced apart from each other, and the bottom electrode of at least one series resonator of the two adjacent series resonators may It is thermally connected to the first heat conduction part.
  • the heat of the series connector is guided to the second substrate through the specially arranged heat dissipation unit, which effectively enhances the heat dissipation of the filter.
  • FIG. 8 is a schematic top view of a filter chip 800 according to an exemplary embodiment of the present invention, in which only the thermal connection between the parallel resonator and the seal ring is shown;
  • FIG. 9 is an exemplary according to the present invention A schematic cross-sectional view of a filter chip 900 corresponding to FIG. 8 of the embodiment.
  • series resonators 811-814 and parallel resonators 821-823 provided on the substrate 810 are shown.
  • the shaded portion in FIG. 8 constitutes a heat dissipation portion that is additionally provided.
  • the bottom electrodes of the parallel resonators 822 and 823 near the series resonator 814 with a relatively high operating temperature are connected to the sealing ring 837 to form the heat dissipation part, so that the principle structure of the circuit is not changed.
  • the performance of the filter also has no effect, but it can effectively reduce the temperature of the parallel resonators 822 and 823, thereby providing a better heat dissipation environment for the series resonator 814 with a higher temperature and improving the power capacity of the filter.
  • the parallel resonators 922 and 923 are disposed near the series resonator 914, and it can be seen that the bottom electrodes of the parallel resonators 922 and 923 both extend below the seal ring 937 to form a thermal connection with the seal ring 937.
  • bottom electrode of the parallel resonator is extended below the seal ring to form a thermal connection with the seal ring as an example in FIGS. 8 and 9, the bottom electrode of the series resonator adjacent to the seal ring is also It can extend below the sealing ring to form a thermal connection with the sealing ring.
  • the sealing ring of the filter can be effectively used as a component of the heat dissipation path.
  • FIG. 8 or FIG. 9 can be implemented separately or combined with the solution of FIGS. 4a-7.
  • Embodiments of the present invention also relate to an electronic device, including the above-mentioned radio frequency piezoelectric multiplexer.
  • the electronic devices here include but are not limited to intermediate products such as radio frequency front-ends, filter amplification modules, and terminal products such as mobile phones, WIFI, and drones.

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Abstract

本发明涉及一种压电滤波器,包括:第一基底;与第一基底对置的第二基底;串联谐振器支路,具有多个串联谐振器;多个并联谐振器支路,每个并联谐振器支路具有并联谐振器,串联谐振器和并联谐振器设置在第一基底上;以及散热单元,所述散热单元设置在两个相邻串联谐振器之间,形成将来自所述两个相邻串联谐振器中的至少一个的热量传导到第二基底的热传导路径。本发明还涉及具有该滤波器的电子设备。

Description

一种压电滤波器及电子设备 技术领域
本发明的实施例涉及通信用滤波器器件,尤其涉及一种具有改进的热传导结构的滤波器,以及一种具有该滤波器的电子设备。
背景技术
近年来,随着市场的迅猛发展,无线通讯终端和设备不断朝着小型化、多模-多频段的方向发展。因此,此类产品对于小尺寸、高性能的滤波器的需求日益增长。
目前,能够满足通讯终端使用的小尺寸滤波器主要是压电声波滤波器,构成此类声波滤波器的谐振器主要包括:FBAR(Film Bulk Acoustic Resonator,薄膜体声波谐振器),SMR(Solidly Mounted Resonator,固态装配谐振器)和SAW(Surface Acoustic Wave,表面声波谐振器)。其中基于体声波原理制造的FBAR和SMR滤波器,相比基于表面声波原理制造的SAW滤波器,具有更低的插入损耗,更高的功率容量的特点。
滤波器的低插入损耗可以确保在相同的天线发射功率(由国际统一的通信协议规定)前提下,发射信道的放大器可以发送更小的功率以节省终端设备的电源消耗,从而延长同样电量条件下的使用时间,并且减小发送链路中的发热,带来更好的用户使用体验。
滤波器具有更高的功率容量,则意味着可以通过适当地提升终端设备的发射功率等级,扩大终端发送信号的覆盖范围,从而降低运营商基站的组网密度,节约运营商的组网成本。目前支持更高的功率等级已经逐渐成为4G甚至5G通信终端的基本要求,这就要求应用于发射通道的滤波器,需要具有更高的功率容量。
但是,热量的产生是发送通道滤波器不可能避免的,而热量的聚集会造成作为滤波器组成单元的谐振器上的微小结构因应力、形变、高温灼烧等原因损坏。因此,如何将谐振器因承受较大功率产生的热量以最快的速度散出去以提高滤波器的功率容量,成为滤波器设计工程师需要重点考虑的问题。
图1是现有技术中比较常见的梯形结构压电带通滤波器100的电路图。附图标记131为滤波器的输入端口,附图标记132为滤波器的输出端口。在输入端口131和输 出端口132之间,有一系列位于串联通路、串联相接的串联谐振器101、102、103、104,以及一系列位于并联通路、从串联通路上的某些节点连接到地的并联谐振器111、112、113。当功率信号的频率位于滤波器的通带频率范围内时,功率信号会从输入端口,依次通过串联谐振器,到达输出端口,每个串联谐振器都会因为存在损耗而在谐振器的区域,特别是谐振的中心位置产生热量,相比之下因为信号大部分不会通过并联谐振器,因此并联谐振器产生的热量相对较小。
图2为现有技术中滤波器芯片200的剖面示意图,其中只示意的画出了两个位于串联通路的串联谐振器,以及相关的一些结构。附图标记210是第一基底,上面主要用于制作谐振器(以FBAR谐振器为例)并组成滤波器。附图标记219是底电极金属层,附图标记213是位于底电极上方的压电层,附图标记214和215是位于压电层上方的顶电极,附图标记218和219是位于底电极下方在基底210上形成的空气腔。顶电极214、压电层213、底电极216以及下方空气腔218的重叠区域,形成了一个串联谐振器(第一串联谐振器);顶电极215、压电层213、底电极216以及下方空气腔219的重叠区域,形成了另一个串联谐振器(第二串联谐振器);这两个串联谐振器的底电极216是同一个,也就是通过底电极216将两个串联谐振器连接在一起。附图标记209是第二基底,主要用于通过晶圆级封装,形成一个密闭的空腔结构,从而保护设置在第一基底的谐振器不被外部因素影响其正常工作。附图标记206和207可以是金,铝,铜等金属导体,本质上并无不同,区别只在于:金属导体207是位于芯片靠近外边缘位置的密闭环状图形,起密封作用;金属导体206是起到电连接作用的金属图形与谐振器的某个电极直接相连。附图标记205是穿过第二基底209的金属导通孔,与位于芯片外表面的焊盘202相连。谐振器的电学信号通过底电极216、金属导体206、金属导通孔205传导到焊盘202,再通过金丝键合线,或倒装焊接的焊球与装载芯片的外部载板相连接。
图2中的两个串联谐振器在通过高功率信号时,会在谐振器的中心产生热量,但由于空气是热的不良导体,而通常制作基底的材料硅以及所有金属都是热的良导体,因此谐振器产生的热量将主要通过图中的箭头示意路径散出到芯片外部。
图3给出了滤波器芯片300(可以认为对应于图2汇总的滤波器芯片200)的俯视示意图。附图标记310是基底;附图标记337是密封环;附图标记336是通孔及基底键合区;附图标记344为顶电极图形(细实线);附图标记346为底电极图形(粗实线);附图标记348为空气腔(虚线);附图标记311-314为串联通路的串联谐振器; 附图标记321-323为并联通路的并联谐振器。
如图2所示,在上述的滤波器芯片中,当芯片采用倒装装配在封装载板上时,串联谐振器的热量主要通过第二基底散热,在第一基底与第二基底之间的封装空间为真空或者通有气体的情况下,串联谐振器的热量,除了两个基底之间的金属通孔结构之外,难以到达第二基底,这不利于串联谐振器的散热。
发明内容
为缓解或解决使用现有技术中的上述问题的至少一个方面,提出本发明。
本发明提出了一种压电滤波器,包括:第一基底;与第一基底对置的第二基底;串联谐振器支路,具有多个串联谐振器;多个并联谐振器支路,每个并联谐振器支路具有并联谐振器,串联谐振器和并联谐振器设置在第一基底上;散热单元,所述散热单元设置在两个相邻串联谐振器之间,形成将来自所述两个相邻串联谐振器中的至少一个的热量传导到第二基底的热传导路径。
可选的,所述散热单元包括第一热传导部和第二热传导部,所述第一热传导部与所述两个相邻串联谐振器中的至少一个形成热连接,所述第二热传导部与所述第一热传导部热连接且与适于将热量传导到所述第二基底。进一步可选的,所述第一热传导部与第一基底形成热连接。
可选的,所述散热单元包括第二热传导部,所述第二热传导部与所述两个相邻串联谐振器中的至少一个形成热连接,且与适于将热量传导到所述第二基底。进一步可选的,所述第二热传导部与第一基底形成热连接。
可选的,所述散热单元还包括设置在第二基底的与第一基底相对的表面的第三热传导部,所述第三热传导部与第二热传导部以及第二基底均形成热连接。可选的,所述第三热传导部包括热传导图案或者热传导层。
可选的,所述两个相邻串联谐振器共用底电极,且所述共用底电极在所述两个相邻串联谐振器的压电层之间的部分构成所述第一热传导部;或者所述两个相邻串联谐振器共用底电极,且所述第一热传导部与所述共用底电极在所述两个相邻串联谐振器的压电层之间的部分热连接。
可选的,所述两个相邻串联谐振器彼此间隔开;所述两个相邻串联谐振器中至少一个串联谐振器的顶电极与所述第一热传导部热连接。
可选的,所述两个相邻串联谐振器彼此间隔开;所述两个相邻串联谐振器中至少 一个串联谐振器的底电极与所述第一热传导部热连接。
可选的,所述压电滤波器包括密封环;至少一个谐振器邻近所述密封环设置,且所述至少一个谐振器中的至少一个的底电极朝向所述密封环延伸而与所述密封环热连接。
根据本发明的实施例的另一方面,提出一种电子设备,具有上述的压电滤波器。
附图说明
以下描述与附图可以更好地帮助理解本发明所公布的各种实施例中的这些和其他特点、优点,图中相同的附图标记始终表示相同的部件,其中:
图1为现有技术中的一种滤波器的电路示意图;
图2为现有技术中的滤波器芯片的剖面示意图;
图3为对应于图2的滤波器芯片的示意性俯视图;
图4a为根据本发明的一个示例性实施例的滤波器芯片的剖面示意图,图4b为图4a的变形实施例的示意图;
图5为根据本发明的一个示例性实施例的与图4a对应的滤波器芯片的示意性俯视图;
图6为根据本发明的一个示例性实施例的滤波器芯片的剖面示意图;
图7为根据本发明的一个示例性实施例的与图6对应的滤波器芯片的示意性俯视图;
图8为根据本发明的一个示例性实施例的滤波器芯片的示意性俯视图,其中仅示出了并联谐振器与密封环之间的热连接部;
图9为根据本发明的一个示例性实施例的与图8对应的滤波器芯片的剖面示意图。
具体实施方式
下面通过实施例,并结合附图,对本发明的技术方案作进一步具体的说明。在说明书中,相同或相似的附图标号指示相同或相似的部件。下述参照附图对本发明实施方式的说明旨在对本发明的总体发明构思进行解释,而不应当理解为对本发明的一种限制。
图4a为根据本发明的一个示例性实施例的滤波器芯片400的剖面示意图,图4b为图4a的变形实施例的示意图。图4b所示实施例与图4a中的不同在于,在图4b中,两个相邻串联谐振器的底电极分开设置,且附图标记432对应的散热部件分别与该两个谐振器的底电极热连接,还与第一基底直接热连接。图5为根据本发明的一个示例性实施例的与图4a对应的滤波器芯片500的示意性俯视图。
在本发明中,附图2-9中的附图标记中后两位相同,表示两者为相同或者相似的部件或者结构。
如图4a、图4b所示,附图标记432为将两个串联谐振器(在附图5中,对应于串联谐振器512和513)拉远后在中间连接的底电极上方添加的键合区域,键合区域432同时连接到位于第二基底409上的用于散热的金属层430;金属层430也可以省去。由于金属的热阻较小,金属层面积越大,越容易帮助器件散热。
图4a和图4b中示出了示意性的热流图,由于器件是倒装焊装配于下面的封装载板上,第二基底409的上表面通过焊球与封装载板的金属相连接,而下表面则与用于保护的塑封用树脂类材料接触,由于金属的热阻远小于塑封用材料,因此器件的热主要是通过第二基底409散到封装载板中,这样连接两片基底的金属就成了主要散热路径。
本专利在不影响器件电性能的前提下,通过在原本没有键合金属的区域添加类似的散热路径,有效的将串联谐振器在高功率输入下产生的热量散到第二基底,从而可以有效散发到封装载板。
图5示出了用于散热的金属图形及键合区530,其可以有效的降低邻近的两个串联谐振器512和513的温度,从而提高滤波器的功率容量。图5中示出了串联谐振器511-514,并联谐振器521-523,以及散热的金属图形530。
图6为根据本发明的一个示例性实施例的滤波器芯片600的剖面示意图,图7为根据本发明的一个示例性实施例的与图6对应的滤波器芯片700的示意性俯视图。
如图6所示,附图标记632为将两个串联谐振器(在图7中,对应于谐振器713与714)拉远后,在中间连接的底电极上方添加键合区域(散热部),其同时连接到位于第二基底上的用于散热的金属图形630;与图4a-4b不同的是,其是将两个原本通过顶电极连接的串联谐振器拉远,并将顶电极连接到一个散热结构632上。
如图7所示,添加的散热结构可以有效降低两个串联谐振器713和714的温度,从而提高滤波器的功率容量。图7中示出了串联谐振器711-714,并联谐振器721-723, 以及散热的金属图形730。
基于以上,本发明提出了一种滤波器,包括:
第一基底410或610;
与第一基底对置的第二基底409或609;
串联谐振器支路(例如参见图1),具有多个串联谐振器(例如参见图5中的511-514,图7中的711-714);
多个并联谐振器支路(例如参见图1),每个并联谐振器支路具有并联谐振器(例如参见图5中的521-523,图7中的721-723),串联谐振器和并联谐振器设置在第一基底上;
散热单元,所述散热单元设置在两个相邻串联谐振器(例如图5中的512与513之间,图7中的713与714)之间,形成将来自所述两个相邻串联谐振器中的至少一个的热量传导到第二基底409的热传导路径。
参见图4a、图4b,在示例性实施例中,所述散热单元包括第一热传导部(图4a中为共用底电极416的一部分)和第二热传导部432,所述第一热传导部与所述两个相邻串联谐振器中的至少一个形成热连接,所述第二热传导部432与所述第一热传导部热连接且与适于将热量传导到所述第二基底409。在图4a中,所述两个相邻串联谐振器共用底电极,且所述共用底电极在所述两个相邻串联谐振器的压电层之间的部分构成所述第一热传导部。虽然没有示出,在图4a中,第一热传导部也可以直接与共用底电极形成热连接,即所述第一热传导部与所述共用底电极在所述两个相邻串联谐振器的压电层之间的部分热连接。
在图4a和图4b中,第二热传导部432同时与两个串联谐振器的底电极热连接。
在图4a和图4b中,附图标记430的部件对应于第三热传导部。虽然没有示出,如前所述,也可以不设置第三热传导部,只要第二热传导部与第二基底409形成热连接即可。
虽然没有示出,所述散热单元也可以仅仅包括既与对应的串联谐振器直接形成热连接且与第二基底直接形成热连接的一个热传导部件。进一步的,该一个热传导部件也可以同时与第一基底形成热连接,例如,可以是图4b中移除了第三热传导部件430且第二热传导部件432与第二基底形成热连接的形式。
如图6所示,两个相邻串联谐振器彼此间隔开;所述两个相邻串联谐振器中至少一个串联谐振器的顶电极与所述第一热传导部热连接。
参见图4b,两个相邻串联谐振器彼此间隔开,在将附图标记432所指部件作为第一热传导部的情况下,两个相邻串联谐振器中至少一个串联谐振器的底电极可与所述第一热传导部热连接。
基于本发明的技术方案,将串联连接器的热量通过专门设置的散热单元引导到第二基底,这有效加强了滤波器的散热。
图8为根据本发明的一个示例性实施例的滤波器芯片800的示意性俯视图,其中仅示出了并联谐振器与密封环之间的热连接部;图9为根据本发明的一个示例性实施例的与图8对应的滤波器芯片900的剖面示意图。
图8中示出了设置于基底810上的串联谐振器811-814,并联谐振器821-823。图8中的阴影部分构成另外设置的散热部分。如图8所示,将工作温度比较高的串联谐振器814附近的并联谐振器822和823的底电极,同时连接到密封环837上构成所述散热部分,这样不改变电路的原理结构,对滤波器的性能也没有影响,但可以有效降低并联谐振器822和823的温度,从而为温度较高的串联谐振器814提供更良好的散热环境,提高滤波器的功率容量。
如图9所示,并联谐振器922与923设置在串联谐振器914附近,可以看到并联谐振器922与923的底电极均延伸到密封环937下方而与密封环937形成热连接。
需要指出的是,虽然在图8和图9中以并联谐振器的底电极延伸到密封环下方与密封环形成热连接为例进行了说明,但是,邻近密封环的串联谐振器的底电极也可以延伸到密封环的下方而与密封环形成热连接。
基于图8和图9的技术方案,可以有效利用滤波器的密封环,让其作为散热路径的组成部分。
需要专门指出的是,图8或图9的方案可以单独实施,也可以与图4a-7中的方案结合在一起实施。
本发明的实施例也涉及一种电子设备,包括上述的射频压电多工器。需要指出的是,这里的电子设备,包括但不限于射频前端、滤波放大模块等中间产品,以及手机、WIFI、无人机等终端产品。
尽管已经示出和描述了本发明的实施例,对于本领域的普通技术人员而言,可以理解在不脱离本发明的原理和精神的情况下可以对这些实施例进行变化,本发明的范围由所附权利要求及其等同物限定。

Claims (12)

  1. 一种压电滤波器,包括:
    第一基底;
    与第一基底对置的第二基底;
    串联谐振器支路,具有多个串联谐振器;和
    多个并联谐振器支路,每个并联谐振器支路具有并联谐振器,
    其中:
    串联谐振器和并联谐振器设置在第一基底上;
    所述压电滤波器还包括散热单元,所述散热单元设置在两个相邻串联谐振器之间,形成将来自所述两个相邻串联谐振器中的至少一个的热量传导到第二基底的热传导路径。
  2. 根据权利要求1所述的压电滤波器,其中:
    所述散热单元包括第一热传导部和第二热传导部,所述第一热传导部与所述两个相邻串联谐振器中的至少一个形成热连接,所述第二热传导部与所述第一热传导部热连接且与适于将热量传导到所述第二基底。
  3. 根据权利要求2所述的压电滤波器,其中:
    所述第一热传导部与第一基底形成热连接。
  4. 根据权利要求1所述的压电滤波器,其中:
    所述散热单元包括第二热传导部,所述第二热传导部与所述两个相邻串联谐振器中的至少一个形成热连接,且与适于将热量传导到所述第二基底。
  5. 根据权利要求4所述的压电滤波器,其中:
    所述第二热传导部与第一基底形成热连接。
  6. 根据权利要求2-5中任一项所述的压电滤波器,其中:
    所述散热单元还包括设置在第二基底的与第一基底相对的表面的第三热传导部,所述第三热传导部与第二热传导部以及第二基底均形成热连接。
  7. 根据权利要求6所述的压电滤波器,其中:
    所述第三热传导部包括热传导图案或者热传导层。
  8. 根据权利要求2-7中任一项所述的压电滤波器,其中:
    所述两个相邻串联谐振器共用底电极,且所述共用底电极在所述两个相邻串联谐 振器的压电层之间的部分构成所述第一热传导部;或者
    所述两个相邻串联谐振器共用底电极,且所述第一热传导部与所述共用底电极在所述两个相邻串联谐振器的压电层之间的部分热连接。
  9. 根据权利要求2-7中任一项所述的压电滤波器,其中:
    所述两个相邻串联谐振器彼此间隔开;
    所述两个相邻串联谐振器中至少一个串联谐振器的顶电极与所述第一热传导部热连接。
  10. 根据权利要求2-7中任一项所述的压电滤波器,其中:
    所述两个相邻串联谐振器彼此间隔开;
    所述两个相邻串联谐振器中至少一个串联谐振器的底电极与所述第一热传导部热连接。
  11. 根据权利要求1-10中任一项所述的压电滤波器,其中:
    所述压电滤波器包括密封环;
    至少一个谐振器邻近所述密封环设置,且所述至少一个谐振器中的至少一个的底电极朝向所述密封环延伸而与所述密封环热连接。
  12. 一种电子设备,具有根据权利要求1-11中任一项所述的压电滤波器。
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