WO2021093407A1 - 一种双工器 - Google Patents

一种双工器 Download PDF

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Publication number
WO2021093407A1
WO2021093407A1 PCT/CN2020/111350 CN2020111350W WO2021093407A1 WO 2021093407 A1 WO2021093407 A1 WO 2021093407A1 CN 2020111350 W CN2020111350 W CN 2020111350W WO 2021093407 A1 WO2021093407 A1 WO 2021093407A1
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WIPO (PCT)
Prior art keywords
wafer
duplexer
filter
isolation
resonator
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PCT/CN2020/111350
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English (en)
French (fr)
Inventor
庞慰
郑云卓
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天津大学
诺思(天津)微系统有限责任公司
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Publication of WO2021093407A1 publication Critical patent/WO2021093407A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/70—Multiple-port networks for connecting several sources or loads, working on different frequencies or frequency bands, to a common load or source
    • H03H9/703—Networks using bulk acoustic wave devices
    • H03H9/706—Duplexers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/70—Multiple-port networks for connecting several sources or loads, working on different frequencies or frequency bands, to a common load or source
    • H03H9/72—Networks using surface acoustic waves
    • H03H9/725—Duplexers

Definitions

  • the small-size filters that can meet the use of communication terminals are mainly piezoelectric acoustic wave filters.
  • the resonators that constitute this type of acoustic wave filter mainly include: FBAR (Film Bulk Acoustic Resonator), SMR (Solidly Mounted) Resonator, solid-state assembly resonator) and SAW (Surface Acoustic Wave, surface acoustic wave resonator).
  • FBAR and SMR duplexers manufactured based on the principle of bulk acoustic wave have the characteristics of lower insertion loss and higher power capacity than the SAW duplexer manufactured based on the principle of surface acoustic wave.
  • the low insertion loss of the duplexer can ensure that under the premise of the same antenna transmission power (specified by the international unified communication protocol), the amplifier of the transmission channel can send a smaller power to save the power consumption of the terminal equipment, thereby extending the same power condition It can reduce the use time and reduce the heat generation in the transmission path, resulting in a better end user experience.
  • the present invention provides a duplexer with high power capacity.
  • the material of the bonding wire is gold, copper or aluminum.
  • isolation capacitor between the transmitting filter and the receiving filter.
  • the isolation capacitor is an isolation wafer, the upper surface of the isolation wafer is bonded to the lower surface of the upper wafer, and the lower surface of the isolation wafer is connected to the upper surface of the lower wafer. Bond.
  • the material of the isolation wafer is a silicon wafer.
  • the thickness of the isolation wafer is 30-150 microns.
  • the distance between the upper wafer and the lower wafer is 50-200 microns.
  • the transmitting filter and the receiving filter are partially overlapped.
  • the intersection ratio of the projection filter and the receiving filter in the top view direction of the device is 0.2 to 0.8.
  • the present invention provides a duplexer in which part of the resonators are connected to a package carrier through bonding wires.
  • the thermal resistance of the device is reduced and the electrical performance is improved.
  • the second aspect compared with the prior art via connection method, the mutual inductance distance is extended, the inductive coupling is reduced, the capacity power is increased, and the device performance is optimized.
  • Figure 1 is a schematic cross-sectional view of an existing duplexer
  • FIG. 3 is a schematic diagram of an assembly of a duplexer according to an embodiment of the present invention, specifically: (a) is a schematic front view of the assembly of a wafer with a Tx filter; (b) is a schematic front view of the assembly of a wafer with an Rx filter; (c) is the front view of the duplexer chip assembly; (d) is the perspective view of the duplexer chip viewed from the side of the Tx wafer;
  • Figure 4 is a circuit diagram of a duplexer according to an embodiment of the present invention.
  • FIG. 7 is a schematic cross-sectional view of the duplexer of the second embodiment of the present invention.
  • Fig. 9 is a diagram of electrical performance of a duplexer in the second embodiment of the present invention, specifically: (a) is a graph of amplitude-frequency response; (b) is a graph of isolation.
  • Figure 10 is a schematic cross-sectional view of a three duplexer according to an embodiment of the present invention.
  • FIG. 11 is a schematic cross-sectional view of a duplexer according to the fourth embodiment of the present invention.
  • FIG. 1 is a schematic cross-sectional view of a conventional duplexer.
  • the existing duplexer has a package carrier SU, an upper wafer W1 on which a transmitting filter Tx is formed, and a lower wafer W2 on which a receiving filter Rx is formed.
  • the upper wafer W1 is packaged with the lower wafer W2 through wafer bonding, and then connected to the top pad of the package carrier SU through solder balls.
  • the transmitting resonator in the transmitting filter that needs to be connected to the outside is connected to the pad on the lower surface of the lower wafer through the through hole VTx, and then connected to the package carrier SU underneath through the solder ball;
  • the receiving filter The transmitting resonator that needs to be connected to the outside is connected to the pad on the lower surface of the lower wafer through the via RTx, and then connected to the package carrier SU underneath through solder balls.
  • FIG. 2 is a schematic cross-sectional view of a duplexer 100 according to an embodiment of the present invention.
  • Figure 3 is a schematic diagram of the assembly of the duplexer, specifically: (a) is a schematic front view of the wafer assembly with the transmitting filter Tx; (b) is a schematic front view of the wafer assembly with the receiving filter Rx; (c) ) Is the front view of the duplexer chip assembly; (d) is the perspective view of the duplexer chip viewed from the side of the wafer where the transmit filter Tx is located.
  • Figure 4 is a circuit diagram of the duplexer.
  • the duplexer 100 has a package carrier SU, an upper wafer W1 on which a transmission filter Tx is fabricated, and a lower wafer W2 on which a reception filter Rx is fabricated.
  • the upper wafer W1 is packaged with the lower wafer W2 through wafer bonding, and then connected to the top pad of the package carrier SU through solder balls.
  • the transmitting filter Tx and the receiving filter Rx are staggered in the top view direction of the device.
  • the receiving resonator that needs to be connected to the outside is connected to the pad located on the lower surface of the lower wafer W2 through the through hole VRx made on the lower wafer W2, and then connected to the package carrier board underneath through solder balls SU connection.
  • the transmitting filter Tx the transmitting resonator that needs to be connected to the outside is connected to the pad on the upper surface of the upper wafer W1 through the via hole VTx made on the upper wafer W1, and then connected to the above-mentioned pad through the bonding wire LTx.
  • the bonding fingers on the package carrier are connected.
  • the heat conduction direction is conducted downward as shown by the dashed arrow in FIG. 2.
  • the heat conduction path has lower thermal resistance and heat transfer efficiency. Faster.
  • each electrical connection of the transmitting filter Tx is completed through the bonding wire located above the chip, it still needs to be set on the bottom surface of the lower wafer W2 below the position of the transmitting filter Tx and is not compatible with
  • the transmitting filter Tx has any electrical connection pads and solder balls.
  • the duplexer 100 has an antenna terminal A, a transmitting terminal B, and a receiving terminal C from the perspective of circuit principle.
  • the transmitting filter is connected between the antenna terminal A and the transmitting terminal B, and is composed of a plurality of first series units (namely TS1, TS2, TS3, and TS4) connected in series and connected in parallel to every two adjacent first units.
  • the first parallel unit ie TP1, TP2, TP3 and TP4 between the series units is composed.
  • the receiving filter is connected between the antenna terminal A and the receiving terminal C, and consists of a plurality of second series units (ie RS1, RS2, RS3, and RS4) connected in series and connected in parallel to every two adjacent second units.
  • the second parallel unit (ie RP1, RP2, RP3 and RP4) between the series units is composed.
  • a mutual inductance M1 is connected between the first parallel unit (i.e. TP4) near the transmitting terminal in the transmitting filter and the second parallel unit (i.e. RP4) near the receiving terminal in the receiving filter (also marked in Figure 2).
  • the mutual inductance M1 is connected between the first parallel unit (i.e. TP4) near the transmitting terminal in the transmitting filter and the second parallel unit (i.e. RP4) near the receiving terminal in the receiving filter (also marked in Figure 2).
  • FIG. 5 is a graph showing the amplitude-frequency response curve of the duplexer 100 in the first embodiment of the present invention when the Tx and Rx inductance mutual inductance values are 5pH and 10pH, respectively.
  • (a) is the amplitude-frequency response graph
  • (b) is the isolation graph.
  • This duplexer 100 works at Band 3 frequency.
  • the passband of Tx ranges from 1710MHz to 1785MHz
  • the passband of Rx ranges from 1805MHz to 1880MHz. Considering system performance, they need to have better insertion loss in their respective passbands (such as 1.5dB), and has better suppression and isolation in another passband range (such as 55dB).
  • the solid line in the figure is the filter response curve when the mutual inductance is 5pH, and the dashed line is the filter response curve when the mutual inductance is 10pH. It can be seen that when the mutual inductance coupling of the inductance increases, it will cause the deterioration of out-of-band suppression and isolation.
  • FIG. 6 is a comparison diagram of electromagnetic simulation results between the existing duplexer and the duplexer 100 according to the embodiment of the present invention, in which the solid line is the existing duplexer, and the dashed line is the duplexer 100 according to the embodiment of the present invention, and the mutual inductance between them There is a significant difference in coupling, which is converted into a mutual inductance of about 3-5pH. Comparing the actual measurement of the two duplexer samples under the same conditions, the Tx power capacity of the existing duplexer is only 35.6dBm. The Tx power capacity of the duplexer 100 in the embodiment of the present invention can reach 38.3 dBm.
  • the resonator of the transmitting filter is connected to the package carrier through the bonding wire.
  • the thermal resistance of the device is reduced and the electrical performance is improved.
  • the second aspect compared with the prior art via connection method, the mutual inductance distance is extended, the inductive coupling is reduced, the capacity power is increased, and the device performance is optimized.
  • FIG. 7 is a schematic cross-sectional view of the duplexer 200 according to the second embodiment of the present invention.
  • FIG. 8 is a circuit diagram of the duplexer 200 according to the second embodiment of the present invention.
  • the duplexer 200 also includes an isolation wafer W3.
  • the isolation wafer W3 is arranged between the upper wafer W1 and the lower wafer W2, the upper surface of the isolation wafer W3 is bonded to the lower surface of the upper wafer W1 and the lower surface of the isolation wafer W3 is separated from the lower surface of the lower wafer W2. Bonding on the upper surface.
  • the material of the isolation wafer W3 can be a silicon wafer, which has the advantage that the material is universal and easy to obtain.
  • the thickness of the isolation wafer W3 is generally 30 to 150 microns.
  • the addition of the isolation wafer W3 can extend the distance between the upper wafer W1 and the lower wafer W2 from the original 2-15 microns to 50 to 200 microns, so that the capacitance value due to the overlap of Tx and Rx will change It is 1/5 or even 1/20 of the original, so that the impact of the overlap capacitance on the performance degradation of the duplexer can be reduced to almost no, and the overlap area is further increased, thereby reducing the size of the duplexer.
  • the transmitting filter and the receiving filter can be partially overlapped.
  • the intersection ratio of the projection filter and the receiving filter in the top view direction of the device is 0.2 to 0.8.
  • the duplexer 200 further includes an isolation capacitor compared to the duplexer 100, and the isolation capacitor is arranged between the transmitting filter and the receiving filter (Figure The isolation capacitor C and mutual inductance M2 are also marked in 8).
  • Fig. 9 is a comparison diagram of electromagnetic simulation results between the existing duplexer and the duplexer of the second embodiment of the present invention, specifically: (a) is a graph of amplitude-frequency response; (b) is a graph of isolation.
  • the overlap capacitance is generated between the TS4 input terminal and the RS4 input terminal, the overlap capacitance of the duplexer manufactured according to the existing technology is about 100fF, and the insertion of the isolation wafer can reduce the value of the overlap capacitance by at least one tenth , Calculated by 10fF.
  • the performance curve of the duplexer in these two cases is shown in Figure 9.
  • the isolation performance of the duplexer has been greatly improved, and since the overlap area can be set to be between all resonators except for the final stage, the overlap area of Tx and Rx can reach various levels. It is about 50% of the filter, which effectively reduces the size of the duplexer.
  • the receiving resonator that needs to be connected to the outside is connected to the pad on the upper surface of the upper wafer through the through hole VRx made on the upper wafer, and then the bonding wire LRx is connected to the package carrier SU Connect the fingers on the bonding.
  • the transmitting filter Tx the transmitting resonator that needs to be connected to the outside is connected to the pad on the lower surface of the lower wafer W2 through the through hole VTx made on the lower wafer W2, and then to the package carrier board underneath through solder balls SU connection.
  • the duplexer 300 of the third embodiment of the present invention is similar in principle to the duplexer 100 of the first embodiment of the present invention, and the beneficial effects are also similar, and will not be repeated.
  • FIG. 11 is a schematic cross-sectional view of a duplexer 400 according to the fourth embodiment of the present invention.
  • the duplexer 400 has an additional layer of isolation wafer W3 between the upper wafer W1 and the lower wafer W2.
  • the thickness of the isolation wafer W3 is 30-150 microns.
  • the distance between the upper wafer W1 and the lower wafer W1 is 50-200 microns.
  • the duplexer 400 of the fourth embodiment of the present invention is similar in principle to the duplexer 200 of the second embodiment of the present invention, and the beneficial effects are also similar, and will not be repeated here.

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  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
  • Transceivers (AREA)

Abstract

本发明提供一种双工器，其中，该双工器由两片晶圆键合后封装形成，包括封装载板、位于上晶圆中的接收滤波器以及位于下晶圆中的发射滤波器；所述接收滤波器中的需要与外部相连的谐振器通过键合线与封装载板连接，或者，所述发射滤波器中的需要与外部相连的谐振器通过键合线与封装载板连接。本发明的双工器中，将部分谐振器通过键合线连接到封装载板上，第一方面，减少了器件热阻，提高了容量功率。第二方面，与现有技术的导通孔连接方式相比，拉远了互感距离，降低了电感耦合，优化了器件电性能。

Description

一种双工器 技术领域
本发明涉及通信用滤波类器件领域，特别涉及一种高功率容量的双工器。
背景技术
近年来，随着市场的迅猛发展，无线通讯终端和设备不断朝着小型化、多模-多频段的方向发展，无线通讯终端和设备不断朝着小型化，多模-多频段的方向发展，无线通信终端中的用于FDD(Frequency Division Duplexing，频分复用双工)的双工器的数量也随之增加。特别是随着5G商用的临近，高性能的双工器的需求量也越来越大。
目前，能够满足通讯终端使用的小尺寸滤波器主要是压电声波滤波器，构成此类声波滤波器的谐振器主要包括：FBAR(Film Bulk Acoustic Resonator，薄膜体声波谐振器)，SMR(Solidly Mounted Resonator，固态装配谐振器)和SAW(Surface Acoustic Wave，表面声波谐振器)。其中基于体声波原理制造的FBAR和SMR双工器，相比基于表面声波原理制造的SAW双工器，具有更低的插入损耗，更高的功率容量的特点。
双工器的低插入损耗可以确保在相同的天线发射功率(由国际统一的通信协议规定)前提下，发射信道的放大器可以发送更小的功率以节省终端设备的电源消耗，从而延长同样电量条件下的使用时间，并减小发送通路中的热量产生，带来更好的终端用户使用体验。
而双工器具有更高的功率容量，则意味着可以通过适当地提升终端设备的发射功率等级，扩大终端发送信号的覆盖范围，从而降低运营商基站的组网密度，节约运营商的组网成本。目前支持更高的功率等级已经逐渐成为4G+以及5G通信终端的基本要求。
通常双工器中的发射滤波器因其固有损耗而产生热量是不可避免的，热量的聚集会造成作为滤波器组成单元的谐振器上的微小结构因应力、形变、高温灼烧等原因损坏。倘若将芯片的尺寸设计得更大，则可以将芯片中的发热点拉远，这与芯片尺寸小型化的发展趋势是矛盾的。同时，双工器的发射滤波器和接收滤波器之间通常存在电感耦合，劣化器件性能。
因此，如何实现电性能优秀的小尺寸双工器，成为设计工程师亟待解决的问题。
发明内容
有鉴于此，本发明提供一种具有高功率容量的双工器。
本发明的目的是提供一种双工器，该双工器由两片晶圆键合后封装形成，包括封装载板、位于上晶圆中的接收滤波器以及位于下晶圆中的发射滤波器；所述接收滤波器中的需要与外部相连的谐振器通过键合线与封装载板连接，或者，所述发射滤波器中的需要与外部相连的谐振器通过键合线与封装载板连接。
可选地，所述接收滤波器中，需要与外部相连的接收谐振器通过制作在所述下晶圆上的导通孔连接到位于所述下晶圆下表面的焊盘上，再通过焊球与下方的所述封装载板连接；所述发射滤波器中，需要与外部相连的发射谐振器通过制作在所述上晶圆上的导通孔连接到位于所述上晶圆上表面的焊盘上，再通过键合线与所述封装载板上的键合手指相连。
可选地，所述接收滤波器中，需要与外部相连的接收谐振器通过制作在所述上晶圆上的导通孔连接到位于所述上晶圆上表面的焊盘上，再通过键合线与所述封装载板上的键合手指相连；所述发射滤波器中，需要与外部相连的发射谐振器通过制作在所述下晶圆上的导通孔连接到位于所述下晶圆下表面的焊盘上，再通过焊球与下方的所述封装载板连接。
可选地，所述键合线的材料为金、铜或者铝。
可选地，所述发送滤波器与所述接收滤波器之间存在隔离电容。
可选地，所述隔离电容为隔离晶圆，所述隔离晶圆的上表面与所述上晶圆的下表面键合，所述隔离晶圆的下表面与所述下晶圆的上表面键合。
可选地，所述隔离晶圆的材料为硅晶圆。
可选地，所述隔离晶圆的厚度为30-150微米。
可选地，所述上晶圆与所述下晶圆的距离为50-200微米。
可选地，在器件俯视方向上，所述发射滤波器和所述接收滤波器呈部分交叠设置。
可选地，所述发射滤波器和所述接收滤波器在器件俯视方向上投影的交并比为0.2至0.8。
本发明提出了一种双工器，该双工器中部分谐振器通过键合线连接到封装载板上，第一方面，减少了器件热阻，提高了电性能。第二方面，与现有技术的导通孔连接方式相比，拉远了互感距离，降低了电感耦合，提高了容量功率，优化了器件性能。
附图说明
附图用于更好地理解本发明，不构成对本发明的不当限定。其中：
图1是现有双工器的剖面示意图；
图2是本发明实施例一双工器的剖面示意图；
图3是本发明实施例一双工器的装配示意图，具体地：(a)是制作有Tx滤波器的晶圆装配正面示意图；(b)是制作有Rx滤波器的晶圆装配正面示意图；(c)是双工器芯片装配正面示意图；(d)是从Tx晶圆一侧看的双工器芯片透视图；
图4是本发明实施例一双工器的电路图；
图5是本发明实施例一双工器的电学性能图，具体地：(a)为幅频响应曲线图；(b)为隔离度曲线图；
图6是现有双工器和本发明实施例一双工器的电磁仿真结果对比图；
图7是本发明实施例二双工器的剖面示意图；
图8是本发明实施例二双工器的电路图；
图9是本发明实施例二双工器的电学性能图，具体地：(a)为幅频响应曲线图；(b)为隔离度曲线图。
图10是本发明实施例三双工器的剖面示意图；
图11是本发明实施例四双工器的剖面示意图。
具体实施方式
下面结合附图与实施例对本发明作进一步说明。
图1是现有双工器的剖面示意图。如图1所示，现有的双工器具有封装载板SU、制作有发送滤波器Tx的上晶圆W1和制作有接收滤波器Rx的下晶圆W2。上晶圆W1通过晶圆键合与下晶圆W2封装在一起，然后再通过焊球连接到封装载板SU的顶部焊盘上。其中：发送滤波器中需要与外部相连的发送谐振器，是通过导通孔VTx连接到下晶圆下表面的焊盘上再通过焊球与下方的封装载板SU连接在一起；接收滤波器中需要与外部相连的发送谐振器，是通过导通孔RTx连接到下晶圆下表面的焊盘上再通过焊球与下方的封装载板SU连接在一起。
实施例一
图2是本发明实施例一双工器100的剖面示意图。图3是该双工器的装配示意图，具体地：(a)是制作有发送滤波器Tx的晶圆装配正面示意图；(b)是制作有接收滤波器Rx的晶圆装配正面示意图；(c)是双工器芯片装配正面示意图；(d)是从发送滤波器Tx所在晶圆一侧看的双工器芯片透视图。图4是该双工器的电路图。
如图2和图3可知，双工器100从器件结构角度来看，具有封装载板SU、制作有发送滤波器Tx的上晶圆W1和制作有接收滤波器Rx的下晶圆W2。上晶圆W1通过晶圆键合与下晶圆W2封装在一起，然后再通过焊球连接到封装载板SU的顶部焊盘上。发射滤波器Tx和接收滤波器Rx在器件俯视方向上二者呈错开设置。接收滤波器Rx中， 需要与外部相连的接收谐振器通过制作在下晶圆W2上的导通孔VRx连接到位于下晶圆W2下表面的焊盘上，再通过焊球与下方的封装载板SU连接。发射滤波器Tx中，需要与外部相连的发射谐振器通过制作在上晶圆W1上的导通孔VTx连接到位于上晶圆W1上表面的焊盘上，再通过键合线LTx与所述封装载板上的键合手指相连。
该双工器100中，导热方向如图2中虚线箭头所示向下传导，该导热路径与图1所示的现有技术双工器的导热路径相比，热阻更小，传热效率更快。优选地，双工器100中，虽然发射滤波器Tx的各个电学连接都是通过位于芯片上方的键合线完成，但仍然需要在发射滤波器Tx位置下方的下晶圆W2底面设置并不与发射滤波器Tx有任何电连接的焊盘与焊球。这些焊盘与焊球被连接到位于封装载板SU上方的大面积地平面上，又通过位于封装载板SU中密集的导通孔连接到封装载板SU下方的地焊盘，最终连接到器件所在的系统电路板(图中未示出)上。这样做是为了提供热阻更小的散热路径(地平面及密集地孔)，以及保持芯片在封装载板上装配的稳固性。
如图4可知，该双工器100从电路原理角度来看，具有天线端子A、发送端子B和接收端子C。发送滤波器连接在所述天线端子A与所述发送端子B之间，由多个串联连接的第一串联单元(即TS1、TS2、TS3和TS4)和分别并联于每相邻两个第一串联单元间的第一并联单元(即TP1、TP2、TP3和TP4)组成。接收滤波器连接在所述天线端子A与所述接收端子C之间，由多个串联连接的第二串联单元(即RS1、RS2、RS3和RS4)和分别并联于每相邻两个第二串联单元间的第二并联单元(即RP1、RP2、RP3和RP4)组成。在发送滤波器中靠近发送端子的第一并联单元(即TP4)与所述接收滤波器中靠近接收端子的第二并联单元(即RP4)之间连接有互感M1(图2中也标出了该互感M1)。
图5是本发明实施例一双工器100在Tx与Rx电感互感值分别为5pH和10pH的幅频响应曲线图。具体地：(a)为幅频响应曲线图；(b)为隔离度曲线图。此双工器100工作于Band 3频率，Tx的通带范围为1710MHz到1785MHz，Rx的通带范围为1805MHz到1880MHz， 从系统性能考虑，需要它们在各自的通带具有较好的插入损耗(如1.5dB)，并在另一通带范围内具有较好的抑制和隔离度(如55dB)。图中实线为互感5pH时的滤波器响应曲线，虚线为互感10pH时的滤波器响应曲线。可以看到，当电感的互感耦合增大时，会导致带外抑制和隔离度的变差。
图6为现有双工器和本发明实施例双工器100的电磁仿真结果对比图，其中实线为现有双工器，虚线为本发明实施例双工器100，它们之间的互感耦合具有明显的差异，换算为互感量约为3-5pH左右。对两种双工器样品在同样条件下的实测对比，现有双工器的Tx功率容量仅有35.6dBm。本发明实施例双工器100的Tx功率容量可以达到38.3dBm。
由上可知，本发明实施例一的双工器中，将发射滤波器的谐振器通过键合线连接到封装载板上，第一方面，减少了器件热阻，提高了电性能。第二方面，与现有技术的导通孔连接方式相比，拉远了互感距离，降低了电感耦合，提高了容量功率，优化了器件性能。
实施例二
图7是本发明实施例二双工器200的剖面示意图。图8是本发明实施例二双工器200的电路图。
从器件结构来看，该双工器200和双工器100相比，还包括隔离晶圆W3。该隔离晶圆W3设置在上晶圆W1和下晶圆W2之间，隔离晶圆W3的上表面与上晶圆W1的下表面键合并且隔离晶圆W3的下表面与下晶圆W2的上表面键合。该隔离晶圆W3的材料可以为硅晶圆，具有材料通用易于获取的优点。该隔离晶圆W3的厚度一般为30至150微米。增设隔离晶圆W3可以将上晶圆W1与下晶圆W2之间的距离拉远，从原来的2-15微米增加到50至200微米，这样由于Tx与Rx重叠产生的电容值就会变为原来的1/5甚至1/20，这样就可以将交叠电容对双工器性能恶化的影响降到几乎没有，并进一步增大交叠的面积，从而缩小双工器的尺寸。换言之，在器件俯视方向上，发射滤波器和 接收滤波器可以呈部分交叠设置。具体地，所述发射滤波器和所述接收滤波器在器件俯视方向上投影的交并比为0.2至0.8。该双工器200从电路原理角度来看，该双工器200和双工器100相比，还包括隔离电容，该隔离电容设置在所述发送滤波器与所述接收滤波器之间(图8中也标出了隔离电容C和互感M2)。
图9是现有双工器和本发明实施例二双工器的电磁仿真结果对比图，具体地：(a)为幅频响应曲线图；(b)为隔离度曲线图。交叠电容产生在TS4输入端与RS4输入端之间时，按照现有技术制造的双工器交叠电容约为100fF，而插入了隔离晶圆可以将交叠电容值至少降低十分之一，按10fF计算。这两种情况下的双工器性能曲线如图9所示。可以看到，设置隔离晶圆之后，双工器的隔离度性能得到大幅提升，并且由于交叠区域可以设定为除了末级的所有谐振器之间，Tx与Rx的交叠面积可以达到各处滤波器的50％左右，这有效的减少了双工器的尺寸。
由上可知，本发明实施例二的双工器中，通过增设隔离晶圆，减少了隔离电容，提高了电性能。
实施例三
图10是本发明实施例三双工器300的剖面示意图。
如图10所示，该双工器由两片晶圆键合后封装形成，包括封装载板SU、位于上晶圆W1中的接收滤波器Rx以及位于下晶圆W2中的发射滤波器Tx。
接收滤波器Rx中，需要与外部相连的接收谐振器通过制作在上晶圆上的导通孔VRx连接到位于上晶圆上表面的焊盘上，再通过键合线LRx与封装载板SU上的键合手指相连。发射滤波器Tx中，需要与外部相连的发射谐振器通过制作在下晶圆W2上的导通孔VTx连接到位于下晶圆W2下表面的焊盘上，再通过焊球与下方的封装载板SU连接。
本发明实施例三的双工器300与本发明实施例一的双工器100发 明原理类似，有益效果也类似，不再赘述。
实施例四
图11是本发明实施例四双工器400的剖面示意图。
如图11所示，该双工器400与本发明实施例三双工器300相比，在上晶圆W1与下晶圆W2之间多设置了一层隔离晶圆W3。隔离晶圆W3的厚度为30-150微米。上晶圆W1与下晶圆W1的距离为50-200微米。
本发明实施例四的双工器400与本发明实施例二的双工器200发明原理类似，有益效果也类似，不再赘述。
上述虽然结合附图对本发明的具体实施方式进行了描述，但并非对本发明保护范围的限制，所属领域技术人员应该明白，在本发明的技术方案的基础上，本领域技术人员不需要付出创造性劳动即可做出的各种修改或变形仍在本发明的保护范围以内。

Claims (11)

  1. 一种双工器，其特征在于：
    该双工器由两片晶圆键合后封装形成，包括封装载板、位于上晶圆中的接收滤波器以及位于下晶圆中的发射滤波器；
    所述接收滤波器中的需要与外部相连的谐振器通过键合线与封装载板连接，或者，所述发射滤波器中的需要与外部相连的谐振器通过键合线与封装载板连接。
  2. 根据权利要求1所述的双工器，其特征在于，
    所述接收滤波器中，需要与外部相连的接收谐振器通过制作在所述下晶圆上的导通孔连接到位于所述下晶圆下表面的焊盘上，再通过焊球与下方的所述封装载板连接；
    所述发射滤波器中，需要与外部相连的发射谐振器通过制作在所述上晶圆上的导通孔连接到位于所述上晶圆上表面的焊盘上，再通过键合线与所述封装载板上的键合手指相连。
  3. 根据权利要求1所述的双工器，其特征在于，
    所述接收滤波器中，需要与外部相连的接收谐振器通过制作在所述上晶圆上的导通孔连接到位于所述上晶圆上表面的焊盘上，再通过键合线与所述封装载板上的键合手指相连；
    所述发射滤波器中，需要与外部相连的发射谐振器通过制作在所述下晶圆上的导通孔连接到位于所述下晶圆下表面的焊盘上，再通过焊球与下方的所述封装载板连接。
  4. 根据权利要求1至3任一项所述的双工器，其特征在于，所述键合线的材料为金、铜或者铝。
  5. 根据权利要求1至3任一项所述的双工器，其特征在于，所述 发送滤波器与所述接收滤波器之间存在隔离电容。
  6. 根据权利要求5所述的双工器，其特征在于，所述隔离电容为隔离晶圆，所述隔离晶圆的上表面与所述上晶圆的下表面键合，所述隔离晶圆的下表面与所述下晶圆的上表面键合。
  7. 根据权利要求6所述的双工器，其特征在于，所述隔离晶圆的材料为硅晶圆。
  8. 根据权利要求6所述的双工器，其特征在于，所述隔离晶圆的厚度为30-150微米。
  9. 根据权利要求6所述的双工器，其特征在于，所述上晶圆与所述下晶圆的距离为50-200微米。
  10. 根据权利要求6所述的双工器，其特征在于，在器件俯视方向上，所述发射滤波器和所述接收滤波器呈部分交叠设置。
  11. 根据权利要求6所述的双工器，其特征在于，所述发射滤波器和所述接收滤波器在器件俯视方向上投影的交并比为0.2至0.8。
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