WO2020124887A1 - 光阻剥离方法 - Google Patents

光阻剥离方法 Download PDF

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Publication number
WO2020124887A1
WO2020124887A1 PCT/CN2019/082369 CN2019082369W WO2020124887A1 WO 2020124887 A1 WO2020124887 A1 WO 2020124887A1 CN 2019082369 W CN2019082369 W CN 2019082369W WO 2020124887 A1 WO2020124887 A1 WO 2020124887A1
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WIPO (PCT)
Prior art keywords
photoresist
layer
electric field
substrate
stripping method
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PCT/CN2019/082369
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English (en)
French (fr)
Inventor
王建刚
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Publication of WO2020124887A1 publication Critical patent/WO2020124887A1/zh
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/202—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials for lift-off processes
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/42—Stripping or agents therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0231—Manufacture or treatment of multiple TFTs using masks, e.g. half-tone masks

Definitions

  • the present disclosure relates to the field of liquid crystal display, and particularly to a photoresist stripping method.
  • ITO Indium Tin Oxide
  • the existing method for preparing the ITO pattern is the photoresist wet etching method. An ITO film is vapor-deposited on the substrate, and then the photoresist is used for exposure, development, and etching to prepare the ITO pattern, and then the etching solution is used , The photoresist is removed, and the ITO pattern is finally obtained.
  • the photolithography process there is a process that replaces the etching method, which we call lift-off process (Lift-off).
  • a lithographic pattern is formed first, then a thin film is deposited, and finally the photoresist is removed with a chemical reagent, which is removed together with the unnecessary ITO film. This process is just the opposite of the etching process.
  • This method mainly uses the wet etching photoresist.
  • the disadvantage is that the photoresist adhesion is too strong, resulting in incomplete corrosion of the photoresist, and the remaining photoresist is difficult to find, which will cause black spots in subsequent etching, resulting in leakage
  • ITO as a powder microcrystal has a loose texture.
  • wet etching it is easy to form lateral erosion, causing edge burrs, and also forming leakage channels.
  • the existing photoresist stripping method cannot effectively remove the photoresist. Therefore, it is necessary to provide a photoresist stripping method to improve this defect.
  • the current photoresist stripping method mainly uses wet etching photoresist.
  • the disadvantage is that the photoresist adhesion is too strong, resulting in incomplete photoresist corrosion, and the remaining photoresist is difficult to find, which will cause black spots in subsequent etching.
  • ITO as a powder microcrystal, has a loose texture. During wet etching, it is easy to form lateral erosion, causing edge burrs, and also forming leakage channels.
  • the present disclosure provides a photoresist stripping method for solving the problem that the existing photoresist stripping method cannot effectively remove the photoresist.
  • the present disclosure provides a photoresist stripping method, including:
  • Step S10 providing a substrate, coating a layer of photoresist on the substrate to form a photoresist layer;
  • Step S20 applying a changing space electric field to deform the photoresist layer, and performing a film stripping process on the photoresist layer;
  • the photoresist contains additives that generate polarization under the space electric field.
  • the substrate includes:
  • a gate line layer, the gate line layer is provided on the glass substrate;
  • a gate insulating layer, the gate insulating layer is disposed on the gate line layer;
  • An amorphous silicon layer, the amorphous silicon layer is disposed on the gate insulating layer;
  • a source-drain electrode layer, the source-drain electrode layer is disposed on the gate insulating layer;
  • a passivation protection layer, the passivation protection layer is disposed on the source-drain electrode layer.
  • the step S10 includes:
  • Step S101 providing the substrate, and performing a half-mask process on the substrate to pattern the passivation protection layer;
  • Step S102 deposit a layer of photoresist on the passivation protection layer to form the photoresist layer, and perform a dry etching process on the passivation protection layer to form a through hole;
  • Step S103 depositing an indium tin oxide film on the photoresist layer to form a pixel electrode layer.
  • the space electric field is an alternating electric field.
  • the additive is one of an organic piezoelectric film, an electroactive molecule, or a gel-like material.
  • the additive is composed of diacrylate, monoacrylate, and photosensitive trigger.
  • the magnitude of the deformation amount generated by the photoresist layer is adjusted by adjusting the intensity of the space electric field.
  • the space electric field is set in the demolding machine.
  • the photoresist is a positive photoresist.
  • the thickness of the photoresist layer is less than 4 ⁇ m.
  • the present disclosure provides a photoresist stripping method, including:
  • Step S10 providing a substrate, coating a layer of photoresist on the substrate to form a photoresist layer;
  • Step S20 applying a changing space electric field to deform the photoresist layer, and performing a film stripping process on the photoresist layer;
  • the photoresist layer is adjusted by adjusting the intensity of the space electric field
  • the photoresist contains additives that generate polarization under the space electric field
  • the space electric field is an alternating electric field.
  • the substrate includes:
  • a gate line layer, the gate line layer is provided on the glass substrate;
  • a gate insulating layer, the gate insulating layer is disposed on the gate line layer;
  • An amorphous silicon layer, the amorphous silicon layer is disposed on the gate insulating layer;
  • a source-drain electrode layer, the source-drain electrode layer is disposed on the gate insulating layer;
  • a passivation protection layer, the passivation protection layer is disposed on the source-drain electrode layer.
  • the step S10 includes:
  • Step S101 providing the substrate, and performing a half-mask process on the substrate to pattern the passivation protection layer;
  • Step S102 deposit a layer of photoresist on the passivation protection layer to form the photoresist layer, and perform a dry etching process on the passivation protection layer to form a through hole;
  • Step S103 depositing an indium tin oxide film on the photoresist layer to form a pixel electrode layer.
  • the additive is one of an organic piezoelectric film, an electroactive molecule, or a gel-like material.
  • the additive is composed of diacrylate, monoacrylate, and photosensitive trigger.
  • the space electric field is set in the demolding machine.
  • the photoresist is a positive photoresist.
  • the thickness of the photoresist layer is less than 4 ⁇ m.
  • the present disclosure provides a photoresist stripping method, including:
  • Step S10 providing a substrate, coating a layer of photoresist on the substrate to form a photoresist layer;
  • Step S20 applying a changing space electric field to deform the photoresist layer, and performing a film stripping process on the photoresist layer;
  • the photoresist is a positive photoresist
  • the photoresist contains additives that generate polarization under the space electric field
  • the additives are organic piezoelectric films, electroactive molecules or gel materials.
  • the present disclosure applies a varying space electric field to the substrate to be removed from the photoresist to re-arrange the charges in the photoresist and rotate the dipole generated by the additive in the photogroup, which causes the photoresist to repeat
  • the deformation increases the contact area between the stripping solution and the photoresist, thereby reducing the adhesion between the photoresist and the adjacent film layer, and making the photoresist easier to peel.
  • FIG. 1 is a schematic flowchart of a photoresist stripping method provided by the present invention
  • FIG. 2 is a schematic flowchart of a photoresist stripping method provided by the present invention
  • FIG. 3 is a schematic structural diagram of a substrate in an embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of a substrate in an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of a substrate in an embodiment of the present invention.
  • FIG. 6 is a schematic structural diagram of a substrate in an embodiment of the present invention.
  • Fig. 7 is the chemical formula structure of the material used for the additive in the photoresist.
  • the present disclosure provides a photoresist stripping method, including:
  • Step S10 providing a substrate, coating a layer of photoresist on the substrate to form a photoresist layer 401;
  • Step S20 applying a changed space electric field to deform the photoresist layer 401, and stripping the photoresist layer 401;
  • the photoresist contains additives that generate polarization under the space electric field.
  • a substrate with a passivation protection layer is fabricated using a 3mask process.
  • FIG. 3 it is a schematic structural diagram of the substrate provided in this embodiment.
  • the substrate includes a glass substrate 301, a gate line layer 302, a gate insulating layer 303, an amorphous silicon layer, an amorphous silicon layer 304, an ohmic contact layer 305, a source-drain electrode layer 306, and a passivation protection layer 307.
  • the substrate in this embodiment is designed as a bottom gate structure, and the gate line layer 302 is provided on the glass substrate 301; the gate insulating layer 303 is provided on the gate line layer 302 and the glass substrate 301.
  • the gate The material used for the insulating layer 303 is SiN; the amorphous silicon layer 304 is disposed on the gate insulating layer 303; the ohmic contact layer 305 is disposed on the amorphous silicon layer 304; the source-drain electrode layer 306 is disposed on both sides of the upper surface of the ohmic contact layer 305 Part; the passivation protection layer 307 is provided on the source-drain electrode layer 306 and the gate insulating layer 303.
  • step S10 further includes:
  • Step S101 providing the substrate, and performing a half-mask process on the substrate to pattern the passivation protection layer 307;
  • Step S102 deposit a layer of photoresist on the passivation protection layer to form a photoresist layer 401, perform a dry etching process on the passivation protection layer 307, and form a through hole 402;
  • Step S103 deposit an indium tin oxide film on the photoresist layer to form a pixel electrode layer
  • step S102 after the dry etching process is performed on the passivation protection layer 307, a contact hole 402 as shown in FIG. 4 is formed, and the drain electrode 403 is exposed from the contact hole 402.
  • step S103 an indium tin oxide film is deposited on the photoresist layer 401 to form a pixel electrode layer 501.
  • the pixel electrode layer 501 directly contacts the drain electrode 403 through the through hole 402 provided on the passivation protection layer 307.
  • the substrate to be removed of the photoresist layer 401 is put into the mold release liquid of the mold release machine, and a variable space electric field is set in the mold release machine.
  • the changed space electric field is applied to the substrate 301, and under the action of the space electric field, the groups or additives in the photoresist layer 401 are polarized to generate dipoles.
  • the dipole is in an unbalanced state under the action of a changing space electric field, causing repeated rotation and deformation to deform the photoresist layer 401, increasing the contact area between the stripper and the photoresist layer 401, thereby reducing
  • the adhesion between the small photoresist layer 401 and the passivation protection layer 307 and the source-drain electrode layer 306 can remove the photoresist layer 401 and a part of the pixel electrode layer 501 attached to the photoresist layer 401, and finally obtain The pixel electrode pattern 601 shown in FIG. 7.
  • the changing space electric field is an alternating electric field
  • the dipole generated by the polarizable additive in the photoresist layer 401 rotates in an unbalanced state under the action of the alternating electric field, so that the photoresist layer 401 occurs Deformation, thereby changing the adhesion between the photoresist layer 401 and the adjacent film layer, to facilitate the penetration of the release film.
  • the magnitude of the deformation caused by the deformation of the photoresist layer 401 can be adjusted by adjusting the strength of the alternating electric field.
  • the photoresist in the selected photoresist layer 401 is a positive photoresist.
  • the positive photoresist has the characteristics of high graphic resolution and steep graphic edges, easy to remove glue, etc.
  • the photoresist is more conducive to the photoresist stripping process.
  • the thickness of the photoresist layer 401 should be less than 4 ⁇ m. If the thickness of the photoresist layer 401 is too large, it will not only increase the process time of coating photoresist and exposure, development and other processes, but also increase the stripping solution and photoresist. The reaction time greatly reduces the efficiency of actual production.
  • the photoresist in the photoresist layer 401 contains an additive that can be polarized under an electric field, and the additive can induce a dipole in a space electric field.
  • the polarizable additive may be an organic piezoelectric film or an electroactive molecule Or one of the gel materials.
  • the additives contained in the photoresist layer 401 that can be polarized under an electric field are composed of diacrylate, monoacrylate, and photosensitive trigger in proportion, and the proportion can be adjusted according to actual production requirements.
  • diacrylate 1701 from top to bottom are diacrylate 1701, diacrylate 702, monoacrylate 703, photosensitive trigger 704, the four are adjusted according to a certain ratio, of which the ratio of diacrylate 1701 is 24.75 %, the proportion of diacrylate 702 is 24.75%, the proportion of monoacrylate 703 is 49.5%, and the proportion of photosensitive trigger 704 is 1%.
  • the photoresist stripping method is suitable for photoresist stripping of an indium tin oxide film deposited in a 3mask process.
  • the photoresist stripping method is also suitable for stripping other photoresist layers. And the stripping of the individual photoresist.
  • the present disclosure provides a photoresist stripping method, including:
  • Step S10 providing a substrate, coating a layer of photoresist on the substrate to form a photoresist layer 401;
  • Step S20 applying a changed space electric field to deform the photoresist layer 401, and stripping the photoresist layer 401;
  • the magnitude of the deformation caused by the deformation of the photoresist layer 401 can be adjusted by adjusting the strength of the alternating electric field.
  • the photoresist contains additives that generate polarization under the space electric field.
  • the changed space electric field is an alternating electric field.
  • the role of the dipole generated by the polarizable additive in the photoresist layer 401 in the alternating electric field Under the unbalanced state, rotation occurs, so that the photoresist layer 401 is deformed, thereby changing the adhesion between the photoresist layer 401 and the adjacent film layer, which facilitates the penetration of the release film.
  • a substrate with a passivation protection layer is fabricated using a 3mask process.
  • FIG. 3 it is a schematic structural diagram of the substrate provided in this embodiment.
  • the substrate includes a glass substrate 301, a gate line layer 302, a gate insulating layer 303, an amorphous silicon layer, an amorphous silicon layer 304, an ohmic contact layer 305, a source-drain electrode layer 306, and a passivation protection layer 307.
  • the substrate in this embodiment is designed as a bottom gate structure, and the gate line layer 302 is provided on the glass substrate 301; the gate insulating layer 303 is provided on the gate line layer 302 and the glass substrate 301.
  • the gate The material used for the insulating layer 303 is SiN; the amorphous silicon layer 304 is disposed on the gate insulating layer 303; the ohmic contact layer 305 is disposed on the amorphous silicon layer 304; the source-drain electrode layer 306 is disposed on both sides of the upper surface of the ohmic contact layer 305 Part; the passivation protection layer 307 is provided on the source-drain electrode layer 306 and the gate insulating layer 303.
  • step S10 further includes:
  • Step S101 providing the substrate, and performing a half-mask process on the substrate to pattern the passivation protection layer 307;
  • Step S102 deposit a layer of photoresist on the passivation protection layer to form a photoresist layer 401, perform a dry etching process on the passivation protection layer 307, and form a through hole 402;
  • Step S103 deposit an indium tin oxide film on the photoresist layer to form a pixel electrode layer
  • step S102 after the dry etching process is performed on the passivation protection layer 307, a contact hole 402 as shown in FIG. 4 is formed, and the drain electrode 403 is exposed from the contact hole 402.
  • step S103 an indium tin oxide film is deposited on the photoresist layer 401 to form a pixel electrode layer 501.
  • the pixel electrode layer 501 directly contacts the drain electrode 403 through the through hole 402 provided on the passivation protection layer 307.
  • the substrate to be removed of the photoresist layer 401 is put into the mold release liquid of the mold release machine, and a variable space electric field is set in the mold release machine.
  • the changed space electric field is applied to the substrate 301, and under the action of the space electric field, the groups or additives in the photoresist layer 401 are polarized to generate dipoles.
  • the dipole is in an unbalanced state under the action of a changing space electric field, causing repeated rotation and deformation to deform the photoresist layer 401, increasing the contact area between the stripper and the photoresist layer 401, thereby reducing
  • the adhesion between the small photoresist layer 401 and the passivation protection layer 307 and the source-drain electrode layer 306 can remove the photoresist layer 401 and a part of the pixel electrode layer 501 attached to the photoresist layer 401, and finally obtain The pixel electrode pattern 601 shown in FIG. 7.
  • the photoresist in the selected photoresist layer 401 is a positive photoresist.
  • the positive photoresist has the characteristics of high graphic resolution and steep graphic edges, easy to remove glue, etc.
  • the photoresist is more conducive to the photoresist stripping process.
  • the thickness of the photoresist layer 401 should be less than 4 ⁇ m. If the thickness of the photoresist layer 401 is too large, it will not only increase the process time of coating photoresist and exposure, development and other processes, but also increase the stripping solution and photoresist. The reaction time greatly reduces the efficiency of actual production.
  • the photoresist in the photoresist layer 401 contains an additive that can be polarized under an electric field, and the additive can induce a dipole in a space electric field.
  • the polarizable additive may be an organic piezoelectric film or an electroactive molecule Or one of the gel materials.
  • the additives contained in the photoresist layer 401 that can be polarized under an electric field are composed of diacrylate, monoacrylate, and photosensitive trigger in proportion, and the proportion can be adjusted according to actual production requirements.
  • diacrylate 1701 from top to bottom are diacrylate 1701, diacrylate 702, monoacrylate 703, photosensitive trigger 704, the four are adjusted according to a certain ratio, of which the ratio of diacrylate 1701 is 24.75 %, the proportion of diacrylate 702 is 24.75%, the proportion of monoacrylate 703 is 49.5%, and the proportion of photosensitive trigger 704 is 1%.
  • the photoresist stripping method is suitable for photoresist stripping of an indium tin oxide film deposited in a 3mask process.
  • the photoresist stripping method is also suitable for stripping other photoresist layers. And the stripping of the individual photoresist.
  • the present disclosure provides a photoresist stripping method, including:
  • Step S10 providing a substrate, coating a layer of photoresist on the substrate to form a photoresist layer 401;
  • Step S20 applying a changed space electric field to deform the photoresist layer 401, and stripping the photoresist layer 401;
  • the photoresist in the selected photoresist layer 401 is a positive photoresist.
  • the positive photoresist has the characteristics of high graphic resolution and sharp edge of the graphic, easy to remove glue, etc.
  • the photoresist is more conducive to the photoresist stripping process.
  • the photoresist contains additives that generate polarization under the space electric field.
  • the additives can induce dipoles in the space electric field.
  • Polarizable additives may be organic One of piezoelectric film, electroactive molecule or gel material.
  • a 3mask process is used to fabricate the substrate to the passivation protection layer.
  • FIG. 3 it is a schematic structural diagram of the substrate provided in this embodiment.
  • the substrate includes a glass substrate 301, a gate line layer 302, a gate insulating layer 303, an amorphous silicon layer, an amorphous silicon layer 304, an ohmic contact layer 305, a source-drain electrode layer 306, and a passivation protection layer 307.
  • the substrate in this embodiment is designed as a bottom gate structure, and the gate line layer 302 is provided on the glass substrate 301; the gate insulating layer 303 is provided on the gate line layer 302 and the glass substrate 301.
  • the gate The material of the insulating layer 303 is SiN; the amorphous silicon layer 304 is disposed on the gate insulating layer 303; the ohmic contact layer 305 is disposed on the amorphous silicon layer 304; the source-drain electrode layer 306 is disposed on both sides of the upper surface of the ohmic contact layer 305 Part; the passivation protection layer 307 is provided on the source-drain electrode layer 306 and the gate insulating layer 303.
  • step S10 further includes:
  • Step S101 providing the substrate, and performing a half-mask process on the substrate to pattern the passivation protection layer 307;
  • Step S102 deposit a layer of photoresist on the passivation protection layer to form a photoresist layer 401, perform a dry etching process on the passivation protection layer 307, and form a through hole 402;
  • Step S103 deposit an indium tin oxide film on the photoresist layer to form a pixel electrode layer
  • step S102 after the dry etching process is performed on the passivation protection layer 307, a contact hole 402 as shown in FIG. 4 is formed, and the drain electrode 403 is exposed from the contact hole 402.
  • step S103 an indium tin oxide film is deposited on the photoresist layer 401 to form a pixel electrode layer 501.
  • the pixel electrode layer 501 directly contacts the drain electrode 403 through the through hole 402 provided on the passivation protection layer 307.
  • the substrate to be removed of the photoresist layer 401 is put into the mold release liquid of the mold release machine, and a variable space electric field is set in the mold release machine.
  • the changed space electric field is applied to the substrate 301, and under the action of the space electric field, the groups or additives in the photoresist layer 401 are polarized to generate dipoles.
  • the dipole is in an unbalanced state under the action of a changing space electric field, causing repeated rotation and deformation, deforming the photoresist layer 401, and increasing the contact area between the stripper and the photoresist layer 401, thereby reducing
  • the adhesion between the small photoresist layer 401 and the passivation protection layer 307 and the source-drain electrode layer 306 can remove the photoresist layer 401 and a part of the pixel electrode layer 501 attached to the photoresist layer 401, and finally obtain The pixel electrode pattern 601 shown in FIG. 7.
  • the magnitude of the deformation caused by the deformation of the photoresist layer 401 can be adjusted by adjusting the strength of the alternating electric field.
  • the thickness of the photoresist layer 401 should be less than 4 ⁇ m. If the thickness of the photoresist layer 401 is too large, it will not only increase the process time of coating photoresist and exposure, development and other processes, but also increase the stripping solution and photoresist. The reaction time greatly reduces the efficiency of actual production.
  • the additives contained in the photoresist layer 401 that can be polarized under an electric field are composed of diacrylate, monoacrylate, and photosensitive trigger in proportion, and the proportion can be adjusted according to actual production requirements.
  • diacrylate 1701 from top to bottom are diacrylate 1701, diacrylate 702, monoacrylate 703, photosensitive trigger 704, the four are adjusted according to a certain ratio, of which the ratio of diacrylate 1701 is 24.75 %, the proportion of diacrylate 702 is 24.75%, the proportion of monoacrylate 703 is 49.5%, and the proportion of photosensitive trigger 704 is 1%.
  • the photoresist stripping method is suitable for photoresist stripping of an indium tin oxide film deposited in a 3mask process.
  • the photoresist stripping method is also suitable for stripping other photoresist layers. And the stripping of the individual photoresist.
  • the electric charges in the photoresist are rearranged and rotated with the dipole generated by the additives in the photogroup, so that the photoresist is repeatedly deformed, which increases The contact area of the film liquid and the photoresist, thereby reducing the adhesion between the photoresist and the adjacent film layer, making the photoresist easier to peel off.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Liquid Crystal (AREA)

Abstract

本发明提供一种光阻剥离方法，所述光阻剥离方法至少包括步骤S10：提供一块基板，在所述基板上涂布一层光阻，形成光阻层；步骤S20：施加变化的空间电场，使所述光阻层产生形变，对所述光阻层进行脱膜工艺；其中，所述光阻中含有在所述空间电场下产生极化的添加剂。

Description

光阻剥离方法 技术领域
本揭示涉及液晶显示领域，尤其涉及一种光阻剥离方法。
 背景技术
ITO(Indium Tin Oxide)作为铟锡金属氧化物，具有很好的导电性和透明性，因此，它是液晶显示面板中透明电极最常用的薄膜材料。现有制备ITO图形的方法为光阻湿法腐蚀法，在基板上蒸镀一层ITO薄膜，然后在其上用光阻进行曝光、显影、刻蚀，制备出ITO图案，再利用腐蚀液浸泡，将光阻去除，最终得到所述的ITO图案。在光刻工艺中，有一种替代刻蚀方法的工艺，我们称之为剥离工艺（Lift-off）。在剥离工艺中，首先形成光刻图形，然后沉积薄膜，最后用化学试剂去除光阻，此时连同不需要的ITO薄膜一起去除，这个过程正好与刻蚀过程相反。
这种方法主要采用的是湿法腐蚀光阻，其弊端是光阻的粘附性太强，致使光阻腐蚀不彻底，残留的光阻难以发现，会导致后续刻蚀出现黑点，造成漏电等情况，同时ITO作为粉末微晶体，质地疏松，在湿法腐蚀过程中，易形成横向侵蚀，造成边缘毛刺，也会形成漏电通道。
综上所述，现有光阻剥离方法不能有效的去除光阻。故，有必要提供一种光阻剥离方法来改善这一缺陷。
 技术问题
目前光阻剥离方法主要采用的是湿法腐蚀光阻，其弊端是光阻的粘附性太强，致使光阻腐蚀不彻底，残留的光阻难以发现，会导致后续刻蚀出现黑点，造成漏电等情况，同时ITO作为粉末微晶体，质地疏松，在湿法腐蚀过程中，易形成横向侵蚀，造成边缘毛刺，也会形成漏电通道。
 技术解决方案
本揭示提供一种光阻剥离方法，用于解决现有光阻剥离方法不能有效的去除光阻的问题。
本揭示提供一种光阻剥离方法，包括：
步骤S10：提供一块基板，在所述基板上涂布一层光阻，形成光阻层；
步骤S20：施加变化的空间电场，使所述光阻层产生形变，对所述光阻层进行脱膜工艺；
其中，所述光阻中含有在所述空间电场下产生极化的添加剂。
根据本揭示一实施例，所述基板包括：
玻璃基板；
栅极线层，所述栅极线层设置于所述玻璃基板上；
栅极绝缘层，所述栅极绝缘层设置于所述栅极线层上；
非晶硅层，所述非晶硅层设置于所述栅极绝缘层上；
源漏电极层，所述源漏电极层设置于所述栅极绝缘层上；
钝化保护层，所述钝化保护层设置于所述源漏电极层上。
根据本揭示一实施例，所述步骤S10包括：
步骤S101：提供所述基板，对所述基板进行半掩膜工艺制程，使所述钝化保护层图案化；
步骤S102：在所述钝化保护层上沉积一层光阻，形成所述光阻层，对所述钝化保护层进行干刻蚀工艺，形成通孔；
步骤S103：在所述光阻层上沉积一层氧化铟锡薄膜，形成像素电极层。
根据本揭示一实施例，所述空间电场为交变电场。
根据本揭示一实施例，所述添加剂是有机压电薄膜、电活性分子或凝胶类材料其中的一种。
根据本揭示一实施例，所述添加剂由二丙烯酸酯、单丙烯酸酯、光敏触发剂组成。
根据本揭示一实施例，所述光阻层产生形变量的大小通过调整所述空间电场的强度进行调节。
根据本揭示一实施例，所述空间电场设置于所述脱模机内。
根据本揭示一实施例，所述光阻为正性光阻。
根据本揭示一实施例，所述光阻层的厚度小于4μm。
本揭示提供一种光阻剥离方法，包括：
步骤S10：提供一块基板，在所述基板上涂布一层光阻，形成光阻层；
步骤S20：施加变化的空间电场，使所述光阻层产生形变，对所述光阻层进行脱膜工艺；
其中，所述光阻层产生形变量的大小通过调整所述空间电场的强度进行调节，所述光阻中含有在所述空间电场下产生极化的添加剂，所述空间电场为交变电场。
根据本揭示一实施例，所述基板包括：
玻璃基板；
栅极线层，所述栅极线层设置于所述玻璃基板上；
栅极绝缘层，所述栅极绝缘层设置于所述栅极线层上；
非晶硅层，所述非晶硅层设置于所述栅极绝缘层上；
源漏电极层，所述源漏电极层设置于所述栅极绝缘层上；
钝化保护层，所述钝化保护层设置于所述源漏电极层上。
根据本揭示一实施例，所述步骤S10包括：
步骤S101：提供所述基板，对所述基板进行半掩膜工艺制程，使所述钝化保护层图案化；
步骤S102：在所述钝化保护层上沉积一层光阻，形成所述光阻层，对所述钝化保护层进行干刻蚀工艺，形成通孔；
步骤S103：在所述光阻层上沉积一层氧化铟锡薄膜，形成像素电极层。
根据本揭示一实施例，所述添加剂是有机压电薄膜、电活性分子或凝胶类材料其中的一种。
根据本揭示一实施例，所述添加剂由二丙烯酸酯、单丙烯酸酯、光敏触发剂组成。
根据本揭示一实施例，所述空间电场设置于所述脱模机内。
根据本揭示一实施例，所述光阻为正性光阻。
根据本揭示一实施例，所述光阻层的厚度小于4μm。
本揭示提供一种光阻剥离方法，包括：
步骤S10：提供一块基板，在所述基板上涂布一层光阻，形成光阻层；
步骤S20：施加变化的空间电场，使所述光阻层产生形变，对所述光阻层进行脱膜工艺；
其中，所述光阻为正性光阻，所述光阻中含有在所述空间电场下产生极化的添加剂，所述添加剂是是有机压电薄膜、电活性分子或凝胶类材料其中的一种。
 有益效果
本揭示的有益效果：本揭示通过对待去除光阻的基板施加变化的空间电场，使光阻内的电荷重新排布，并使光组内添加剂产生的偶极子进行转动，使得光阻发生反复变形，增大了脱膜液与光阻的接触面积，从而减小光阻与相邻膜层之间的粘附力，使光阻更加易于剥离。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是揭示的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明提供的光阻剥离方法的流程示意图；
图2为本发明提供的光阻剥离方法的流程示意图；
图3为本发明实施例中基板的结构示意图；
图4为本发明实施例中基板的结构示意图；
图5为本发明实施例中基板的结构示意图；
图6为本发明实施例中基板的结构示意图；
图7为光阻内添加剂所用材料的化学式结构。
 本发明的实施方式
以下各实施例的说明是参考附加的图示，用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本申请，而非用以限制本申请。在图中，结构相似的单元是用以相同标号表示。
下面结合附图和具体实施例对本揭示做进一步的说明：
实施例一：
本揭示提供一种光阻剥离方法，包括：
步骤S10：提供一块基板,在所述基板上涂布一层光阻，形成光阻层401；
步骤S20：施加变化的空间电场，使所述光阻层401产生形变，对所述光阻层401进行脱膜；
其中，所述光阻中含有在所述空间电场下产生极化的添加剂。
在本实施例中采用3mask工艺制作至钝化保护层的基板，如图3所示，为本实施例提供的基板的结构示意图。所述基板包括：玻璃基板301、栅极线层302、栅极绝缘层303、非晶硅层非晶硅层304、欧姆接触层305、源漏电极层306以及钝化保护层307。
本实施例中的基板设计为底栅结构，栅极线层302设置在玻璃基板301上；栅极绝缘层303设置于栅极线层302以及玻璃基板301上，在本实施例中，栅极绝缘层303所用材料为SiN；非晶硅层304设置于栅极绝缘层303上；欧姆接触层305设置于非晶硅层304上；源漏电极层306设置于欧姆接触层305上表面两侧部分；钝化保护层307设置于源漏电极层306以及栅极绝缘层303上。
在本市实施例中，所述步骤S10还包括：
步骤S101：提供所述基板，对所述基板进行半掩膜工艺制程，使所述钝化保护层307图案化；
步骤S102：在所述钝化保护层上沉积一层光阻，形成光阻层401，对所述钝化保护层307进行干刻蚀工艺，形成通孔402；
步骤S103：在所述光阻层上沉积一层氧化铟锡薄膜，形成像素电极层；
在步骤S102中，对钝化保护层307进行干刻蚀制程后，形成如图4所示的接触孔402，将漏极403从接触孔402中裸露出来。
在步骤S103中，在光阻层401上沉积一层氧化铟锡薄膜，形成像素电极层501。如图5所示，像素电极层501通过设置于钝化保护层307上的通孔402直接与漏极403相接触。
在所述步骤S20中，沉积完成像素电极层501后，将待去除光阻层401的基板放入脱模机的脱膜液中，脱模机中设置有变化的空间电场。在脱膜工艺过程中，对所述基板301施加所述变化的空间电场，在空间电场作用下，光阻层401内的基团或添加剂发生极化，产生偶极子。偶极子在不断变化的空间电场作用下，处于不平衡状态，产生反复的旋转变形，使光阻层401产生形变，增大了脱膜液与光阻层401之间的接触面积，从而减小光阻层401与钝化保护层307以及源漏电极层306之间的粘附力，就可以将光阻层401以及附着在光阻层401上的部分像素电极层501去除，最终得到如图7所示的像素电极图案601。
优选的，所述变化的空间电场为交变电场，光阻层401内可极化的添加剂产生的偶极子在交变电场的作用下，处于不平衡状态发生转动，使得光阻层401发生形变，从而改变光阻层401与相邻膜层之间的粘附性，便于脱膜液的渗入。
优选的，光阻层401发生变形所产生形变量的大小可以通过调整所述交变电场的强度进行调节，所施加空间电场的强度越大，光阻层401所产生的形变量也就越大。
优选的，所选用的光阻层401中的光阻为正性光阻，相对于负性光阻，正性光阻具有图形分辨率高以及图形边缘陡直，去胶容易等特点，比负性光阻更有利于光阻剥离工艺。
优选的，光阻层401的厚度应小于4μm，光阻层401的厚度若太大，不仅会增加涂布光阻以及曝光、显影等制程的时间，同时也会增加脱膜液与光阻的反应时间，大大降低了实际生产的效率。
优选的，光阻层401中的光阻含有在电场下可极化的添加剂，所述添加剂能够在空间电场内感应产生偶极子，可极化的添加剂可以是有机压电薄膜、电活性分子或凝胶类材料其中的一种。
优选的，光阻层401中的光阻含有的在电场下可极化的添加剂是由二丙烯酸酯、单丙烯酸酯、光敏触发剂按比例组成，比例可以根据实际生产需求进行调节。
优选的，如图7所示，从上往下依次为二丙烯酸酯①701、二丙烯酸酯②702，单丙烯酸酯703、光敏触发剂704，四者按照一定比例调节，其中二丙烯酸酯①701比例为24.75%，二丙烯酸酯②702比例为24.75%，单丙烯酸酯703比例为49.5%，光敏触发剂704比例为1%。
优选的，所述光阻剥离方法适用于在3mask工艺中，沉积氧化铟锡薄膜的光阻剥离，在其他一些实施例中，所述光阻剥离方法同样适用于沉积其他膜层光阻的剥离以及单独光阻的剥离。
实施例二：
本揭示提供一种光阻剥离方法，包括：
步骤S10：提供一块基板,在所述基板上涂布一层光阻，形成光阻层401；
步骤S20：施加变化的空间电场，使所述光阻层401产生形变，对所述光阻层401进行脱膜；
其中，光阻层401发生变形所产生形变量的大小可以通过调整所述交变电场的强度进行调节，所施加空间电场的强度越大，光阻层401所产生的形变量也就越大，所述光阻中含有在所述空间电场下产生极化的添加剂，所述变化的空间电场为交变电场，光阻层401内可极化的添加剂产生的偶极子在交变电场的作用下，处于不平衡状态发生转动，使得光阻层401发生形变，从而改变光阻层401与相邻膜层之间的粘附性，便于脱膜液的渗入。
在本实施例中采用3mask工艺制作至钝化保护层的基板，如图3所示，为本实施例提供的基板的结构示意图。所述基板包括：玻璃基板301、栅极线层302、栅极绝缘层303、非晶硅层非晶硅层304、欧姆接触层305、源漏电极层306以及钝化保护层307。
本实施例中的基板设计为底栅结构，栅极线层302设置在玻璃基板301上；栅极绝缘层303设置于栅极线层302以及玻璃基板301上，在本实施例中，栅极绝缘层303所用材料为SiN；非晶硅层304设置于栅极绝缘层303上；欧姆接触层305设置于非晶硅层304上；源漏电极层306设置于欧姆接触层305上表面两侧部分；钝化保护层307设置于源漏电极层306以及栅极绝缘层303上。
在本市实施例中，所述步骤S10还包括：
步骤S101：提供所述基板，对所述基板进行半掩膜工艺制程，使所述钝化保护层307图案化；
步骤S102：在所述钝化保护层上沉积一层光阻，形成光阻层401，对所述钝化保护层307进行干刻蚀工艺，形成通孔402；
步骤S103：在所述光阻层上沉积一层氧化铟锡薄膜，形成像素电极层；
在步骤S102中，对钝化保护层307进行干刻蚀制程后，形成如图4所示的接触孔402，将漏极403从接触孔402中裸露出来。
在步骤S103中，在光阻层401上沉积一层氧化铟锡薄膜，形成像素电极层501。如图5所示，像素电极层501通过设置于钝化保护层307上的通孔402直接与漏极403相接触。
在所述步骤S20中，沉积完成像素电极层501后，将待去除光阻层401的基板放入脱模机的脱膜液中，脱模机中设置有变化的空间电场。在脱膜工艺过程中，对所述基板301施加所述变化的空间电场，在空间电场作用下，光阻层401内的基团或添加剂发生极化，产生偶极子。偶极子在不断变化的空间电场作用下，处于不平衡状态，产生反复的旋转变形，使光阻层401产生形变，增大了脱膜液与光阻层401之间的接触面积，从而减小光阻层401与钝化保护层307以及源漏电极层306之间的粘附力，就可以将光阻层401以及附着在光阻层401上的部分像素电极层501去除，最终得到如图7所示的像素电极图案601。
优选的，所选用的光阻层401中的光阻为正性光阻，相对于负性光阻，正性光阻具有图形分辨率高以及图形边缘陡直，去胶容易等特点，比负性光阻更有利于光阻剥离工艺。
优选的，光阻层401的厚度应小于4μm，光阻层401的厚度若太大，不仅会增加涂布光阻以及曝光、显影等制程的时间，同时也会增加脱膜液与光阻的反应时间，大大降低了实际生产的效率。
优选的，光阻层401中的光阻含有在电场下可极化的添加剂，所述添加剂能够在空间电场内感应产生偶极子，可极化的添加剂可以是有机压电薄膜、电活性分子或凝胶类材料其中的一种。
优选的，光阻层401中的光阻含有的在电场下可极化的添加剂是由二丙烯酸酯、单丙烯酸酯、光敏触发剂按比例组成，比例可以根据实际生产需求进行调节。
优选的，如图7所示，从上往下依次为二丙烯酸酯①701、二丙烯酸酯②702，单丙烯酸酯703、光敏触发剂704，四者按照一定比例调节，其中二丙烯酸酯①701比例为24.75%，二丙烯酸酯②702比例为24.75%，单丙烯酸酯703比例为49.5%，光敏触发剂704比例为1%。
优选的，所述光阻剥离方法适用于在3mask工艺中，沉积氧化铟锡薄膜的光阻剥离，在其他一些实施例中，所述光阻剥离方法同样适用于沉积其他膜层光阻的剥离以及单独光阻的剥离。
实施例三：
本揭示提供一种光阻剥离方法，包括：
步骤S10：提供一块基板,在所述基板上涂布一层光阻，形成光阻层401；
步骤S20：施加变化的空间电场，使所述光阻层401产生形变，对所述光阻层401进行脱膜；
其中，所选用的光阻层401中的光阻为正性光阻，相对于负性光阻，正性光阻具有图形分辨率高以及图形边缘陡直，去胶容易等特点，比负性光阻更有利于光阻剥离工艺，所述光阻中含有在所述空间电场下产生极化的添加剂，所述添加剂能够在空间电场内感应产生偶极子，可极化的添加剂可以是有机压电薄膜、电活性分子或凝胶类材料其中的一种。
在本实施例中采用3mask工艺制作至钝化保护层的基板，如图3所示，为本实施例提供的基板的结构示意图。所述基板包括：玻璃基板301、栅极线层302、栅极绝缘层303、非晶硅层非晶硅层304、欧姆接触层305、源漏电极层306以及钝化保护层307。
本实施例中的基板设计为底栅结构，栅极线层302设置在玻璃基板301上；栅极绝缘层303设置于栅极线层302以及玻璃基板301上，在本实施例中，栅极绝缘层303所用材料为SiN；非晶硅层304设置于栅极绝缘层303上；欧姆接触层305设置于非晶硅层304上；源漏电极层306设置于欧姆接触层305上表面两侧部分；钝化保护层307设置于源漏电极层306以及栅极绝缘层303上。
在本市实施例中，所述步骤S10还包括：
步骤S101：提供所述基板，对所述基板进行半掩膜工艺制程，使所述钝化保护层307图案化；
步骤S102：在所述钝化保护层上沉积一层光阻，形成光阻层401，对所述钝化保护层307进行干刻蚀工艺，形成通孔402；
步骤S103：在所述光阻层上沉积一层氧化铟锡薄膜，形成像素电极层；
在步骤S102中，对钝化保护层307进行干刻蚀制程后，形成如图4所示的接触孔402，将漏极403从接触孔402中裸露出来。
在步骤S103中，在光阻层401上沉积一层氧化铟锡薄膜，形成像素电极层501。如图5所示，像素电极层501通过设置于钝化保护层307上的通孔402直接与漏极403相接触。
在所述步骤S20中，沉积完成像素电极层501后，将待去除光阻层401的基板放入脱模机的脱膜液中，脱模机中设置有变化的空间电场。在脱膜工艺过程中，对所述基板301施加所述变化的空间电场，在空间电场作用下，光阻层401内的基团或添加剂发生极化，产生偶极子。偶极子在不断变化的空间电场作用下，处于不平衡状态，产生反复的旋转变形，使光阻层401产生形变，增大了脱膜液与光阻层401之间的接触面积，从而减小光阻层401与钝化保护层307以及源漏电极层306之间的粘附力，就可以将光阻层401以及附着在光阻层401上的部分像素电极层501去除，最终得到如图7所示的像素电极图案601。
优选的，光阻层401发生变形所产生形变量的大小可以通过调整所述交变电场的强度进行调节，所施加空间电场的强度越大，光阻层401所产生的形变量也就越大。
优选的，光阻层401的厚度应小于4μm，光阻层401的厚度若太大，不仅会增加涂布光阻以及曝光、显影等制程的时间，同时也会增加脱膜液与光阻的反应时间，大大降低了实际生产的效率。
优选的，光阻层401中的光阻含有的在电场下可极化的添加剂是由二丙烯酸酯、单丙烯酸酯、光敏触发剂按比例组成，比例可以根据实际生产需求进行调节。
优选的，如图7所示，从上往下依次为二丙烯酸酯①701、二丙烯酸酯②702，单丙烯酸酯703、光敏触发剂704，四者按照一定比例调节，其中二丙烯酸酯①701比例为24.75%，二丙烯酸酯②702比例为24.75%，单丙烯酸酯703比例为49.5%，光敏触发剂704比例为1%。
优选的，所述光阻剥离方法适用于在3mask工艺中，沉积氧化铟锡薄膜的光阻剥离，在其他一些实施例中，所述光阻剥离方法同样适用于沉积其他膜层光阻的剥离以及单独光阻的剥离。
本发明通过对待去除光阻的基板施加变化的空间电场，使光阻内的电荷重新排布，并与光组内添加剂产生的偶极子进行转动，使得光阻发生反复变形，增大了脱膜液与光阻的接触面积，从而减小光阻与相邻膜层之间的粘附力，使光阻更加易于剥离。
综上所述，虽然本揭示以优选实施例揭露如上，但上述优选实施例并非用以限制本揭示，本领域的普通技术人员，在不脱离本揭示的精神和范围内，均可作各种更动与润饰，因此本揭示的保护范围以权利要求界定的范围为基准。

Claims (19)

  1. 一种光阻剥离方法，包括：
    步骤S10：提供一块基板，在所述基板上涂布一层光阻，形成光阻层；
    步骤S20：施加变化的空间电场，使所述光阻层产生形变，对所述光阻层进行脱膜工艺；
    其中，所述光阻中含有在所述空间电场下产生极化的添加剂。
  2. 如权利要求1所述的光阻剥离方法，其中，所述基板包括：
    玻璃基板；
    栅极线层，所述栅极线层设置于所述玻璃基板上；
    栅极绝缘层，所述栅极绝缘层设置于所述栅极线层上；
    非晶硅层，所述非晶硅层设置于所述栅极绝缘层上；
    源漏电极层，所述源漏电极层设置于所述栅极绝缘层上；
    钝化保护层，所述钝化保护层设置于所述源漏电极层上。
  3. 如权利要求2所述的光阻剥离方法，其中，所述步骤S10包括：
    步骤S101：提供所述基板，对所述基板进行半掩膜工艺制程，使所述钝化保护层图案化；
    步骤S102：在所述钝化保护层上沉积一层光阻，形成所述光阻层，对所述钝化保护层进行干刻蚀工艺，形成通孔；
    步骤S103：在所述光阻层上沉积一层氧化铟锡薄膜，形成像素电极层。
  4. 如权利要求1所述的光阻剥离方法，其中，所述空间电场为交变电场。
  5. 如权利要求1所述的光阻剥离方法，其中，所述添加剂是有机压电薄膜、电活性分子或凝胶类材料其中的一种。
  6. 如权利要求5所述的光阻剥离方法，其中，所述添加剂由二丙烯酸酯、单丙烯酸酯、光敏触发剂组成。
  7. 如权利要求1所述的光阻剥离方法，其中，所述光阻层产生形变量的大小通过调整所述空间电场的强度进行调节。
  8. 如权利要求7所述的光阻剥离方法，其中，所述空间电场设置于所述脱模机内。
  9. 如权利要求1所述的光阻剥离方法，其中，所述光阻为正性光阻。
  10. 如权利要求1所述的光阻剥离方法，其中，所述光阻层的厚度小于4μm。
  11. 一种光阻剥离方法，包括：
    步骤S10：提供一块基板，在所述基板上涂布一层光阻，形成光阻层；
    步骤S20：施加变化的空间电场，使所述光阻层产生形变，对所述光阻层进行脱膜工艺；
    其中，所述光阻层产生形变量的大小通过调整所述空间电场的强度进行调节，所述光阻中含有在所述空间电场下产生极化的添加剂，所述空间电场为交变电场。
  12. 如权利要求11所述的光阻剥离方法，其中，所述基板包括：
    玻璃基板；
    栅极线层，所述栅极线层设置于所述玻璃基板上；
    栅极绝缘层，所述栅极绝缘层设置于所述栅极线层上；
    非晶硅层，所述非晶硅层设置于所述栅极绝缘层上；
    源漏电极层，所述源漏电极层设置于所述栅极绝缘层上；
    钝化保护层，所述钝化保护层设置于所述源漏电极层上。
  13. 如权利要求12所述的光阻剥离方法，其中，所述步骤S10包括：
    步骤S101：提供所述基板，对所述基板进行半掩膜工艺制程，使所述钝化保护层图案化；
    步骤S102：在所述钝化保护层上沉积一层光阻，形成所述光阻层，对所述钝化保护层进行干刻蚀工艺，形成通孔；
    步骤S103：在所述光阻层上沉积一层氧化铟锡薄膜，形成像素电极层。
  14. 如权利要求11所述的光阻剥离方法，其中，所述添加剂是有机压电薄膜、电活性分子或凝胶类材料其中的一种。
  15. 如权利要求14所述的光阻剥离方法，其中，所述添加剂由二丙烯酸酯、单丙烯酸酯、光敏触发剂组成。
  16. 如权利要求11所述的光阻剥离方法，其中，所述空间电场设置于所述脱模机内。
  17. 如权利要求11所述的光阻剥离方法，其中，所述光阻为正性光阻。
  18. 如权利要求11所述的光阻剥离方法，其中，所述光阻层的厚度小于4μm。
  19. 一种光阻剥离方法，包括：
    步骤S10：提供一块基板，在所述基板上涂布一层光阻，形成光阻层；
    步骤S20：施加变化的空间电场，使所述光阻层产生形变，对所述光阻层进行脱膜工艺；
    其中，所述光阻为正性光阻，所述光阻中含有在所述空间电场下产生极化的添加剂，所述添加剂是是有机压电薄膜、电活性分子或凝胶类材料其中的一种。
PCT/CN2019/082369 2018-12-21 2019-04-12 光阻剥离方法 Ceased WO2020124887A1 (zh)

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