WO2020119702A1 - 激光器芯片的制造方法及激光器芯片 - Google Patents

激光器芯片的制造方法及激光器芯片 Download PDF

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Publication number
WO2020119702A1
WO2020119702A1 PCT/CN2019/124466 CN2019124466W WO2020119702A1 WO 2020119702 A1 WO2020119702 A1 WO 2020119702A1 CN 2019124466 W CN2019124466 W CN 2019124466W WO 2020119702 A1 WO2020119702 A1 WO 2020119702A1
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layer
electroplating
plating layer
laser chip
metal plating
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PCT/CN2019/124466
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English (en)
French (fr)
Inventor
陈长安
郑兆祯
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深圳市中光工业技术研究院
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Priority to US17/414,055 priority Critical patent/US20220136125A1/en
Publication of WO2020119702A1 publication Critical patent/WO2020119702A1/zh

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    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • C25D7/12—Semiconductors
    • C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D1/00—Electroforming
    • C25D1/02—Tubes; Rings; Hollow bodies
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02—Electroplating of selected surface areas
    • C25D5/022—Electroplating of selected surface areas using masking means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S3/00—Lasers, i.e. devices using stimulated emission of electromagnetic radiation in the infrared, visible or ultraviolet wave range
    • H01S3/09—Processes or apparatus for excitation, e.g. pumping
    • H01S3/091—Processes or apparatus for excitation, e.g. pumping using optical pumping
    • H01S3/094—Processes or apparatus for excitation, e.g. pumping using optical pumping by coherent light
    • H01S3/0941—Processes or apparatus for excitation, e.g. pumping using optical pumping by coherent light of a laser diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/024—Arrangements for thermal management
    • H01S5/02407—Active cooling, e.g. the laser temperature is controlled by a thermo-electric cooler or water cooling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/024—Arrangements for thermal management
    • H01S5/02407—Active cooling, e.g. the laser temperature is controlled by a thermo-electric cooler or water cooling
    • H01S5/02423—Liquid cooling, e.g. a liquid cools a mount of the laser
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
    • H01S5/042—Electrical excitation ; Circuits therefor
    • H01S5/0425—Electrodes, e.g. characterised by the structure
    • H01S5/04252—Electrodes, e.g. characterised by the structure characterised by the material
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D15/00—Electrolytic or electrophoretic production of coatings containing embedded materials, e.g. particles, whiskers, wires
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00—Electroplating: Baths therefor
    • C25D3/02—Electroplating: Baths therefor from solutions
    • C25D3/12—Electroplating: Baths therefor from solutions of nickel or cobalt
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00—Electroplating: Baths therefor
    • C25D3/02—Electroplating: Baths therefor from solutions
    • C25D3/38—Electroplating: Baths therefor from solutions of copper
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00—Electroplating: Baths therefor
    • C25D3/02—Electroplating: Baths therefor from solutions
    • C25D3/46—Electroplating: Baths therefor from solutions of silver
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02—Electroplating of selected surface areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/40—Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02 - H01S5/30
    • H01S5/4025—Array arrangements, e.g. constituted by discrete laser diodes or laser bar
    • H01S5/4031—Edge-emitting structures

Definitions

  • the invention relates to the technical field of optics, in particular to a method for manufacturing a laser chip and a laser chip manufactured by using the manufacturing method.
  • the all-solid-state laser pumped by a semiconductor laser is a new type of laser that appeared in the late 1980s. Its overall efficiency is at least 10 times higher than that of lamp pumps. Due to the reduced thermal load per unit output, it can obtain higher power. The system life and reliability are about 100 times that of flash pump systems. Therefore, semiconductor laser pumping technology It injects new vitality and vitality into the solid-state laser, so that the all-solid-state laser has the dual characteristics of the solid-state laser and the semiconductor laser. Its emergence and maturity are a revolution of the solid-state laser and the development direction of the solid-state laser.
  • FIG. 1 An existing laser and heat dissipation structure are shown in FIG. 1 and include multiple lasers A chip and a clamping plate 31 and a clamping plate 32 for clamping a laser chip, wherein each laser chip includes a heat sink substrate 1 and a laser bar 2 located on the heat sink substrate 1, and further includes a clamping portion 33 and a fixing member 34.
  • the splint 31 and the splint 32 are thermally conductive splints, wherein the splint 32 is provided with a heat dissipation micro-channel for the liquid to pass through, and the heat dissipation micro-channel is used to connect with an external liquid cooling source to realize liquid circulation heat dissipation.
  • the current problem with this structure is that the thermally conductive splint requires additional assembly, which not only increases the laser manufacturing cost, but also makes the overall volume of the laser larger, which is not conducive to the application of the laser in the field of micro-devices.
  • An aspect of the present invention provides a method for manufacturing a laser chip, including the following steps:
  • Step S1 forming a first electroplating substrate on the epitaxial layer
  • Step S2 an organic pattern layer is formed on the first electroplating substrate, and the pattern layer defines a hollow area, so that part of the first electroplating substrate is exposed from the hollow area relative to the pattern layer;
  • Step S3 forming a first metal plating layer on the first electroplating substrate, the first metal plating layer completely covering the pattern layer and the first electroplating substrate not covered by the pattern layer;
  • Step S4 removing the pattern layer, so that a hollow channel is formed between the first metal plating layer and the first electroplating substrate, and the channel has at least one inlet and at least one outlet penetrating the first metal plating layer .
  • Another aspect of the present invention provides a laser chip, including:
  • a first metal plating layer is formed on the epitaxial layer, and a pattern layer is formed in the first metal plating layer and then the pattern layer is removed, so that a channel is formed in the first metal plating layer.
  • the channel runs through the first electro-metallic coating, then the channel serves as a space for circulating liquid flow, and the heat generated by the laser chip is extracted by the circulating liquid.
  • the laser chip made by this method is also conducive to improving the laser chip on the basis of ensuring that the overall volume is controllable Cooling effect.
  • FIG. 1 is a schematic structural diagram of a laser chip provided by the background technology of the present invention.
  • FIG. 2 is a flow chart of a method for manufacturing a laser chip provided in Embodiment 1 of the present invention.
  • 3A to 3B are schematic structural diagrams of step S1 in the manufacturing process of the laser chip according to Embodiment 1 of the present invention.
  • FIG. 4 is a schematic structural diagram of step S2 in the manufacturing process of the laser chip according to Embodiment 1 of the present invention.
  • FIG. 5 is a schematic structural diagram of step S3 in the manufacturing process of the laser chip according to Embodiment 1 of the present invention.
  • step S4 is a schematic structural diagram of step S4 in the manufacturing process of the laser chip according to Embodiment 1 of the present invention.
  • FIG. 7 is a schematic plan view of the channel in FIG. 6.
  • FIG 8 to 10 are schematic diagrams of other plane structures of channels in the laser chip provided by the present invention.
  • FIG. 11A to 11B are schematic structural diagrams of step S5 in the manufacturing process of the laser chip provided in Embodiment 1 of the present invention.
  • FIG. 12 is a schematic structural diagram at step S6 in the manufacturing process of the laser chip provided in Embodiment 1 of the present invention.
  • FIGS 13A to 13C are schematic structural diagrams of step S3 in the manufacturing process of the laser chip provided in Embodiment 2 of the present invention.
  • step S4 is a schematic structural diagram of step S4 in the manufacturing process of the laser chip provided in Embodiment 2 of the present invention.
  • 15A-15B are schematic structural diagrams of step S5 in the manufacturing process of the laser chip provided in Embodiment 2 of the present invention.
  • 16 is a schematic structural diagram at step S6 in the manufacturing process of the laser chip provided in Embodiment 2 of the present invention.
  • FIG. 17 is a schematic diagram of a three-dimensional structure of a laser chip provided by Embodiment 3 of the present invention.
  • FIG. 18 is a schematic diagram of a three-dimensional structure of a laser chip provided by Embodiment 4 of the present invention.
  • Laser chip 200 Epilayer 110 First electroplating substrate 120 First seed layer 122 Second metal coating 124 Pattern layer 130 aisle 131 import 1311 Export 1312 Cutout area 132 First metal coating 150 First sub-plating layer 151 Second seed layer 152 Second sub-plating layer 153 incision 154 Membrane 160, 170 Cutting face S width d step S1, S2, S3, S4, S5, S6 Heat sink substrate 1 Laser bar 2 Splint 31, 32
  • a first metal plating layer is formed on the epitaxial layer, and a pattern layer is formed in the first metal plating layer and then the pattern layer is removed, so that a channel is formed in the first metal plating layer.
  • the channel runs through the first electro-metallic coating, then the channel serves as a space for circulating liquid to flow, and the heat generated by the laser chip is guided by the circulating liquid.
  • the laser chip made by this method is also conducive to improving the laser chip on the basis of ensuring that the overall volume is controllable. Cooling effect.
  • the laser chip includes an epitaxial layer, and a corresponding optical structure is formed on the epitaxial layer to finally achieve laser output.
  • the optical structure part it does not belong to the key content of the present invention, so it will not be described here again, and only the parts related to the present invention will be described in detail below.
  • this embodiment provides a laser chip manufacturing method, including the following steps:
  • Step S1 forming a first electroplating substrate on the epitaxial layer
  • Step S2 an organic pattern layer is formed on the first electroplating substrate, and the pattern layer defines a hollow area, so that part of the first electroplating substrate is exposed from the hollow area relative to the pattern layer;
  • Step S3 a first metal plating layer is formed on the first electroplating substrate, the first metal plating layer completely covers the pattern layer and the first electroplating substrate not covered by the pattern layer;
  • Step S4 the pattern layer is removed, so that a hollow channel is formed between the first metal plating layer and the first electroplating substrate, and the channel has at least one inlet and at least one outlet penetrating the first metal plating layer.
  • a first electroplating substrate 120 is formed on an epitaxial layer 110.
  • the first electroplating substrate includes a first seed layer 122 and a second metal plating layer 124.
  • step S1 includes:
  • the second metal plating layer 124 is formed on the first seed layer 122 by electroplating.
  • the material of the first seed layer 122 may be an alloy or metal such as Ni/Au (nickel/gold), Ni/Cu (nickel/copper), Ti/Au (titanium/gold).
  • the first seed layer 122 may be formed on the epitaxial layer 110 using a sputtering deposition method.
  • the second metal plating layer 124 may be a single-layer structure formed of one or more materials of copper (Cu), nickel (Ni), silver (Ag), etc.; the second metal plating layer 124 may also adopt a composite plating method (composite plating : Co-deposit the solid particles with the metal by electroplating method to obtain a composite coating layer on the substrate where the solid particles are dispersed and distributed on the matrix metal. That is, the solid insoluble solid particles are evenly dispersed in the plating solution to make a suspension for electroplating. According to different solid particles The characteristics such as SiC have high hardness and high temperature resistance, so that it is co-deposited with the plating matrix metal to obtain a functional plating layer related to the properties of solid particles.
  • the structure of the second metal plating layer 124 may be a double layer of Cu/diamond-like film (Diamond-like carbon), W/diamond-like film (Diamond-like carbon), Cu/SiC (silicon carbide), etc. Or multilayer structure.
  • step S1 may only include the step of forming the first seed layer 122 by vacuum plating.
  • the first electroplating substrate 120 only includes the first seed layer 122 and does not include the second metal plating layer 124.
  • first seed layer 122 and the second metal plating layer 124 listed in this embodiment are only examples, and are not intended to limit the present invention.
  • a pattern layer 130 partially covering the first electroplating substrate 120 is formed on the first electroplating substrate 120.
  • the pattern layer 130 defines a hollow region 132, and the hollow region 132 exposes a portion of the first plating substrate 120 from the hollow region relative to the pattern layer 130.
  • the material of the pattern layer 130 is a non-conductive organic material, such as polyimide or photoresist material, which is formed on the first electroplating substrate 120 by dry film lithography, and the material of the pattern layer 130 is The specific removal of the peeling liquid is as follows.
  • the pattern layer 130 is directly formed on the second metal plating layer 124.
  • step S3 a first metal plating layer 150 covering the pattern layer 130 is formed on the first electroplating substrate 120.
  • the first metal plating layer 150 completely covers the entire pattern layer 130 and the underlying metal layer not covered by the pattern layer 130.
  • the pattern layer 130 is embedded in the first metal plating layer 150.
  • step S4 the pattern layer 130 is removed. Since the pattern layer 130 is embedded in the first metal plating layer 150, when the pattern layer 130 is removed, a hollow channel is formed where the pattern layer 130 was originally formed 131, wherein the channel 131 is formed between the first metal plating layer 150 and the first electroplating substrate 120. Further, the channel 131 is formed between the first metal plating layer 150 and the second metal plating layer 124.
  • the laser chip master 100 is obtained through step S4.
  • the pattern layer 130 may be removed by directly immersing the epitaxial layer 110 formed with the first electroplating substrate 120, the pattern layer 130, and the first metal plating layer 150 into the stripping solution to remove the pattern layer 130 to form the channel 131,
  • the selection of the stripping liquid is different according to the material of the pattern layer 130, and it is necessary to consider the effect of the stripping liquid on other layers (the first metal plating layer 150 and the first electroplating substrate 120) as much as possible.
  • the shape of the channel 131 is the same as the shape of the pattern layer 130.
  • the pattern layer 130 formed in step S2 is a plurality of stripe patterns parallel to each other, then in step S4, removing the pattern layer 130 will form multiple parallel patterns.
  • a strip-shaped channel 131 (refer to FIG. 7).
  • FIG. 8 to FIG. 10 show the possible shapes of several channels 131.
  • the channel 131 is a plurality of connected “U” shapes; in FIG. 9, the channel 131 is a cross network
  • the shape of the channel 131 in FIG. 11 is a combination of FIGS. 8 and 9. It should be understood that the shape of the channel 131 shown above is only an example, and does not limit the present invention.
  • the channel 131 needs to have at least one inlet 1311 and at least one outlet 1312 for the circulating liquid to pass through the first space between the inlet 1311 and the outlet 1312 through the first
  • the metal plating layer 150 can realize the heat generated by the laser chip through the circulating liquid.
  • the number of total inlets 1311 and total outlets 1312 in the first metal plating layer 150 may be different, the size of each inlet 1311 may be different, the size of each outlet 1312 may be different, and the size between the outlet 1312 and the inlet 1311 may also be different.
  • the circulating liquid used to extract heat may be water. The longer the extension length of the channel 131, the better the heat dissipation effect.
  • the channel 131 is formed in the first metal plating layer 150, the position where the channel 131 is formed on the first metal plating layer 150 is not in direct contact with the first electroplating substrate 120.
  • the first The contact area between a metal plating layer 150 and the first electroplating substrate 120 will be smaller, which will affect the adhesion of the first metal plating layer 150 to the first electroplating substrate 120, which in turn will affect the first metal plating layer 150 and the epitaxial layer 110 adhesion, by plating the second metal plating layer 124 on the first seed layer 122 of the first plating substrate 120, because the second metal plating layer 124 and the first sub-plating layer 151 of the first metal plating layer 150 use the same Material, the adhesion between the two is strong. With the aid of the second metal plating layer 124 without forming the channel 131, the first metal plating layer 150 and the first electroplating substrate 120 are well adhered, thereby making the first metal plating layer 150
  • the epitaxial layer 110 of the laser chip master 100 needs to be thinned and polished, so that the surface of the epitaxial layer 110 has high flatness and smoothness.
  • the manufacturing method of the laser chip further includes the following steps:
  • Step S5 cutting the epitaxial layer and the layers formed on the epitaxial layer (including the first electroplating substrate, pattern layer and first metal plating layer, etc.) to form a plurality of separated laser chips 200, each of the laser chips 200
  • the channel 131 has at least one inlet and at least one outlet penetrating the first metal plating layer 150;
  • cutting the laser chip master 100 includes cutting the first metal plating layer 150 (FIG. 11A) and the epitaxial layer 110 of different materials ( Figure 11B) Two processes.
  • the first metal plating layer 150 can be cut by a photolithography etching process, or a cutting process such as laser, cutting saw, waterjet, etc.
  • the width d of the cut 154 of the first metal plating layer 150 needs to be less than 20 microns.
  • all the openings 154 are formed to facilitate subsequent cutting of the epitaxial layer 110, and the depth of the cutting 154 is selected to be the same as the thickness of the first metal plating layer 150. It will not damage the epitaxial layer 110 when the first metal plating layer 150 is cut, but also facilitate the subsequent cutting of the epitaxial layer 110 along the direction of the cut 154 formed on the first metal plating layer 150.
  • the epitaxial layer 110 is cut by a splitting process, and a plurality of laser chips 200 are formed after the cutting.
  • the laser chip 200 formed after cutting has a cutting end surface S, and the plating film is plated on the cutting end surface S and the end surface opposite to the cutting end surface S.
  • it can be split by a diamond knife, which is easy to split along the 110 lattice of the epitaxial layer, resulting in a smoother cutting end surface S, or dry etching or wet etching can be used in conjunction with other post-processing to produce a flat cutting end surface S .
  • the manufacturing method of the laser chip further includes the following steps:
  • step S6 a film layer is coated on the cutting end surfaces of each laser chip, and the film layer may be a high-reflection film or a high-transparency film.
  • step S6 the cutting end surface S of each laser chip 200 and the end surface opposite to the cutting end surface S are coated to form a film layer 160.
  • a method of stacking a plurality of laser chips 200 together and coating them together may be used to reduce the total coating time.
  • the method for manufacturing the laser chip 200 provided by the embodiment of the present invention, by providing the first metal plating layer 150 on the epitaxial layer 110, and forming the pattern layer 130 in the first metal plating layer 150 and then removing the pattern layer 130, the first A channel 131 is formed in the metal plating layer 150, and the channel 131 penetrates the first metal plating layer 150, then the channel 131 serves as a space for circulating liquid to flow, and the heat generated by the laser chip 200 is conducted by means of the circulating liquid. On the basis of the controllable volume, the heat dissipation effect of the laser chip 200 is also improved.
  • the laser chip manufacturing method provided in this embodiment is different from the first embodiment in step S3.
  • step S3 in this embodiment includes:
  • a first sub-electroplating layer 151 is formed on the first electroplating substrate 120 by electroplating, and the first sub-electroplating layer 151 covers a portion of the first electroplating substrate 120 that is not covered by the pattern layer 130.
  • the plating layer 151 is not formed on the pattern layer 130, and the pattern layer 130 is partially embedded in the first sub-plating layer 151 and exposed to the first sub-plating layer 151;
  • a second seed layer 152 of metal covering the pattern layer 130 and the first sub-electroplating layer 151 is formed by vacuum plating;
  • a second sub-plating layer 153 covering the second seed layer 152 is formed by electroplating.
  • the pattern layer 130 is completely covered by the first sub-plating layer 151 and the second seed layer 152 together. It can be understood that in other embodiments, the first sub-plating layer 151 and the second seed layer 152 do not completely cover the pattern layer 130, but the first sub-plating layer 151, the second seed layer 152, and the second sub-plating layer 153 The three-layer fit completely covers the pattern layer 130.
  • the first sub-plating layer 151 and the second sub-plating layer 153 have the same plating material as the second metal plating layer 124, and the second seed layer 152 has the same material and the same as the first seed layer 122 The way of formation.
  • step S4 the pattern layer 130 is removed, and a hollow channel 131 is formed where the pattern layer 130 was originally formed.
  • the shape of the channel 131 is the same as the shape of the pattern layer 130 (refer to FIGS. 7 to 10 ).
  • the channel 131 needs to have at least one inlet 1311 and at least one outlet 1312.
  • the epitaxial layer 110 of the laser chip needs to be thinned and polished, so that the surface of the epitaxial layer 110 has high flatness and smoothness.
  • the manufacturing method of the laser chip further includes the following steps:
  • Step S5 cutting the epitaxial layer and the layers formed on the epitaxial layer (including the first electroplating substrate, pattern layer and first metal plating layer, etc.) to form a plurality of separated laser chips 200, each of the laser chips 200
  • the channel 131 has at least one inlet and at least one outlet penetrating the first metal plating layer 150;
  • the manufacturing method of the laser chip further includes the following steps:
  • step S6 a film layer is coated on the cut end surfaces of each laser chip, and the film layer may be a high-reflection film or a high-transparency film.
  • step S3 and after step S3 are similar to the corresponding steps in the first embodiment, which will not be repeated in this embodiment.
  • the laser chip manufacturing method provided in this embodiment can achieve all the beneficial effects described in the first embodiment, and on this basis, because the first metal plating layer 150 is formed by two platings, the first metal is improved The thickness uniformity of the plating layer 150 near the top surface of the pattern layer 130.
  • the laser chip includes an epitaxial layer, wherein a corresponding optical structure is formed on the epitaxial layer to finally realize laser output. Only the structures related to the present invention will be described in detail below.
  • the laser chip 200 provided in this embodiment includes:
  • the epitaxial layer 110 is a semiconductor material.
  • the first electroplating substrate 120 may be formed on the epitaxial layer 110 using a sputtering deposition method.
  • the first electroplating substrate 120 includes a first seed layer 122 formed on the epitaxial layer 110 and a second metal plating layer 124 formed on the first seed layer 122.
  • the pattern layer 130 is formed on the second metal plating layer 124 and partially covers the second metal plating layer 124.
  • the second metal plating layer 124 can also be omitted.
  • the material of the first seed layer 122 may be an alloy or metal such as Ni/Au (nickel/gold), Ni/Cu (nickel/copper), Ti/Au (titanium/gold); the second metal plating layer 124 is formed by electroplating, which The material may be a single-layer structure formed by one or more materials of copper (Cu), nickel (Ni), gold (Au), etc.; or a composite plating method may be used.
  • the structure of the second metal plating layer 124 may be Cu/diamond-like film (Diamond-like carbon), W/diamond-like film (Diamond-like carbon), Cu/SiC (silicon nitride) and other double-layer or multi-layer structures.
  • first seed layer 122 and the second metal plating layer 124 listed in this embodiment are only examples, and are not intended to limit the present invention.
  • the first metal plating layer 150 includes a first sub plating layer 151, a second sub plating layer 153, and a second seed layer 152 formed between the first sub plating layer 151 and the second sub plating layer 153.
  • the channel 131 is formed in the first sub-plating layer 151 and the second seed layer 152.
  • the first sub-plating layer 151, the second sub-plating layer 153 and the second metal plating layer 124 use the same material, and the second seed layer 152 and the first seed layer 122 use the same material, which will not be listed here. .
  • the channel 131 may be one channel 131 or multiple channels.
  • the shape of the channel 131 may be various, for example, it may be several parallel strip patterns, or a continuous arc, etc. For details, refer to the shapes listed in FIG. 7 to FIG. 10.
  • the multiple channels 131 on the same laser chip 200 may also be in different forms, but generally considering the process complexity of forming the pattern layer 130, the same laser may be preferred
  • the multiple channels 131 on the chip 200 are made in the same form.
  • the channel 131 in order to allow the channel 131 to flow through the circulating liquid to extract the heat generated by the laser chip 200, the channel 131 should be a continuous channel 131 penetrating the first metal plating layer 150, which needs to have at least one inlet 1311 and at least one outlet 1312, In order for the circulating liquid to pass through the first metal plating layer 150 from the space between the inlet 1311 and the outlet 1312, the heat generated by the laser chip 200 can be discharged through the circulating liquid.
  • the number of total inlets 1311 and total outlets 1312 in the first metal plating layer 150 may not be used, the size of each inlet 1311 may be different, the size of each outlet 1312 may be different, and the size between the outlet 1312 and the inlet 1311 may also be different.
  • the circulating liquid used to extract heat may be water. The longer the extension length of the channel 131, the better the heat dissipation effect.
  • the channel 131 is formed in the first metal plating layer 150, the position where the channel 131 is formed on the first metal plating layer 150 is not in contact with the first electroplating substrate 120.
  • the number of the channel 131 is large or the occupied area is large, the first The contact area of the metal plating layer 150 and the first electroplating substrate 120 will be smaller, which will affect the adhesion of the first metal plating layer 150 and the first electroplating substrate 120, which will further affect the first metal plating layer 150 and the epitaxial layer 110
  • the adhesion of the second metal plating layer 124 is electroplated on the first seed layer 122 of the first electroplating substrate 120.
  • the second metal plating layer 124 and the first sub-plating layer 151 of the first metal plating layer 150 are made of the same material, The adhesion between the two is strong. With the aid of the second metal plating layer 124 where the channel 131 is not formed, the first metal plating layer 150 and the first electroplating substrate 120 are well adhered, thereby making the first metal plating layer 150 and the epitaxial layer 110 adheres well.
  • the laser chip 200 further includes a film layer 160 and a film layer 170. Since the laser chip 200 is formed by cutting, a cutting end surface S is generated during cutting. The cutting end surface S and the end surface opposite to the cutting end surface S are respectively For the coating layer 160 and the film layer 170, in this embodiment, one of the film layer 160 and the film layer 170 on the laser chip 200 is a high antireflection film, and the other is a high reflection film.
  • the channel 131 penetrates the first metal plating layer 150, then the channel As a space for circulating liquid to flow, the heat generated by the laser chip 200 is guided by the circulating liquid, which is beneficial to achieve a better heat dissipation effect while keeping the overall volume of the laser chip 200 small.
  • the difference between the laser chip 200 provided in this embodiment and Embodiment 3 is:
  • the height of the pattern layer 130 needs to meet the same size as the channel, and the first metal plating layer 150 needs to completely cover the pattern layer 130, and only a single plating may not form a good coverage effect. Or, the thickness of the first metal plating layer 150 is not uniform near the pattern layer 130 and the hollowed-out area 132. Therefore, in this embodiment, two plating methods are used to form the first metal plating layer 150 to solve the above problem.
  • the first metal plating layer 150 includes a first sub-plating layer 151, a second sub-plating layer 153, and a second seed layer 152 formed between the first sub-plating layer 151 and the second sub-plating layer 153.
  • the channel 131 is formed in the first sub-plating layer 151 and the second seed layer 152.
  • the first sub-plating layer 151, the second sub-plating layer 153 and the second metal plating layer 124 use the same material, and the second seed layer 152 and the first seed layer 122 use the same material, which will not be listed here. .
  • the laser chip 200 provided in this embodiment can achieve all the effects as described in Embodiment 3, and on this basis, because the first metal plating layer 150 is divided into two circuits, the first sub-plating layer 151 is formed separately With the second sub-plating layer 153, the thickness uniformity of the first metal plating layer 150 near the top surface of the pattern layer 130 is improved.

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Abstract

一种激光器芯片的制造方法和激光器芯片，制造方法包括如下步骤：步骤S1，在外延层上形成第一电镀基底；步骤S2，在第一电镀基底上形成有机的图案层，图案层定义有镂空区域，使部分第一电镀基底从镂空区域相对于图案层裸露；步骤S3，在第一电镀基底上形成第一金属镀层，第一金属镀层完全覆盖图案层及未被图案层覆盖的第一电镀基底；步骤S4，去除图案层，以使得第一金属镀层与第一电镀基底之间形成中空的通道，通道具有贯穿第一金属镀层的至少一进口和至少一出口。从而使制成的激光器芯片在保证整体体积可控的基础上还有利于提升激光器芯片的散热效果。

Description

激光器芯片的制造方法及激光器芯片 技术领域
本发明涉及光学技术领域，尤其涉及一种激光器芯片的制造方法及应用该制造方法制得的激光器芯片。
背景技术
半导体激光泵浦的全固态激光器是20世纪80年代末期出现的新型激光器。其总体效率至少要比灯泵浦高10倍，由于单位输出的热负荷降低，可获取更高的功率，系统寿命和可靠性大约是闪光灯泵浦系统的100倍，因此，半导体激光器泵浦技术为固体激光器注入了新的生机和活力，使全固态激光器同时具有固体激光器和半导体激光器的双重特点，它的出现和逐渐成熟是固体激光器的一场革命，也是固体激光器的发展方向。并且，它已渗透到各个学科领域，例如：激光信息存储与处理、激光材料加工、激光医学及生物学、激光通讯、激光印刷、激光光谱学、激光化学、激光分离同位素、激光核聚变、激光投影显示、激光检测与计量及军用激光技术等，极大地促进了这些领域的技术进步和前所未有的发展。
市场上侧面泵浦的泵浦源用的半导体线阵激光器，常常需要搭配一散热器，以提高半导体激光器的散热效果，一种现有的激光器及散热结构如图1所示，包括多个激光器芯片以及用于夹持激光器芯片的夹板31、夹板32，其中每个激光器芯片包含热沉基板1及位于沉热基板1上的激光巴条2，另外还包括夹持部33和固定件34。其中夹板31、夹板32为导热夹板，其中夹板32内部设置有用于液体通过的散热微通道，散热微通道用于和外界的液体冷却源连接，实现液体循环散热。目前此结构存在的问题是导热夹板需额外组装，不仅增加了激光器制作成本，还使得激光器的整体体积较大，不利于激光器在微型设备领域的应用。
发明内容
针对以上技术问题，有必要提供一种体积较小且散热效果较好的激光器芯片制造方法及激光器芯片。
本发明一方面提供激光器芯片的制造方法，包括如下步骤：
步骤S1，在外延层上形成第一电镀基底；
步骤S2，在所述第一电镀基底上形成有机的图案层，所述图案层定义有镂空区域，使部分所述第一电镀基底从所述镂空区域相对于所述图案层裸露；
步骤S3，在所述第一电镀基底上形成第一金属镀层，第一金属镀层完全覆盖所述图案层及未被所述图案层覆盖的第一电镀基底；
步骤S4，去除所述图案层，以使得所述第一金属镀层与所述第一电镀基底之间形成中空的通道，所述通道具有贯穿所述第一金属镀层的至少一进口和至少一出口。
本发明另一方面提供激光器芯片，包括：
外延层；
形成在所述外延层上的第一电镀基底；
形成在所述第一电镀基底上的第一金属镀层，所述第一金属镀层与所述第一电镀基底之间形成有中空的通道，所述通道具有贯穿所述第一金属镀层的至少一进口和至少一出口。
本发明实施例提供的激光器芯片制造方法，通过在外延层上做第一金属镀层，并在第一金属镀层中形成图案层再将图案层去除的方式，使得第一金属镀层中形成通道，该通道贯穿第一电金属镀层，则通道作为供循环液体流动的空间，借助循环液体导出激光器芯片产生的热量，该方法制成的激光器芯片在保证整体体积可控的基础上还有利于提升激光器芯片的散热效果。
附图说明
图1是本发明背景技术提供的激光器芯片的结构示意图。
图2是本发明实施例一提供的激光器芯片制造方法的流程步骤 图。
图3A～3B是本发明实施例一提供的激光器芯片制造过程中步骤S1时的结构示意图。
图4是本发明实施例一提供的激光器芯片制造过程中步骤S2时的结构示意图。
图5是本发明实施例一提供的激光器芯片制造过程中步骤S3时的结构示意图。
图6是本发明实施例一提供的激光器芯片制造过程中步骤S4时的结构示意图。
图7是图6中通道的平面结构示意图。
图8～图10是本发明提供的激光器芯片中通道的其他几种平面结构示意图。
图11A～11B是本发明实施例一提供的激光器芯片制造过程中步骤S5时的结构示意图。
图12是本发明实施例一提供的激光器芯片制造过程中步骤S6时的结构示意图。
图13A～13C是本发明实施例二提供的激光器芯片制造过程中步骤S3时的结构示意图。
图14是本发明实施例二提供的激光器芯片制造过程中步骤S4时的结构示意图。
图15A～15B是本发明实施例二提供的激光器芯片制造过程中步骤S5时的结构示意图。
图16是本发明实施例二提供的激光器芯片制造过程中步骤S6时的结构示意图。
图17是本发明实施例三提供的激光器芯片的立体结构示意图。
图18是本发明实施例四提供的激光器芯片的立体结构示意图。
主要元件符号说明
激光器芯片母版 100
激光器芯片 200
外延层 110
第一电镀基底 120
第一种子层 122
第二金属镀层 124
图案层 130
通道 131
进口 1311
出口 1312
镂空区域 132
第一金属镀层 150
第一子电镀层 151
第二种子层 152
第二子电镀层 153
切口 154
膜层 160、170
切割端面 S
宽度 d
步骤 S1、S2、S3、S4、S5、S6
热沉基板 1
激光巴条 2
夹板 31、32
夹持部 33
固定件 34
如下具体实施方式将结合上述附图进一步说明本发明。
具体实施方式
本发明实施例提供的激光器芯片制造方法，通过在外延层上做第一金属镀层，并在第一金属镀层中形成图案层再将图案层去除的方式，使得第一金属镀层中形成通道，该通道贯穿第一电金属镀层，则通道作为供循环液体流动的空间，借助循环液体导出激光器芯片产生的热量，该方法制成的激光器芯片在保证整体体积可控的基础上还有利于提升激光器芯片的散热效果。
实施例一
激光器芯片包括外延层，在外延层上形成相应的光学结构可最终实现激光输出。对于光学结构部分，不属于本发明的重点内容，此处便不再赘述，以下将只对与本发明相关的部分进行详细描述。
如图2所示，本实施例提供激光器芯片制造方法，包括如下步骤：
步骤S1，在外延层上形成第一电镀基底；
步骤S2，在第一电镀基底上形成有机的图案层，图案层定义有镂空区域，使部分第一电镀基底从镂空区域相对于图案层裸露；
步骤S3，在第一电镀基底上形成第一金属镀层，第一金属镀层完全覆盖图案层及未被图案层覆盖的第一电镀基底；
步骤S4，去除图案层，以使得第一金属镀层与第一电镀基底之间形成中空的通道，通道具有贯穿第一金属镀层的至少一进口和至少一出口。
请同时参图3A和图3B，在步骤S1中，在一外延层110上形成第一电镀基底120，第一电镀基底包括第一种子层122和第二金属镀层124。
于一实施例中，步骤S1包括：
通过真空镀膜方式在外延层110上形成第一种子层122；及
通过电镀方式在第一种子层122上形成第二金属镀层124。
第一种子层122的材料可以为Ni/Au(镍/金)、Ni/Cu(镍/铜)、Ti/Au(钛/金)等合金或金属。第一种子层122可采用溅射沉积法形成于外延层110上。
第二金属镀层124可以为铜(Cu)、镍(Ni)、银(Ag)等中的一种或多种材料形成的单层结构；第二金属镀层124也可以采用复合电镀方式(复合电镀：用电镀方法使固体颗粒与金属共沉积从而在基体上获得基质金属上弥散分布固体颗粒的复合镀层。即将固体不溶性固体微粒均匀分散在电镀液中，制成悬浮液进行电镀。根据不同固体颗粒的特性如SiC具有高硬度耐高温特性，使其与电镀基质金属共沉积，从而获得与固体颗粒性质相关的功能镀层。上述固体微粒指各种难熔的氧化物、碳化物、硼化物、氮化物等)形成，此时第二金属镀层124的结构可以为Cu/类金刚石膜(Diamond-like carbon)、W/类金刚石膜(Diamond-like carbon)、Cu/SiC(碳化硅)等双层或多层结构。
在其它实施例中，步骤S1也可以仅包括真空镀膜方式形成第一种子层122的步骤，此时，第一电镀基底120仅包括第一种子层122，而不包括第二金属镀层124。
应当理解，本实施例中列举的第一种子层122及第二金属镀层124的材料仅作示例用，不用于限定本发明。
请参考图4，在步骤S2中，在第一电镀基底120上形成局部覆盖第一电镀基底120的图案层130。图案层130定义有镂空区域132，镂空区域132使部分第一电镀基底120从该镂空区域相对于图案层130裸露。其中，图案层130材料为不导电的有机材料，比如聚酰亚胺或光阻材料，其通过干膜光刻的工艺形成于第一电镀基底120上，且该图案层130的材料是可被剥离液洗除的，具体如下述说明。本实施例中，其中图案层130直接形成在第二金属镀层124上。
请参考图5，本实施例提供的激光器芯片制造方法，在步骤S3中，在第一电镀基底120上形成覆盖图案层130的第一金属镀层150。第一金属镀层150完全覆盖整个图案层130及未被该图案层130覆盖的金属打底层，图案层130嵌设于第一金属镀层150中。
请参考图6，在步骤S4中，去除图案层130，由于图案层130嵌设于第一金属镀层150中，当图案层130被去除后，在原来形成图案层130的位置便形成中空的通道131，其中，通道131形成于第一金属镀层150与第一电镀基底120之间。进一步的，通道131形成在第一金属镀层150与第二金属镀层124之间。经步骤S4得到激光器芯片母版100。
于一实施例中，去除图案层130的方式可以为将形成有第一电镀基底120、图案层130及第一金属镀层150的外延层110直接浸入剥离液以去除图案层130，形成通道131，其中剥离液的选择根据图案层130材料的不同而不同，且需同时考虑剥离液尽可能的减少对其它层(第一金属镀层150、第一电镀基底120)的影响。
通道131的形状与图案层130的形状相同，例如，若步骤S2中形成的图案层130为多个相互平行的条状图案，则在步骤S4中，去除图案层130则会形成相互平行的多个条形的通道131(可参考图7)。
请参考图8～图10，图8～图10示出了几种通道131的可能形状，图8中，通道131为连通的多个“U”形；图9中，通道131为交叉的网格状；而图11中的通道131形状为图8和图9的结合，应当理解，如上述示出的通道131的形状仅作示例，不对本发明做出任何限制。
另，为了使得通道131可以供循环液体流动以导出激光器芯片产生的热量，通道131需要具备至少一进口1311以及至少一个出口1312，以供循环液体从进口1311和出口1312之间的空间通过第一金属镀层150，即可实现将激光器芯片产生的热量通过循环液体导出。其中，第一金属镀层150中总的进口1311和总的出口1312数量可以不同，各个进口1311的大小可以不同，各个出口1312的大小可不同，出口1312和进口1311之间的大小也可不同。于一实施例中，用于导出热量的循环液体可以为水。通道131延伸长度越长，会使散热效果越好。
由于第一金属镀层150中形成有通道131，则第一金属镀层150形成有通道131的位置就未与第一电镀基底120直接接触，当通道131的数量较多或者占用面积较大时，第一金属镀层150与第一电镀基底 120的接触面积就会较小，会影响到第一金属镀层150与第一电镀基底120的粘附力，即进而会影响到第一金属镀层150与外延层110的粘附力，则通过在第一电镀基底120的第一种子层122上电镀第二金属镀层层124，由于第二金属镀层124和第一金属镀层150的第一子电镀层151采用相同材质，两者之间的粘附力较强，借助于未形成通道131的第二金属镀层124，使得第一金属镀层150与第一电镀基底120良好粘附，进而使得第一金属镀层150与外延层110良好粘附。
进一步的，需要对激光器芯片母版100的外延层110进行减薄和抛光处理，以使得外延层110的表面具有较高的平整度和光滑度。
请参考图11A～图11B，于一实施例中，激光器芯片的制造方法还包括如下步骤：
步骤S5，对外延层以及形成在外延层上的各层(包括第一电镀基底、图案层及第一金属镀层等)进行切割，以形成分隔的多个激光器芯片200，每一个激光器芯片200的通道131具有贯穿第一金属镀层150的至少一进口和至少一出口；
请继续参考图11A～图11B，本实施例中，在步骤S5中，对激光器芯片母版100进行切割，包括对材质不同的第一金属镀层150(图11A)和外延层110分别进行切割(图11B)两道工艺。
其中，切割第一金属镀层150可以采用光刻蚀刻工艺，也可以采用激光、切割锯、水刀等切割工艺，蚀刻或切割第一金属镀层150的切口154宽度d需小于20微米，为了在该步骤中形成一切口154方便后续对外延层110的切割，选择切口154深度与第一金属镀层150厚度相同。则既不会在切割第一金属镀层150时损伤到外延层110，也可以方便后续沿着在第一金属镀层150上形成的切口154方向切割外延层110。
于一实施例中，如图11B，外延层110通过裂片工艺切割，切割之后形成多个激光器芯片200。切割之后形成的激光器芯片200具有切割端面S，镀膜是镀在切割端面S以及与切割端面S相对的端面。例如可为钻石刀劈裂，沿外延层110晶格易劈面分开，产生的切割端面S较光滑，也可使用干式刻蚀或湿式刻蚀，搭配其他后处理，以产 生平整的切割端面S。
请参考图12，于一实施例中，激光器芯片的制造方法还包括如下步骤：
步骤S6，对各个激光器芯片上的切割端面镀上膜层，膜层可为高反膜或高透膜。
步骤S6中，对各个激光器芯片200的切割端面S以及与切割端面S相对的端面进行镀膜以形成膜层160，本实施例中，激光器芯片200上的两个切割端面S上镀的膜层160和膜层170，其中一个为高增透膜，另一个为高反射膜。于一实施例中，为了提高镀膜效率，可以采用将多个激光器芯片200堆叠起来一起镀膜的方式(图12中为将两个激光器芯片200堆叠)，可以减少总的镀膜时长。
本发明实施例提供的激光器芯片200的制造方法，通过在外延层110上设置第一金属镀层150，并在第一金属镀层150中形成图案层130再将图案层130去除的方式，使得第一金属镀层150中形成通道131，通道131贯穿第一金属镀层150，则通道131作为供循环液体流动的空间，借助循环液体导出激光器芯片200产生的热量，该方法制成的激光器芯片200在保证整体体积可控的基础上还有利于提升激光器芯片200的散热效果。
实施例二：
本实施例提供的激光器芯片制造方法，与实施例一的区别在于：步骤S3。
请同时参考图13A～图13C，本实施例中，由于最终需要形成的通道131的尺寸需要，图案层130的高度需要满足与通道相同的尺寸，而第一金属镀层150需要完整地覆盖图案层130，只经过一次电镀可能无法形成较好的覆盖效果，或者在临近图案层130和镂空区域132的地方第一金属镀层150的厚度不均，因此，本实施例中采取多次电镀形成第一金属镀层150的方式解决上述问题。则本实施例中步骤S3包括：
如图13A所示，在第一电镀基底120上通过电镀方式形成第一子电镀层151，该第一子电镀层151覆盖第一电镀基底120未被图案层 130覆盖的部分，该第一子电镀层151未形成于所述图案层130上，图案层130部分嵌设于第一子电镀层151中并相对第一子电镀层151露出；
如图13B所示，通过真空镀膜方式形成覆盖图案层130和第一子电镀层151的金属的第二种子层152；
如图13C所示，通过电镀方式形成覆盖第二种子层152的第二子电镀层153。
本实施例中，图案层130被第一子电镀层151和第二种子层152共同完全覆盖。可以理解的，在其他实施例中，第一子电镀层151和第二种子层152配合未完全覆盖图案层130，而是第一子电镀层151、第二种子层152和第二子电镀层153三层配合完全覆盖图案层130。
其中，于一实施例中，第一子电镀层151、第二子电镀层153具有与第二金属镀层124相同的电镀材料，第二种子层152具有与第一种子层122相同的材料及相同的形成方式。
请参考图14，在步骤S4中，去除图案层130，在原来形成图案层130的位置便形成中空的通道131。通道131的形状与图案层130的形状相同(参考图7～图10)。另，为了使得通道131可以供循环液体流动以导出激光器芯片产生的热量，通道131需要具备至少一进口1311以及至少一个出口1312。
进一步的，需要对激光器芯片外延层110进行减薄和抛光处理，以使得外延层110的表面具有较高的平整度和光滑度。
请参考图15A～图15B，于一实施例中，激光器芯片的制造方法还包括如下步骤：
步骤S5，对外延层以及形成在外延层上的各层(包括第一电镀基底、图案层及第一金属镀层等)进行切割，以形成分隔的多个激光器芯片200，每一个激光器芯片200的通道131具有贯穿第一金属镀层150的至少一进口和至少一出口；
请参考图16，于一实施例中，激光器芯片的制造方法还包括如下步骤：
步骤S6，对各个激光器芯片上的切割端面镀上膜层，膜层可为高 反膜或高透膜。
由于本发明实施例提供的激光器芯片200的制造方法，步骤S3之前和步骤S3之后的步骤皆与实施例一中对应的步骤类似，本实施例中便不再赘述。
应当理解，本实施例提供的激光器芯片制造方法，可以实现如实施例一中所述的所有有益效果，并且在此基础上，因为第一金属镀层150通过两次电镀形成，改善了第一金属镀层150靠近图案层130顶面的厚度均匀性。
实施例三
本实施例中激光器芯片包括外延层，其中，外延层上形成有相应的光学结构以最终实现激光输出。以下将只对与本发明相关的结构进行详细说明。
请参考图17，为本实施例提供的激光器芯片200，包括：
外延层110；
形成在外延层110上的第一电镀基底120；
形成在第一电镀基底120上的第一金属镀层150，第一金属镀层150中形成有中空的通道131，通道131用于为循环液体提供流通空间，以借助循环液体将激光器芯片200上的热量导出。
其中，外延层110为半导体材料。第一电镀基底120可采用溅射沉积法形成于外延层110上。
本实施例中，第一电镀基底120包括形成在外延层110上的第一种子层122及形成于第一种子层122上的第二金属镀层124。图案层130形成在第二金属镀层124上并局部覆盖第二金属镀层124。于另一实施例中，第二金属镀层124也可省略去除。第一种子层122的材料可以为Ni/Au(镍/金)、Ni/Cu(镍/铜)、Ti/Au(钛/金)等合金或金属；第二金属镀层124通过电镀形成，其材料可以为铜(Cu)、镍(Ni)、金(Au)等中的一种或多种材料形成的单层结构；也可以采用复合电镀方式，此时第二金属镀层124的结构可以为Cu/类金刚石膜(Diamond-like carbon)、W/类金刚石膜(Diamond-like carbon)、Cu/SiC(氮化硅)等双层或多层结构。
应当理解，本实施例中列举的第一种子层122及第二金属镀层124的材料仅作示例用，不用于限定本发明。
第一金属镀层150包括第一子电镀层151、第二子电镀层153及形成于第一子电镀层151和第二子电镀层153之间的第二种子层152。通道131形成于第一子电镀层151和第二种子层152中。
其中，第一子电镀层151和第二子电镀层153与第二金属镀层124采用相同的材料，第二种子层152与第一种子层122采用相同的材料，此处便不再一一列举。
通道131可以是一个，也可以是多个。通道131的形态可以为多种，例如可以为几个互相平行的长条形的图案，或者为一连续的弧形等等，具体可参考图7～图10中列举的形态。于一实施例中，若通道131数量为多个，则同一激光器芯片200上的多个通道131也可以为不同的形态，但是一般考虑到图案层130的形成的工艺复杂度，可优选同一激光器芯片200上的多个通道131做成相同的形态。
另，为了使得通道131可以供循环液体流动以导出激光器芯片200产生的热量，通道131应该是连续的且贯通第一金属镀层150的通道131，其需要具备至少一进口1311以及至少一个出口1312，以供循环液体从进口1311和出口1312之间的空间通过第一金属镀层150，即可实现将激光器芯片200产生的热量通过循环液体导出。其中，第一金属镀层150中总的进口1311和总的出口1312数量可以不用，各个进口1311的大小可以不同，各个出口1312的大小可不同，出口1312和进口1311之间的大小也可不同。于一实施例中，用于导出热量的循环液体可以为水。通道131延伸长度越长，会使散热效果越好。
由于第一金属镀层150中形成有通道131，则第一金属镀层150形成有通道131的位置就未与第一电镀基底120接触，当通道131的数量较多或者占用面积较大时，第一金属镀层150与第一电镀基底120的接触面积就会较小，会影响到第一金属镀层150与第一电镀基底120的粘附力，即进而会影响到第一金属镀层150与外延层110的粘附力，则通过在第一电镀基底120的第一种子层122上电镀第二金属镀层124，由于第二金属镀层124和第一金属镀层150的第一子电镀层151 采用相同材质，两者之间的粘附力较强，借助于未形成通道131的第二金属镀层124，使得第一金属镀层150与第一电镀基底120良好粘附，进而使得第一金属镀层150与外延层110良好粘附。
本实施例中，激光器芯片200还包括膜层160和膜层170，由于激光器芯片200是经过切割形成的，切割时会产生切割端面S，在切割端面S和与切割端面S相对的端面上分别镀膜层160和膜层170，本实施例中，激光器芯片200上的膜层160和膜层170其中一个为高增透膜，另一个为高反射膜。
本发明实施例提供的激光器芯片200，通过在激光器芯片200的外延层110上形成第一金属镀层150，并在第一金属镀层150中形成通道131，通道131贯穿第一金属镀层150，则通道131作为供循环液体流动的空间，借助循环液体导出激光器芯片200产生的热量，有利于实现在保持激光器芯片200整体体积较小的基础上还能保持较好的散热效果。
实施例四
请参考图18，本实施例提供的激光器芯片200，与实施例三中的区别在于：
由于最终形成的通道131的尺寸需要，图案层130的高度需要满足与通道相同的尺寸，而第一金属镀层150需要完整地覆盖图案层130，只经过一次电镀可能无法形成较好的覆盖效果，或者在临近图案层130和镂空区域132的地方第一金属镀层150的厚度不均，因此，本实施例中采取两次电镀形成第一金属镀层150的方式解决上述问题。
因此本实施例中，第一金属镀层150包括第一子电镀层151、第二子电镀层153及形成于第一子电镀层151和第二子电镀层153之间的第二种子层152。通道131形成于第一子电镀层151和第二种子层152中。
其中，第一子电镀层151和第二子电镀层153与第二金属镀层124采用相同的材料，第二种子层152与第一种子层122采用相同的材料，此处便不再一一列举。
应当理解，本实施例提供的激光器芯片200，可以实现如实施例三中所述的所有有一效果，并且在此基础上，因为第一金属镀层150分两次电路分别形成第一子电镀层151和第二子电镀层153，改善了第一金属镀层150靠近图案层130顶面的厚度均匀性。
以上所述仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (10)

  1. 一种激光器芯片的制造方法，其特征在于，所述方法包括如下步骤：
    步骤S1，在外延层上形成第一电镀基底；
    步骤S2，在所述第一电镀基底上形成图案层，所述图案层定义有镂空区域，使部分所述第一电镀基底从所述镂空区域相对于所述图案层裸露；
    步骤S3，在所述第一电镀基底上形成第一金属镀层，第一金属镀层完全覆盖所述图案层及未被所述图案层覆盖的第一电镀基底；
    步骤S4，去除所述图案层，以使得所述第一金属镀层与所述第一电镀基底之间形成中空的通道，所述通道具有贯穿所述第一金属镀层的至少一进口和至少一出口。
  2. 如权利要求1所述的激光器芯片制造方法，其特征在于，所述第一电镀基底包括金属的第一种子层和第一电镀层，所述步骤S1包括：
    通过真空镀膜方式在所述外延层上形成所述第一种子层；及
    通过电镀方式在所述第一种子层上形成所述第一电镀层，其中所述图案层直接形成在所述第一电镀层上，所述通道形成在所述第一金属镀层与所述第一电镀层之间。
  3. 如权利要求1所述的激光器芯片的制造方法，其特征在于，所述第一金属镀层包括层叠设置的第一子电镀层、第二种子层及第二子电镀层；所述步骤S3包括：
    在所述第一电镀基底上通过电镀方式形成所述第一子电镀层，所述第一子电镀层覆盖第一电镀基底未被图案层覆盖的部分，未覆盖所述图案层；
    通过真空镀膜方式形成覆盖所述图案层和所述第一子电镀层的所述第二种子层；以及
    通过电镀方式形成覆盖所述第二种子层的所述第二子电镀层。
  4. 如权利要求1所述的激光器芯片的制造方法，其特征在于，去除所述图案层的方法为浸入剥离液以溶解所述图案层，其中所述通道 的形状与所述图案层的形状相同。
  5. 如权利要求1所述的激光器芯片的制造方法，其特征在于，还包括：
    步骤S5，对所述外延层以及形成在所述外延层上的各层进行切割，以形成分隔的多个激光器芯片，每一个所述激光器芯片的通道具有贯穿所述第一金属镀层的至少一进口和至少一出口；
    步骤S6，对各个所述激光器芯片上的切割端面镀上膜层，所述膜层可为高反膜或高透膜。
  6. 一种激光器芯片，其特征在于，包括：
    外延层；
    形成在所述外延层上的第一电镀基底；
    形成在所述第一电镀基底上的第一金属镀层，所述第一金属镀层与所述第一电镀基底之间形成有中空的通道，所述通道具有贯穿所述第一金属镀层的至少一进口和至少一出口。
  7. 如权利要求6所述的激光器芯片，其特征在于，所述通道中设置有循环液体，所述循环液体从所述进口进入并从所述出口流出，以将所述激光器芯片中的热量导出。
  8. 如权利要求6所述的激光器芯片，其特征在于，
    所述第一电镀基底包括通过真空镀膜方式形成的第一种子层和通过电镀方式形成的第一电镀层，所述通道形成在所述第一金属镀层与所述第一电镀层之间。
  9. 如权利要求6所述的激光器芯片，其特征在于，所述第一金属镀层包括层叠设置的第一子电镀层、金属的第二种子层及第二子电镀层。
  10. 如权利要求9所述的激光器芯片，其特征在于，所述第一子电镀层、所述第二子电镀层及所述第一电镀层为相同材料。
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