WO2020103191A1 - 阵列基板和显示面板 - Google Patents

阵列基板和显示面板

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Publication number
WO2020103191A1
WO2020103191A1 PCT/CN2018/119076 CN2018119076W WO2020103191A1 WO 2020103191 A1 WO2020103191 A1 WO 2020103191A1 CN 2018119076 W CN2018119076 W CN 2018119076W WO 2020103191 A1 WO2020103191 A1 WO 2020103191A1
Authority
WO
WIPO (PCT)
Prior art keywords
metal layer
hollow structure
transparent conductive
conductive layer
array substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2018/119076
Other languages
English (en)
French (fr)
Inventor
吴川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
Original Assignee
HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HKC Co Ltd, Chongqing HKC Optoelectronics Technology Co Ltd filed Critical HKC Co Ltd
Priority to US17/272,941 priority Critical patent/US12009368B2/en
Publication of WO2020103191A1 publication Critical patent/WO2020103191A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements

Definitions

  • the present application relates to the field of display technology, in particular to an array substrate and a display panel.
  • Flat panel displays include thin film transistor liquid crystal displays (Thin Film Transistor-Liquid Crystal (TFT-LCD) and organic light-emitting diode (Organic Light-Emitting Diode, OLED) displays, etc.
  • TFT-LCD Thin Film Transistor-Liquid Crystal
  • OLED Organic Light-Emitting Diode
  • the pixel electrode and the source or the drain have an overlapping area, and the overlapping area will generate a parasitic capacitance, and the size of the overlapping area is proportional to the size of the generated parasitic capacitance, and the size of the parasitic capacitance and the TFT charge rate and Picture quality is inversely proportional.
  • the TFT has a low charging rate and poor picture quality.
  • the purpose of the present application is to provide an array substrate and a display panel to improve the charging rate and improve the picture quality.
  • the present application provides an array substrate including a substrate, an active switch, and a transparent conductive layer, the active switch is formed above the substrate; the transparent conductive layer is formed on the active switch Above, and connected with the active switch; the active switch includes a metal layer; the transparent conductive layer is provided with a hollow structure, the hollow structure is located in the overlapping area of the transparent conductive layer and the metal layer.
  • the array substrate includes a data line, the metal layer includes a source metal layer, and the source metal layer is connected to the data line; the transparent conductive layer includes a first connection segment, and the hollow structure A first hollow structure is included, and the first hollow structure is located in an overlapping area of the first connection segment and the source metal layer.
  • the metal layer includes a drain metal layer
  • the transparent conductive layer includes a second connection segment
  • the second connection segment is connected to the drain metal layer
  • the hollow structure includes a second hollow structure, The second hollow structure is located in an overlapping area of the second connection segment and the drain metal layer.
  • the array substrate includes a passivation layer
  • the metal layer includes a drain metal layer
  • the passivation layer is located above the drain metal layer
  • the passivation layer includes a through hole
  • the drain includes a recess
  • the second connection segment passes through the through hole and is connected and fixed in the recess.
  • the drain metal layer is circular, and the second hollow structure is circular.
  • drain metal layer and the second hollow structure are concentric circles.
  • the source metal layer is circular, and the first hollow structure is symmetrical with respect to the radial direction of the source electrode.
  • the shape of the first hollow structure is an elongated shape.
  • the first hollow structure is located in the middle of the first connecting section.
  • the shape of the first hollow structure includes a polygon.
  • the shape of the first hollow structure includes an arc shape.
  • the shape of the second hollow structure includes a polygon.
  • the shape of the second hollow structure includes an arc shape.
  • the present application also provides an array substrate including a substrate, an active switch, and a transparent conductive layer, the active switch is formed above the substrate; the transparent conductive layer is formed above the active switch, and The active switch connection; the active switch includes a metal layer; a hollow structure is provided on the transparent conductive layer, and the hollow structure is located in an overlapping area of the transparent conductive layer and the metal layer;
  • the array substrate includes a data line, the metal layer includes a source metal layer and a drain metal layer, and the source metal layer is connected to the data line;
  • the transparent conductive layer includes a first connection segment and a second connection Segment and pixel electrode, the second connection segment is connected to the drain metal layer, and the second connection segment is connected to the pixel electrode through the first connection segment;
  • the hollow structure includes a first hollow structure and a second hollow structure , The first hollow structure is located in the overlapping area of the first connection section and the source metal layer; the second hollow structure is located in the overlapping area of the second connection section and the drain metal layer ;
  • the array substrate further includes a passivation layer, the passivation layer is located above the drain metal layer, the passivation layer includes a through hole, the drain metal layer includes a recess, and the second connection segment penetrates Pass through the through hole and connect and fix in the recess;
  • the drain metal layer is circular, and the second hollow structure is circular;
  • the drain metal layer and the second hollow structure are concentric circles;
  • the source metal layer is circular, and the first hollow structure is symmetrical with respect to the radial direction of the source metal layer;
  • the shape of the first hollow structure is an elongated shape
  • the first hollow structure is located in the middle of the first connecting section.
  • the present application also provides a display panel including an array substrate, the array substrate including:
  • a transparent conductive layer formed above the active switch and connected to the active switch;
  • the active switch includes a metal layer
  • a hollow structure is provided on the transparent conductive layer, and the hollow structure is located in an overlapping area of the transparent conductive layer and the metal layer.
  • the array substrate includes a data line, the metal layer includes a source metal layer, and the source metal layer is connected to the data line;
  • the transparent conductive layer includes a first connection segment, and the hollow structure It includes a first hollow structure, and the first hollow structure is located in the overlapping area of the first connection segment and the source metal layer;
  • the shape of the first hollow structure is set as a polygon, a strip, or an arc , Or a combination of the above.
  • the metal layer includes a drain metal layer
  • the transparent conductive layer includes a second connection segment
  • the second connection segment is connected to the drain metal layer
  • the hollow structure includes a second hollow structure, The second hollow structure is located in an overlapping area of the second connection segment and the drain metal layer; the shape of the second hollow structure is set to a polygon, a strip shape or an arc shape, or a combination of the above shapes .
  • This application considers that the transparent conductive layer and the metal layer have overlapping areas, then parasitic capacitance will be generated in the work, and the parasitic capacitance will affect the charging rate, and it will also cause the picture quality to be reduced.
  • the overlapping area can reduce the generated parasitic capacitance, which can improve the charging rate and improve the picture quality. Therefore, in this solution, a hollow structure is provided for the transparent conductive layer in the overlapping area on the overlapping area of the transparent conductive layer and the metal layer, thereby reducing the overlapping area of the transparent conductive layer and the metal layer.
  • FIG. 1 is a schematic diagram of a circular source, drain metal layer and transparent conductive layer in one embodiment of this application with overlapping regions;
  • FIG. 2 is a schematic diagram of a hollow structure in an overlapping area of a circular source, drain metal layer and transparent conductive layer according to an embodiment of the present application;
  • FIG. 3 is a schematic diagram of a cross-section of a hollow structure in an overlapping area of a circular source, drain metal layer and transparent conductive layer according to an embodiment of the present application.
  • connection should be understood in a broad sense, for example, it can be fixed connection or detachable Connected, or connected integrally; either mechanically or electrically; directly connected, or indirectly connected through an intermediary, or internally connected between two components.
  • installation should be understood in a broad sense, for example, it can be fixed connection or detachable Connected, or connected integrally; either mechanically or electrically; directly connected, or indirectly connected through an intermediary, or internally connected between two components.
  • the embodiment describes the array substrate and the display panel of the present application in detail.
  • An array substrate 110 includes a substrate 111, an active switch 112, and a transparent conductive layer 113.
  • the active switch 112 is formed above the substrate 111; the transparent conductive layer 113 is formed above the active switch 112 and is connected to the active switch 112;
  • the active switch 112 includes a metal layer 200; a hollow structure 300 is provided on the transparent conductive layer 113, and the hollow structure 300 is located in an overlapping area of the transparent conductive layer 113 and the metal layer 200.
  • the transparent conductive layer 113 and the metal layer 200 have an overlapping area 600
  • parasitic capacitance will be generated during operation, and the parasitic capacitance will affect the charging rate, and it will also lead to degradation of the picture quality. If it can reduce the transparent conductive
  • the area of the overlapping area 600 of the layer 113 and the metal layer 200 can reduce the generated parasitic capacitance, thereby improving the charging rate and improving the picture quality. Therefore, in this solution, a hollow structure 300 is provided on the transparent conductive layer 113 of the overlapping area on the overlapping area of the transparent conductive layer 113 and the metal layer 200, thereby reducing the overlap of the transparent conductive layer 113 and the metal layer 200 area.
  • the substrate 111 may be made of glass material.
  • the array substrate 110 includes a data line 114
  • the metal layer 200 includes a source metal layer 210
  • the source metal layer 210 is connected to the data line 114
  • the transparent conductive layer 113 includes a first connection section 400
  • the hollow structure 300 includes The first hollow structure 310 is located in the overlapping region 600 between the first connection section 400 and the source metal layer 210.
  • a hollow structure 300 is provided on the second connection section 500 of the transparent conductive layer 113 on the overlapping area of the transparent conductive layer 113 and the drain metal layer 220, that is, The overlapping area of the transparent conductive layer 113 and the drain metal layer 220 further improves the charging rate and improves the picture quality.
  • the array substrate 110 includes a passivation layer 115
  • the metal layer 200 includes a drain metal layer 220
  • the passivation layer 115 is located above the drain metal layer 220
  • the passivation layer 115 includes a via 700
  • the drain metal The layer 220 includes a recess 221
  • the second connecting section 500 passes through the through hole 700 and is connected and fixed in the recess 221.
  • the second connection segment 500 of the transparent conductive layer 113 is in contact with the drain metal layer 220 in order to protect the second connection segment 500 of the transparent conductive layer 113 and the drain metal
  • the connection of the layer 220 is firm. Therefore, in this solution, a recess 221 is provided on the drain metal layer 220 so that the second connection section 500 of the transparent conductive layer 113 is fixed to the recess 221 of the drain metal layer 220 through the passivation layer 115 In this way, the second connection segment 500 of the transparent conductive layer 113 and the drain metal layer 220 are connected and connected more firmly.
  • the drain metal layer 220 is circular, and the second hollow structure 320 is circular.
  • the second hollow structure 320 on the second connection section 500 of the transparent conductive layer 113 designed in this solution is circular, which is convenient for manufacturing and can be reduced
  • the overlapping area of the transparent conductive layer 113 and the drain metal layer 220 further improves the charging rate and improves the picture quality.
  • the drain metal layer 220 and the second hollow structure 320 are concentric circles.
  • this solution because the drain metal layer 220 is circular, the overlapping region 600 of the transparent conductive layer 113 and the drain metal layer 220 is also circular. Therefore, this solution uses the drain metal layer 220 and the second hollow structure 320 It is set as a concentric circle, so that the shape of the second hollow structure 320 is more matched, and a better design can be achieved, and the area utilization rate is appropriate.
  • the source metal layer 210 is circular, and the first hollow structure 310 is symmetrical with respect to the radial direction of the circular source metal layer 210.
  • the source metal layer 210 has a circular shape, specifically a circular ring shape, the overlapping region 600 of the first connection segment 400 of the transparent conductive layer 113 and the source metal layer 210 is a part of the circular ring shape ,
  • the shape is relatively irregular, and considering that the transparent conductive layer 113 is used to conduct signals, then the uniformity of the transparent conductive layer 113 is very important, therefore, the first hollow designed on the first connection section 400 of the transparent conductive layer 113 in this solution
  • the structure 310 is symmetrical about the radial direction of the circular source metal layer 210, so that the first connection section 400 of the transparent conductive layer 113 with the first hollow structure 310 is still uniform, which can ensure the stability of the signal conduction function .
  • the shape of the first hollow structure 310 is an elongated shape.
  • the first hollow structure 310 designed on the first connection section 400 of the transparent conductive layer 113 is symmetrical about the radial of the circular source metal layer 210, as long as the first hollow structure 310 is guaranteed
  • the first connection section 400 of the transparent conductive layer 113 is still uniform, which can ensure the stability of the signal transmission function.
  • the first hollow structure 310 on the first connection section 400 of the transparent conductive layer 113 is designed as a long strip Shape, because the elongated shape itself has symmetry and structural uniformity, and the shape of the first connection section 400 of the transparent conductive layer 113 is close to a rectangle, so that the first connection of the elongated first hollow structure 310 and the transparent conductive layer 113
  • the shape of the segment 400 is matched, and a better design can be realized, and the area is properly used.
  • the first hollow structure 310 is located in the middle of the first connection section 400.
  • the first hollow structure 310 is provided in the middle of the first connection section 400 of the transparent conductive layer 113, such that the middle is hollow, and the first connection section 400 of the transparent conductive layer 113 on both sides is continuous.
  • the first connection section 400 of the transparent conductive layer 113 still has better stability.
  • the shape of the first hollow structure may be a polygon or an arc; the shape of the second hollow structure may be a polygon or an arc.
  • the width of the first hollow structure 310 on the first connection section 400 is equal to the width of the second hollow structure 320 on the second connection section 500.
  • the first connection section 400 and the second connection section 500 of the transparent conductive layer 113 are an integrated structure, after the hollow structure 300 is provided for both the first connection section 400 and the second connection section 500, in order to still make the transparent
  • the conductive layer 113 has a uniform signal transmission capability. Therefore, in this solution, the width of the first hollow structure 310 on the first connection section 400 and the width of the second hollow structure 320 on the second connection section 500 are set equal. This not only facilitates production, but also reduces the overlapping area of the transparent conductive layer 113 and the source metal layer 210 and the drain metal layer 220, which greatly improves the charging rate and the picture quality.
  • the array substrate 110 includes a gate metal layer 116 formed on the substrate 111; a gate insulating layer 117 formed on the gate metal layer 116; and a semiconductor layer 118 formed on On the gate insulating layer 117; the ohmic contact layer 119, formed on the semiconductor layer 118, is located between the semiconductor layer 118 and the source and drain metal layers 220, and connects the semiconductor layer 118 and the source and drain metal layers 220.
  • the array substrate 110 includes a substrate 111, an active switch 112, and a transparent conductive layer 113.
  • the active switch 112 is formed above the substrate 111; the transparent conductive layer 113 is formed above the active switch 112 and is connected to the active switch 112; the active switch 112 includes a metal layer 200; the transparent conductive layer 113 is provided with a hollow structure 300 The structure 300 is located in the overlapping area of the transparent conductive layer 113 and the metal layer 200;
  • the array substrate 110 includes a data line 114
  • the metal layer 200 includes a source metal layer 210 and a drain metal layer 220, the source metal layer 210 is connected to the data line 114
  • the transparent conductive layer 113 includes a first connection section 400 and a second connection section 500 and the pixel electrode 800, the second connection section 500 is connected to the drain metal layer 220, and the second connection section 500 is connected to the pixel electrode 800 through the first connection section 400
  • the hollow structure 300 includes a first hollow structure 310 and a second hollow structure 320, the first hollow structure 310 is located in the overlapping region 600 of the first connection section 400 and the source metal layer 210; the second hollow structure 320 is located in the overlapping region 600 of the second connection section 500 and the drain metal layer 220;
  • the array substrate 110 further includes a passivation layer 115 that is located above the drain metal layer 220.
  • the passivation layer 115 includes a via 700, the drain metal layer 220 includes a recess 221, and the second connection section 500 passes through the via 700 and connected and fixed in the recess 221;
  • the drain metal layer 220 is circular, and the second hollow structure 320 is circular;
  • the drain metal layer 220 and the second hollow structure 320 are concentric circles;
  • the source metal layer 210 is circular, and the first hollow structure 310 is symmetrical with respect to the radial direction of the source metal layer 210;
  • the transparent conductive layer 113 and the metal layer 200 have an overlapping area 600
  • parasitic capacitance will be generated during operation, and the parasitic capacitance will affect the charging rate, and it will also lead to degradation of the picture quality. If it can reduce the transparent conductive
  • the area of the overlapping area 600 of the layer 113 and the metal layer 200 can reduce the generated parasitic capacitance, thereby improving the charging rate and improving the picture quality.
  • a hollow structure 300 is provided on the transparent conductive layer 113 of the overlapping area on the overlapping area of the transparent conductive layer 113 and the metal layer 200, thereby reducing the overlap of the transparent conductive layer 113 and the metal layer 200 Area; considering that the transparent conductive layer 113 and the source metal layer 210 have an overlapping area 600, then in operation, a parasitic capacitance will be generated between the transparent conductive layer 113 and the source metal layer 210, which will lead to a reduction in the charging rate and the screen quality.
  • the first hollow structure 310 is provided on the first connection section 400 of the transparent conductive layer 113 on the overlapping area of the transparent conductive layer 113 and the source metal layer 210, that is, the first connection section 400 Reduce the overlapping area of the transparent conductive layer 113 and the source metal layer 210, thereby improving the charging rate and improving the picture quality; considering that there is an overlap area 600 between the transparent conductive layer 113 and the drain metal layer 220, then in operation, transparent A parasitic capacitance is generated between the conductive layer 113 and the drain metal layer 220, which may cause a decrease in charging rate and picture quality.
  • a second hollow structure 320 is provided on the second connection section 500 of the transparent conductive layer 113 on the overlapping area of the transparent conductive layer 113 and the drain metal layer 220, that is, on the second connection section 500. Reduce the overlapping area of the transparent conductive layer 113 and the drain metal layer 220, thereby improving the charging rate and improving the picture quality; considering that the transparent conductive layer 113 needs to conduct signals, the second connection section 500 of the transparent conductive layer 113 and the drain The metal layer 220 is in contact and connection.
  • a recess 221 is provided in the drain metal layer 220 to make the transparent conductive layer 113
  • the second connection section 500 is fixed to the recess 221 of the drain metal layer 220 through the passivation layer 115, so that the second connection section 500 of the transparent conductive layer 113 and the drain metal layer 220 are more firmly connected to the contact; considering the drain The metal layer 220 is circular, and the overlapping region 600 of the transparent conductive layer 113 and the drain metal layer 220 is also circular.
  • the second hollow structure 320 on the second connection section 500 of the transparent conductive layer 113 designed in this solution is circular Shape, which is not only convenient to manufacture, but also can reduce the overlapping area of the transparent conductive layer 113 and the drain metal layer 220, thereby improving the charging rate and improving the picture quality; because the drain metal layer 220 is round, the transparent conductive layer 113
  • the overlapping region 600 with the drain metal layer 220 is also circular.
  • this solution sets the overlapping region 600 of the second hollow structure 320 and the drain metal layer 220 and the transparent conductive layer 113 and the drain metal layer 220 as Concentric circles, so that the shape of the second hollow structure 320 is more matched, and a better design can be achieved, and the area utilization rate is appropriate; because the source metal layer 210 is circular, specifically circular, so the transparent conductive layer 113
  • the overlapping region 600 of the first connection section 400 and the source metal layer 210 is part of a circular ring shape, and the shape is relatively irregular, and considering that the transparent conductive layer 113 is used to conduct signals, the uniformity of the transparent conductive layer 113 is important Therefore, the first hollow structure 310 designed on the first connection section 400 of the transparent conductive layer 113 in this solution is symmetrical with respect to the radial direction of the circular source metal layer 210, so that the first hollow structure 310 The first connection section 400 of the transparent conductive layer 113 is still uniform, which can ensure the stability of the signal transmission function; because the first hollow structure 310 designed on
  • the first hollow structure 310 on the first connection section 400 of the layer 113 is designed as a strip, because the strip itself has symmetry and structural uniformity, and the first connection section 400 of the transparent conductive layer 113 is connected Near-rectangular shape, such that the elongated first hollow structure 310 matches the shape of the first connection section 400 of the transparent conductive layer 113, which can achieve better design and proper area utilization; the elongated first hollow structure 310 is provided in The middle position of the first connection section 400 of the transparent conductive layer 113 is hollowed out in this way, the first connection section 400 of the transparent conductive layer 113 on both sides is continuous, then structurally, the first connection section 400 of the transparent conductive layer 113 is still Has good stability.
  • a display panel 100 is disclosed.
  • the display panel 100 includes an array substrate 110 including a substrate 111, an active switch 112 and a transparent conductive layer 113.
  • the active switch 112 is formed on the substrate 111
  • the transparent conductive layer 113 is formed on the active switch 112 and connected to the active switch 112;
  • the active switch 112 includes a metal layer 200;
  • the transparent conductive layer 113 is provided with a hollow structure 300, the hollow structure 300 is located on the transparent conductive layer 113 and The overlapping area of the metal layer 200.
  • the transparent conductive layer 113 and the metal layer 200 have an overlapping area 600
  • parasitic capacitance will be generated during operation, and the parasitic capacitance will affect the charging rate, and it will also lead to a reduction in the quality of the picture.
  • the area of the overlapping area 600 of the layer 113 and the metal layer 200 can reduce the generated parasitic capacitance, thereby improving the charging rate and improving the picture quality. Therefore, in this solution, a hollow structure 300 is provided on the transparent conductive layer 113 of the overlapping area on the overlapping area of the transparent conductive layer 113 and the metal layer 200, thereby reducing the overlap of the transparent conductive layer 113 and the metal layer 200 area.
  • the substrate 111 may be made of glass material.
  • the array substrate 110 includes a data line 114
  • the metal layer 200 includes a source metal layer 210
  • the source metal layer 210 is connected to the data line 114
  • the transparent conductive layer 113 includes a first connection section 400
  • the hollow structure 300 includes The first hollow structure 310 is located in the overlapping region 600 of the first connection section 400 and the source metal layer 210; the shape of the first hollow structure 310 is set as a polygon, a strip or an arc, or more Combination shape.
  • a hollow structure 300 is provided on the second connection section 500 of the transparent conductive layer 113 on the overlapping area of the transparent conductive layer 113 and the drain metal layer 220, that is, The overlapping area of the transparent conductive layer 113 and the drain metal layer 220 further improves the charging rate and improves the picture quality; wherein, the shape of the first hollow structure 310 is set as a polygon, a strip or an arc, or a combination of the above , Can better adapt to the use environment, so as to play a better function.
  • the metal layer 200 includes a drain metal layer 220, the transparent conductive layer 113 includes a second connection segment 500, and the second connection segment 500 is connected to the drain metal layer 220;
  • the hollow structure 300 includes a second hollow structure 320, The second hollow structure 320 is located in the overlapping region 600 of the second connection section 500 and the drain metal layer 220; the shape of the second hollow structure 320 is set as a polygon, a strip, an arc, or a combination of the above.
  • a hollow structure 300 is provided on the second connection section 500 of the transparent conductive layer 113 on the overlapping area of the transparent conductive layer 113 and the drain metal layer 220, that is, The overlapping area of the transparent conductive layer 113 and the drain metal layer 220 further improves the charging rate and improves the picture quality; wherein, the shape of the second hollow structure 320 is set as a polygon, a strip or an arc, or a combination of the above , Can better adapt to the use environment, so as to play a better function.

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  • Microelectronics & Electronic Packaging (AREA)
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Abstract

一种阵列基板和显示面板，所述阵列基板包括衬底（111）、主动开关（112）和透明导电层（113），所述主动开关（112）形成于所述衬底（111）的上方；所述透明导电层（113）形成于所述主动开关（112）的上方，且所述透明导电层（113）与所述主动开关（112）连接；所述主动开关（112）包括金属层（200）；所述透明导电层（113）上设有镂空结构（300），所述镂空结构（300）位于所述透明导电层（113）与所述金属层（200）的交叠的区域。

Description

阵列基板和显示面板
本申请要求于2018年11月21日提交中国专利局，申请号为CN201821940782.7，发明名称为“一种阵列基板和显示面板”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，尤其涉及一种阵列基板和显示面板。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成现有技术。
随着科技的发展和进步，平板显示器由于具备机身薄、省电和辐射低等热点而成为显示器的主流产品，得到了广泛应用。平板显示器包括薄膜晶体管液晶显示器(Thin Film Transistor-Liquid Crystal Display，TFT-LCD)和有机发光二极管(Organic Light-Emitting Diode，OLED)显示器等。其中像素电极与源极或者漏极存在交叠区域，而交叠区域会产生寄生电容，且交叠区域的面积大小与产生的寄生电容大小成正比，同时寄生电容的大小与TFT的充电率以及画面品质成反比。
TFT的充电率较低、画面品质较差。
技术解决方案
鉴于上述缺陷，本申请的目的在于提供一种阵列基板和显示面板，以提高充电率和改善画面品质。
为实现上述目的，本申请提供了一种阵列基板，包括衬底、主动开关以及透明导电层，所述主动开关形成于所述衬底的上方；所述透明导电层形成于所述主动开关的上方，并与所述主动开关连接；所述主动开关包括金属层；所述透明导电层上设有镂空结构，所述镂空结构位于所述透明导电层与所述金属层的交叠的区域。
可选的，所述阵列基板包括数据线，所述金属层包括源极金属层，所述源极金属层与所述数据线相连；所述透明导电层包括第一连接段，所述镂空结构包括第一镂空结构，所述第一镂空结构位于所述第一连接段与所述源极金属层的交叠区域。
可选的，所述金属层包括漏极金属层，所述透明导电层包括第二连接段，所述第二连接段与所述漏极金属层连接；所述镂空结构包括第二镂空结构，所述第二镂空结构位于所述第二连接段与所述漏极金属层的交叠区域。
可选的，所述阵列基板包括钝化层，所述金属层包括漏极金属层，所述钝化层位于所述漏极金属层的上方，所述钝化层包括通孔，所述漏极金属层包括凹陷，所述第二连接段穿过所述通孔并连接固定在所述凹陷内。
可选的，所述漏极金属层为圆形，所述第二镂空结构为圆形。
可选的，所述漏极金属层以及所述第二镂空结构为同心圆。
可选的，所述源极金属层为圆形，所述第一镂空结构关于所述源极的径向对称。
可选的，所述第一镂空结构的形状为长条形。
可选的，所述第一镂空结构位于所述第一连接段的中间位置。
可选的，所述第一镂空结构的形状包括多边形。
可选的，所述第一镂空结构的形状包括弧形。
可选的，所述第二镂空结构的形状包括多边形。
可选的，所述第二镂空结构的形状包括弧形。
本申请还提供一种阵列基板，包括衬底、主动开关以及透明导电层，所述主动开关形成于所述衬底的上方；所述透明导电层形成于所述主动开关的上方，并与所述主动开关连接；所述主动开关包括金属层；所述透明导电层上设有镂空结构，所述镂空结构位于所述透明导电层与所述金属层的交叠的区域；
所述阵列基板包括数据线，所述金属层包括源极金属层和漏极金属层，所述源极金属层与所述数据线相连；所述透明导电层包括第一连接段、第二连接段和像素电极，所述第二连接段与所述漏极金属层连接，所述第二连接段通过第一连接段与像素电极连接；所述镂空结构包括第一镂空结构和第二镂空结构，所述第一镂空结构位于所述第一连接段与所述源极金属层的交叠区域；所述第二镂空结构位于所述第二连接段与所述漏极金属层的交叠区域；
所述阵列基板还包括钝化层，所述钝化层位于所述漏极金属层的上方，所述钝化层包括通孔，所述漏极金属层包括凹陷，所述第二连接段穿过所述通孔并连接固定在所述凹陷内；
所述漏极金属层为圆形，所述第二镂空结构为圆形；
所述漏极金属层以及所述第二镂空结构为同心圆；
所述源极金属层为圆形，所述第一镂空结构关于所述源极金属层的径向对称；
所述第一镂空结构的形状为长条形；
所述第一镂空结构位于所述第一连接段的中间位置。
本申请还提供一种显示面板，包括阵列基板，所述阵列基板包括：
衬底；
主动开关，形成于所述衬底的上方；以及
透明导电层，形成于所述主动开关的上方，并与所述主动开关连接；
所述主动开关包括金属层；
所述透明导电层上设有镂空结构，所述镂空结构位于所述透明导电层与所述金属层的交叠的区域。
可选的，所述阵列基板包括数据线，所述金属层包括源极金属层，所述源极金属层与所述数据线相连；所述透明导电层包括第一连接段，所述镂空结构包括第一镂空结构，所述第一镂空结构位于所述第一连接段与所述源极金属层的交叠区域；所述第一镂空结构的形状设为多边形、长条形或圆弧形，或者以上的组合形状。
可选的，所述金属层包括漏极金属层，所述透明导电层包括第二连接段，所述第二连接段与所述漏极金属层连接；所述镂空结构包括第二镂空结构，所述第二镂空结构位于所述第二连接段与所述漏极金属层的交叠区域；所述第二镂空结构的形状设为多边形、长条形或圆弧形，或者以上的组合形状。
本申请考虑到透明导电层与金属层有交叠区域，那么在工作中会产生寄生电容，寄生电容会影响充电率，并且还会导致画面品质降低，若是可以减小透明导电层与金属层的交叠区域面积，那么可以减少产生的寄生电容，从而可以提升充电率和提高画面品质。因此，本方案通过在透明导电层与金属层的交叠的区域上，对交叠的区域的透明导电层设镂空结构，从而减小透明导电层与金属层的交叠面积。
附图说明
所包括的附图用来提供对本申请实施例的理解，其构成了说明书的一部分，用于例示本申请的实施方式，并与文字描述一起来阐释本申请的原理。显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。在附图中：
图1是本申请其中一个实施例的一种圆形源、漏极金属层与透明导电层存在交叠区域的示意图；
图2是本申请其中一个实施例的一种圆形源、漏极金属层与透明导电层的交叠区域存在镂空结构的示意图；
图3是本申请其中一个实施例的一种圆形源、漏极金属层与透明导电层的交叠区域存在镂空结构的剖面的示意图。
本申请的实施方式
这里所公开的具体结构和功能细节仅仅是代表性的，并且是描述本申请的示例性实施例的目的。但是本申请可以通过许多替换形式来具体实现，并且不应当被解释成仅仅受限于这 里所阐述的实施例。
在本申请的描述中，需要理解的是，术语“中心”、“横向”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请的描述中，除非另有说明，“多个”的含义是两个或两个以上。另外，术语“包括”及其任何变形，意图在于覆盖不排他的包含。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本申请中的具体含义。
这里所使用的术语仅仅是为了描述具体实施例而不意图限制示例性实施例。除非上下文明确地另有所指，否则这里所使用的单数形式“一个”、“一项”还意图包括复数。还应当理解的是，这里所使用的术语“包括”和/或“包含”规定所陈述的特征、整数、步骤、操作、单元和/或组件的存在，而不排除存在或添加一个或更多其他特征、整数、步骤、操作、单元、组件和/或其组合。
在图中，结构相似是以相同标号表示。
如图1至图3所示，实施例详细描述本申请的阵列基板和显示面板。
一种阵列基板110，包括衬底111、主动开关112和透明导电层113，主动开关112形成于衬底111的上方；透明导电层113形成于主动开关112的上方，并与主动开关112连接；主动开关112包括金属层200；透明导电层113上设有镂空结构300，镂空结构300位于透明导电层113与金属层200的交叠的区域。
本方案中，考虑到透明导电层113与金属层200有交叠区域600，那么在工作中会产生寄生电容，寄生电容会影响充电率，并且还会导致画面品质降低，若是可以减小透明导电层113与金属层200的交叠区域600面积，那么可以减少产生的寄生电容，从而可以提升充电率和提高画面品质。因此，本方案通过在透明导电层113与金属层200的交叠的区域上，对交叠的区域的透明导电层113设镂空结构300，从而减小透明导电层113与金属层200的交叠面积。衬底111可以采用玻璃材料制成。
在一实施例中，阵列基板110包括数据线114，金属层200包括源极金属层210，源极 金属层210与数据线114相连；透明导电层113包括第一连接段400，镂空结构300包括第一镂空结构310，第一镂空结构310位于第一连接段400与源极金属层210的交叠区域600。
本方案中，考虑到透明导电层113与漏极金属层220存在交叠区域600，那么在工作中，透明导电层113与漏极金属层220之间就会产生寄生电容，会导致降低充电率和画面品质。因此，本方案通过在透明导电层113与漏极金属层220的交叠的区域，即第二连接段500上，在透明导电层113的第二连接段500上设镂空结构300，从而减小透明导电层113与漏极金属层220的交叠面积，进而提高充电率和提升画面品质。
在一实施例中，阵列基板110包括钝化层115，金属层200包括漏极金属层220，钝化层115位于漏极金属层220的上方，钝化层115包括通孔700，漏极金属层220包括凹陷221，第二连接段500穿过通孔700并连接固定在凹陷221内。
本方案中，考虑到透明导电层113需要传导信号，因此透明导电层113的第二连接段500与漏极金属层220接触连接，为了保障透明导电层113的第二连接段500与漏极金属层220的连接牢固性，因此，本方案在漏极金属层220上设有凹陷221，使透明导电层113的第二连接段500穿过钝化层115固定到漏极金属层220的凹陷221内，这样透明导电层113的第二连接段500与漏极金属层220接触连接更牢固。
在一实施例中，漏极金属层220为圆形，第二镂空结构320为圆形。
本方案中，考虑到漏极金属层220为圆形，本方案设计的透明导电层113的第二连接段500上的第二镂空结构320为圆形，这样既方便制作，又可以实现减小透明导电层113与漏极金属层220的交叠面积，进而提高充电率和提升画面品质。
在一实施例中，漏极金属层220以及第二镂空结构320为同心圆。
本方案中，因为漏极金属层220为圆形，透明导电层113与漏极金属层220的交叠区域600也为圆形，因此，本方案将漏极金属层220以及第二镂空结构320设为同心圆，这样第二镂空结构320形状更匹配，且可以实现更好的设计，面积利用率恰当。
在一实施例中，源极金属层210为圆形，第一镂空结构310关于圆形的源极金属层210的径向对称。
本方案中，因为源极金属层210为圆形，具体的说为圆环形，所以透明导电层113的第一连接段400与源极金属层210的交叠区域600为圆环形的一部分，形状比较不规则，而考虑到透明导电层113是用来传导信号，那么透明导电层113均匀性很重要，因此，本方案在透明导电层113的第一连接段400上设计的第一镂空结构310，使其关于圆形的源极金属层210的径向对称，这样带有第一镂空结构310的透明导电层113的第一连接段400仍是均匀的，可以保证信号传导功能稳定性。
在一实施例中，第一镂空结构310的形状为长条形。
本方案中，因为在透明导电层113的第一连接段400上设计的第一镂空结构310是关于圆形的源极金属层210的径向对称的，只要保证带有第一镂空结构310的透明导电层113的第一连接段400仍是均匀的，就可以保证信号传导功能稳定性，因此，本方案将透明导电层113的第一连接段400上的第一镂空结构310设计为长条形，因为长条形本身具有对称性和结构均匀性，而且透明导电层113的第一连接段400本身形状接近矩形，这样长条形的第一镂空结构310与透明导电层113的第一连接段400形状匹配，可以实现更好的设计，面积利用恰当。
在一实施例中，第一镂空结构310位于第一连接段400的中间位置。
本方案中，第一镂空结构310设于透明导电层113的第一连接段400的中间位置，这样中间镂空，两侧透明导电层113的第一连接段400是出于连续，那么结构上，透明导电层113的第一连接段400仍具有较好的稳定性。
在一实施例中，第一镂空结构的形状可以设为多边形或者弧形；第二镂空结构的形状可以设为多边形或者弧形。
在一实施例中，第一连接段400上的第一镂空结构310的宽度与第二连接段500上的第二镂空结构320的宽度相等。
本方案中，因为透明导电层113的第一连接段400和第二连接段500是一体结构，那么对第一连接段400和第二连接段500均设有镂空结构300后，为了仍使透明导电层113具有均匀的信号传到能力，因此，本方案将第一连接段400上的第一镂空结构310的宽度与第二连接段500上的第二镂空结构320的宽度设为相等，这样既方便制作，又减小了透明导电层113与源极金属层210和漏极金属层220的交叠面积，极大提升了充电率和画面品质。
在一实施例中，如图3所示，阵列基板110包括栅极金属层116，形成于衬底111上；栅极绝缘层117，形成于栅极金属层116上；半导体层118，形成于栅极绝缘层117上；欧姆接触层119，形成于半导体层118上，位于半导体层118和源、漏极金属层220之间，连接半导体层118与源、漏极金属层220。
如图1至图3所示，公开了一种阵列基板，阵列基板110包括衬底111、主动开关112和透明导电层113，
主动开关112形成于衬底111的上方；透明导电层113形成于主动开关112的上方，并与主动开关112连接；主动开关112包括金属层200；透明导电层113上设有镂空结构300，镂空结构300位于透明导电层113与金属层200的交叠的区域；
阵列基板110包括数据线114，金属层200包括源极金属层210和漏极金属层220，源极金属层210与数据线114相连；透明导电层113包括第一连接段400、第二连接段500和像素电极800，第二连接段500与漏极金属层220连接，第二连接段500通过第一连接段400 与像素电极800连接；镂空结构300包括第一镂空结构310和第二镂空结构320，第一镂空结构310位于第一连接段400与源极金属层210的交叠区域600；第二镂空结构320位于第二连接段500与漏极金属层220的交叠区域600；
阵列基板110还包括钝化层115，钝化层115位于漏极金属层220的上方，钝化层115包括通孔700，漏极金属层220包括凹陷221，第二连接段500穿过通孔700并连接固定在凹陷221内；
漏极金属层220为圆形，第二镂空结构320为圆形；
漏极金属层220以及第二镂空结构320为同心圆；
源极金属层210为圆形，第一镂空结构310关于源极金属层210的径向对称；且第一镂空结构310的形状为长条形，位于第一连接段400的中间位置。
本方案中，考虑到透明导电层113与金属层200有交叠区域600，那么在工作中会产生寄生电容，寄生电容会影响充电率，并且还会导致画面品质降低，若是可以减小透明导电层113与金属层200的交叠区域600面积，那么可以减少产生的寄生电容，从而可以提升充电率和提高画面品质。因此，本方案通过在透明导电层113与金属层200的交叠的区域上，对交叠的区域的透明导电层113设镂空结构300，从而减小透明导电层113与金属层200的交叠面积；考虑到透明导电层113与源极金属层210存在交叠区域600，那么在工作中，透明导电层113与源极金属层210之间就会产生寄生电容，会导致降低充电率和画面品质。因此，本方案通过在透明导电层113与源极金属层210的交叠的区域，即第一连接段400上，在透明导电层113的第一连接段400上设第一镂空结构310，从而减小透明导电层113与源极金属层210的交叠面积，进而提高充电率和提升画面品质；考虑到透明导电层113与漏极金属层220存在交叠区域600，那么在工作中，透明导电层113与漏极金属层220之间就会产生寄生电容，会导致降低充电率和画面品质。因此，本方案通过在透明导电层113与漏极金属层220的交叠的区域，即第二连接段500上，在透明导电层113的第二连接段500上设第二镂空结构320，从而减小透明导电层113与漏极金属层220的交叠面积，进而提高充电率和提升画面品质；考虑到透明导电层113需要传导信号，因此透明导电层113的第二连接段500与漏极金属层220接触连接，为了保障透明导电层113的第二连接段500与漏极金属层220的连接牢固性，因此，本方案在漏极金属层220上设有凹陷221，使透明导电层113的第二连接段500穿过钝化层115固定到漏极金属层220的凹陷221内，这样透明导电层113的第二连接段500与漏极金属层220接触连接更牢固；考虑到漏极金属层220为圆形，透明导电层113与漏极金属层220的交叠区域600也为圆形，本方案设计的透明导电层113的第二连接段500上的第二镂空结构320为圆形，这样既方便制作，又可以实现减小透明导电层113与漏极金属层220的交叠面积，进而提高充电率和提升画面品质；因为漏极金属层220为圆 形，透明导电层113与漏极金属层220的交叠区域600也为圆形，因此，本方案将第二镂空结构320和漏极金属层220以及透明导电层113与漏极金属层220的交叠区域600设为同心圆，这样第二镂空结构320形状更匹配，且可以实现更好的设计，面积利用率恰当；因为源极金属层210为圆形，具体的说为圆环形，所以透明导电层113的第一连接段400与源极金属层210的交叠区域600为圆环形的一部分，形状比较不规则，而考虑到透明导电层113是用来传导信号，那么透明导电层113均匀性很重要，因此，本方案在透明导电层113的第一连接段400上设计的第一镂空结构310，使其关于圆形的源极金属层210的径向对称，这样带有第一镂空结构310的透明导电层113的第一连接段400仍是均匀的，可以保证信号传导功能稳定性；因为在透明导电层113的第一连接段400上设计的第一镂空结构310是关于圆形的源极金属层210的径向对称的，只要保证带有第一镂空结构310的透明导电层113的第一连接段400仍是均匀的，就可以保证信号传导功能稳定性，因此，本方案将透明导电层113的第一连接段400上的第一镂空结构310设计为长条形，因为长条形本身具有对称性和结构均匀性，而且透明导电层113的第一连接段400本身形状接近矩形，这样长条形的第一镂空结构310与透明导电层113的第一连接段400形状匹配，可以实现更好的设计，面积利用恰当；将长条形的第一镂空结构310设于透明导电层113的第一连接段400的中间位置，这样中间镂空，两侧透明导电层113的第一连接段400是出于连续，那么结构上，透明导电层113的第一连接段400仍具有较好的稳定性。
如图1至图3所示，公开了一种显示面板100，显示面板100包括阵列基板110，阵列基板110包括衬底111、主动开关112和透明导电层113，主动开关112形成于衬底111的上方；透明导电层113形成于主动开关112的上方，并与主动开关112连接；主动开关112包括金属层200；透明导电层113上设有镂空结构300，镂空结构300位于透明导电层113与金属层200的交叠的区域。
本方案中，考虑到透明导电层113与金属层200有交叠区域600，那么在工作中会产生寄生电容，寄生电容会影响充电率，并且还会导致画面品质降低，若是可以减小透明导电层113与金属层200的交叠区域600面积，那么可以减少产生的寄生电容，从而可以提升充电率和提高画面品质。因此，本方案通过在透明导电层113与金属层200的交叠的区域上，对交叠的区域的透明导电层113设镂空结构300，从而减小透明导电层113与金属层200的交叠面积。衬底111可以采用玻璃材料制成。
在一实施例中，阵列基板110包括数据线114，金属层200包括源极金属层210，源极金属层210与数据线114相连；透明导电层113包括第一连接段400，镂空结构300包括第一镂空结构310，第一镂空结构310位于第一连接段400与源极金属层210的交叠区域600；第一镂空结构310的形状设为多边形、长条形或圆弧形，或者以上的组合形状。
本方案中，考虑到透明导电层113与漏极金属层220存在交叠区域600，那么在工作中，透明导电层113与漏极金属层220之间就会产生寄生电容，会导致降低充电率和画面品质。因此，本方案通过在透明导电层113与漏极金属层220的交叠的区域，即第二连接段500上，在透明导电层113的第二连接段500上设镂空结构300，从而减小透明导电层113与漏极金属层220的交叠面积，进而提高充电率和提升画面品质；其中，第一镂空结构310的形状设为多边形、长条形或圆弧形，或者以上的组合形状，可以更好的适应使用环境，从而发挥更好的功能。
在一实施例中，金属层200包括漏极金属层220，透明导电层113包括第二连接段500，第二连接段500与漏极金属层220连接；镂空结构300包括第二镂空结构320，第二镂空结构320位于第二连接段500与漏极金属层220的交叠区域600；第二镂空结构320的形状设为多边形、长条形或圆弧形，或者以上的组合形状。
本方案中，考虑到透明导电层113与漏极金属层220存在交叠区域600，那么在工作中，透明导电层113与漏极金属层220之间就会产生寄生电容，会导致降低充电率和画面品质。因此，本方案通过在透明导电层113与漏极金属层220的交叠的区域，即第二连接段500上，在透明导电层113的第二连接段500上设镂空结构300，从而减小透明导电层113与漏极金属层220的交叠面积，进而提高充电率和提升画面品质；其中，第二镂空结构320的形状设为多边形、长条形或圆弧形，或者以上的组合形状，可以更好的适应使用环境，从而发挥更好的功能。
以上内容是结合具体的可选的实施方式对本申请所作的详细说明，不能认定本申请的具体实施只局限于这些说明。对于本申请所属技术领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干简单推演或替换，都应当视为属于本申请的保护范围。

Claims (17)

  1. 一种阵列基板，包括：
    衬底；
    主动开关，形成于所述衬底的上方；以及
    透明导电层，形成于所述主动开关的上方，并与所述主动开关连接；
    所述主动开关包括金属层；
    所述透明导电层上设有镂空结构，所述镂空结构位于所述透明导电层与所述金属层的交叠的区域。
  2. 如权利要求1所述的一种阵列基板，其中，所述阵列基板包括数据线，所述金属层包括源极金属层，所述源极金属层与所述数据线相连；所述透明导电层包括第一连接段，所述镂空结构包括第一镂空结构，所述第一镂空结构位于所述第一连接段与所述源极金属层的交叠区域。
  3. 如权利要求1所述的一种阵列基板，其中，所述金属层包括漏极金属层，所述透明导电层包括第二连接段，所述第二连接段与所述漏极金属层连接；所述镂空结构包括第二镂空结构，所述第二镂空结构位于所述第二连接段与所述漏极金属层的交叠区域。
  4. 如权利要求3所述的一种阵列基板，其中，所述阵列基板包括钝化层，所述钝化层位于所述漏极金属层的上方，所述钝化层包括通孔，所述漏极金属层包括凹陷，所述第二连接段穿过所述通孔并连接固定在所述凹陷内。
  5. 如权利要求3所述的一种阵列基板，其中，所述漏极金属层为圆形，所述第二镂空结构为圆形。
  6. 如权利要求5所述的一种阵列基板，其中，所述漏极金属层以及所述第二镂空结构为同心圆。
  7. 如权利要求2所述的一种阵列基板，其中，所述源极金属层为圆形，所述第一镂空结构关于所述源极金属层的径向对称。
  8. 如权利要求7所述的一种阵列基板，其中，所述第一镂空结构的形状为长条形。
  9. 如权利要求2所述的一种阵列基板，其中，所述第一镂空结构位于所述第一连接段的中间位置。
  10. 如权利要求2所述的一种阵列基板，其中，所述第一镂空结构的形状包括多边形。
  11. 如权利要求2所述的一种阵列基板，其中，所述第一镂空结构的形状包括弧形。
  12. 如权利要求3所述的一种阵列基板，其中，所述第二镂空结构的形状包括多边形。
  13. 如权利要求3所述的一种阵列基板，其中，所述第二镂空结构的形状包括弧形。
  14. 一种阵列基板，包括：
    衬底；
    主动开关，形成于所述衬底的上方；以及
    透明导电层，形成于所述主动开关的上方，并与所述主动开关连接；
    所述主动开关包括金属层；
    所述透明导电层上设有镂空结构，所述镂空结构位于所述透明导电层与所述金属层的交叠的区域；
    所述阵列基板包括数据线，所述金属层包括源极金属层和漏极金属层，所述源极金属层与所述数据线相连；所述透明导电层包括第一连接段、第二连接段和像素电极，所述第二连接段与所述漏极金属层连接，所述第二连接段通过第一连接段与像素电极连接；所述镂空结构包括第一镂空结构和第二镂空结构，所述第一镂空结构位于所述第一连接段与所述源极金属层的交叠区域；所述第二镂空结构位于所述第二连接段与所述漏极金属层的交叠区域；
    所述阵列基板还包括钝化层，所述钝化层位于所述漏极金属层的上方，所述钝化层包括通孔，所述漏极金属层包括凹陷，所述第二连接段穿过所述通孔并连接固定在所述凹陷内；
    所述漏极金属层为圆形，所述第二镂空结构为圆形；
    所述漏极金属层以及所述第二镂空结构为同心圆；
    所述源极金属层为圆形，所述第一镂空结构关于所述源极金属层的径向对称；
    所述第一镂空结构的形状为长条形；
    所述第一镂空结构位于所述第一连接段的中间位置。
  15. 一种显示面板，包括阵列基板，所述阵列基板包括：
    衬底；
    主动开关，形成于所述衬底的上方；以及
    透明导电层，形成于所述主动开关的上方，并与所述主动开关连接；
    所述主动开关包括金属层；
    所述透明导电层上设有镂空结构，所述镂空结构位于所述透明导电层与所述金属层的交叠的区域。
  16. 如权利要求15所述的一种显示面板，其中，所述阵列基板包括数据线，所述金属层包括源极金属层，所述源极金属层与所述数据线相连；所述透明导电层包括第一连接段，所述镂空结构包括第一镂空结构，所述第一镂空结构位于所述第一连接段与所述源极金属层的交叠区域；
    所述第一镂空结构的形状设为多边形、长条形或圆弧形，或者以上的组合形状。
  17. 如权利要求15所述的一种显示面板，其中，所述金属层包括漏极金属层，所述透 明导电层包括第二连接段，所述第二连接段与所述漏极金属层连接；所述镂空结构包括第二镂空结构，所述第二镂空结构位于所述第二连接段与所述漏极金属层的交叠区域；
    所述第二镂空结构的形状设为多边形、长条形或圆弧形，或者以上的组合形状。
PCT/CN2018/119076 2018-11-21 2018-12-04 阵列基板和显示面板 Ceased WO2020103191A1 (zh)

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