WO2020087814A1 - 显示面板、显示屏及制备显示面板的方法 - Google Patents

显示面板、显示屏及制备显示面板的方法 Download PDF

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Publication number
WO2020087814A1
WO2020087814A1 PCT/CN2019/076357 CN2019076357W WO2020087814A1 WO 2020087814 A1 WO2020087814 A1 WO 2020087814A1 CN 2019076357 W CN2019076357 W CN 2019076357W WO 2020087814 A1 WO2020087814 A1 WO 2020087814A1
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Prior art keywords
layer
substrate
display panel
barrier
barrier layer
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English (en)
French (fr)
Inventor
谢峰
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Yungu Guan Technology Co Ltd
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Yungu Guan Technology Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/128—Active-matrix OLED [AMOLED] displays comprising two independent displays, e.g. for emitting information from two major sides of the display
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/17—Passive-matrix OLED displays
    • H10K59/176—Passive-matrix OLED displays comprising two independent displays, e.g. for emitting information from two major sides of the display

Definitions

  • the present application relates to the field of display technology, in particular to a display panel, a display screen, and a method of preparing a display panel.
  • the present application provides a display panel, a display screen, and a method for preparing a display panel, which can improve the stability of the display panel.
  • An aspect of the present application provides a display panel, including:
  • a substrate electrode, the substrate electrode is formed on the substrate
  • the isolation column includes a plurality of partition layers stacked in sequence, a step is formed between two adjacent partition layers, and the angles of the two adjacent steps are different.
  • the angle of the step away from the substrate is smaller than the angle of the step near the substrate.
  • the plurality of barrier layers include a first barrier layer and a second barrier layer stacked in sequence, the second barrier layer is closer to the substrate relative to the first barrier layer, the first The first electrode layer material is formed on the partition layer.
  • the cross-section of the first barrier layer in the first direction is rectangular, and the cross-section of the second barrier layer in the first direction is in a shape where the upper base is smaller than the lower base.
  • One direction is perpendicular to the extension direction of the isolation pillar and perpendicular to the substrate, and the extension direction of the isolation pillar is parallel to the substrate.
  • the plurality of partition layers further include: a third partition layer and a fourth partition layer that are sequentially disposed under the second partition layer, the fourth partition layer being opposite to the third partition layer
  • the layer is closer to the substrate; the cross-section of the fourth barrier layer in the first direction is shaped such that the upper bottom edge is larger than the lower bottom edge.
  • the angle of the step formed between the first barrier layer and the second barrier layer is smaller than the angle of the step formed between the second barrier layer and the third barrier layer
  • the The angle of the step formed between the second barrier layer and the third barrier layer is smaller than the angle of the step formed between the third barrier layer and the fourth barrier layer.
  • the fourth barrier layer, the third barrier layer, and the second barrier layer are films prepared by the same etching process, and the etching process is ion milling etching, plasma etching Etching, reactive ion etching.
  • the etching selection ratio of the fourth partition layer and the third partition layer is greater than 1; the etching selection ratio of the second partition layer and the third partition layer is greater than 1.
  • the material of the first barrier layer is photoresist
  • the material of the second barrier layer and the fourth barrier layer is silicon nitride
  • the material of the third barrier layer is silicon oxide .
  • multiple first electrodes extend in parallel in the same direction, and there is a gap between two adjacent first electrodes, and the extending direction of the first electrodes is parallel to the substrate.
  • the width of the first electrode continuously changes, and the pitch continuously changes.
  • the width of the first electrode varies intermittently, and the pitch of two adjacent first electrodes varies intermittently.
  • a plurality of the substrate electrodes extend in parallel in the same direction, and there is a gap between two adjacent substrate electrodes, and the extension direction of the substrate electrodes is parallel to the substrate.
  • the width of the substrate electrode continuously changes, and the pitch continuously changes.
  • the width of the substrate electrode varies intermittently, and the spacing between two adjacent substrate electrodes varies intermittently.
  • Another aspect of the present application provides a method of preparing a display panel, the method including:
  • first electrode material layer in one layer on the substrate having the isolation pillar and the light emitting structure layer, the isolation pillar blocking the first electrode material layer to form a plurality of mutually insulated first electrodes, The plurality of first electrodes are located on the light emitting structure layer;
  • the isolation pillar includes a plurality of stacked barrier layers, a step is formed between two adjacent barrier layers, and the angles of the two adjacent steps are different.
  • the angle of the step away from the substrate is smaller than the angle of the step near the substrate.
  • the process of forming an isolation pillar on the pixel definition layer includes:
  • the second barrier film layer and the fourth barrier film layer are etched to form a second barrier layer and a fourth barrier layer, respectively.
  • the process of forming an isolation pillar on the pixel definition layer includes:
  • the silicon nitride materials of the second and fourth barrier films are etched to form second and fourth barrier layers, respectively .
  • the etch selection ratio of the fourth barrier layer to the third barrier layer is greater than 1; the etch selection ratio of the second barrier layer to the third barrier layer is greater than 1.
  • Yet another aspect of the present application provides a display screen having a first display area and a second display area. Both the first display area and the second display area are used to display a picture.
  • a photosensitive device may be provided below the second display area.
  • the display screen includes a first display panel provided in the first display area and a second display panel provided in the second display area. The first display panel and the second display panel are formed on the same substrate. The light transmittance of the second display panel is greater than the light transmittance of the first display panel.
  • the second display panel is the display panel in any of the above embodiments.
  • the first display panel is an AMOLED display panel
  • the second display panel is a PMOLED display panel.
  • the isolation column since the isolation column includes a plurality of partition layers stacked in sequence, and steps are formed between two adjacent barrier layers, the angles of the two adjacent steps are different Therefore, the isolation column can effectively block the first electrode material layer to form a plurality of first electrodes insulated from each other, so that adjacent first electrodes will not be connected, so that the display panel can work stably.
  • FIG. 1 is a schematic structural diagram of a display panel
  • FIG. 2 is a schematic structural diagram of a display panel according to an embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of an isolation column according to an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of an isolation column according to another embodiment of the present application.
  • FIG. 5 is a schematic diagram of a plan layout of a first electrode according to an embodiment of the present application.
  • FIG. 6 is a schematic diagram of a projection of a pixel opening on a substrate according to an embodiment of the application.
  • FIG. 7 is a schematic structural diagram of a display terminal according to an embodiment of the present application.
  • FIG. 8 is a schematic structural diagram of the device body in FIG. 7;
  • FIG. 9 is a schematic structural view of the composite screen in FIG. 7;
  • 10 to 15 are schematic cross-sectional views of a preparation process of an isolation column according to an embodiment of the present application.
  • the element when an element such as a layer, film, or substrate is described as being disposed "on” another film layer, the element may be directly disposed on the other film layer, or There may be one or more intermediate film layers. Further, when an element is described as being disposed "under” another film layer, the element may be directly disposed under the other film layer, or one or more intermediate film layers may also be present. When a film layer is described as being disposed "between" two film layers, the film layer may be the only film layer disposed between the two film layers, or there may be one or more between the two film layers One interlayer.
  • FIG. 1 is a schematic structural diagram of a display panel.
  • the display panel includes a substrate, a second electrode (or may also be referred to as a substrate electrode) stacked in sequence, a pixel definition layer, a spacer, and a plurality of first electrodes.
  • a negative photoresist is used to prepare the spacer.
  • the process of preparing a spacer using a negative photoresist requires an exposure process.
  • the prepared post cannot have the desired height and tilt angle. Therefore, the connection of the plurality of first electrodes on the spacer is likely to occur, resulting in malfunction of the display panel.
  • the present application provides a display panel, a display screen, a method for preparing a display panel, and a display terminal, which can improve the controllability and stability of the display panel.
  • FIG. 2 is a schematic structural diagram of a display panel according to an embodiment of the present application. As shown in FIG. 2, this embodiment provides a display panel.
  • the display panel includes a substrate 11, a second electrode (or may also be referred to as a substrate electrode), a pixel definition layer, a spacer 12, and a first electrode 13 that are sequentially stacked.
  • the pixel definition layer may form a plurality of pixel openings.
  • a light emitting structure layer may be provided in the plurality of pixel openings, and the light emitting structure layer may be in contact with the second electrode.
  • the spacer 12 is provided on the pixel definition layer.
  • the first electrode material layer is laid on the substrate 11 provided with the separation column 12, and the separation column 12 can cut off the first electrode material layer to form mutually insulated Multiple first electrodes 13.
  • the isolation pillar 12 may include a plurality of partition layers 121 and 122 stacked in sequence, and a step 14 is formed between two adjacent partition layers 121 and 122. Further, the angles of the two adjacent steps 14 are different, so that the first electrode material layer can be effectively cut off, so that there is no coupling between the formed plurality of first electrodes 13. Furthermore, the angle of the step 14 away from the substrate 11 in the two adjacent steps 14 is smaller than the angle of the step 14 close to the substrate 11, so that the first electrode material layer can be more effectively cut off to ensure the adjacent first electrode 13 No connection occurs, so that the display panel can work stably.
  • the spacer 12 extends in a plane parallel to the substrate 11.
  • the direction perpendicular to the extending direction of the spacer 12 and perpendicular to the substrate 11 may be defined as the first direction.
  • the angle of the step 14 is the included angle ⁇ of the cross section of the step 14 in the first direction, that is, the included angle ⁇ formed at the intersection of the cross sections of the two adjacent barrier layers 121 and 122 forming the step 14 in the first direction .
  • the isolation pillar 12 since the isolation pillar 12 includes a plurality of barrier layers 121 and 122 stacked in sequence, two adjacent barrier layers 121 and 122 may form a step 14, and the two adjacent steps 14 are far from the substrate 11
  • the angle of the step 14 is smaller than the angle of the step 14 close to the substrate 11, so the isolation column 12 can more effectively block the first electrode material layer, so that the adjacent first electrodes 13 are not connected, so that the display panel can work stably.
  • FIG. 3 is a schematic structural diagram of an isolation column according to an embodiment of the present application.
  • the isolation pillar 20 may include a first barrier layer 21 and a second barrier layer 22 that are sequentially stacked.
  • the second barrier layer 22 is closer to the substrate 11 than the first barrier layer 21 is.
  • the second barrier layer 22 may be disposed on the pixel definition layer, and the first barrier layer 21 may be disposed on the second barrier layer 22.
  • a first electrode material layer may be provided on the first blocking layer 21, and the first blocking layer 21 blocks the first electrode material layer to form a plurality of first electrodes 13 insulated from each other.
  • the spacer 20 extends in a plane parallel to the substrate 11.
  • the cross-section of the first partition layer 21 in the first direction may be rectangular.
  • the cross-section of the second partition layer 22 in the first direction may have a shape with an upper bottom edge smaller than a lower bottom edge, for example, a regular trapezoid.
  • the side of the second partition layer 22 close to the pixel definition layer may be a long bottom side
  • the side of the second partition layer 22 close to the first partition layer 21 may be a short bottom side
  • the The length of the cross-section near the bottom edge of the second partition layer 22 is greater than the length of the short bottom edge of the second partition layer 22. Therefore, a step 23 is formed between the first barrier layer 21 and the second barrier layer 22, and the angle ⁇ of the step 23 is less than 90 degrees.
  • the isolation pillar 20 includes at least two partition layers 21, 22, wherein the cross section of the first partition layer 21 in the first direction is rectangular, and the cross section of the second partition layer 22 in the first direction is upper bottom
  • the side is smaller than the shape of the bottom side, and a step 23 is formed between two adjacent barrier layers 21 and 22.
  • the step 23 of the isolation pillar 20 makes it difficult for the two adjacent first electrodes 13 to be connected, so that the two adjacent first electrodes 13 can be insulated, and the display panel can work stably.
  • the isolation pillar 30 may include at least four partition layers stacked in sequence from bottom to top: a fourth partition layer 34, a third partition layer 33, a second partition layer 32, and a first Partition 31.
  • the fourth partition layer 34 may be disposed on the pixel definition layer.
  • the first blocking layer 31 may block the first electrode material layer to form a plurality of first electrodes 13 that are insulated from each other.
  • the spacer 30 extends in a plane parallel to the substrate 11.
  • the cross-section of the fourth partition layer 34 in the first direction may have a shape with an upper base greater than a lower base, such as an inverted trapezoid.
  • the bottom edge near the pixel definition layer is a short bottom edge
  • the bottom edge away from the pixel definition layer is a long bottom edge.
  • the cross section of the third barrier layer 33 in the first direction may be rectangular.
  • the length of the bottom side of the third partition layer 33 near the fourth partition layer 34 is greater than or equal to the length of the long bottom side of the fourth partition layer 34.
  • a step 35 is formed between the fourth barrier layer 34 and the third barrier layer 33, and the angle ⁇ of the step 35 is greater than 90 degrees.
  • the cross-section of the second partition layer 32 in the first direction may have a shape with an upper bottom edge smaller than a lower bottom edge, for example, a regular trapezoid.
  • the bottom edge near the pixel definition layer is a long bottom edge
  • the bottom edge away from the pixel definition layer is a short bottom edge.
  • a step 36 is formed between the third barrier layer 32 and the second barrier layer 32, and the angle ⁇ of the step 36 is about 90 degrees.
  • the first partition layer 31 may have a rectangular cross-section in the first direction.
  • a step 37 is formed between the second barrier layer 32 and the first barrier layer 31, and the angle ⁇ of the step 37 is less than 90 degrees.
  • the first barrier layer 31 and the second barrier layer 32, the second barrier layer 32 and the third barrier layer 33, and the third barrier layer 33 and the fourth barrier layer 34 are respectively formed.
  • the steps 37, 36, and 35, and the angle of the two adjacent steps formed are different, the angle ⁇ of the step 37 is smaller than the angle ⁇ of the step 36, and the angle ⁇ of the step 36 is smaller than the angle ⁇ of the step 35.
  • the isolation pillar 12 includes at least four barrier layers 31, 32, 33, 34 stacked in sequence, and steps 35, 36, 37 are formed between two adjacent barrier layers, and two adjacent steps
  • the angle of the step far away from the substrate 11 in the middle is smaller than the angle of the step closer to the substrate 11, so that the isolation pillar 12 can more effectively block the first electrode material layer, so that the formed plurality of first electrodes 13 can be insulated from each other, improving the display panel Stability.
  • the fourth barrier layer 34, the third barrier layer 33, and the second barrier layer 32 may be film layers prepared by the same etching process.
  • the etching process may be one of ion milling etching, plasma etching, reactive ion etching and other dry etching processes.
  • plasma etching the ambient air pressure can be maintained at 10 to 100 Pa, or 200 to 300 Pa, or 300 to 900 Pa, or 900 to 1000 Pa.
  • the etching selection ratio of the fourth partition layer 34 and the third partition layer 33 is greater than 1; the etching selection ratio of the second partition layer 32 and the third partition layer 33 is greater than 1.
  • the etching rate of the side of the fourth barrier layer 34 away from the third barrier layer 33 is greater than the etching rate of the side of the fourth barrier layer 34 closer to the third barrier layer 33;
  • the etching rate of the side of the third barrier layer 33 is greater than the etching rate of the side of the second barrier layer 32 close to the third barrier layer 33. Therefore, the fourth partition layer 34 may have a shape in which the upper bottom side is larger than the lower bottom side, and the second partition layer 32 may have a shape in which the upper bottom side is smaller than the lower bottom side.
  • the material of the first barrier layer 31 may be photoresist
  • the material of the second barrier layer 32 and the fourth barrier layer 34 may be silicon nitride
  • the third barrier The material of the layer 33 may be silicon oxide.
  • the fourth isolation layer 34, the third isolation layer 33, and the second isolation layer 32 are simultaneously prepared by the same etching process, which effectively reduces the manufacturing cost. Since the etching selection ratio of the fourth isolation layer 34 and the third isolation layer 33 is greater than 1, the etching selection ratio of the second isolation layer 32 and the third isolation layer 33 is greater than 1, so that the isolation pillar formed after etching has at least The two steps with different angles can effectively block the first electrode material layer and improve the stability of the display panel.
  • FIG. 5 shows a schematic plan layout of the first electrode 41 according to an embodiment of the present application. For ease of description, FIG. 5 only shows parts related to the embodiments of the present application.
  • the first electrode 41 extends in a wave shape in a direction parallel to the substrate 42.
  • the plurality of first electrodes 41 extend in parallel in the same direction, and there is a gap between adjacent first electrodes 41.
  • the width of the first electrode 41 changes continuously or intermittently, and the pitch between adjacent first electrodes 41 changes continuously or intermittently.
  • the width of the first electrode 41 refers to the width of the first electrode 41 in a direction parallel to the substrate 11 and perpendicular to the extending direction of the first electrode 41.
  • the continuous change of the width of the first electrode 41 means that the width of the first electrode 41 at any two adjacent positions is different in the extending direction of the first electrode 41.
  • the discontinuous change of the width of the first electrode 41 means that in the extending direction of the first electrode 41, the width of the first electrode 41 at the two adjacent positions in the partial area is the same, and the adjacent two in the partial area The width at the location is different.
  • the width of the first electrode 41 may change periodically.
  • the length of one change period in the extending direction of the first electrode 41 may correspond to the width of one pixel.
  • the plurality of first electrodes 41 are regularly arranged on the substrate 42, therefore, the spacing between two adjacent first electrodes 41 also continuously changes or is intermittent in the extending direction of the first electrodes 41 Variety.
  • a plurality of wavy first electrodes 41 are provided, and in the extending direction of the first electrode 41, the width of the first electrode 41 changes continuously or intermittently, so that the adjacent first electrodes 41 The pitch changes continuously or intermittently. Therefore, at different width positions of the first electrode 41 and at different pitches of the adjacent first electrodes 41, the distribution positions of the generated diffraction fringes are different. The derivative effects at different positions can cancel each other, so the diffraction effect of the entire display panel can be effectively reduced, thereby improving the clarity of the image captured by the camera disposed under the display panel.
  • a plurality of second electrodes extending in parallel in the same direction may also be provided, and there is a gap between two adjacent second electrodes.
  • the width of the second electrode may be continuously changed or intermittently changed, and the interval between two adjacent second electrodes may also be continuously changed or intermittently changed.
  • the structure of the second electrode in this embodiment is similar to the structure of the first electrode in the above embodiment, and will not be repeated here.
  • the present application also provides a method for preparing a display panel.
  • the method may include:
  • Step S1 A substrate 11 is provided, and a second electrode is formed on the substrate 11.
  • the substrate 11 may be made of a plastic material such as glass material, metal material, or polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or polyimide. Suitable materials are formed.
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • polyimide polyimide
  • the second electrode may be an anode.
  • the second electrode can be made of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3 ), indium gallium oxide (IGO), or aluminum zinc oxide (AZO). Prepared from one or more materials.
  • Step S2 forming a pixel definition layer on the second electrode, and forming a plurality of pixel openings on the pixel definition layer.
  • FIG. 6 shows a schematic diagram of the projection of the pixel opening 51 on the substrate 50 in an embodiment of the present application. For ease of description, FIG. 6 only shows parts related to the embodiments of the present application.
  • the curve pattern of the projection of the pixel opening 51 on the substrate 50 has a varying width in each direction and has different diffraction diffusion directions at the same position.
  • the size of obstacles such as the width of slits, the size of small holes, etc.
  • the distribution positions of the diffraction fringes generated at the positions with the same width are consistent, so that a more obvious diffraction effect will appear.
  • diffraction stripes with different distribution positions and diffusion directions can be generated at different width positions, which can effectively reduce the diffraction effect, thereby ensuring that the photosensitive element provided under the display panel can work normally.
  • the projection of the pixel opening 51 on the substrate 50 is a graphic unit or a plurality of graphic units communicating with each other.
  • the graphic unit may be circular or elliptical.
  • the graphic unit may also be composed of curves with different radii of curvature.
  • the number of graphics units can be determined according to the shape of the corresponding sub-pixel. For example, the number of graphics units can be determined according to the aspect ratio of the sub-pixels. When determining the number of graphic units, it is necessary to take into account the aperture ratio of the pixels.
  • the graphic unit may also be an axisymmetric graphic, so as to ensure that each pixel on the entire display panel has a uniform aperture ratio, so that the display panel has a uniform display effect.
  • Step S3 forming an isolation pillar 30 on the pixel definition layer.
  • the isolation pillar 30 includes a plurality of partition layers 31, 32, 33, and 34 stacked in sequence, and a step 35 is formed between adjacent partition layers 31, 32, 33, and 34. 36, 37.
  • the isolation column 30 may be formed by sequentially stacking a plurality of partition layers 31, 32, 33, and 34, and steps 35, 36, and 37 may be formed between two adjacent partition layers 31, 32, 33, and 34. Further, the angles of the two adjacent steps are different, and the angle of the step away from the substrate 11 in the two adjacent steps is smaller than the angle of the step near the substrate 11.
  • Step S4 forming a light emitting structure layer in contact with the second electrode in the pixel opening.
  • the pixel opening may be filled with an organic material capable of electroluminescence to form a light emitting structure layer, and the light emitting structure layer may be in contact with the second electrode.
  • Step S5 laying the first electrode material layer on the substrate 11 with the isolation column 30 and the light-emitting structure layer in one layer, the isolation column 30 partitions the first electrode material layer to form a plurality of first electrodes 13 insulated from each other The first electrode 13 is located on the light emitting structure layer.
  • a first electrode material layer may be laid over the isolation pillar 30, and the isolation pillar 30 may isolate the first electrode material layer and form a plurality of first electrodes 13 insulated from each other.
  • the first electrode 13 may be a cathode.
  • the first electrode 13 may be made of silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir) , Chromium (Cr) and other materials are prepared.
  • the isolation column 30 since the isolation column 30 includes a plurality of barrier layers 31, 32, 33, 34 stacked in sequence, steps 35, 36, 37 are formed between two adjacent barrier layers 31, 32, 33, 34, The two adjacent steps 35, 36, 37 have different angles, and the angle of the step away from the substrate 50 in the two adjacent steps is smaller than the angle of the step near the substrate 50, so that the isolation column 30 can more effectively block the first step An electrode material layer, so that no connection between adjacent first electrodes 13 occurs, so that the display panel can work stably.
  • 10 to 15 show schematic cross-sectional views of the preparation process of an isolation column according to an embodiment of the present application.
  • the process of forming the isolation pillar on the pixel definition layer may specifically include:
  • the second barrier film layer 102 and the fourth barrier film layer 104 are etched to form the second barrier layer 1020 and the fourth barrier layer 1040, respectively.
  • the process of forming the isolation pillar on the pixel definition layer may specifically include:
  • Step S10 deposit silicon nitride material on the pixel definition layer to form a fourth blocking film layer 104.
  • the fourth barrier film layer 104 may be prepared on the substrate 100 using silicon nitride material.
  • Step S11 deposit silicon oxide material on the fourth barrier film layer 104 to form a third barrier film layer 103.
  • a silicon oxide material may be used to form a third barrier film layer 103 on the fourth barrier film layer 104 that has been prepared.
  • Step S12 Remove part of the silicon oxide material of the third barrier film layer 103 to form a third barrier layer 1030.
  • a part of the silicon oxide material of the third barrier film layer 103 may be removed by processes such as dry etching or wet etching to form a third barrier layer 1030.
  • Step S13 deposit a silicon nitride material on the pixel defining layer with the third barrier layer 1030 to form the second barrier film layer 102.
  • a second barrier film layer 102 may be further prepared using silicon nitride material, and the second barrier film layer 102 may be disposed on the third barrier layer 1030.
  • Step S14 forming a first barrier layer 1010 on the second barrier film layer 102.
  • a negative photoresist material may be used to prepare a first barrier layer 1010 on the second barrier film layer 102.
  • Step S15 using the first and third barrier layers 1010 and 1030 as masks to etch the silicon nitride materials of the second and fourth barrier film layers 102 and 104 to form the second and second barrier layers 1020 and 10, respectively Partition 1040.
  • the first barrier layer 1010 and the third barrier layer 1030 can be used as a mask to etch the second barrier film layer 102 and the fourth barrier film layer 104 to obtain the second barrier layer 1020 and fourth partition 1040.
  • the etch selection ratio of the fourth barrier layer 1040 and the third barrier layer 1030 is greater than 1; the etch selection ratio of the second barrier layer 1020 and the third barrier layer 1030 is greater than 1. Therefore, the angle of the step formed between the first barrier layer 1010 and the second barrier layer 1020 is smaller than the angle of the step formed between the second barrier layer 1020 and the third barrier layer 1030, and the second barrier layer 1020 and the third barrier layer The angle of the step formed between 1030 is smaller than the angle of the step formed between the third barrier layer 1030 and the fourth barrier layer 1040.
  • the isolation column includes at least four barrier layers 1010, 1020, 1030, and 1040 stacked in sequence, and a step is formed between two adjacent barrier layers 1010, 1020, 1030, and 1040.
  • the angles of the steps are different, so that the spacers can effectively block the first electrode material layer to form a plurality of first electrodes 13 insulated from each other, thereby improving the performance stability of the display panel.
  • the application also provides a display screen.
  • the display screen has a first display area and a second display area. Both the first display area and the second display area are used to display pictures, such as dynamic or static pictures.
  • a photosensitive device may be provided below the second display area.
  • the display screen includes a first display panel disposed in the first display area and a second display panel disposed in the second display area. The first display panel and the second display panel may be formed on the same substrate. The light transmittance of the second display panel is greater than that of the first display panel.
  • the second display panel is the display panel described in any of the above embodiments.
  • the second display panel may include a substrate 11, a second electrode, a pixel definition layer, a spacer 12, and a first electrode 13 that are sequentially stacked.
  • a plurality of pixel openings are formed in the pixel definition layer, and a light emitting structure layer in contact with the second electrode is formed in the pixel openings.
  • the isolation column 12 is used to block the first electrode material layer to form a plurality of first electrodes 13 that are insulated from each other.
  • the isolation pillar 12 may include a plurality of partition layers stacked in sequence, steps are formed between adjacent partition layers, two adjacent steps have different angles, and an angle of a step away from the substrate 11 in the two adjacent steps is less The angle of the step near the substrate 11.
  • the isolation column 12 includes a plurality of partition layers stacked in sequence, and steps may be formed between two adjacent partition layers, the two adjacent steps have different angles, and the adjacent The angle of the step away from the substrate 11 in the two steps is smaller than the angle of the step closer to the substrate 11, so that the isolation column 12 can effectively cut off the first electrode material layer, and the adjacent first electrodes will not be connected, so that the display screen can be stable jobs.
  • the first display panel may be an AMOLED (Active-matrix organic light-emitting diode) display panel
  • the second display panel may be a PMOLED (Passive-matrix organic light-emitting diode) display panel.
  • FIG. 7 is a schematic structural diagram of a display terminal according to an embodiment of the present application.
  • FIG. 8 is a schematic structural diagram of the device body 62 shown in FIG. 7.
  • FIG. 9 is a schematic diagram of the structure of the composite screen 64 shown in FIG. 7.
  • the composite screen 64 includes an integrated AM (Active-matrix) screen 642 and PM (Passive-matrix) screen 644.
  • the PM panel 644 may be provided with the display panel described in any embodiment of this application to improve the display performance and effect of the composite screen.
  • the AM screen 642 may include an AMOLED display panel.
  • the PM screen 644 may include a PMOLED display panel.
  • the present application also provides a display terminal 60.
  • the display terminal 60 may include a device body 62 and a composite screen 64.
  • the composite screen 64 is overlaid on the device body 62, and the composite screen 64 and the device body 62 are connected to each other.
  • the device body 62 may be provided with a non-device area 622 and a device area 624 (such as a slotted area).
  • a device area 624 such as a slotted area
  • photosensitive devices such as a camera 626 and a light sensor may be provided.
  • the composite screen 64 may include an AM screen 642 and a PM screen 644.
  • the PM screen body 644 can correspond to the above-mentioned device area 624, so the photosensitive device provided in the device area 624 can pass through the PM screen
  • the external light of the body 644 is collected and sensed.
  • the above PM screen 644 may include the display panel described in any one of the above embodiments, so that the adjacent first electrodes 13 can be effectively blocked to avoid short circuit of the adjacent first electrodes 13 and affect the display performance of the display terminal And effects.
  • the above-mentioned display terminal 60 may be an electronic device with a display screen, such as a mobile phone, a notebook computer, a smart watch, a smart bracelet.
  • the PM screen 644 can be placed in a non-display state when the photosensitive device is in operation, thereby improving the performance of the photosensitive device to collect external light.

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Abstract

本申请提供一种显示面板、显示屏及制备显示面板的方法。显示面板包括：基板；基板电极，基板电极形成在基板上；像素定义层，像素定义层形成在基板的基板电极上，并且在像素定义层上形成有多个像素开口，像素开口内形成有与基板电极接触的发光结构层；以及隔离柱，隔离柱形成在像素定义层上，用于隔断第一电极材料层，以形成相互绝缘的多个第一电极，多个第一电极位于发光结构层上。隔离柱包括依次层叠的多个隔断层，相邻的两个隔断层之间形成台阶，且相邻的两个台阶的角度不同。

Description

显示面板、显示屏及制备显示面板的方法 技术领域
本申请涉及显示技术领域，特别是涉及一种显示面板、显示屏及制备显示面板的方法。
背景技术
随着电子设备的快速发展，用户对屏占比的要求越来越高，使得电子设备的全面屏显示越来越受到关注。由于电子设备(如手机、平板电脑等)需要集成诸如前置摄像头、听筒以及红外感应元件等部件，因此通常需要在电子设备的显示屏上开槽(Notch)形成开槽区，以容纳摄像头、听筒以及红外感应元件等部件。开槽区不能用于显示画面。然而，对于具备摄像功能的电子设备来说，外界光线可通过显示屏上的开槽区进入位于显示屏下方的感光元件。这些电子设备均无法实现真正意义上的全面屏显示，即这些电子设备不能在整个显示屏的各个区域均显示画面，例如在摄像头区域不能显示画面。
发明内容
本申请提供一种显示面板、显示屏及制备显示面板的方法，能够提高显示面板的稳定性。
本申请的一方面提供一种显示面板，该显示面板包括：
基板；
基板电极，所述基板电极形成在所述基板上；
像素定义层，所述像素定义层形成在所述基板的基板电极上，并且在所述像素定义层上形成有多个像素开口，所述像素开口内形成有与所述基板电极接触的发光结构层；以及
隔离柱，所述隔离柱形成在所述像素定义层上，用于隔断第一电极材料层，以形成相互绝缘的多个第一电极，所述多个第一电极位于所述发光结构层上，
其中，所述隔离柱包括依次层叠的多个隔断层，相邻的两个隔断层之间形成台阶，且相邻的两个台阶的角度不同。
在一些实施例中，在相邻的两个台阶中，远离所述基板的台阶的角度小于靠近所述基板的台阶的角度。
在一些实施例中，所述多个隔断层包括依次层叠的第一隔断层和第二隔断层，所述第二隔断层相对于所述第一隔断层更靠近所述基板，所述第一隔断层上形成有所述第一电极层材料。
在一些实施例中，所述第一隔断层在第一方向上的截面呈矩形，且所述第二隔断层在第 一方向上的截面呈呈上底边小于下底边的形状，该第一方向与所述隔离柱的延伸方向垂直且与所述基板垂直，所述隔离柱的延伸方向与所述基板平行。
在一些实施例中，所述多个隔断层还包括：依次层叠设置在所述第二隔断层下方的第三隔断层和第四隔断层，所述第四隔断层相对于所述第三隔断层更靠近所述基板；所述第四隔断层在所述第一方向上的截面呈上底边大于下底边的形状。
在一些实施例中，所述第一隔断层和所述第二隔断层之间形成的台阶的角度小于所述第二隔断层和所述第三隔断层之间形成的台阶的角度，所述第二隔断层和所述第三隔断层之间形成的台阶的角度小于所述第三隔断层和所述第四隔断层之间形成的台阶的角度。
在一些实施例中，所述第四隔断层、所述第三隔断层和所述第二隔断层为采用同一刻蚀工艺制备的膜层，所述刻蚀工艺为离子铣刻蚀、等离子刻蚀、反应离子刻蚀中的一种。
在一些实施例中，所述第四隔断层与所述第三隔断层的刻蚀选择比大于1；所述第二隔断层与所述第三隔断层的刻蚀选择比大于1。
在一些实施例中，所述第一隔断层的材质为光刻胶，所述第二隔断层和所述第四隔断层的材质为氮化硅，所述第三隔断层的材质为氧化硅。
在一些实施例中，多个第一电极沿相同的方向并行延伸，且相邻的两个所述第一电极之间具有间距，所述第一电极的延伸方向与所述基板平行。
在一些实施例中，在所述第一电极的延伸方向上，所述第一电极的宽度连续变化，且所述间距连续变化。
在一些实施例中，在所述第一电极的延伸方向上，所述第一电极的宽度间断变化，且相邻的两个所述第一电极的所述间距间断变化。
在一些实施例中，多个所述基板电极沿相同的方向并行延伸，且相邻的两个所述基板电极之间具有间距，所述基板电极的延伸方向与所述基板平行。
在一些实施例中，在所述基板电极的延伸方向上，所述基板电极的宽度连续变化，且所述间距连续变化。
在一些实施例中，在所述基板电极的延伸方向上，所述基板电极的宽度间断变化，且相邻的两个所述基板电极之间所述间距间断变化。
本申请的另一方面提供一种制备显示面板的方法，该方法包括：
提供基板，在所述基板上形成基板电极；
在所述基板电极上形成像素定义层，在所述像素定义层上形成多个像素开口；
在所述像素定义层上形成隔离柱；
在所述像素开口内形成与所述基板电极接触的发光结构层；
在具有所述隔离柱和所述发光结构层的所述基板上整层地铺设第一电极材料层，所述隔离柱隔断所述第一电极材料层，形成相互绝缘的多个第一电极，所述多个第一电极位于所述发光结构层上；
其中，所述隔离柱包括层叠的多个隔断层，相邻的两个隔断层之间形成台阶，且相邻的两个台阶的角度不同。
在一些实施例中，在相邻的两个台阶中，远离所述基板的台阶的角度小于靠近所述基板的台阶的角度。
在一些实施例中，在所述像素定义层上形成隔离柱的过程包括：
在所述像素定义层上沉积第四隔断膜层；
在所述第四隔断膜层上沉积第三隔断膜层；
去除部分所述第三隔断膜层，形成第三隔断层；
在具有所述第三隔断层的像素定义层上沉积第二隔断膜层；
在所述第二隔断膜层上形成第一隔断层；以及
以所述第一隔断层和所述第三隔断层为掩膜，刻蚀所述第二隔断膜层和所述第四隔断膜层，分别形成第二隔断层和第四隔断层。
在一些实施例中，在所述像素定义层上形成隔离柱的过程包括：
在所述像素定义层上沉积氮化硅材料，形成第四隔断膜层；
在所述第四隔断膜层上沉积氧化硅材料，形成第三隔断膜层；
去除所述第三隔断膜层的部分氧化硅材料，形成第三隔断层；
在具有所述第三隔断层的像素定义层上沉积氮化硅材料，形成第二隔断膜层；
在所述第二隔断膜层上形成第一隔断层；以及
以所述第一隔断层和所述第三隔断层为掩膜，刻蚀所述第二隔断膜层和第四隔断膜层的氮化硅材料，分别形成第二隔断层和第四隔断层。
在一些实施例中，所述第四隔断层与所述第三隔断层的刻蚀选择比大于1；所述第二隔断层与所述第三隔断层的刻蚀选择比大于1。
本申请的又一方面提供一种显示屏，该显示屏具有第一显示区和第二显示区。所述第一显示区和所述第二显示区均用于显示画面。所述第二显示区下方可设置感光器件。所述显示屏包括设置的所述第一显示区的第一显示面板和设置在所述第二显示区的第二显示面板。所述第一显示面板和所述第二显示面板形成在同一基板上。所述第二显示面板的透光率大于所述第一显示面板的透光率。第二显示面板为上述任一实施例中的显示面板。
在一些实施例中，所述第一显示面板为AMOLED显示面板，所述第二显示面板为 PMOLED显示面板。
在上述显示面板、显示屏及制备显示面板的方法中，由于隔离柱包括依次层叠的多个隔断层，并且相邻两个隔断层之间形成台阶，而相邻的两个台阶的角度不相同，因此隔离柱能够有效地隔断第一电极材料层，以形成相互绝缘的多个第一电极，使得相邻的第一电极不会发生联结，从而显示面板能够稳定工作。
附图说明
为了更清楚地说明本申请实施例的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他实施例的附图。
图1为一显示面板的结构示意图；
图2为根据本申请一实施例的显示面板的结构示意图；
图3为根据本申请一实施例的隔离柱的结构示意图；
图4为根据本申请另一实施例的隔离柱的结构示意图；
图5为根据本申请一实施例的第一电极的平面布置示意图；
图6为根据本申请一实施例的像素开口在基板上的投影示意图；
图7为根据本申请一实施例的显示终端的结构示意图；
图8为图7中设备本体的结构示意图；
图9为图7中复合屏的结构示意图；
图10至图15为根据本申请一实施例的隔离柱制备过程的剖面示意图。
具体实施方式
为了便于理解本申请，下面将参照相关附图对本申请进行更全面的描述。附图中给出了本申请的一些实施例。但是，本申请可以以许多不同的形式来实现，并不限于本文所描述的实施例。提供这些实施例的目的在于能够更加透彻全面地理解本申请的公开内容。
在描述位置关系时，除非另有规定，否则当一元件例如层、膜或基板被描述为设置在另一膜层“上”时，该元件可以直接设置在该另一膜层上，或者也可以存在一个或多个中间膜层。进一步地，当一元件被描述为设置在另一膜层“下”时，该元件可以直接设置在该另一膜层下方，或者也可以存在一个或多个中间膜层。当一膜层被被描述为设置在两膜层“之间”时，该膜层可以是设置在这两膜层之间的唯一膜层，或者这两膜层之间也可以存在一或多个 中间膜层。
图1为一显示面板的结构示意图。该显示面板包括依次层叠设置的基板、第二电极(或也可称为基板电极)、像素定义层、隔离柱、以及多个第一电极。通常采用负性光刻胶制备隔离柱。采用负性光刻胶制备隔离柱的过程中需要使用曝光工艺，但是由于负性光刻胶的材料特性以及曝光工艺的机制问题，导致制备的隔离柱无法具备期望的高度以及倾斜角度。因此，设置在隔离柱上的多个第一电极容易发生联结，导致显示面板功能失常。
本申请提供了一种显示面板、显示屏、制备显示面板的方法和显示终端，能够提高显示面板的可控性和稳定性。
图2为根据本申请一实施例的显示面板的结构示意图。如图2所示，本实施例提供了一种显示面板。显示面板包括依次层叠设置的基板11、第二电极(或也可称为基板电极)、像素定义层、隔离柱12以及第一电极13。像素定义层可以形成多个像素开口。在多个像素开口中可以设置发光结构层，该发光结构层可以与第二电极相接触。隔离柱12设置在像素定义层上。
在制备第一电极13的过程中，在具备隔离柱12的基板11上铺设第一电极材料层，而隔离柱12可以隔断第一电极材料层，以形成如图2中所示的相互绝缘的多个第一电极13。
隔离柱12可以包括依次层叠的多个隔断层121、122，并且相邻的两个隔断层121、122之间形成台阶14。进一步地，相邻的两个台阶14的角度不同，使得能够有效地隔断第一电极材料层，以使形成的多个第一电极13之间不会发生联结。更进一步地，相邻的两个台阶14中远离基板11的台阶14的角度小于靠近基板11的台阶14的角度，从而能够更加有效地隔断第一电极材料层，保证相邻的第一电极13不会发生联结，从而显示面板能够稳定工作。隔离柱12在与基板11平行的平面中延伸。可以将与隔离柱12的延伸方向垂直且与基板11垂直的方向定义为第一方向。台阶14的角度为该台阶14在第一方向上的截面的夹角θ，即形成该台阶14的相邻两个隔断层121、122在第一方向上的截面在相交处形成的夹角θ。
在上述实施例中，由于隔离柱12包括依次层叠的多个隔断层121、122，相邻的两个隔断层121、122可以形成台阶14，并且相邻的两个台阶14中远离基板11的台阶14的角度小于靠近基板11的台阶14的角度，因此隔离柱12能够更加有效地隔断第一电极材料层，使得相邻的第一电极13不会发生联结，从而显示面板能够稳定工作。
图3为根据本申请一实施例的隔离柱的结构示意图。如图3所示，在一实施例中，隔离柱20可以包括依次层叠的第一隔断层21和第二隔断层22。第二隔断层22相对于第一隔断层21更靠近基板11。在本实施例中，第二隔断层22可以设置在像素定义层上，第一隔断层21可以设置在第二隔断层22上。在第一隔断层21上可以设置第一电极材料层，第一隔断层 21隔断第一电极材料层以形成相互绝缘的多个第一电极13。
隔离柱20在与基板11平行的平面中延伸。第一隔断层21在第一方向上的截面可以呈矩形。第二隔断层22在第一方向上的截面可以呈上底边小于下底边的形状，例如正梯形。例如，第二隔断层22的截面靠近像素定义层的边可以为长底边，而第二隔断层22的截面靠近第一隔断层21的边可以为短底边，并且第一隔断层21的截面靠近第二隔断层22的底边的长度大于第二隔断层22的短底边的长度。因此，第一隔断层21和第二隔断层22之间形成台阶23，并且台阶23的角度φ小于90度。
在上述实施例中，隔离柱20至少包括两个隔断层21、22，其中第一隔断层21在第一方向上的截面呈矩形，第二隔断层22在第一方向上的截面呈上底边小于下底边的形状，且相邻的两个隔断层21、22之间形成台阶23。隔离柱20的台阶23使相邻的两个第一电极13不容易发生联结，从而能够使相邻的两个第一电极13保持绝缘，进而显示面板能够稳定工作。
图4为根据本申请另一实施例的隔离柱的结构示意图。如图4所示，在一实施例中，隔离柱30可以至少包括从下往上依次层叠的四个隔断层：第四隔断层34、第三隔断层33、第二隔断层32和第一隔断层31。在该实施例中，第四隔断层34可以设置在像素定义层上。第一隔断层31可以隔断第一电极材料层，以形成相互绝缘的多个第一电极13。
在本实施例中，隔离柱30在与基板11平行的平面中延伸。第四隔断层34在第一方向上的截面可以呈上底边大于下底边的形状，例如倒梯形。例如，在第四隔断层34的截面中，靠近像素定义层的底边为短底边，远离像素定义层的底边为长底边。第三隔断层33在第一方向上的截面可以呈矩形。在第三隔断层33的截面中，第三隔断层33靠近第四隔断层34的底边的长度大于或等于第四隔断层34的长底边的长度。因此，第四隔断层34和第三隔断层33之间形成台阶35，且台阶35的角度α大于90度。第二隔断层32在第一方向上的截面可以呈上底边小于下底边的形状，例如正梯形。例如，在第二隔断层32的截面中，靠近像素定义层的底边为长底边，远离像素定义层的底边为短底边。第三隔断层32和第二隔断层32之间形成台阶36，且台阶36的角度β约90度。第一隔断层31在第一方向上的截面可以呈矩形。在第一隔断层31的截面中，第一隔断层31靠近第二隔断层32的底边的长度大于第二隔断层32的短底边的长度。因此，第二隔断层32和第一隔断层31之间形成台阶37，且台阶37的角度ω小于90度。在该实施例中，第一隔断层31和第二隔断层32之间、第二隔断层32和第三隔断层33之间、以及第三隔断层33和第四隔断层34之间分别形成台阶37、36、35，并且所形成的相邻的两个台阶的角度不同，台阶37的角度ω小于台阶36的角度β，台阶36的角度β小于台阶35的角度α。
在上述实施例中，隔离柱12至少包括依次层叠的四个隔断层31、32、33、34，且相邻 的两个隔断层之间形成台阶35、36、37，相邻的两个台阶中远离基板11的台阶的角度小于靠近基板11的台阶的角度，使得隔离柱12能够更加有效地隔断第一电极材料层，从而所形成的多个第一电极13能够彼此绝缘，提高了显示面板的稳定性。
如图4所示，在一实施例中，第四隔断层34、第三隔断层33和第二隔断层32可以是采用同一刻蚀工艺制备而成的膜层。在本实施例中，该刻蚀工艺可以为离子铣刻蚀、等离子刻蚀、反应离子刻蚀等干法刻蚀工艺中的一种。在采用等离子刻蚀时，可以保持环境气压为10～100Pa，或200～300Pa，或300～900Pa，或900～1000Pa。
进一步地，在本实施例中，第四隔断层34与第三隔断层33的刻蚀选择比大于1；第二隔断层32与第三隔断层33的刻蚀选择比大于1。在刻蚀过程中，第四隔断层34远离第三隔断层33的一侧的刻蚀速率大于第四隔断层34靠近第三隔断层33的一侧的刻蚀速率；第二隔断层32远离第三隔断层33的一侧的刻蚀速率大于第二隔断层32靠近第三隔断层33的一侧的刻蚀速率。因此，第四隔断层34可以形成上底边大于下底边的形状，而第二隔断层32可以形成上底边小于下底边的形状。
为了满足上述的刻蚀选择比，在一些实施例中，第一隔断层31的材质可以为光刻胶，第二隔断层32和第四隔断层34的材质可以为氮化硅，第三隔断层33的材质可以为氧化硅。
在上述实施例中，通过同一刻蚀工艺同时制备第四隔断层34、第三隔断层33和第二隔断层32，有效地降低了制备成本。由于第四隔断层34与第三隔断层33的刻蚀选择比大于1、第二隔断层32与第三隔断层33的刻蚀选择比大于1，使得刻蚀后所形成的隔离柱至少具有两个角度不同的台阶，因此能够有效地对第一电极材料层进行隔断，提高了显示面板的稳定性。
图5示出了根据本申请一实施例的第一电极41的平面布置示意图。为便于描述，图5仅示出了与本申请实施例相关的部分。
如图5所示，在本申请的一些实施例中，第一电极41在与基板42平行的方向上呈波浪形延伸。多个第一电极41沿相同的方向并行延伸，且相邻的第一电极41之间具有间距。在第一电极41的延伸方向上，第一电极41的宽度连续变化或间断变化，且相邻的第一电极41之间的间距连续变化或间断变化。第一电极41的宽度是指第一电极41在与基板11平行且与第一电极41的延伸方向垂直的方向上的宽度。
第一电极41的宽度连续变化是指：在第一电极41的延伸方向上，第一电极41在任意两个相邻位置处的宽度不相同。
第一电极41的宽度间断变化是指：在第一电极41的延伸方向上，第一电极41在部分区域内的相邻两个位置处的宽度相同，而在部分区域内的相邻两个位置处的宽度不相同。
在第一电极41的延伸方向上，无论第一电极41的宽度是连续变化还是间断变化，第一电极41的宽度变化都可以为周期性变化。一个变化周期在第一电极41的延伸方向上的长度可以对应于一个像素的宽度。
在一些实施例中，多个第一电极41在基板42上规则排布，因此，相邻的两个第一电极41之间的间距在第一电极41的延伸方向上也呈现连续变化或者间断变化。
在上述实施例中，设置有多个波浪形的第一电极41，在第一电极41的延伸方向上，第一电极41的宽度连续变化或者间断变化，从而使得相邻的第一电极41的间距连续变化或者间断变化。因此在第一电极41的不同宽度位置处以及相邻第一电极41的不同间距处，产生的衍射条纹的分布位置不同。不同位置处的衍生效应可以相互抵消，因此可以有效地减弱整个显示面板的衍射效应，进而提高设置在该显示面板下方的摄像头所拍摄的图像的清晰度。
在一实施例中，还可以设置沿相同的方向并行延伸的多个第二电极，且相邻的两个第二电极之间具有间距。在第二电极的延伸方向上，第二电极的宽度可以连续变化或间断变化，且相邻的两个第二电极之间的间距也可以连续变化或间断变化。本实施例中的第二电极的结构与上述实施例中第一电极的结构类似，在此不再赘述。
本申请还提供一种制备显示面板的方法，该方法可以包括：
步骤S1：提供基板11，在基板11上形成第二电极。
在本实施例中，基板11可以由诸如玻璃材料、金属材料或包括聚对苯二甲酸乙二醇酯(PET)、聚萘二甲酸乙二醇酯(PEN)或聚酰亚胺等的塑胶材料中合适的材料形成。
在形成基板11后，可以在基板11上形成多个第二电极。在一些实施例中，第二电极可以为阳极。第二电极可以由氧化铟锡(ITO)、氧化铟锌(IZO)、氧化锌(ZnO)、氧化铟(In 2O 3)、氧化铟镓(IGO)或氧化铝锌(AZO)等材料中一种或多种材料制备而成。
步骤S2：在第二电极上形成像素定义层，在像素定义层上形成多个像素开口。
图6示出了本申请一实施例中的像素开口51在基板50上的投影示意图。为便于描述，图6仅示出了与本申请实施例相关的部分。
如图6所示，在本申请的一些实施例中，像素开口51在基板50上的投影的曲线图形。因此，像素开口51在各个方向上均具有变化的宽度且在同一位置具有不同的衍射扩散方向。在衍射过程中，障碍物的尺寸(例如狭缝的宽度、小孔的尺寸等)会影响衍射条纹的分布。相同宽度的位置处产生的衍射条纹的分布位置一致，从而会出现较为明显的衍射效应。当外部光线经过像素开口时，在不同宽度位置上能够产生具有不同分布位置和扩散方向的衍射条纹，可以有效地减弱衍射效应，从而可以确保设置在该显示面板下方的感光元件能够正常工作。
在一些实施例中，像素开口51在基板50上的投影为一个图形单元或者多个彼此连通的图形单元。该图形单元可以为圆形或者椭圆形。图形单元还可以由具有不同曲率半径的曲线构成。可以根据对应的子像素的形状来确定图形单元的个数。例如，可以根据子像素的长宽比来确定图形单元个数。在确定图形单元的个数的同时需要兼顾到像素的开口率。在一些实施例中，图形单元还可以为轴对称图形，从而确保整个显示面板上的各像素具有一致的开口率，以使显示面板具有均匀的显示效果。
步骤S3：在像素定义层上形成隔离柱30，隔离柱30包括依次层叠的多个隔断层31、32、33、34，相邻的隔断层31、32、33、34之间形成台阶35、36、37。
隔离柱30可以由多个隔断层31、32、33、34依次层叠而成，并且相邻的两个隔断层31、32、33、34之间可以形成台阶35、36、37。进一步地，相邻的两个台阶的角度不同，并且相邻的两个台阶中远离基板11的台阶的角度小于靠近基板11的台阶的角度。
步骤S4：在像素开口内形成与第二电极接触的发光结构层。
可以在像素开口内填充能够电致发光的有机材料，以形成发光结构层，并且该发光结构层可以与第二电极相接触。
步骤S5：在具有隔离柱30和发光结构层的基板11上整层地铺设第一电极材料层，隔离柱30将第一电极材料层隔断，形成相互绝缘的多个第一电极13，多个第一电极13位于发光结构层上。
在形成隔离柱30之后，可以在隔离柱30的上方铺设第一电极材料层，隔离柱30可以将第一电极材料层进行隔断，并形成相互绝缘的多个第一电极13。在本实施例中，第一电极13可以为阴极。第一电极13可以由银(Ag)、镁(Mg)、铝(Al)、铂(Pt)、钯(Pd)、金(Au)、镍(Ni)、钕(Nd)、铱(Ir)、铬(Cr)等中的一种或多种材料制备而成。
在上述实施例中，由于隔离柱30包括依次层叠的多个隔断层31、32、33、34，相邻的两个隔断层31、32、33、34之间形成台阶35、36、37，相邻的两个台阶35、36、37具有不同的角度，并且相邻的两个台阶中远离基板50的台阶的角度小于靠近基板50的台阶的角度，使得隔离柱30能够更加有效地隔断第一电极材料层，从而相邻的第一电极13之间不会发生联结，从而显示面板能够稳定工作。
图10至图15示出了根据本申请一实施例的隔离柱的制备过程的剖面示意图。
在一些实施例中，在像素定义层上形成隔离柱的过程可以具体包括：
在像素定义层上沉积第四隔断膜层104；
在第四隔断膜层104上沉积第三隔断膜层103；
去除部分第三隔断膜层103，形成第三隔断层1030；
在具有第三隔断层1030的像素定义层上沉积第二隔断膜层102；
在第二隔断膜层102上形成第一隔断层1010；以及
以第一隔断层1010和第三隔断层1030为掩膜，刻蚀所述第二隔断膜层102和所述第四隔断膜层104，分别形成第二隔断层1020和第四隔断层1040。
在一些实施例中，在像素定义层上形成隔离柱的过程可以具体包括：
步骤S10：在像素定义层上沉积氮化硅材料，形成第四隔断膜层104。
具体地，如图10所示，可以采用氮化硅材料在基板100上制备第四隔断膜层104。
步骤S11：在第四隔断膜层104上沉积氧化硅材料，形成第三隔断膜层103。
具体地，如图11所示，可以采用氧化硅材料，在已经制备完成的第四隔断膜层104上形成第三隔断膜层103。
步骤S12：去除第三隔断膜层103的部分氧化硅材料，形成第三隔断层1030。
具体地，如图12所示，可以采用干法刻蚀、湿法刻蚀等工艺去除第三隔断膜层103的部分氧化硅材料，形成第三隔断层1030。
步骤S13：在具有第三隔断层1030的像素定义层上沉积氮化硅材料，形成第二隔断膜层102。
具体地，如图13所示，在形成第三隔断层1030后，可以进一步采用氮化硅材料制备第二隔断膜层102，该第二隔断膜层102可以设置在第三隔断层1030上。
步骤S14：在第二隔断膜层102上形成第一隔断层1010。
具体地，如图14所示，可以采用负性光刻胶材料，在第二隔断膜层102上制备第一隔断层1010。
步骤S15，以第一隔断层1010和第三隔断层1030为掩膜，刻蚀第二隔断膜层102和第四隔断膜层104的氮化硅材料，分别形成第二隔断层1020和第四隔断层1040。
具体地，如图15所示，可以以第一隔断层1010和第三隔断层1030为掩膜，对第二隔断膜层102和第四隔断膜层104进行刻蚀，从而得到第二隔断层1020和第四隔断层1040。
在一些实施例中，第四隔断层1040与第三隔断层1030的刻蚀选择比大于1；第二隔断层1020与第三隔断层1030的刻蚀选择比大于1。因此，第一隔断层1010和第二隔断层1020之间形成的台阶的角度小于第二隔断层1020和第三隔断层1030之间形成的台阶的角度，第二隔断层1020和第三隔断层1030之间形成的台阶的角度小于第三隔断层1030和第四隔断层1040之间形成的台阶的角度。
在上述实施例中，隔离柱至少包括依次层叠的四个隔断层1010、1020、1030、1040，且相邻的两个隔断层1010、1020、1030、1040之间形成台阶，相邻的两个台阶的角度不同，使 得隔离柱能够有效地隔断第一电极材料层，以形成彼此绝缘的多个第一电极13，从而提高显示面板的性能稳定性。
本申请还提供一种显示屏。该显示屏具有第一显示区和第二显示区。第一显示区和第二显示区均用于显示画面，例如动态或者静态画面。第二显示区下方可以设置感光器件。显示屏包括设置在第一显示区的第一显示面板和设置在第二显示区的第二显示面板。第一显示面板和第二显示面板可以形成在同一基板上。第二显示面板的透光率大于第一显示面板的透光率。第二显示面板为上述任一实施例所述的显示面板。
进一步地，第二显示面板可以包括依次层叠设置的基板11、第二电极、像素定义层、隔离柱12和第一电极13。像素定义层形成有多个像素开口，像素开口内形成有与第二电极接触的发光结构层。隔离柱用12于隔断第一电极材料层，以形成相互绝缘的多个第一电极13。隔离柱12可以包括依次层叠的多个隔断层，相邻的隔断层之间形成台阶，相邻的两个台阶具有不同的角度，并且相邻的两个台阶中远离基板11的台阶的角度小于靠近基板11的台阶的角度。
上述实施例的显示屏中，由于隔离柱12包括依次层叠的多个隔断层，并且相邻的两个隔断层之间可以形成台阶，相邻的两个台阶具有不同的角度，并且相邻的两个台阶中远离基板11的台阶的角度小于靠近基板11的台阶的角度，使得隔离柱12能够有效地隔断第一电极材料层，相邻的第一电极不会发生联结，从而显示屏能够稳定工作。
在一些实施例中，第一显示面板可以是AMOLED(Active-matrix organic light-emitting diode)显示面板，第二显示面板可以是PMOLED(Passive-matrix organic light-emitting diode)显示面板。
图7是根据本申请一实施例的显示终端的结构示意图。图8是图7中所示设备本体62的结构示意图。图9是图7中所示复合屏64的结构示意图。
本申请还提供一种复合屏。如图9所示，该复合屏64包括一体化的AM(Active-matrix)屏体642和PM(Passive-matrix)屏体644。PM屏体644中可以设置有本申请中任一实施例所述的显示面板以提升复合屏的显示性能及效果。AM屏体642可以包括AMOLED显示面板。PM屏体644可以包括PMOLED显示面板。
本申请还提供了一种显示终端60。如图7所示，显示终端60可以包括设备本体62和复合屏64。复合屏64覆盖在设备本体62上，并且复合屏64和设备本体62相互连接。
如图8所示，设备本体62上可以设置非器件区622和器件区624(如开槽区)。在器件区624中可以设置诸如摄像头626及光线传感器等的感光器件。
如图9所示，复合屏64可以包括AM屏体642和PM屏体644。
如图7和图8所示，当复合屏64贴合固定在设备本体62上时，PM屏体644可以对应上述的器件区624，因此设置在器件区624的感光器件能够对透过PM屏体644的外部光线进行采集及感测等操作。上述的PM屏体644可以包括上述任意一个实施例所述的显示面板，从而可以有效地隔断相邻的第一电极13，避免相邻的第一电极13出现短接而影响显示终端的显示性能及效果。
上述的显示终端60可以为手机、笔记本电脑、智能手表、智能手环等具有显示屏的电子设备。另外，如图9所示，为了提升PM屏体644的透光率，在感光器件工作时可以使PM屏体644处于非显示状态，进而提升感光器件采集外部光线的性能。
以上所述实施例的各技术特征可以进行任意的组合。为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对申请专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。

Claims (20)

  1. 一种显示面板，包括：
    基板；
    若干基板电极，所述基板电极形成在所述基板上；
    像素定义层，所述像素定义层形成在所述基板电极上，所述像素定义层上形成有多个像素开口，所述像素开口内形成有与所述基板电极接触的发光结构层；以及
    隔离柱，所述隔离柱形成在所述像素定义层上，所述隔离柱隔断第一电极材料层以形成相互绝缘的多个第一电极，所述多个第一电极位于所述发光结构层上，
    其中，所述隔离柱包括依次层叠的多个隔断层，相邻的两个隔断层之间形成台阶，且相邻的两个台阶的角度不同。
  2. 根据权利要求1所述的显示面板，其中，在相邻的两个台阶中，远离所述基板的台阶的角度小于靠近所述基板的台阶的角度。
  3. 根据权利要求1所述的显示面板，其中，所述多个隔断层包括依次层叠的第一隔断层和第二隔断层，所述第二隔断层相对于所述第一隔断层更靠近所述基板，所述第一隔断层上形成有所述第一电极层材料。
  4. 根据权利要求3所述的显示面板，其中，所述第一隔断层在第一方向上的截面呈矩形，且所述第二隔断层在第一方向上的截面呈上底边小于下底边的形状，所述第一方向与所述隔离柱的延伸方向垂直且与所述基板垂直，所述隔离柱的延伸方向与所述基板平行。
  5. 根据权利要求3所述的显示面板，其中，所述多个隔断层还包括：依次层叠设置在所述第二隔断层下方的第三隔断层和第四隔断层，所述第四隔断层相对于所述第三隔断层更靠近所述基板；所述第四隔断层在所述第一方向上的截面呈上底边大于下底边的形状。
  6. 根据权利要求5所述的显示面板，其中，所述第一隔断层和所述第二隔断层之间形成的台阶的角度小于所述第二隔断层和所述第三隔断层之间形成的台阶的角度，所述第二隔断层和所述第三隔断层之间形成的台阶的角度小于所述第三隔断层和所述第四隔断层之间形成的台阶的角度。
  7. 根据权利要求5所述的显示面板，其中，所述第四隔断层、所述第三隔断层和所述第二隔断层为采用同一刻蚀工艺制备的膜层，所述刻蚀工艺为离子铣刻蚀、等离子刻蚀、反应离子刻蚀中的一种。
  8. 根据权利要求5所述的显示面板，其中，所述第四隔断层与所述第三隔断层的刻蚀选择比大于1；所述第二隔断层与所述第三隔断层的刻蚀选择比大于1。
  9. 根据权利要求5所述的显示面板，其中，所述第一隔断层的材质为光刻胶，所述第二 隔断层和所述第四隔断层的材质为氮化硅，所述第三隔断层的材质为氧化硅。
  10. 根据权利要求1所述的显示面板，其中，所述多个第一电极沿相同的方向并行延伸，且相邻的两个所述第一电极之间具有间距，所述第一电极的延伸方向与所述基板平行。
  11. 根据权利要求10所述的显示面板，其中，在所述第一电极的延伸方向上，所述第一电极的宽度连续变化，且相邻的两个所述第一电极的所述间距连续变化，或者，
    所述第一电极的宽度间断变化，且相邻的两个所述第一电极的所述间距间断变化。
  12. 根据权利要求1所述的显示面板，其中，多个所述基板电极沿相同的方向并行延伸，且相邻的两个所述基板电极之间具有间距，所述基板电极的延伸方向与所述基板平行。
  13. 根据权利要求12所述的显示面板，其中，在所述基板电极的延伸方向上，所述基板电极的宽度连续变化，且相邻的两个所述基板电极之间所述间距连续变化。
  14. 根据权利要求12所述的显示面板，其中，在所述基板电极的延伸方向上，所述基板电极的宽度间断变化，且相邻的两个所述基板电极之间所述间距间断变化。
  15. 一种制备显示面板的方法，其中，包括：
    提供基板，在所述基板上形成基板电极；
    在所述基板电极上形成像素定义层，在所述像素定义层上形成多个像素开口；
    在所述像素定义层上形成隔离柱；
    在所述像素开口内形成与所述基板电极接触的发光结构层；
    在具有所述隔离柱和所述发光结构层的所述基板上整层地铺设第一电极材料层，所述隔离柱隔断所述第一电极材料层，形成相互绝缘的多个第一电极，所述多个第一电极位于所述发光结构层上；
    其中，所述隔离柱包括依次层叠的多个隔断层，相邻的两个隔断层之间形成台阶，且相邻的两个台阶的角度不同。
  16. 根据权利要求15所述的制备显示面板的方法，其中，在相邻的两个台阶中，远离所述基板的台阶的角度小于靠近所述基板的台阶的角度。
  17. 根据权利要求15所述的制备显示面板的方法，其中，在所述像素定义层上形成隔离柱的过程包括：
    在所述像素定义层上沉积第四隔断膜层；
    在所述第四隔断膜层上沉积第三隔断膜层；
    去除部分所述第三隔断膜层，形成第三隔断层；
    在具有所述第三隔断层的像素定义层上沉积第二隔断膜层；
    在所述第二隔断膜层上形成第一隔断层；以及
    以所述第一隔断层和所述第三隔断层为掩膜，刻蚀所述第二隔断膜层和所述第四隔断膜层，分别形成第二隔断层和第四隔断层。
  18. 根据权利要求17所述的制备显示面板的方法，其中，在所述像素定义层上形成隔离柱的过程包括：
    在所述像素定义层上沉积氮化硅材料，形成第四隔断膜层；
    在所述第四隔断膜层上沉积氧化硅材料，形成第三隔断膜层；
    去除所述第三隔断膜层的部分氧化硅材料，形成第三隔断层；
    在具有所述第三隔断层的像素定义层上沉积氮化硅材料，形成第二隔断膜层；
    在所述第二隔断膜层上形成第一隔断层；以及
    以所述第一隔断层和所述第三隔断层为掩膜，刻蚀所述第二隔断膜层和第四隔断膜层的氮化硅材料，分别形成第二隔断层和第四隔断层。
  19. 根据权利要求17所述的制备显示面板的方法，其中，所述第四隔断层与所述第三隔断层的刻蚀选择比大于1；所述第二隔断层与所述第三隔断层的刻蚀选择比大于1。
  20. 一种显示屏，具有第一显示区和第二显示区；所述第一显示区和所述第二显示区均用于显示画面；所述第二显示区下方可设置感光器件；所述显示屏包括设置在所述第一显示区的第一显示面板和设置在所述第二显示区的第二显示面板，所述第一显示面板和所述第二显示面板形成在同一基板上，所述第二显示面板的透光率大于所述第一显示面板的透光率；所述第二显示面板为权利要求1-14中任一项所述的显示面板。
PCT/CN2019/076357 2018-10-31 2019-02-27 显示面板、显示屏及制备显示面板的方法 Ceased WO2020087814A1 (zh)

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