WO2020073393A1 - 用于显示器的像素结构 - Google Patents

用于显示器的像素结构 Download PDF

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Publication number
WO2020073393A1
WO2020073393A1 PCT/CN2018/113893 CN2018113893W WO2020073393A1 WO 2020073393 A1 WO2020073393 A1 WO 2020073393A1 CN 2018113893 W CN2018113893 W CN 2018113893W WO 2020073393 A1 WO2020073393 A1 WO 2020073393A1
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WIPO (PCT)
Prior art keywords
metal
hole
metal segment
data line
pixel structure
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PCT/CN2018/113893
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English (en)
French (fr)
Inventor
张鑫
刘广辉
梅新东
王超
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武汉华星光电技术有限公司
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Application filed by 武汉华星光电技术有限公司 filed Critical 武汉华星光电技术有限公司
Priority to US16/463,721 priority Critical patent/US20210159249A1/en
Publication of WO2020073393A1 publication Critical patent/WO2020073393A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads

Definitions

  • the present invention relates to the field of display technology, and in particular to a pixel structure for a display.
  • the resolution of mainstream monitors in the market is getting higher and higher, and the excellent picture quality and visual experience of high-resolution monitors are also favored by consumers, making it extremely popular and competitive in the market.
  • the design of the display is also challenged.
  • the impedance of the signal line in the display also increases synchronously.
  • the current pixel structure 100 for a display basically includes a substrate 110, at least one scan line 121, at least one data line 141, disposed between the scan line 121 layer and the data line 141 layer ⁇ ⁇ insulating ⁇ 130 ⁇ The insulating layer 130.
  • the existing solution is to reduce the impedance of the signal line by replacing the metal film layer with high conductivity. Therefore, the materials of the scan line layer and the data line layer may change, and the related processes must also be changed accordingly. This will bring the risk of increased production cost and reduced process yield.
  • the object of the present invention is to provide a pixel structure for a display.
  • another metal film layer and corresponding connection holes are added on the horizontal or vertical metal layer (signal line layer) of the display pixel structure to realize metal
  • the film layers are connected in parallel, thereby reducing the impedance of the metal, and solving the problem of excessive impedance of high-resolution displays.
  • the present invention provides a pixel structure for a display, which includes:
  • An insulating layer disposed on the first metal layer, the insulating layer includes a first through hole, a second through hole, a third through hole and a fourth through hole;
  • the second metal segment is electrically connected in parallel with the scan line through the first through hole and the second through hole, and the first metal segment through the third through hole and the fourth through hole
  • the data lines are electrically connected in parallel.
  • the second metal segment is opposite to the scan line, and the first metal segment is opposite to the data line.
  • the scan line and the first metal segment are insulated from each other, and the data line and the second metal segment are insulated from each other.
  • the first metal layer includes at least two scan lines, and the first metal segment is disposed between two adjacent scan lines.
  • the second metal layer includes at least two data lines, and the second metal segment is disposed between two adjacent data lines.
  • both ends of the third through hole are electrically connected to the data line and the first metal segment, respectively, and both ends of the fourth through hole are electrically connected to the data line and the The first metal segment is described.
  • the two ends of the first through hole are electrically connected to the scan line and the second metal segment, respectively, and the two ends of the second through hole are electrically connected to the scan line and the The second metal segment is described.
  • the invention also provides a pixel structure for a display.
  • the pixel structure includes:
  • the second metal segment is electrically connected in parallel with the scan line through the plurality of through holes.
  • the plurality of through holes includes a first through hole and a second through hole, two ends of the first through hole are electrically connected to the scan line and the second metal segment, respectively, and the Two ends of the second through hole are electrically connected to the scan line and the second metal segment respectively.
  • the first metal layer includes at least one first metal segment, the scan line and the plurality of first metal segments are separated from each other, and the first metal segment passes through the plurality of perforations
  • the data lines are electrically connected in parallel.
  • the plurality of through holes includes a third through hole and a fourth through hole, two ends of the third through hole are respectively electrically connected to the data line and the first metal segment, and the Two ends of the fourth through hole are respectively electrically connected to the data line and the first metal segment.
  • the second metal segment is opposite to the scan line.
  • the first metal segment is opposite to the data line.
  • the invention also provides a pixel structure for a display.
  • the pixel structure includes:
  • the first metal segment is electrically connected in parallel with the data line through a plurality of through holes.
  • the plurality of through holes includes a third through hole and a fourth through hole, wherein both ends of the third through hole are electrically connected to the data line and the first metal segment, respectively, and the Two ends of the fourth through hole are electrically connected to the data line and the first metal segment, respectively.
  • the first metal segment is opposite to the data line.
  • the scan line and the first metal segment are insulated from each other.
  • the beneficial effects of the present invention are: it is possible to reduce the impedance of the signal line without changing the original process conditions. Therefore, there is no need to replace the existing metal layer materials, and the risk of lower yields due to changing process conditions can be avoided .
  • FIG. 1 is a schematic structural diagram of a pixel structure of a conventional display.
  • FIG. 1A is a cross-sectional view of A-A in FIG. 1.
  • FIG. 2 is a schematic structural diagram of a pixel structure for a display of the present invention.
  • Fig. 3 is a cross-sectional view of A-A in Fig. 2.
  • FIG. 4 is a cross-sectional view of B-B in FIG. 2.
  • the term includes (comprise, comprising, include, including, contain, Containing, have, having) and its changes can be interpreted as the meaning of inclusion (non-exclusive), making the process, method, device, apparatus or system described in this article ( system) is not limited to the description of these functions, parts, elements or steps, but may contain other elements, functions, parts or steps not explicitly listed or the existence of such a process (process), method (method), article (article) or Equipment (apparatus).
  • the term "a” and “an” as used herein is understood to mean one or more.
  • the terms first, second, third, etc. are only used as labels, and do not impose numerical requirements or establish order.
  • FIG. 2 is a schematic structural diagram of a pixel structure for a display according to the present invention.
  • Fig. 3 is a cross-sectional view of A-A in Fig. 2.
  • 4 is a cross-sectional view of B-B in FIG. 2.
  • the present invention provides a pixel structure 200 for a display.
  • the pixel structure 200 includes: a substrate 210, a first metal layer 220, an insulating layer 230 and a second metal layer 240.
  • the substrate 210 has a light-transmitting property, such as a glass substrate.
  • the first metal layer 220 is disposed on the substrate 210.
  • the first metal layer 220 includes at least one scan line 221 and at least one first metal segment 222.
  • the scan The line 221 and the first metal segment 222 are separated from each other, meaning that the scan line 221 and the first metal segment 222 are insulated from each other, and there is no electrical connection between the two.
  • the first metal segment 222 can be disposed between two adjacent scan lines 221.
  • the first metal layer 220 can be deposited on the substrate 210 by a deposition technique, and the first metal layer 220 is patterned through a photolithography process, thereby forming the data line 241 and the ⁇ ⁇ ⁇ ⁇ 242.
  • the main steps of the photolithography process are photoresist (PR) coating, exposure, development, etching and film stripping.
  • PR photoresist
  • the insulating layer 230 is disposed on the first metal layer 220.
  • the insulating layer 230 includes a first through hole 231, a second through hole 232, a third through hole 233, and a fourth through hole 234.
  • the insulating layer 230 is formed on the first metal layer 220 by a deposition technique, and the first through hole 231, the second through hole 232, and the third through hole are defined through photolithography process definition and etching technology 233 and the fourth through hole 234, and then filled with conductive material, such as metal, to form the first through hole 231, the second through hole 232, the third through hole 233, and the fourth through hole 234.
  • the second metal layer 240 is disposed on the insulating layer 230.
  • the second metal layer 240 includes at least one data line 241 and at least one second metal segment 242.
  • the data line 241 and the second metal The segments 242 are separated from each other, which means that the data line 241 and the second metal segment 242 are insulated from each other, and there is no electrical connection between the two.
  • the second metal segment 242 may be disposed between two adjacent data lines 241.
  • the second metal layer 240 may be deposited on the insulating layer 230 by a deposition technique, and the second metal layer 240 may be patterned through a photolithography process to form the scan line 221 and The first metal segment 222.
  • the second metal segment 242 is electrically parallel to the scan line 221 through the first through hole 231 and the second through hole 232, and the first metal segment 222 passes through the third through hole 233 and all
  • the fourth through hole 234 is electrically connected in parallel with the data line 221.
  • the first through hole 231 and the second through hole 232 are disposed between the scan line 221 and the second metal segment 242.
  • Two ends of the first through hole 231 are electrically connected to the scanning line 221 and the second metal segment 242, respectively, and two ends of the second through hole 232 are electrically connected to the scanning line 221 and the first
  • the second metal segment 242 makes the second metal segment 242 and the scan line 221 electrically connected in parallel. By electrically connecting the second metal segment 242 and the scan line 221 in parallel, the impedance of the scan line 221 is reduced.
  • the third through hole 233 and the fourth through hole 234 are disposed between the data line 242 and the first metal segment 222. Two ends of the third through hole 233 are electrically connected to the data line 242 and the first metal segment 222, respectively, and two ends of the fourth through hole 234 are electrically connected to the data line 242 and the first A metal segment 222, so that the first metal segment 222 and the data line 242 are electrically connected in parallel.
  • the electrical parallel connection between the first metal segment 222 and the data line 242 reduces the impedance of the data line 242.
  • the second metal segment 242 is opposite to the scan line 221 and is located above the scan line 221.
  • the pattern design of the second metal segment 242 may also correspond to the pattern design of the scan line 221, which means that the pattern of the second metal segment 222 may overlap a part of the pattern of the scan line 221, as shown in FIG. 2 As shown.
  • the first metal segment 222 is opposite to the data line 242 and is located below the data line 242.
  • the pattern design of the first metal segment 222 may also correspond to the pattern design of the data line 242, which means that the pattern of the first metal segment 222 may overlap a part of the pattern of the data line 242, as shown in FIG. 2 As shown.
  • the pixel structure of the present invention can also be modified as follows.
  • the second metal layer 240 is required to form at least one data line 241 and at least A second metal segment 242, and the second metal segment 242 may be electrically connected in parallel with the scan line 221 through the first through hole 231 and the second through hole 232, as shown in FIG.
  • the first metal layer 220 is required to form at least one scan line 221 and at least one first metal segment 222, and the first metal segment 222 passes through
  • the third through hole 233 and the fourth through hole 234 may be electrically connected in parallel with the data line 221.
  • the present invention can reduce the number of signal lines (such as scan lines or data) in the low metal layer through the optimized design of multiple metal segments in the metal layer and multiple through holes corresponding to the metal segments Line).
  • the beneficial effects of the present invention are: it is possible to reduce the impedance of the signal line without changing the original process conditions (such as the metal layer material and the process parameters of the corresponding metal layer material).
  • the impedance of the signal line (such as the scan line or the data line) will be low, thereby effectively controlling the manufacturing cost and avoiding the risk of lower production yield due to changes in process conditions.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

本发明公开一种用于显示器的像素结构，所述像素结构包含：一基板；一第一金属层，设置于所述基板上，所述第一金属层包含至少一扫描线；一绝缘层，设置于所述第一金属层上，所述绝缘层包含多个穿孔；及一第二金属层，设置于所述绝缘层上，所述第二金属层包含至少一数据线及至少一第二金属片段，所述数据线与所述第二金属片段彼此分离；其中，所述第二金属片段通过所述多个穿孔与所述扫描线电性并联。

Description

用于显示器的像素结构 技术领域
本发明涉及显示技术领域，特别是涉及一种用于显示器的像素结构。
 背景技术
随着显示技术的革新和发展，市场主流显示器的分辨率越来越高，高分辨率显示器的出色画质和视觉体验也倍受消费者青睐，使其具有极高的人气和市场竞争力。随着显示器的分辨率逐步提升，对显示器的设计也提出了挑战，随着分辨率的提升显示器内信号线的阻抗也同步增加。
 技术问题
请参照图1及图1A，现行的用于显示器的像素结构100基本上包含了一基板110、至少一扫描线121、至少一数据线141、设于扫描线121层与数据线141层之间的一绝缘层130。为了解决信号线阻抗增加的问题，现有的解决方案是通过更换高电导率的金属膜层，来降低信号线阻抗。因此，扫描线层及数据线层的材料可能改变，而相关的制程也必须相应的改变。这就会带来制作成本增加及制程良率降低的风险。
故，有必要提供一种用于显示器的像素结构，以解决现有技术所存在的问题。
 技术解决方案
本发明的目的在于提供一种用于显示器的像素结构，通过优化像素设计在显示器像素结构的横向或纵向金属层(信号线层)上增加另一层金属膜层以及对应的连接孔，实现金属膜层并联，进而降低金属的阻抗，解决高分辨率显示器阻抗过大的问题。
为达成本发明的前述目的，本发明提供一种用于显示器的像素结构，其包含：
一基板；
一第一金属层，设置于所述基板上，所述第一金属层包括至少一扫描线及至少一第一金属片段，所述扫描线与所述第一金属片段彼此分离；
一绝缘层，设置于所述第一金属层上，所述绝缘层包括一第一穿孔、一第二穿孔、一第三穿孔及一第四穿孔；及
一第二金属层，设置于所述绝缘层上，所述第二金属层包括至少一数据线及至少一第二金属片段，所述数据线与所述第二金属片段彼此分离；
其中，所述第二金属片段通过所述第一穿孔及所述第二穿孔与所述扫描线电性并联，并且所述第一金属片段通过所述第三穿孔及所述第四穿孔与所述数据线电性并联。
根据本发明一实施例，所述第二金属片段与所述扫描线相对，并且所述第一金属片段与所述数据线相对。
根据本发明一实施例，所述所述扫描线与所述第一金属片段彼此绝缘，所述数据线与所述第二金属片段彼此绝缘。
根据本发明一实施例，所述第一金属层包括至少二个所述扫描线，且所述第一金属片段设置于相邻的二个所述扫描线之间。
根据本发明一实施例，所述第二金属层包括至少二个所述数据线，且所述第二金属片段设置于相邻的二个所述数据线之间。
根据本发明一实施例，所述第三穿孔的两端分别电性连接所述数据线及所述第一金属片段，并且所述第四穿孔的两端分别电性连接所述数据线及所述第一金属片段。
根据本发明一实施例，所述第一穿孔的两端分别电性连接所述扫描线及所述第二金属片段，并且所述第二穿孔的两端分别电性连接所述扫描线及所述第二金属片段。
本发明还提供一种用于显示器的像素结构，所述像素结构包括：
一基板；
一第一金属层，设置于所述基板上，所述第一金属层包含至少一扫描线；
一绝缘层，设置于所述第一金属层上，所述绝缘层包含多个穿孔；及
一第二金属层，设置于所述绝缘层上，所述第二金属层包含至少一数据线及至少一第二金属片段，所述数据线与所述第二金属片段彼此分离；
其中，所述第二金属片段通过所述多个穿孔与所述扫描线电性并联。
根据本发明一实施例，所述多个穿孔包括一第一穿孔及一第二穿孔，所述第一穿孔的两端分别电性连接所述扫描线及所述第二金属片段，并且所述第二穿孔的两端分别电性连接所述扫描线及所述第二金属片段。
根据本发明一实施例，所述第一金属层包括至少一第一金属片段，所述扫描线与多个第一金属片段彼此分离，并且所述第一金属片段通过所述多个穿孔与所述数据线电性并联。
根据本发明一实施例，所述多个穿孔包括一第三穿孔及一第四穿孔，所述第三穿孔的两端分别电性连接所述数据线及所述第一金属片段，并且所述第四穿孔的两端分别电性连接所述数据线及所述第一金属片段。
根据本发明一实施例，所述第二金属片段与所述扫描线相对。
根据本发明一实施例，所述第一金属片段与所述数据线相对。
本发明还提供一种用于显示器的像素结构，所述像素结构包括：
一基板；
一第一金属层，设置于所述基板上，所述第一金属层包括至少一扫描线及至少一第一金属片段，所述扫描线与所述第一金属片段彼此分离；
一绝缘层，设置于所述第一金属层上，所述绝缘层包括多个穿孔；及
一第二金属层，设置于所述绝缘层上，所述第二金属层包括至少一数据线；
其中，所述第一金属片段通过多个穿孔与所述数据线电性并联。
根据本发明一实施例，所述多个穿孔包括一第三穿孔及一第四穿孔，其中所述第三穿孔的两端分别电性连接所述数据线及所述第一金属片段，并且所述第四穿孔的两端分别电性连接所述数据线及所述第一金属片段。
根据本发明一实施例，所述第一金属片段与所述数据线相对。
根据本发明一实施例，所述扫描线与所述第一金属片段彼此绝缘。
 有益效果
本发明的有益效果为：不需要改变原有的制程条件，就可以降低信号线阻抗，因此，不需更换现有金属层材料，也可以避免因为变更制程条件而沿生的良率降低的风险。
 附图说明
为让本发明的上述内容能更明显易懂，下文特举优选实施例，并配合所附图式，作详细说明如下：
图1是一现有的显示器的像素结构的结构示意图。
图1A是图1中A-A的截面图。
图2是本发明的一种用于显示器的像素结构的结构示意图。
图3是图2中A-A的截面图。
图4是图2中B-B的截面图。
 本发明的实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施的特定实施例。再者，本发明所提到的方向用语，例如上、下、顶、底、前、后、左、右、内、外、侧面、周围、中央、水平、横向、垂直、纵向、轴向、径向、最上层或最下层等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。
在本文中，用语包含(comprise, comprising, include, including, contain, containing, have, having)及其变化，都可以解释为包含的意义(非独有的)，使得本文中描述的步骤(process)、方法(method)、装置(device)、设备(apparatus)或系统(system)不限定于这些功能、部分、元件或步骤的叙述，但可能包含其他元件、功能、部分或步骤未明确列出或存在这样的步骤(process)、方法(method)、物品(article)或设备(apparatus)。此外，除非另有明确规定，用语一(a、an)在本文所用的目的是被理解为是指一个或多个。另外，用语第一、第二、第三等仅仅作为标示使用，并没有强加数字要求或建立顺序。
请参阅图2至图4，图2是本发明的一种用于显示器的像素结构的结构示意图。图3是图2中A-A的截面图。图4是图2中B-B的截面图。如图2所示，本发明提供一种用于显示器的像素结构200，所述像素结构200包含：一基板210、一第一金属层220、一绝缘层230及一第二金属层240。
所述基板210具有透光的性质，例如是玻璃基板。
如图3及图4所示，所述第一金属层220，设置于所述基板210上，所述第一金属层220包括至少一扫描线221及至少一第一金属片段222，所述扫描线221与所述第一金属片段222彼此分离，意即所述扫描线221与所述第一金属片段222彼此绝缘，两者之间没有电性连接。其中所述第一金属片段222可以设置于相邻的两个所述扫描线221之间。其中所述第一金属层220可以通过沈积技术沈积在所述基板210上，并且透过光刻工艺对所述第一金属层220进行图案化处理，进而形成所述数据线241与所述第二金属片段242。而光刻工艺的主要步骤为光阻(PR)涂布、曝光、显影、蚀刻以及剥膜。
所述绝缘层230，设置于所述第一金属层220上，所述绝缘层230包括一第一穿孔231、一第二穿孔232、一第三穿孔233及一第四穿孔234。所述绝缘层230通过沈积技术形成于所述第一金属层220上，并且透过光刻工艺定义及蚀刻技术定义所述第一穿孔231、所述第二穿孔232、所述第三穿孔233及所述第四穿孔234位置，随后填入导电材料，例如金属，形成所述第一穿孔231、所述第二穿孔232、所述第三穿孔233及所述第四穿孔234。
所述第二金属层240，设置于所述绝缘层230上，所述第二金属层240包括至少一数据线241及至少一第二金属片段242，所述数据线241与所述第二金属片段242彼此分离，意即所述数据线241与所述第二金属片段242彼此绝缘，两者之间没有电性连接。其中，所述第二金属片段242可以设置于相邻的两个所述数据线241之间。其中所述第二金属层240可以通过沈积技术沈积在所述绝缘层230上，并且透过光刻工艺对所述第二金属层240进行图案化处理，进而形成所述扫描线221与所述第一金属片段222。
其中，所述第二金属片段242通过所述第一穿孔231及所述第二穿孔232与所述扫描线221电性并联，并且所述第一金属片段222通过所述第三穿孔233及所述第四穿孔234与所述数据线221电性并联。
如图3所示，所述第一穿孔231及所述第二穿孔232设置于所述扫描线221及所述第二金属片段242之间。所述第一穿孔231的两端分别电性连接所述扫描线221及所述第二金属片段242，并且所述第二穿孔232的两端分别电性连接所述扫描线221及所述第二金属片段242，使得所述第二金属片段242与所述扫描线221形成电性并联。藉由所述第二金属片段242与所述扫描线221之间的电性并联来降低所述扫描线221的阻抗。
如图4所示，所述第三穿孔233及所述第四穿孔234设置于所述数据线242及所述第一金属片段222之间。所述第三穿孔233的两端分别电性连接所述数据线242及所述第一金属片段222，并且所述第四穿孔234的两端分别电性连接所述数据线242及所述第一金属片段222，使得所述第一金属片段222与所述数据线242形成电性并联。藉由所述第一金属片段222与所述数据线242之间的电性并联来降低所述数据线242的阻抗。
如图3所示，所述第二金属片段242与所述扫描线221相对，并且位于所述扫描线221上方。所述第二金属片段242的图案设计也可以对应配合所述扫描线221的图案设计，意即所述第二金属片段222的图案可以与所述扫描线221的图案的一部分重叠，如图2所示。同样地，如图4所示，所述第一金属片段222与所述数据线242相对，并且位于所述数据线242下方。所述第一金属片段222的图案设计也可以对应配合所述数据线242的图案设计，意即所述第一金属片段222的图案可以与所述数据线242的图案的一部分重叠，如图2所示。
因应不同的需求，本发明用于显示器的像素结构也可以有以下变形，例如当仅需要减低所述扫描线221的阻抗时，仅需要所述第二金属层240形成至少一数据线241及至少一第二金属片段242，并且使所述第二金属片段242通过所述第一穿孔231及所述第二穿孔232与所述扫描线221电性并联即可，如图3所示。反之，若仅需要减低所述数据线241的阻抗时，仅需要所述第一金属层220形成至少一扫描线221及至少一第一金属片段222，并且使所述第一金属片段222通过所述第三穿孔233及所述第四穿孔234与所述数据线221电性并联即可。
如上所述的实施例及变形，本发明透过金属层中的多个金属片段及对应金属片段的多个穿孔的优化设计，即可降低将低金属层中的信号线(例如扫描线或数据线)的阻抗。本发明的有益效果为：不需要改变原有的制程条件(例如金属层材料及相应金属层材料的制程参数)，就可以降低信号线阻抗，因此，不需更换现有金属层材料，即可将低信号线(例如扫描线或数据线)的阻抗，进而有效地控制制作成本及避免因为制程条件改变而沿生的生产良率降低的风险。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (17)

  1. 一种用于显示器的像素结构，其包含：
    一基板；
    一第一金属层，设置于所述基板上，所述第一金属层包括至少一扫描线及至少一第一金属片段，所述扫描线与所述第一金属片段彼此分离；
    一绝缘层，设置于所述第一金属层上，所述绝缘层包括一第一穿孔、一第二穿孔、一第三穿孔及一第四穿孔；及
    一第二金属层，设置于所述绝缘层上，所述第二金属层包括至少一数据线及至少一第二金属片段，所述数据线与所述第二金属片段彼此分离；
    其中，所述第二金属片段通过所述第一穿孔及所述第二穿孔与所述扫描线电性并联，并且所述第一金属片段通过所述第三穿孔及所述第四穿孔与所述数据线电性并联。
  2. 如权利要求1所述的像素结构，其中所述第二金属片段与所述扫描线相对，并且所述第一金属片段与所述数据线相对。
  3. 如权利要求1所述的像素结构，其中所述所述扫描线与所述第一金属片段彼此绝缘，所述数据线与所述第二金属片段彼此绝缘。
  4. 如权利要求1所述的像素结构，其中所述第一金属层包括至少二个所述扫描线，且所述第一金属片段设置于相邻的二个所述扫描线之间。
  5. 如权利要求1所述的像素结构，其中所述第二金属层包括至少二个所述数据线，且所述第二金属片段设置于相邻的二个所述数据线之间。
  6. 如权利要求4所述的像素结构，其中所述第三穿孔的两端分别电性连接所述数据线及所述第一金属片段，并且所述第四穿孔的两端分别电性连接所述数据线及所述第一金属片段。
  7. 如权利要求5所述的像素结构，其中所述第一穿孔的两端分别电性连接所述扫描线及所述第二金属片段，并且所述第二穿孔的两端分别电性连接所述扫描线及所述第二金属片段。
  8. 一种用于显示器的像素结构，其包含：
    一基板；
    一第一金属层，设置于所述基板上，所述第一金属层包括至少一扫描线；
    一绝缘层，设置于所述第一金属层上，所述绝缘层包括多个穿孔；及
    一第二金属层，设置于所述绝缘层上，所述第二金属层包括至少一数据线及至少一第二金属片段，所述数据线与所述第二金属片段彼此分离；
    其中，所述第二金属片段通过所述多个穿孔与所述扫描线电性并联。
  9. 如权利要求8所述的像素结构，其中所述多个穿孔包括一第一穿孔及一第二穿孔，所述第一穿孔的两端分别电性连接所述扫描线及所述第二金属片段，并且所述第二穿孔的两端分别电性连接所述扫描线及所述第二金属片段。
  10.    如权利要求8所述的像素结构，其中所述第一金属层包括至少一第一金属片段，所述扫描线与多个第一金属片段彼此分离，并且所述第一金属片段通过所述多个穿孔与所述数据线电性并联。
  11.    如权利要求10所述的像素结构，其中所述多个穿孔包括一第三穿孔及一第四穿孔，所述第三穿孔的两端分别电性连接所述数据线及所述第一金属片段，并且所述第四穿孔的两端分别电性连接所述数据线及所述第一金属片段。
  12.    如权利要求8所述的像素结构，其中所述第二金属片段与所述扫描线相对。
  13.    如权利要求10所述的像素结构，其中所述第一金属片段与所述数据线相对。
  14.    一种用于显示器的像素结构，其包含：
    一基板；
    一第一金属层，设置于所述基板上，所述第一金属层包括至少一扫描线及至少一第一金属片段，所述扫描线与所述第一金属片段彼此分离；
    一绝缘层，设置于所述第一金属层上，所述绝缘层包括多个穿孔；及
    一第二金属层，设置于所述绝缘层上，所述第二金属层包括至少一数据线；
    其中，所述第一金属片段通过多个穿孔与所述数据线电性并联。
  15.    如权利要求14所述的像素结构，其中所述多个穿孔包括一第三穿孔及一第四穿孔，其中所述第三穿孔的两端分别电性连接所述数据线及所述第一金属片段，并且所述第四穿孔的两端分别电性连接所述数据线及所述第一金属片段。
  16.    如权利要求14所述的像素结构，其中所述第一金属片段与所述数据线相对。
  17.    如权利要求14所述的像素结构，其中所述扫描线与所述第一金属片段彼此绝缘。
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