WO2020073344A1 - 内埋式电路板及其制作方法 - Google Patents

内埋式电路板及其制作方法 Download PDF

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Publication number
WO2020073344A1
WO2020073344A1 PCT/CN2018/110153 CN2018110153W WO2020073344A1 WO 2020073344 A1 WO2020073344 A1 WO 2020073344A1 CN 2018110153 W CN2018110153 W CN 2018110153W WO 2020073344 A1 WO2020073344 A1 WO 2020073344A1
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WO
WIPO (PCT)
Prior art keywords
circuit board
layer
laminated structure
embedded
board
Prior art date
Application number
PCT/CN2018/110153
Other languages
English (en)
French (fr)
Inventor
李彪
钟浩文
Original Assignee
庆鼎精密电子（淮安）有限公司
鹏鼎控股(深圳)股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 庆鼎精密电子（淮安）有限公司, 鹏鼎控股(深圳)股份有限公司 filed Critical 庆鼎精密电子（淮安）有限公司
Priority to CN201880024758.5A priority Critical patent/CN111527798A/zh
Priority to PCT/CN2018/110153 priority patent/WO2020073344A1/zh
Priority to TW107138253A priority patent/TWI698158B/zh
Priority to US16/662,241 priority patent/US20200120805A1/en
Publication of WO2020073344A1 publication Critical patent/WO2020073344A1/zh

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/186—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
    • H05K3/424—Plated through-holes or plated via connections characterised by electroplating method by direct electroplating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09645—Patterning on via walls; Plural lands around one hole
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4697—Manufacturing multilayer circuits having cavities, e.g. for mounting components

Definitions

  • the invention relates to a circuit board and a manufacturing method thereof, in particular to an embedded circuit board and a manufacturing method thereof.
  • the pad bonding method using component mounting and reflow soldering is the most common. That is, after the substrate circuit is fabricated, solder paste is printed on the pad, and the component is attached to the surface of the solder paste The IR furnace is flow soldered and solidified, and then the components are buried by laminating and pressing.
  • the components of the embedded circuit board manufactured by this embedding process are fixed on a substrate by surface mounting technology. This connection method makes it impossible to conduct Anylayer conduction of the circuit board; Solder paste occupies a certain thickness (about 40um), which is not conducive to the thinning of the circuit board.
  • a method for manufacturing an embedded circuit board includes the following steps:
  • an internal laminated structure which is a double-sided circuit board
  • An embedded circuit board at least including an internal laminated structure, a first circuit board, a second circuit board, a third circuit board, a fourth circuit board, a first electroplating layer and a second electroplating layer; the third circuit board And the fourth circuit board are respectively provided on both sides of the inner laminated structure, the embedded circuit board further includes a slot hole, the slot hole penetrates the third circuit board, the inner laminated structure and all The fourth circuit board; electronic components are housed and fixed in the slots, and the electrodes of the electronic components are respectively directed toward the inner sides of the slots near both ends; the first plating layer is provided on the third circuit The outer side of the board and the fourth circuit board, and part of the inner side surface of the slot, to electrically connect the third circuit board, the fourth circuit board, the inner laminated structure and the electronic component Electrodes; the first circuit board and the second circuit board are respectively provided on the outside of the first plating layer, and cover the opening of the slot to bury the electronic component; the second plating layer is provided on Outside the first circuit board and the second circuit
  • the manufacturing method of the embedded circuit board of the present invention embeds the electronic component by designing the slot holes through which the sidewalls at both ends are connected, and uses the inside of the slot holes
  • the second electroplated layer realizes electrical conduction between the electronic component and the circuit boards of various layers, so as to realize the Anylayer design in which the embedded circuit board can be electrically connected to the outside through any layer of circuit boards.
  • the method for manufacturing the embedded circuit board of the present invention avoids printing the conductive paste on the bottom of the electronic component, avoids the thickness (about 40um) that the conductive paste may occupy, and improves the Lightweight effect of the embedded circuit board.
  • FIG. 1 is a manufacturing flowchart of an embedded circuit board according to a preferred embodiment of the present invention.
  • FIG. 2a is a schematic cross-sectional view of an internal laminated structure applied to the manufacturing method shown in FIG. 1.
  • FIG. 2a is a schematic cross-sectional view of an internal laminated structure applied to the manufacturing method shown in FIG. 1.
  • FIG. 2b is a schematic cross-sectional view of an inner laminated structure in another embodiment.
  • FIG. 3 is a schematic cross-sectional view after pressing the third circuit board and the fourth circuit board to both sides of the inner laminated structure shown in FIG. 2a, respectively.
  • FIG. 4 is a schematic cross-sectional view of the structure shown in FIG. 3 after opening two perforations.
  • FIG. 5 is a schematic cross-sectional view of the structure shown in FIG. 4 after electroplating.
  • 6a and 6b are respectively a schematic cross-sectional view and a schematic top view of the structure shown in FIG. 5 after the slot is formed.
  • FIG. 7 is a schematic cross-sectional view of an electronic component after being fixed in a slot.
  • FIG. 8 is a schematic cross-sectional view after the first circuit board and the second circuit board are pressed to the structure shown in FIG. 7.
  • FIG. 9 is a schematic cross-sectional view of the embedded circuit board obtained according to the manufacturing method shown in FIG. 1.
  • Embedded circuit board 100 First circuit board 101 Second circuit board 102 Third circuit board 103 Fourth circuit board 104 Fifth circuit board 105 Sixth circuit board 106 Seventh circuit board 107 Eighth circuit board 108
  • Electrode 200 electrode 201 Internal stack 10 Flexible copper clad laminate 11 Copper foil layer 12 Adhesive layer 13 Base film 14 Electrical conductor 15 Fill holes 16 First glue layer 20 perforation 30 Slot 40 First plating layer 50 Conductive paste 60 Second glue layer 70 Via 80 Second plating layer 90 Conductive structure 91
  • a method for manufacturing an embedded circuit board 100 includes the following steps:
  • S1 provides an internal laminated structure, which is a double-sided circuit board
  • S2 provides a third circuit board and a fourth circuit board, and presses the third circuit board and the fourth circuit board to both sides of the inner laminated structure respectively;
  • step S3 opens two spaced through holes on the structure obtained in step S2;
  • S6 receives and fixes the electronic component in the middle part of the slot, so that the electrodes of the electronic component respectively face the two ends of the slot and are electrically connected to the first plating layer;
  • step S7 provides a first circuit board and a second circuit board, and respectively presses the first circuit board and the second circuit board to both sides of the structure obtained in step S6 to bury the electronic components;
  • step S8 performs surface treatment on the structure obtained in step S7.
  • an inner laminated structure 10 is provided, which is a double-sided wiring board.
  • the inner laminated structure 10 may be a flexible circuit board (FPC), a rigid-flex combination board (Rigid-Flex) or a high density interconnection board (HDI).
  • FPC flexible circuit board
  • Rigid-Flex rigid-flex combination board
  • HDI high density interconnection board
  • the inner laminated structure 10 is a flexible circuit board and includes two layers of circuit boards.
  • the inner laminated structure 10 includes a flexible copper clad board 11 and fifth and sixth circuit boards 105 and 106 provided on both sides of the flexible copper clad board 11 respectively.
  • the flexible copper clad plate 11 is a double-sided substrate.
  • the fifth wiring board 105 and the sixth wiring board 106 respectively include a copper foil layer 12, an adhesive layer 13 (CVL-AD) and a base film 14 (CVL-PI).
  • the copper foil layer 12 is attached to one side of the base film 14 through the adhesive layer 13.
  • the copper foil layer 12 is pressed onto the flexible copper clad plate 11.
  • the copper foil layer 12 is further processed to form a circuit pattern.
  • the material of the adhesive layer 13 is a resin having viscosity, and more specifically, the resin may be selected from polypropylene, epoxy resin, polyurethane, phenol resin, urea resin, melamine-formaldehyde resin and polyacryl At least one of imines and the like.
  • the material of the base film 14 may be selected from but not limited to polyimide (PI), liquid crystal polymer (LCP), and polyethylene terephthalate ( One of Polyethylene Terephthalate (PET) and Polyethylene Naphthalate (PEN).
  • PI polyimide
  • LCP liquid crystal polymer
  • PET Polyethylene Terephthalate
  • PEN Polyethylene Naphthalate
  • the number of circuit board layers of the inner laminated structure 10 can be designed according to actual needs. In other embodiments, the number of circuit board layers of the inner laminated structure 10 can also be four, six, or eight layers ... 2n floors, etc.
  • the inner laminated structure 10 is a rigid-flex combination board, which includes four layers of circuit boards.
  • the inner laminated structure 10 includes a flexible copper-clad board 11, a fifth circuit board 105 and a sixth circuit board 106 respectively provided on both sides of the flexible copper-clad board 11, and respectively provided on the fifth circuit
  • the seventh circuit board 107 and the eighth circuit board 108 are pressed onto the fifth circuit board 105 and the sixth circuit board 106 through the adhesive layer 13 respectively.
  • the fifth circuit board 105 and the sixth circuit board 106 are flexible boards
  • the seventh circuit board 107 and the eighth circuit board 108 are rigid boards.
  • the inner laminated structure 10 further includes a conductor 15 that realizes electrical conduction between the layers of circuit boards.
  • each circuit board of each layer of the inner laminated structure 10 is correspondingly provided with a filling hole 16, and the electrical conductor 15 fills the filling hole 16 to electrically conduct the circuit boards of each layer.
  • the filling hole 16 may be a blind hole or a through hole.
  • step S2 a third circuit board 103 and a fourth circuit board 104 are provided, and the third circuit board 103 and the fourth circuit board 104 are respectively pressed to the inner laminated structure 10 on both sides.
  • the third circuit board 103 and the fourth circuit board 104 are high-density interconnect boards (HDI boards).
  • the third circuit board 103 and the fourth circuit board 104 are respectively pressed to the two sides of the inner laminated structure 10 through the first adhesive layer 20.
  • the material of the first adhesive layer 20 is a resin with viscosity, more specifically, the resin may be selected from polypropylene, epoxy resin, polyurethane, phenolic resin, urea-formaldehyde resin, melamine-formaldehyde resin, polyimide At least one.
  • the third circuit board 103 and the fourth circuit board 104 are pressed together, the third circuit board 103 and the fourth circuit board 104 are further processed to form a circuit pattern.
  • step S3 two spaced through holes 30 are opened.
  • the through hole 30 may be formed by drilling and etching.
  • the perforation 30 is a circular hole.
  • step S4 the outer surfaces of the third circuit board 103 and the fourth circuit board 104 and the inner sides of the two through holes 30 are electroplated to form the first electroplating layer 50.
  • the sixth circuit board 106, the fifth circuit board 105, the fourth circuit board 104, and the third circuit board 103 are electrically connected to the first plating layer 50, respectively.
  • step S5 the structure between the two perforations 30 is removed to form a slot 40 with the two perforations 30 at both ends.
  • the structure between the two through holes 30 can be removed by drilling and etching.
  • both ends of the slot 40 are semicircular.
  • step S6 the electronic component 200 is housed and fixed in the middle of the slot 40 so that the electrodes 201 of the electronic component 200 are directed toward both ends of the slot 40 and electrically Connect the first plating layer 50.
  • the electronic component 200 such as a capacitor
  • a conductive paste 60 is printed between the slot 40 and the electronic component 200
  • the conductive paste is dried 60 to fix the electronic component 200.
  • the conductive paste 60 electrically connects the electrode 201 of the electronic component 200 and the first plating layer 50.
  • the conductive paste 60 may be any one of solder paste, silver paste, copper paste and the like.
  • step S7 a first circuit board 101 and a second circuit board 102 are provided, and the first circuit board 101 and the second circuit board 102 are respectively pressed to the structure shown in step S6 To bury the electronic component 200 on both sides of.
  • the first circuit board 101 and the second circuit board 102 are high-density interconnection boards (HDI boards), and are respectively pressed to the first plating layer 50 through the second adhesive layer 70 on.
  • the first circuit board 101 and the second circuit board 102 respectively cover the opening of the slot 40 from two sides to bury the electronic component 200.
  • the material of the second adhesive layer 70 is a resin with viscosity. More specifically, the resin may be selected from polypropylene, epoxy resin, polyurethane, phenolic resin, urea-formaldehyde resin, melamine-formaldehyde resin, polyimide At least one of them. In this embodiment, the material of the second adhesive layer 70 is the same as the first adhesive layer 20.
  • the first circuit board 101 and the second circuit board 102 are pressed together, the first circuit board 101 and the second circuit board 102 are also surface-treated to form a circuit pattern.
  • a via 80 is also formed in the first circuit board 101 and the second circuit board 102 for use In subsequent steps, the electrical conduction between the first circuit board 101 and the second circuit board 102 and the first plating layer 50 is assisted.
  • the via hole 80 penetrates the first circuit board 101 / the second circuit board 102 and the second adhesive layer 70.
  • step S8 the structure shown in step S7 is surface-treated to obtain the embedded circuit board 100.
  • a second electroplating layer 90 is formed on the outside of the first circuit board 101 and the second circuit board 102, and at the same time, electrical conduction between the second electroplating layer 90 and the first electroplating layer 50 is achieved.
  • a conductive material is filled in the via hole 80 or electroplated to form a conductive structure 91, and the conductive structure 91 electrically charges the first circuit board 101, the second circuit board 102, and the second plating layer 90. Connected to the first plating layer 50.
  • a preferred embodiment of the present invention further provides an embedded circuit board 100, which at least includes an internal laminated structure 10, a first circuit board 101, a second circuit board 102, a third circuit board 103, The fourth circuit board 104, the first plating layer 50 and the second plating layer 90.
  • the third circuit board 103 and the fourth circuit board 104 are respectively disposed on both sides of the inner laminated structure 10.
  • the embedded circuit board 100 further includes a slot 40 that penetrates the third circuit board 103, the inner laminated structure 10 and the fourth circuit board 104.
  • the electronic component 200 is accommodated and fixed in the slot 40, and the electrodes 201 respectively face the inner sides of the slot 40 near both ends.
  • the first plating layer 50 is disposed on the outer sides of the third circuit board 103 and the fourth circuit board 104, and the inner surfaces of the slot 40 near both ends to electrically connect the third circuit board 103, The fourth circuit board 104, the inner laminated structure 10, and the electrode 201 of the electronic component 200.
  • the first circuit board 101 and the second circuit board 102 are respectively disposed on the outside of the first electroplating layer 50 and cover the opening of the slot 40 to bury the electronic component 200.
  • the second plating layer 90 is provided on the outside of the first circuit board 101 and the second circuit board 102, and electrically connects the first circuit board 101 and the second circuit board 102 to the first ⁇ plating layer 50.
  • the inner laminated structure 10 is a double-sided circuit board.
  • the inner laminated structure 10 may be a flexible circuit board (FPC), a rigid-flex combination board (Rigid-Flex) or a high density interconnection board (HDI).
  • the inner laminated structure 10 is a flexible circuit board and includes two layers of circuit boards.
  • the inner laminated structure 10 includes a flexible copper clad board 11 and fifth and sixth circuit boards 105 and 106 provided on both sides of the flexible copper clad board 11 respectively.
  • the flexible copper clad plate 11 is a double-sided substrate.
  • the fifth wiring board 105 and the sixth wiring board 106 respectively include a copper foil layer 12, an adhesive layer 13 (CVL-AD) and a base film 14 (CVL-PI).
  • the copper foil layer 12 is attached to one side of the base film 14 through the adhesive layer 13.
  • the copper foil layer 12 is pressed onto the flexible copper clad plate 11.
  • the two copper foil layers 12 are electrically connected to the first plating layer 50 respectively.
  • the material of the adhesive layer 13 is a resin having viscosity, and more specifically, the resin may be selected from polypropylene, epoxy resin, polyurethane, phenol resin, urea resin, melamine-formaldehyde resin and polyacryl At least one of imines and the like.
  • the material of the base film 14 may be selected from but not limited to polyimide (PI), liquid crystal polymer (LCP), and polyethylene terephthalate ( One of Polyethylene Terephthalate (PET) and Polyethylene Naphthalate (PEN).
  • PI polyimide
  • LCP liquid crystal polymer
  • PET Polyethylene Terephthalate
  • PEN Polyethylene Naphthalate
  • the number of circuit board layers of the inner laminated structure 10 can be designed according to actual needs. In other embodiments, the number of circuit board layers of the inner laminated structure 10 can also be four, six, or eight layers ... 2n floors, etc.
  • the inner laminated structure 10 is a rigid-flex combination board, which includes four layers of circuit boards.
  • the inner laminated structure 10 includes a flexible copper-clad board 11, a fifth circuit board 105 and a sixth circuit board 106 respectively provided on both sides of the flexible copper-clad board 11, and respectively provided on the fifth circuit
  • the seventh circuit board 107 and the eighth circuit board 108 are pressed onto the fifth circuit board 105 and the sixth circuit board 106 through the adhesive layer 13 respectively.
  • the fifth circuit board 105 and the sixth circuit board 106 are flexible boards
  • the seventh circuit board 107 and the eighth circuit board 108 are rigid boards.
  • the inner laminated structure 10 further includes a conductor 15 that realizes electrical conduction between the layers of circuit boards.
  • each circuit board of each layer of the inner laminated structure 10 is correspondingly provided with a filling hole 16, and the electrical conductor 15 fills the filling hole 16 to electrically conduct the circuit boards of each layer.
  • the filling hole 16 may be a blind hole or a through hole.
  • the third circuit board 103 and the fourth circuit board 104 are high-density interconnect boards (HDI boards).
  • the third circuit board 103 and the fourth circuit board 104 are respectively pressed to the two sides of the inner laminated structure 10 through the first adhesive layer 20.
  • the material of the first adhesive layer 20 is a resin with adhesiveness. More specifically, the resin can be selected from polypropylene, epoxy resin, polyurethane, phenolic resin, urea-formaldehyde resin, melamine-formaldehyde resin, polyimide, etc. At least one.
  • the slot 40 is formed by drilling and etching. In this embodiment, both ends of the slot 40 are semicircular, and the middle is rectangular.
  • the electrode 201 of the electronic component 200 is electrically connected to the first plating layer 50 through the conductive paste 60.
  • the conductive paste 60 may be any one of solder paste, silver paste, copper paste and the like.
  • the first circuit board 101 and the second circuit board 102 are high-density interconnection boards (HDI boards), and are respectively pressed to the first plating layer 50 through the second adhesive layer 70 on.
  • the first circuit board 101 and the second circuit board 102 respectively cover the opening of the slot 40 from two sides to bury the electronic component 200.
  • the material of the second adhesive layer 70 is a resin with viscosity. More specifically, the resin may be selected from polypropylene, epoxy resin, polyurethane, phenolic resin, urea-formaldehyde resin, melamine-formaldehyde resin, polyimide At least one of them. In this embodiment, the material of the second adhesive layer 70 is the same as the first adhesive layer 20.
  • the first circuit board 101 and the second circuit board 102 are also provided with via holes 80 respectively.
  • the via hole 80 penetrates the first circuit board 101 / the second circuit board 102 and the second adhesive layer 70.
  • the second electroplating layer 90 further includes a conductive structure 91 that fills the via 80 to connect the first circuit board 101, the second circuit board 102 and the second electroplating layer 90 It is electrically connected to the first plating layer 50.
  • the manufacturing method of the embedded circuit board 100 of the present invention is to embed the electronic component 200 by designing the slot holes 40 at both ends of the side walls to conduct, and utilize the The first plating layer 50 on the inner side of the hole 40 and the outer sides of the second third circuit board 103 and the fourth circuit board 104, and the first circuit board 101 and the The second plating layer 90 on the outer side of the second circuit board 102 realizes electrical conduction between the electronic component 200 and each layer of circuit boards, so that the embedded circuit board 100 can be externally exposed through any layer of circuit boards Anylayer design for electrical connection.
  • the manufacturing method of the embedded circuit board 100 of the present invention avoids printing the conductive paste 60 on the bottom of the electronic component 200, and avoids the thickness that the conductive paste 60 may occupy (about 40um), The light and thin effect of the embedded circuit board 100 is improved.

Abstract

本发明提供一种内埋式电路板的制作方法，包括：提供内层叠构(10)，其为双面线路板；提供第三线路板(103)和第四线路板(104)，并将其分别压合至内层叠构(10)的两侧；在上一步骤得到的结构上开设两个间隔的穿孔(30)；电镀第三线路板(103)和第四线路板(104)的外侧面以及穿孔(30)的内侧面，以形成第一电镀层(50)；去掉两个穿孔(30)之间的结构以形成以两个穿孔(30)为两端的槽孔(40)；将电子元件(200)收容并固定于槽孔(40)的中间部分，以使电子元件(200)的电极(201)分别朝向槽孔(40)的两端并电连接第一电镀层(50)；提供第一线路板(101)和第二线路板(102)，并将其分别压合至上一步骤得到的结构的两侧以埋设电子元件(200)；对上一步骤得到的结构进行表面处理以得到内埋式电路板(100)。本发明还提供一种由上述制作方法制作的内埋式电路板(100)。

Description

内埋式电路板及其制作方法 技术领域
本发明涉及一种电路板及其制作方法，尤其涉及一种内埋式电路板及其制作方法。
背景技术
近年来，电子产品被广泛应用在日常工作和生活中，轻、薄、小的电子产品越来越受到欢迎。柔性电路板作为电子产品的主要部件，其占据了电子产品的较大空间，因此柔性电路板的体积在很大程度上影响了电子产品的体积，大体积的柔性电路板势必难以符合电子产品轻、薄、短、小之趋势。
现有的内埋式电路板，利用元件贴装和再流焊的焊盘连接方式埋入工艺最为常见，即在基板线路制作后在焊盘上印刷锡膏，元件贴于锡膏表面，经IR炉流焊固化，再经叠板和压合实现元件内埋。但是，采用这种埋入工艺制作的内埋式电路板的元件通过表面安装技术固定于一面基板上，此种连接方式导致无法实现电路板的Anylayer导通；且元件底部锡膏焊接导通，锡膏占据一定厚度(40um左右)，不利于电路板的轻薄化。
发明内容
有鉴于此，有必要提供一种上述问题的内埋式电路板的制作方法，还提供一种上述制作方法制作的内埋式电路板。
一种内埋式电路板的制作方法，其包括以下步骤：
提供内层叠构，所述内层叠构为双面线路板；
提供第三线路板和第四线路板，并将所述第三线路板和所述第四线路板分别压合至所述内层叠构的两侧；
在上一步骤得到的结构上开设两个间隔的穿孔；
电镀所述第三线路板和所述第四线路板的外侧面以及所述穿孔的内侧面，以形成第一电镀层；
去掉两个所述穿孔之间的结构以形成以两个所述穿孔为两端的槽孔；
将电子元件收容并固定于所述槽孔的中间部分，以使所述电子元件的电极分别朝向所述槽孔的两端并电连接所述第一电镀层；
提供第一线路板和第二线路板，并将所述第一线路板和所述第二线路板分别压合至上一步骤得到的结构的两侧以埋设所述电子元件；
对上一步骤得到的结构进行表面处理以得到所述内埋式电路板。
一种内埋式电路板，至少包括内层叠构、第一线路板、第二线路板、第三线路板、第四线路板、第一电镀层和第二电镀层；所述第三线路板和所述第四线路板分别设于所述内层叠构的两侧，所述内埋式电路板还包括槽孔，所述槽孔贯穿所述第三线路板、所述内层叠构和所述第四线路板；电子元件收容并固定于所述槽孔内，且所述电子元件的电极分别朝向所述槽孔靠近两端的内侧面；所述第一电镀层设于所述第三线路板和所述第四线路板的外侧，以及所述槽孔的部分内侧面上，以电连接所述第三线路板、所述第四线路板、所述内层叠构和所述电子元件的电极；所述第一线路板和所述第二线路板分别设于所述第一电镀层的外侧，且覆盖所述槽孔的开口以埋设所述电子元件；所述第二电镀层设于所述第一线路板和所述第二线路板的外侧，且将所述第一线路板和所述第二线路板电连接至所述第一电镀层。
相较于现有技术，本发明的所述内埋式电路板的制作方法，通过设计两端侧壁导通的所述槽孔来埋设所述电子元件，利用设于所述槽孔的内侧面以及所述第二所述第三线路板和所述第四线路板的外侧面上的所述第一电镀层，以及设于所述第一线路板和所述第二线路板的外侧的第二电镀层，实现所述电子元件与各层线路板之间的电导通，从而实现所述内埋式电路板可以通过任意一层线路板对外电连接的Anylayer设计。
另外，本发明的所述内埋式电路板的制作方法，避免在所述电子元件的 底部印刷所述导电膏，免去了所述导电膏可能占据的厚度(40um左右)，提升了所述内埋式电路板的轻薄化效果。
附图说明
图1是本发明一较佳实施方式的内埋式电路板的制作流程图。
图2a是应用于图1中所示制作方法的内层叠构的剖视示意图。
图2b是另一实施方式中的内层叠构的剖视示意图。
图3是将第三线路板和第四线路板分别压合至图2a所示内层叠构两侧后的剖视示意图。
图4是在图3所示结构上开设两个穿孔后的剖视示意图。
图5为图4所示结构电镀后的剖视示意图。
图6a和图6b分别是图5所示结构在形成槽孔后的剖视示意图和俯视示意图。
图7是将电子元件固定于槽孔后的剖视示意图。
图8是将第一线路板和第二线路板压合至图7所示结构后的剖视示意图。
图9是依照图1中所示制作方法的得到的内埋式电路板的剖视示意图。
主要元件符号说明
内埋式电路板 100
第一线路板 101
第二线路板 102
第三线路板 103
第四线路板 104
第五线路板 105
第六线路板 106
第七线路板 107
第八线路板 108
电子元件 200
电极 201
内层叠构 10
挠性覆铜板 11
铜箔层 12
粘着层 13
底膜 14
导电体 15
填充孔 16
第一胶层 20
穿孔 30
槽孔 40
第一电镀层 50
导电膏 60
第二胶层 70
过孔 80
第二电镀层 90
导电结构 91
如下具体实施方式将结合上述附图进一步说明本发明。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
除非另有定义，本文所使用的所有的技术和科学术语与属于本发明的技术领域的技术人员通常理解的含义相同。本文中在本发明的说明书中所使用 的术语只是为了描述具体的实施例的目的，不是旨在于限制本发明。
下面结合附图，对本发明的一些实施方式作详细说明。在不冲突的情况下，下述的实施例及实施例中的特征可以相互组合。
请参见图1，本发明一较佳实施方式的内埋式电路板100的制作方法，其包括以下步骤：
S1提供内层叠构，所述内层叠构为双面线路板；
S2提供第三线路板和第四线路板，并将所述第三线路板和所述第四线路板分别压合至所述内层叠构的两侧；
S3在步骤S2得到的结构上开设两个间隔的穿孔；
S4；电镀所述第三线路板和所述第四线路板的外侧面以及所述穿孔的内侧壁，以形成第一电镀层；
S5去掉两个所述穿孔之间的结构以形成以两个所述穿孔为两端的槽孔；
S6将电子元件收容并固定于所述槽孔的中间部分，以使所述电子元件的电极分别朝向所述槽孔的两端并电连接所述第一电镀层；
S7提供第一线路板和第二线路板，并将所述第一线路板和所述第二线路板分别压合至步骤S6得到的结构的两侧以埋设所述电子元件；
S8对步骤S7得到的结构进行表面处理。
图2a至图9示意了所述内埋式电路板100的制作过程。具体地：
如图2a所示，在步骤S1中，提供内层叠构10，所述内层叠构10为双面线路板。所述内层叠构10可以是软性电路板(FPC)、刚挠结合板(Rigid-Flex)或高密度互连板(HDI)。
在本实施方式中，所述内层叠构10为软性电路板，且包括两层线路板。具体地，所述内层叠构10包括挠性覆铜板11，以及分别设于所述挠性覆铜板11两侧的第五线路板105和第六线路板106。所述挠性覆铜板11为双面基板。所述第五线路板105和所述第六线路板106分别包括铜箔层12、粘着层13(CVL-AD)和底膜14(CVL-PI)。所述铜箔层12通过所述粘着层13 附着于所述底膜14的一侧。所述铜箔层12压合至所述挠性覆铜板11上。
可以理解地，在压合所述铜箔层12之前，还包括对所述铜箔层12进行处理以形成电路图案。
在本实施方式中，所述粘着层13材质为具有粘性的树脂，更具体的，所述树脂可选自聚丙烯、环氧树脂、聚氨酯、酚醛树脂、脲醛树脂、三聚氰胺-甲醛树脂以及聚酰亚胺等中的至少一种。
在本实施方式中，所述底膜14的材质可选自但不仅限于聚酰亚胺(polyimide，PI)、液晶聚合物(liquid crystal polymer，LCP)、聚对苯二甲酸乙二醇酯(Polyethylene Terephthalate，PET)以及聚萘二甲酸乙二醇酯(Polyethylene Naphthalate，PEN)等中的一种。
可以理解地，所述内层叠构10的线路板层数可以根据实际需要进行设计，在其它实施方式中，所述内层叠构10的线路板层数也可以为四层、六层、八层......2n层等。
请参见图2b，在另一实施方式中，所述内层叠构10为刚挠结合板，其包括四层线路板。具体地，所述内层叠构10包括挠性覆铜板11，分别设于所述挠性覆铜板11两侧的第五线路板105和第六线路板106，以及分别设于所述第五线路板105和所述第六线路板106外侧的第七线路板107和第八线路板108。所述第七线路板107和所述第八线路板108分别通过粘着层13压合至所述第五线路板105和所述第六线路板106上。其中，所述第五线路板105和所述第六线路板106为软板，所述第七线路板107和所述第八线路板108为硬板。
在另一实施方式中，所述内层叠构10还包括实现各层线路板之间电导通的导电体15。具体地，所述内层叠构10的各层线路板上对应设有填充孔16，所述导电体15填充所述填充孔16以电导通各层线路板。所述填充孔16可为盲孔或通孔。
如图3所示，在步骤S2中，提供第三线路板103和第四线路板104，并 将所述第三线路板103和所述第四线路板104分别压合至所述内层叠构10的两侧。
在本实施方式中，所述第三线路板103和所述第四线路板104为高密度互连板(HDI板)。所述第三线路板103和所述第四线路板104分别通过第一胶层20压合至所述内层叠构10的两侧。
第一胶层20的材质为具有粘性的树脂，更具体的，所述树脂可选自聚丙烯、环氧树脂、聚氨酯、酚醛树脂、脲醛树脂、三聚氰胺-甲醛树脂以及聚酰亚胺等中的至少一种。
可以理解地，在压合所述第三线路板103和所述第四线路板104之前，还包括对所述第三线路板103和所述第四线路板104进行处理以形成电路图案。
如图4所示，在步骤S3中，开设两个间隔的穿孔30。所述穿孔30可以通过开钻蚀刻等方式形成。在本实施方式中，所述穿孔30为圆形孔。
如图5所示，在步骤S4中，电镀所述第三线路板103和所述第四线路板104的外侧面以及两个所述穿孔30的内侧，以形成第一电镀层50。所述第六线路板106、所述第五线路板105、所述第四线路板104和所述第三线路板103分别与所述第一电镀层50电连接。
如图6a和图6b所示，在步骤S5中，去掉两个所述穿孔30之间的结构以形成以两个所述穿孔30为两端的槽孔40。具体地，两个所述穿孔30之间的结构可以通过开钻蚀刻等方式去除。在本实施方式中，所述槽孔40的两端分别呈半圆形。
如图7所示，在步骤S6中，将电子元件200收容并固定于所述槽孔40的中间部分，以使所述电子元件200的电极201分别朝向所述槽孔40的两端并电连接所述第一电镀层50。
具体地，将所述电子元件200，如电容，放置于所述槽孔40的中间部分，在所述槽孔40和所述电子元件200之间印刷导电膏60，最后烘干所述导电 膏60以固定所述电子元件200。所述导电膏60电连接所述电子元件200的电极201和所述第一电镀层50。所述导电膏60可以是锡膏、银膏、铜膏等的任意一种。
如图8所示，在步骤S7中，提供第一线路板101和第二线路板102，并将所述第一线路板101和所述第二线路板102分别压合至步骤S6所示结构的两侧以埋设所述电子元件200。
在本实施方式中，所述第一线路板101和所述第二线路板102为高密度互连板(HDI板)，且分别通过第二胶层70压合至所述第一电镀层50上。所述第一线路板101和所述第二线路板102上分别从两侧遮盖所述槽孔40的开口以埋设所述电子元件200。
所述第二胶层70的材质为具有粘性的树脂，更具体的，所述树脂可选自聚丙烯、环氧树脂、聚氨酯、酚醛树脂、脲醛树脂、三聚氰胺-甲醛树脂以及聚酰亚胺等中的至少一种。在本实施方式中，所述第二胶层70的材质和所述第一胶层20相同。
可以理解地，在压合所述第一线路板101和所述第二线路板102之前，还包括对所述第一线路板101和所述第二线路板102进行表面处理以形成电路图案。
可以理解地，在压合所述第一线路板101和所述第二线路板102后，还包括在所述第一线路板101和所述第二线路板102上形成过孔80，以用于在后续步骤中辅助完成所述第一线路板101以及所述第二线路板102与所述第一电镀层50之间的电导通。所述过孔80贯穿所述第一线路板101/所述第二线路板102和所述第二胶层70。
如图9所示，在步骤S8中，对步骤S7所示结构进行表面处理以得到内埋式电路板100。
具体地，在所述第一线路板101和第二线路板102的外侧形成第二电镀层90，并同时实现所述第二电镀层90与所述第一电镀层50的电导通。具体 地，在所述过孔80内填充导电材料或电镀形成导电结构91，所述导电结构91将所述第一线路板101、所述第二线路板102和所述第二电镀层90电连接至所述第一电镀层50。
请再次参见图9，本发明一较佳实施方式还提供一种内埋式电路板100，其至少包括内层叠构10、第一线路板101、第二线路板102、第三线路板103、第四线路板104、第一电镀层50和第二电镀层90。所述第三线路板103和所述第四线路板104分别设于所述内层叠构10的两侧。所述内埋式电路板100还包括槽孔40，所述槽孔40贯穿所述第三线路板103、所述内层叠构10和所述第四线路板104。电子元件200收容并固定于所述槽孔40内，且其电极201分别朝向所述槽孔40靠近两端的内侧面。所述第一电镀层50设于所述第三线路板103和所述第四线路板104的外侧，以及所述槽孔40靠近两端的内侧面，以电连接所述第三线路板103、所述第四线路板104、所述内层叠构10和所述电子元件200的电极201。所述第一线路板101和所述第二线路板102分别设于所述第一电镀层50的外侧，且覆盖所述槽孔40的开口以埋设所述电子元件200。所述第二电镀层90设于所述第一线路板101和所述第二线路板102的外侧，且将所述第一线路板101和所述第二线路板102电连接至所述第一电镀层50。
所述内层叠构10为双面线路板。所述内层叠构10可以是软性电路板(FPC)、刚挠结合板(Rigid-Flex)或高密度互连板(HDI)。在本实施方式中，所述内层叠构10为软性电路板，且包括两层线路板。具体地，所述内层叠构10包括挠性覆铜板11，以及分别设于所述挠性覆铜板11两侧的第五线路板105和第六线路板106。所述挠性覆铜板11为双面基板。所述第五线路板105和所述第六线路板106分别包括铜箔层12、粘着层13(CVL-AD)和底膜14(CVL-PI)。所述铜箔层12通过所述粘着层13附着于所述底膜14的一侧。所述铜箔层12压合至所述挠性覆铜板11上。两个所述铜箔层12分别与所述第一电镀层50电导通。
在本实施方式中，所述粘着层13材质为具有粘性的树脂，更具体的，所述树脂可选自聚丙烯、环氧树脂、聚氨酯、酚醛树脂、脲醛树脂、三聚氰胺-甲醛树脂以及聚酰亚胺等中的至少一种。
在本实施方式中，所述底膜14的材质可选自但不仅限于聚酰亚胺(polyimide，PI)、液晶聚合物(liquid crystal polymer，LCP)、聚对苯二甲酸乙二醇酯(Polyethylene Terephthalate，PET)以及聚萘二甲酸乙二醇酯(Polyethylene Naphthalate，PEN)等中的一种。
可以理解地，所述内层叠构10的线路板层数可以根据实际需要进行设计，在其它实施方式中，所述内层叠构10的线路板层数也可以为四层、六层、八层......2n层等。
在另一实施方式中，如图2b所示，所述内层叠构10为刚挠结合板，其包括四层线路板。具体地，所述内层叠构10包括挠性覆铜板11，分别设于所述挠性覆铜板11两侧的第五线路板105和第六线路板106，以及分别设于所述第五线路板105和所述第六线路板106外侧的第七线路板107和第八线路板108。所述第七线路板107和所述第八线路板108分别通过粘着层13压合至所述第五线路板105和所述第六线路板106上。其中，所述第五线路板105和所述第六线路板106为软板，所述第七线路板107和所述第八线路板108为硬板。
在另一实施方式中，所述内层叠构10还包括实现各层线路板之间电导通的导电体15。具体地，所述内层叠构10的各层线路板上对应设有填充孔16，所述导电体15填充所述填充孔16以电导通各层线路板。所述填充孔16可为盲孔或通孔。
请再次参见图9，在本实施方式中，所述第三线路板103和所述第四线路板104为高密度互连板(HDI板)。所述第三线路板103和所述第四线路板104分别通过第一胶层20压合至所述内层叠构10的两侧。
第一胶层20的材质为具有粘性的树脂，更具体的，所述树脂可选自聚丙 烯、环氧树脂、聚氨酯、酚醛树脂、脲醛树脂、三聚氰胺-甲醛树脂以及聚酰亚胺等中的至少一种。
所述槽孔40通过开钻蚀刻等方式形成。在本实施方式中，所述槽孔40的两端呈半圆形，中间呈长方形。所述电子元件200的电极201通过导电膏60电连接所述第一电镀层50。所述导电膏60可以是锡膏、银膏、铜膏等的任意一种。
在本实施方式中，所述第一线路板101和所述第二线路板102为高密度互连板(HDI板)，且分别通过第二胶层70压合至所述第一电镀层50上。所述第一线路板101和所述第二线路板102上分别从两侧遮盖所述槽孔40的开口以埋设所述电子元件200。
所述第二胶层70的材质为具有粘性的树脂，更具体的，所述树脂可选自聚丙烯、环氧树脂、聚氨酯、酚醛树脂、脲醛树脂、三聚氰胺-甲醛树脂以及聚酰亚胺等中的至少一种。在本实施方式中，所述第二胶层70的材质和所述第一胶层20相同。
所述第一线路板101和所述第二线路板102上还分别设有过孔80。所述过孔80贯穿所述第一线路板101/所述第二线路板102和所述第二胶层70。所述第二电镀层90还包括导电结构91，所述导电结构91填充所述过孔80，以将所述第一线路板101、所述第二线路板102和所述第二电镀层90电连接至所述第一电镀层50。
相较于现有技术，本发明的所述内埋式电路板100的制作方法，通过设计两端侧壁导通的所述槽孔40来埋设所述电子元件200，利用设于所述槽孔40的内侧面以及所述第二所述第三线路板103和所述第四线路板104的外侧面上的所述第一电镀层50，以及设于所述第一线路板101和所述第二线路板102的外侧的第二电镀层90，实现所述电子元件200与各层线路板之间的电导通，从而实现所述内埋式电路板100可以通过任意一层线路板对外电连接的Anylayer设计。
另外，本发明的所述内埋式电路板100的制作方法，避免在所述电子元件200的底部印刷所述导电膏60，免去了所述导电膏60可能占据的厚度(40um左右)，提升了所述内埋式电路板100的轻薄化效果。
以上所述，仅是本发明的较佳实施方式而已，并非对本发明任何形式上的限制，虽然本发明已是较佳实施方式揭露如上，并非用以限定本发明，任何熟悉本专业的技术人员，在不脱离本发明技术方案范围内，当可利用上述揭示的技术内容做出些许更动或修饰为等同变化的等效实施方式，但凡是未脱离本发明技术方案内容，依据本发明的技术实质对以上实施方式所做的任何简单修改、等同变化与修饰，均仍属于本发明技术方案的范围内。

Claims (11)

  1. 一种内埋式电路板的制作方法，其包括以下步骤：
    提供内层叠构，所述内层叠构为双面线路板；
    提供第三线路板和第四线路板，并将所述第三线路板和所述第四线路板分别压合至所述内层叠构的两侧；
    在上一步骤得到的结构上开设两个间隔的穿孔；
    电镀所述第三线路板和所述第四线路板的外侧面以及所述穿孔的内侧面，以形成第一电镀层；
    去掉两个所述穿孔之间的结构以形成以两个所述穿孔为两端的槽孔；
    将电子元件收容并固定于所述槽孔的中间部分，以使所述电子元件的电极分别朝向所述槽孔的两端并电连接所述第一电镀层；
    提供第一线路板和第二线路板，并将所述第一线路板和所述第二线路板分别压合至上一步骤得到的结构的两侧以埋设所述电子元件；
    对上一步骤得到的结构进行表面处理以得到所述内埋式电路板。
  2. 如权利要求1所述的内埋式电路板的制作方法，其特征在于，所述内层叠构包括挠性覆铜板，以及分别设于所述挠性覆铜板两侧的第五线路板和第六线路板，所述第五线路板和所述第六线路板分别与所述第一电镀层电导通，所述第五线路板和所述第六线路板分别包括铜箔层、粘着层和底膜，所述铜箔层通过所述粘着层附着于所述底膜的一侧，所述铜箔层压合至所述挠性覆铜板上。
  3. 如权利要求1所述的内埋式电路板的制作方法，其特征在于，所述内层叠构包括挠性覆铜板，分别设于所述挠性覆铜板两侧的第五线路板和第六线路板，以及分别设于所述第五线路板和所述第六线路板外侧的第七线路板和第八线路板，所述第七线路板和所述第八线路板分别通过粘着层压合至所述第五线路板和所述第六线路板上；所述内层叠构还包括实现各层线路板之间电导通的导电体，所述内层叠构的各层线路板上对应设有填充孔，所述导 电体填充所述填充孔以电导通各层线路板。
  4. 如权利要求1所述的内埋式电路板的制作方法，其特征在于，所述第三线路板和所述第四线路板分别通过第一胶层压合至所述内层叠构的两侧，且分别与所述第一电镀层电导通，所述第一线路板和所述第二线路板分别通过第二胶层压合至所述第一电镀层上以埋设所述电子元件。
  5. 如权利要求1所述的内埋式电路板的制作方法，其特征在于，所述电子元件的电极通过印刷于所述槽孔的内侧面和所述电子元件的电极之间的导电膏电连接至所述第一电镀层。
  6. 一种内埋式电路板，其特征在于，所述内埋式电路板至少包括内层叠构、第一线路板、第二线路板、第三线路板、第四线路板、第一电镀层和第二电镀层；所述第三线路板和所述第四线路板分别设于所述内层叠构的两侧，所述内埋式电路板还包括槽孔，所述槽孔贯穿所述第三线路板、所述内层叠构和所述第四线路板；电子元件收容并固定于所述槽孔内，且所述电子元件的电极分别朝向所述槽孔靠近两端的内侧面；所述第一电镀层设于所述第三线路板和所述第四线路板的外侧，以及所述槽孔的部分内侧面上，以电连接所述第三线路板、所述第四线路板、所述内层叠构和所述电子元件的电极；所述第一线路板和所述第二线路板分别设于所述第一电镀层的外侧，且覆盖所述槽孔的开口以埋设所述电子元件；所述第二电镀层设于所述第一线路板和所述第二线路板的外侧，且将所述第一线路板和所述第二线路板电连接至所述第一电镀层。
  7. 如权利要求6所述的内埋式电路板，其特征在于，所述槽孔的两端呈半圆形，中间呈长方形，所述第一电镀层部分设于所述槽孔靠近两端的内侧面上，所述槽孔的靠近两端的内侧面和所述电子元件的电极之间设有导电膏，以电连接所述电子元件的电极和所述第一电镀层。
  8. 如权利要求6所述的内埋式电路板，其特征在于，所述内层叠构包括挠性覆铜板，以及分别设于所述挠性覆铜板两侧的第五线路板和第六线路板， 所述第五线路板和所述第六线路板分别与所述第一电镀层电导通，所述第五线路板和所述第六线路板分别包括铜箔层、粘着层和底膜，所述铜箔层通过所述粘着层附着于所述底膜的一侧，所述铜箔层压合至所述挠性覆铜板上。
  9. 如权利要求6所述的内埋式电路板，其特征在于，所述内层叠构包括挠性覆铜板，分别设于所述挠性覆铜板两侧的第五线路板和第六线路板，以及分别设于所述第五线路板和所述第六线路板外侧的第七线路板和第八线路板，所述第七线路板和所述第八线路板分别通过粘着层压合至所述第五线路板和所述第六线路板上；所述内层叠构还包括实现各层线路板之间电导通的导电体，所述内层叠构的各层线路板上对应设有填充孔，所述导电体填充所述填充孔以电导通各层线路板。
  10. 如权利要求6所述的内埋式电路板，其特征在于，所述第三线路板和所述第四线路板分别通过第一胶层压合至所述内层叠构的两侧，且分别与所述第一电镀层电导通，所述第一线路板和所述第二线路板分别通过第二胶层压合至所述第一电镀层上，以埋设所述电子元件。
  11. 如权利要求10所述的内埋式电路板，其特征在于，所述第一线路板和所述第二线路板上还分别设有过孔，所述过孔贯穿所述第一线路板/所述第二线路板和所述第二胶层，所述第二电镀层还包括导电结构，所述导电结构填充所述过孔，以将所述第一线路板、所述第二线路板和所述第二电镀层电连接至所述第一电镀层。
PCT/CN2018/110153 2018-10-12 2018-10-12 内埋式电路板及其制作方法 WO2020073344A1 (zh)

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