WO2020071308A1 - サセプタ - Google Patents

サセプタ

Info

Publication number
WO2020071308A1
WO2020071308A1 PCT/JP2019/038492 JP2019038492W WO2020071308A1 WO 2020071308 A1 WO2020071308 A1 WO 2020071308A1 JP 2019038492 W JP2019038492 W JP 2019038492W WO 2020071308 A1 WO2020071308 A1 WO 2020071308A1
Authority
WO
WIPO (PCT)
Prior art keywords
susceptor
wafer
pocket
contact
contact portion
Prior art date
Application number
PCT/JP2019/038492
Other languages
English (en)
French (fr)
Inventor
貴宏 池尻
Original Assignee
東洋炭素株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 東洋炭素株式会社 filed Critical 東洋炭素株式会社
Priority to CN201980065073.XA priority Critical patent/CN112789719A/zh
Priority to EP19868808.7A priority patent/EP3863043A4/en
Priority to US17/282,095 priority patent/US20210375663A1/en
Priority to JP2020550416A priority patent/JPWO2020071308A1/ja
Priority to KR1020217011895A priority patent/KR20210066851A/ko
Publication of WO2020071308A1 publication Critical patent/WO2020071308A1/ja

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68735—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge profile or support profile
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4581—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber characterised by material of construction or surface finish of the means for supporting the substrate
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4582—Rigid and flat substrates, e.g. plates or discs
    • C23C16/4583—Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4582—Rigid and flat substrates, e.g. plates or discs
    • C23C16/4583—Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally
    • C23C16/4584—Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally the substrate being rotated
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4582—Rigid and flat substrates, e.g. plates or discs
    • C23C16/4583—Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally
    • C23C16/4585—Devices at or outside the perimeter of the substrate support, e.g. clamping rings, shrouds
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/46—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for heating the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67103—Apparatus for thermal treatment mainly by conduction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/6875—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of individual support members, e.g. support posts or protrusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68771—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by supporting more than one semiconductor substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68785—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by the mechanical construction of the susceptor, stage or support

Definitions

  • the present invention relates to a susceptor used for manufacturing a semiconductor.
  • a susceptor used for manufacturing a semiconductor needs to be uniformly heated by applying conduction heat and radiant heat to a wafer in order to form a thin film crystal layer having a uniform thickness by performing epitaxial growth.
  • the conductive heat is applied to the wafer placed in the pocket of the susceptor from the portion in contact with the pocket, the temperature of the wafer between the outer peripheral portion in contact with the pocket and the central portion not in contact with the pocket is increased.
  • JP 2013-138224 A Japanese Unexamined Patent Publication
  • the present inventors have examined that the wafer carrier described in Patent Literature 1 has a support portion that supports a wafer placed in a pocket and a contact portion that is in contact with the side surface of the wafer adjacent to the support portion. It has been found that the conductive heat is easily applied locally to the wafer because it is formed. Therefore, it has been found that there is a problem that a temperature difference occurs in the wafer between the outer peripheral portion in contact with the pocket and the central portion not in contact with the pocket, and the yield of semiconductor chips is reduced.
  • the present invention includes the following inventions ⁇ 1> to ⁇ 3>.
  • a susceptor including a pocket for mounting a wafer, wherein at least one of the pockets includes a plurality of support portions for supporting the wafer, a plurality of contact portions for contacting the side surface of the wafer, and a wafer.
  • a plurality of non-contact portions that do not contact the side surface are provided, and the contact portions and the non-contact portions are formed alternately on the inner peripheral wall of the pocket, and at least two of the support portions are formed when the susceptor is viewed from above.
  • a susceptor formed on a line connecting the center of the pocket and the non-contact portion.
  • ⁇ 2> The susceptor according to ⁇ 1>, wherein one contact portion has a circumferential length of 2 mm or more.
  • ⁇ 3> The susceptor according to ⁇ 1> or ⁇ 2>, wherein the ratio of the total length of the plurality of contact portions in the circumferential direction of the pocket is 1.5 to 50%.
  • a contact portion and a non-contact portion are alternately formed on the inner peripheral wall of the pocket on the susceptor, and are formed on a line connecting the center of the pocket and the non-contact portion when the susceptor is viewed from above. At least two of the supports are formed. Therefore, the quality of the wafer is improved because a temperature difference is hardly generated between the outer peripheral portion in contact with the pocket and the central portion not in contact with the pocket. Therefore, it is possible to provide a susceptor capable of improving the yield of semiconductor chips manufactured from a wafer.
  • the plurality of contact portions and the plurality of non-contact portions are alternately formed on the inner peripheral wall of the pocket, stress concentration due to centrifugal force on the contact portion (collision portion) with the wafer placed in the pocket is reduced. Reduce. Therefore, it is possible to provide a susceptor having a long life, in which the susceptor and the wafer are unlikely to chip (break).
  • FIGS. 1A and 1B are schematic plan views illustrating an example of a susceptor according to an embodiment of the present invention. It is a figure which shows one (Example 1, Comparative Example 1, 2) of the pocket formed in the said susceptor, (a) is a schematic plan view of the said pocket, (b) is (a) 3 is a sectional view taken along line AA of FIG. It is a figure which shows the principal part of the said pocket (Example 1), (a)-(c) is a schematic plan view of a support part, (d)-(f) is a schematic sectional drawing of a contact part. is there.
  • FIG. 3 is a sectional view taken along line A of FIG.
  • a susceptor according to one embodiment of the present invention is a susceptor having a pocket for mounting a wafer, at least one of the pockets being in contact with a plurality of support portions for supporting the wafer and a side surface of the wafer.
  • a plurality of contact portions, and a plurality of non-contact portions that do not contact the side surface of the wafer, the contact portion and the non-contact portion are formed alternately on the inner peripheral wall of the pocket, at least two of the support portion, When viewed from above, the susceptor is formed on a line connecting the center of the pocket and the non-contact portion.
  • a disk-shaped susceptor (also referred to as a “pedestal”, a “substrate support”, a “wafer carrier”) 1 is attached to a manufacturing apparatus such as an MOCVD apparatus used for manufacturing a semiconductor. And is formed of a carbon-based material such as high-purity isotropic graphite or sintered silicon carbide. Specifically, for example, a susceptor in which high-purity isotropic graphite is coated with SiC on its surface is preferable.
  • the diameter of the susceptor 1 is not particularly limited because it is appropriately set according to the semiconductor manufacturing apparatus.
  • the susceptor 1 places a semiconductor wafer (hereinafter, simply referred to as a wafer) such as a sapphire wafer, a gallium nitride wafer, or a silicon wafer in a semiconductor manufacturing process, and heats and rotates in a horizontal direction to form a thin film on the surface of the wafer. It is used for epitaxially growing and stacking crystal layers.
  • the susceptor 1 is also used when performing surface modification for forming an oxide layer or a nitride layer on the surface of the wafer, surface cleaning for removing contaminants attached to the surface of the wafer, or annealing.
  • At least one or a plurality of pockets (also referred to as “recesses”, “counterbore”) 2 are formed on the upper surface of the susceptor 1, and a wafer is placed in the pocket 2 to perform various processes.
  • a heating device such as a heater for heating the susceptor 1 and a high-frequency induction coil is provided below the susceptor 1.
  • the number and arrangement of the pockets 2 and the arrangement of the heating device are designed so that the susceptor 1 can uniformly heat all the wafers to be mounted.
  • the number and arrangement of the pockets 2 may be determined according to the size of the susceptor 1 and the wafer so that the largest number of pockets 2 are formed, and are not particularly limited. Therefore, the number, arrangement, and size (size) of the pockets 2 formed in the susceptor 1 shown in FIG. 1 are merely examples.
  • the diameter ( ⁇ ) of the pocket 2 refers to the diameter of the inner peripheral wall of the portion where the contact portion 4 is formed (not the diameter of the inner peripheral wall of the portion where the non-contact portion 5 is formed).
  • the diameter of the pocket 2 is 100, the diameter of the smallest wafer 10 placed in the pocket 2 is usually 98 or more and less than 100. If the diameter of the wafer 10 is less than 98, chipping (chipping) of the susceptor 1 or the wafer 10 due to collision may easily occur when the susceptor 1 starts or stops rotating.
  • the term “inner peripheral wall” simply refers to the inner peripheral wall of the portion where the contact portion 4 is formed.
  • the plurality of pockets 2 have a substantially circular shape when the susceptor 1 is viewed from above, and may be formed independently of each other as shown in FIG. As shown, they may be formed to communicate with each other.
  • the pockets 2 are formed by increasing or decreasing the depth of each pocket 2 in consideration of the gas flow and the temperature distribution when the wafer is placed.
  • At least one of the pockets 2 includes a plurality of support portions 3 that support the wafer 10, a plurality of contact portions 4 that contact the side surface 10 a of the wafer 10, and the A plurality of non-contact portions 5 that do not contact the side surface 10a are provided.
  • the contact portions 4 and the non-contact portions 5 are alternately formed on the inner peripheral wall of the pocket 2, and at least two of the support portions 3 are in contact with the center O of the pocket 2 when the susceptor 1 is viewed from above. It is formed on a line connecting the contact portion 5.
  • the number and arrangement of the support portions 3, the contact portions 4, and the non-contact portions 5 may be determined as appropriate according to the formation position of the pocket 2 in the susceptor 1, the position of the heating device, and the like, and are not particularly limited. Therefore, the pocket 2 (Embodiment 1) shown in FIG. 2 in which the support portion 3, the contact portion 4, and the non-contact portion 5 are arranged at equal intervals of six each is merely an example.
  • a plurality of support portions (also referred to as “tabs”) 3 are formed on one susceptor 1, and support the wafer 10 placed in the pocket 2 in contact with the lower surface of the wafer 10. .
  • the number of the support portions 3 is not particularly limited as long as it is at least three so that the mounted wafer 10 can be stably supported.
  • the height of the support portion 3 from the bottom surface 2a of the pocket 2 may be such that the radiant heat from the bottom surface 2a is appropriately applied to the wafer 10 in consideration of the warpage of the wafer 10, for example, from 0.02 to The distance may be within a range of 1.5 mm, preferably within a range of 0.02 to 0.5 mm.
  • the height of the support portion 3 from the bottom surface 2a of the pocket 2 may be any height as long as the wafer 10 does not contact the bottom portion 2a, and is not particularly limited.
  • the contact area between the support portion 3 and the wafer 10 is such that the wafer 10 is stably supported by the support portion 3 and the support portion 3 also has conductive heat, so that the conductive heat from the support portion 3 is as small as possible.
  • the area is not particularly limited as long as it is an area.
  • the shape of the support portion 3 is not particularly limited, although there are various shapes such as a mountain shape as shown in FIGS. 3 (a) to 3 (c).
  • the support portion 3 protrudes from the bottom surface 2a and is formed in contact with the non-contact portion 5, but does not contact the non-contact portion 5 and is formed in the pocket 2.
  • the contact portion 4 forms an inner peripheral wall of the pocket 2 and contacts the side surface 10a of the wafer 10 at least when the susceptor 1 rotates, and preferably makes surface contact with the side surface 10a of the wafer 10. That is, in the pocket 2, the contact portion 4 and the side surface 10a of the wafer 10 placed in the pocket 2 come into contact, and preferably come into surface contact.
  • surface contact includes a state of substantially surface contact. More specifically, with reference to the diameter of the pocket 2 (the diameter of the inner peripheral wall of the portion where the contact portion 4 is formed), an arbitrary point on the contact portion 4 that is in contact with the wafer 10 and the pocket 2 are placed.
  • the minimum distance from the side surface 10a of the wafer 10 to be measured is from 0 (a state in which the contact portion 4 is in physical contact with the side surface 10a of the wafer 10) to 2% or less of the diameter, preferably 1%. Refers to the state approaching the following distance. Therefore, it is not necessary for the contact portion 4 to physically contact the side surface 10 a of the wafer 10 over the entire contact portion 4.
  • the circumferential length of one contact portion 4 (the circumferential length when the pocket 2 is viewed from above) is 2 mm or more in order to reduce stress concentration due to centrifugal force on the contact portion of the wafer 10.
  • the number of the contact portions 4 and the circumferential length of each contact portion 4 may be set so as to make the temperature of the wafer 10 uniform, and are not particularly limited.
  • the ratio of the total length of the plurality of contact portions 4 in the circumferential direction to the circumference of the pocket 2 (the circumference of the circle where the contact portions 4 are formed) is 1.5 to 50%. Preferably, there is.
  • the cross-sectional shape of the inner peripheral wall of the pocket 2 where the contact portion 4 is formed may be vertical from the bottom surface 2a upward.
  • an inclination may be provided so as to expand upward from the bottom surface 2a, and as shown in (f) of FIG. It may be provided.
  • the angle of the inclination is preferably about ⁇ 10 ° to 10 °, where 0 ° is defined when the inner peripheral wall is formed vertically upward from the bottom surface 2a.
  • the non-contact portion 5 is formed at a position on the inner peripheral wall of the pocket 2 adjacent to the position where the support portion 3 is formed. Therefore, the contact portion 4 is not formed where the support portion 3 is formed. For this reason, in the pocket 2, since the support portion 3 and the contact portion 4 are not formed adjacent to each other, the conduction heat is not locally applied to the wafer 10.
  • the non-contact portion 5 is separated from the wafer 10 so that the conductive heat from the non-contact portion 5 does not affect the wafer 10. That is, the non-contact portion 5 may be formed at a position farther from the center O of the pocket 2 than the contact portion 4.
  • the non-contact portion 5 may be formed at a position that is not adjacent to the position where the support portion 3 is formed (where the support portion 3 is not formed), if necessary, to divide the contact portion 4 or the like. .
  • the communicating portion a when the plurality of pockets 2 communicate with each other, the communicating portion a also corresponds to the non-contact portion, and the supporting portion 3 is formed in the communicating portion a. It does not need to be done.
  • the pocket 2 only needs to have a plurality of portions where the support portion 3, the contact portion 4, and the non-contact portion 5 are formed in the arrangement according to the present embodiment. That is, the pocket 2 according to the present embodiment may have a portion where the support portion, the contact portion, and the non-contact portion are formed in the conventional arrangement. Furthermore, when a plurality of pockets 2 are provided in the susceptor 1, at least one pocket 2 according to the present embodiment may be formed in the susceptor 1. That is, the susceptor 1 in which at least one pocket 2 according to the present embodiment is formed may have a conventional number and arrangement of pockets in which support portions, contact portions, and non-contact portions are formed. Good.
  • a susceptor including a plurality of pockets 2 for mounting the wafer 10 and at least one of the pockets 2 including the support portion 3, the contact portion 4, and the non-contact portion 5 having the above-described configuration is also applicable to the present invention. Included in the form.
  • the susceptor according to one embodiment of the present invention is used for manufacturing a semiconductor.
  • the semiconductor manufacturing apparatus includes a chamber having an exhaust port, a susceptor accommodated in the chamber, a source gas supply device for supplying a source gas into the chamber, a carrier gas supply device for supplying a carrier gas into the chamber, and a susceptor rotating. At least a rotating device and a chamber heating device for heating the inside of the chamber are provided.
  • the semiconductor manufacturing apparatus manufactures a semiconductor by forming a thin film crystal layer on a surface of a wafer placed on the susceptor and rotating the susceptor while rotating the susceptor. That is, the semiconductor is manufactured by rotating the susceptor, heating the wafer placed on the susceptor, forming a thin film crystal layer on the surface, and stacking the thin film crystal layer.
  • the wafers subjected to various processes by the above manufacturing apparatus are formed into chips and packages (modules) to form semiconductor devices, for example, various products such as LEDs.
  • the support portion 3, the contact portion 4, and the non-contact portion 5 described in the first embodiment are formed at equal intervals in the pocket 2 (for example, so that the pocket 2 is line-symmetric or point-symmetric when viewed from above).
  • the number, arrangement, and size of the wafers 10 can be uniformly applied according to the formation positions of the pockets 2 in the susceptor 1, the positions of the heating devices, and the like. (Length) is set as appropriate. Therefore, when a plurality of pockets 2 are provided in the susceptor 1, the number, arrangement, and size (length) of the support portions 3, the contact portions 4, and the non-contact portions 5 of each pocket 2 are different from each other. May be.
  • a pocket 2 (FIG. 2) in which six (even) support portions 3, contact portions 4, and non-contact portions 5 are arranged at equal intervals is used for describing the first embodiment.
  • Example 1 is only an example.
  • as a modified example (pattern) of the pocket 2 for example, as shown in FIG. 4, there are five support portions 3, contact portions 4, and five non-contact portions 5 ( (Odd number), two pockets 2 (Modification 1), six supporting portions 3, contact portions 4, and non-contact portions 5, each of which is arranged at a non-equal interval (Modification 2).
  • various other examples are possible.
  • Example 1 pockets 2 shown in FIGS. 2A and 2B, which are independently formed pockets, were formed in the susceptor. That is, it is a susceptor in which the surface of high-purity isotropic graphite is coated with SiC, the diameter ( ⁇ ) of the pocket 2 is 50 mm, and the pocket 2 has six support portions 3. Six non-contact portions 5 are formed on the inner peripheral wall of the pocket 2 adjacent to the formation position, and one length (the circumferential length when the pocket is viewed from above) is between the non-contact portions 5. A susceptor in which six contact portions 4 of 13 mm were formed and the ratio of the total length in the circumferential direction of the contact portions 4 to the circumference was about 50% was produced. Then, as shown in FIG. 2B, a semiconductor was manufactured using the susceptor in which the wafer 10 was placed in the pocket 2.
  • the second embodiment is the same as the first embodiment except that the diameter ( ⁇ ) of the pocket 2 is 200 mm and the length of each contact portion 4 is 2 mm.
  • a susceptor having a total ratio of the circumferential length of the contact portion 4 in the circumferential direction of about 1.9% was manufactured, and a semiconductor was manufactured.
  • a pocket 2 'shown in FIG. 2A was produced as a pocket independently formed in the susceptor. That is, it is a susceptor in which the surface of high-purity isotropic graphite is coated with SiC, the pocket 2 'includes six support portions 3', and the pocket 2 'adjacent to the position where the support portion 3' is formed.
  • Six contact portions 4 'each having a length of 1 mm (a circumferential length when the pocket is viewed from above) are formed on the inner peripheral wall, and six non-contact portions 5' are provided between the contact portions 4 '.
  • One susceptor was formed.
  • FIG. 2B a semiconductor was manufactured using the susceptor having the wafer 10 placed in the pocket 2 '.
  • a pocket 2 ′′ shown in FIG. 2A was formed as an independently formed pocket in the susceptor. That is, a susceptor in which SiC is coated on the surface of high-purity isotropic graphite, a pocket 2 ′′ is provided with six support portions 3 ′′, and a contact portion 4 is formed over the entire inner peripheral wall of the pocket 2 ′′. A susceptor with '' was formed. Then, as shown in FIG. 2B, a semiconductor was manufactured using the susceptor in which the wafer 10 was placed in the pocket 2 ′′.
  • the length of one contact portion 4 ' is as short as 1 mm, and the contact portion 4' is also formed where the support portion 3 'is formed. Conduction heat is easily applied locally. For this reason, a temperature difference occurs in the wafer 10 between the outer peripheral portion in contact with the pocket 2 ′ and the central portion not in contact with the pocket 2 ′, and the yield of semiconductor chips deteriorates. Further, since the length of one contact portion 4 'is as short as 1 mm, stress caused by centrifugal force is concentrated on the contact portion 4' when the susceptor is rotated during various processes, and chipping easily occurs on the susceptor and the wafer 10. became.
  • the susceptor according to the present invention can be widely used for manufacturing semiconductors.

Abstract

ウエハから作製される半導体チップの歩留まりを向上させることができる、チッピング（欠け）が発生し難い、寿命が長いサセプタを提供する。ウエハ（１０）を載置するポケット（２）を備えたサセプタであって、ポケット（２）のうちの少なくとも一つは、ウエハ（１０）を支持する複数の支持部（３）、ウエハ（１０）の側面（１０ａ）と接触する複数の接触部（４）、およびウエハ（１０）の側面（１０ａ）と接触しない複数の非接触部（５）を備えている。接触部（４）および非接触部（５）は、ポケット（２）の内周壁に交互に形成され、支持部（３）のうちの少なくとも二つは、サセプタを上方から見たときにポケット（２）の中心（Ｏ）と非接触部（５）とを結ぶ線上に形成されている。

Description

サセプタ
　本発明は、半導体の製造に用いられるサセプタに関する。
　例えば、良好なＬＥＤを製造するには、半導体チップとなるウエハの表面に積層される薄膜結晶層のエピタキシャル成長を均一に行わせることが重要である。このため、半導体の製造に用いられるサセプタは、エピタキシャル成長を行わせて均一な膜厚の薄膜結晶層を製膜するために、ウエハに対して伝導熱および輻射熱を加えて均一に加熱する必要がある。ところが、サセプタのポケットに載置されたウエハには、ポケットと接触している部分から伝導熱が加わるため、ポケットに接触している外周部分と接触していない中央部分との間でウエハの温度が不均一になり易い。具体的には、ウエハの外周から内側に向かって３ｍｍ程度の領域は、温度差が生じ易いため、半導体チップの歩留まりが悪い。
　それゆえ、特許文献１に記載のウエハキャリア（サセプタ）等、ポケットの形状に関する種々の提案が行われている。
日本国公開特許公報「特開２０１３－１３８２２４号公報」
　しかしながら、本発明者らが検討したところ、特許文献１に記載のウエハキャリアは、ポケットに載置されたウエハを支持する支持部分と、ウエハの側面と接触している接触部分とが隣接して形成されているため、ウエハに対して伝導熱が局所的に加わり易いことが分かった。このため、ポケットに接触している外周部分と接触していない中央部分との間でウエハに温度差が生じ、半導体チップの歩留まりが悪くなるという課題があることが分かった。
　また、半導体の製造時にサセプタは回転する。このため、サセプタとウエハとの接触部分を小さくし過ぎると、各種処理時にサセプタを回転させたときに、ポケットに載置されたウエハとの接触部分（衝突部分）に遠心力による応力が集中する。それゆえ、特許文献１に記載のウエハキャリア（サセプタ）では、当該接触部分においてサセプタやウエハにチッピング（欠け）が生じるおそれがあるという課題も存在することが分かった。
　本発明の一態様は、ウエハから作製される半導体チップの歩留まりを向上させることができるサセプタを提供することを目的とする。また、本発明の一態様は、チッピング（欠け）が発生し難い、寿命が長いサセプタを提供することを目的とする。
　上記課題を解決するために、本発明は、下記＜１＞～＜３＞で示される発明を包含している。
＜１＞　ウエハを載置するポケットを備えたサセプタであって、上記ポケットのうちの少なくとも一つは、ウエハを支持する複数の支持部、ウエハの側面と接触する複数の接触部、およびウエハの側面と接触しない複数の非接触部を備え、上記接触部および非接触部は、ポケットの内周壁に交互に形成され、上記支持部のうちの少なくとも二つは、サセプタを上方から見たときにポケットの中心と非接触部とを結ぶ線上に形成されている、サセプタ。
＜２＞　一つの接触部の周方向の長さが２ｍｍ以上である、＜１＞に記載のサセプタ。
＜３＞　ポケットの円周における、上記複数の接触部の周方向の長さの合計の割合が１．５～５０％である、＜１＞または＜２＞に記載のサセプタ。
　本発明の一態様によれば、サセプタには、ポケットの内周壁に交互に接触部および非接触部が形成され、サセプタを上方から見たときにポケットの中心と非接触部とを結ぶ線上に支持部のうちの少なくとも二つが形成されている。従って、ウエハは、ポケットに接触している外周部分と接触していない中央部分との間で温度差が生じ難いので、品質が向上する。それゆえ、ウエハから作製される半導体チップの歩留まりを向上させることができるサセプタを提供することができるという効果を奏する。また、複数の接触部および複数の非接触部が、ポケットの内周壁に交互に形成されているので、ポケットに載置されたウエハとの接触部分（衝突部分）への遠心力による応力集中が低減する。それゆえ、サセプタやウエハにチッピング（欠け）が発生し難い、寿命が長いサセプタを提供することができるという効果を奏する。
本発明の一実施形態に係るサセプタの一例を示す、（ａ），（ｂ）共に概略の平面図である。 上記サセプタに形成されたポケットの内の一つ（実施例１、比較例１，２）を示す図であり、（ａ）は上記ポケットの概略の平面図であり、（ｂ）は（ａ）のＡ－Ａ線矢視断面図である。 上記ポケット（実施例１）の要部を示す図であり、（ａ）～（ｃ）は支持部の概略の平面図であり、（ｄ）～（ｆ）は接触部の概略の断面図である。 本発明の他の実施形態であって、上記ポケットの変形例および実施例２を示す図であり、（ａ）は上記ポケットの概略の平面図であり、（ｂ）は（ａ）のＡ－Ａ線矢視断面図である。
　本発明の一実施形態について以下に説明するが、本発明はこれに限定されるものではない。本発明は、以下に説明する各実施形態や各構成に限定されるものではなく、特許請求の範囲に示した範囲で種々の変更が可能であり、異なる実施形態や実施例にそれぞれ開示された技術的手段を適宜組み合わせて得られる実施形態や実施例についても本発明の技術的範囲に含まれる。また、本明細書中に記載された学術文献および特許文献の全てが、本明細書中において参考文献として援用される。尚、本明細書において特記しない限り、数値範囲を表す「Ａ～Ｂ」は、「Ａ以上、Ｂ以下」を意味する。
　〔実施形態１〕
　本発明の一実施形態について、以下に説明する。
　本発明の一実施形態に係るサセプタは、ウエハを載置するポケットを備えたサセプタであって、上記ポケットのうちの少なくとも一つは、ウエハを支持する複数の支持部、ウエハの側面と接触する複数の接触部、およびウエハの側面と接触しない複数の非接触部を備え、上記接触部および非接触部は、ポケットの内周壁に交互に形成され、上記支持部のうちの少なくとも二つは、サセプタを上方から見たときにポケットの中心と非接触部とを結ぶ線上に形成されている。
　図１に示すように、円盤状のサセプタ（「台座」、「基板支持体」、「ウエハキャリア」等とも称される）１は、半導体の製造に用いられる例えばＭＯＣＶＤ装置等の製造装置に取り付けられる部材であり、高純度の等方性黒鉛や炭化ケイ素焼結体等の炭素系材料から形成されている。具体的には、例えば、高純度の等方性黒鉛の表面にＳｉＣがコーティングされたサセプタが好適である。サセプタ１の直径は、半導体の製造装置に応じて適宜設定されるため、特に限定されない。
　サセプタ１は、半導体製造工程においてサファイアウエハ、窒化ガリウムウエハ、シリコンウエハ等の半導体ウエハ（以下、単にウエハと記す）を載置し、加熱すると共に水平方向に回転して、当該ウエハの表面に薄膜結晶層をエピタキシャル成長させて積層するために使用される。また、サセプタ１は、ウエハの表面に酸化物層や窒化物層を形成する表面改質、ウエハの表面に付着した汚染物を除去する表面清浄、或いはアニーリングを行うときにも使用される。
　サセプタ１の上面には少なくとも一つ、または複数のポケット（「凹部」、「ザグリ」等とも称される）２が形成されており、当該ポケット２にウエハを載置して各種処理を行う。サセプタ１の下方には、当該サセプタ１を加熱するヒータや高周波誘導コイル等の加熱装置（図示しない）が設置されている。サセプタ１は、載置する全てのウエハに対して均等に加熱を行うことができるように、ポケット２の個数および配置、並びに加熱装置の配置が設計されている。尚、ポケット２の個数および配置は、サセプタ１およびウエハの大きさに応じて、最も多くのポケット２が形成されるように決定すればよく、特に限定されない。従って、図１に示されているサセプタ１に形成されているポケット２の個数、配置、および大きさ（サイズ）は、一例に過ぎない。
　ポケット２の直径（φ）は、接触部４が形成されている部分の内周壁の直径を指す（非接触部５が形成されている部分の内周壁の直径ではない）。尚、ポケット２の直径を１００としたとき、当該ポケット２に載置される最も小さいウエハ１０の直径は、通常、９８以上、１００未満である。ウエハ１０の直径が９８未満であると、サセプタ１の回転開始時や回転終了時等に、サセプタ１やウエハ１０に、衝突によるチッピング（欠け）が発生し易くなる場合がある。また、本明細書において単に「内周壁」と記載した場合には、接触部４が形成されている部分の内周壁を指す。
　複数のポケット２は、サセプタ１を上方から見たときに略円形状であり、図１の（ａ）に示すように、互いに独立して形成されていてもよく、図１の（ｂ）に示すように、互いに連通するように形成されていてもよい。ポケット２は、ウエハを載置した状態でのガスの流れや温度分布を考慮して、ポケット２ごとにその深さを深くしたり浅くしたりすることによって形成されている。
　ポケット２が互いに独立して形成されている場合を例に挙げてさらに説明する。実施例１として図２に示すように、ポケット２のうちの少なくとも一つは、ウエハ１０を支持する複数の支持部３、ウエハ１０の側面１０ａと接触する複数の接触部４、およびウエハ１０の側面１０ａと接触しない複数の非接触部５を備えている。上記接触部４および非接触部５は、ポケット２の内周壁に交互に形成され、上記支持部３のうちの少なくとも二つは、サセプタ１を上方から見たときにポケット２の中心Ｏと非接触部５とを結ぶ線上に形成されている。尚、支持部３、接触部４、および非接触部５の個数および配置は、サセプタ１におけるポケット２の形成位置、加熱装置の位置等に応じて適宜決定すればよく、特に限定されない。従って、図２に示されている、支持部３、接触部４、および非接触部５が各６個で等間隔に配置されているポケット２（実施例１）は、一例に過ぎない。
　支持部（「タブ」とも称される）３は、一つのサセプタ１に複数形成され、ポケット２に載置されたウエハ１０を、当該ウエハ１０の下面と接して、支持するようになっている。支持部３の個数は、載置したウエハ１０を安定に支持することができるように、少なくとも三つあればよく、特に限定されない。ポケット２の底面２ａからの支持部３の高さは、ウエハ１０の反りを考慮して、底面２ａからの輻射熱がウエハ１０に適度に加わる程度の高さであればよく、例えば０．０２～１．５ｍｍの範囲内、好ましくは０．０２～０．５ｍｍの範囲内とすればよい。但し、ポケット２の底面２ａからの支持部３の高さは、ウエハ１０と底部２ａとが接触しない高さであればよく、特に限定されない。支持部３におけるウエハ１０との接触面積は、ウエハ１０が支持部３に安定に支持されると共に、支持部３からも伝導熱があるため、当該支持部３からの伝導熱ができる限り少なくなる面積であればよく、特に限定されない。
　支持部３の形状（ポケット２を上方から見たときの形状）は、図３の（ａ）～（ｃ）に示すように、山型等の種々の形状があるものの、特に限定されない。また、図３の（ａ）～（ｃ）では、支持部３は、底面２ａから突出し、非接触部５に接触して形成されているものの、非接触部５に接触しないで、ポケット２における、非接触部５の形成位置に隣接した位置に形成されていてもよい。即ち、支持部３のうちの少なくとも二つ、特に好ましくは複数の支持部３の全ては、サセプタ１を上方から見たときにポケット２の中心Ｏと非接触部５とを結ぶ線上に形成されていればよく、非接触部５に接触している必要は無い。また、支持部３は、サセプタ１を上方から見たときに、非接触部５の中心部分に位置していなくてもよい。
　接触部４は、ポケット２の内周壁を構成し、少なくともサセプタ１の回転時にウエハ１０の側面１０ａと接触し、好ましくは、ウエハ１０の側面１０ａと面接触する。つまり、ポケット２においては、接触部４と、ポケット２に載置したウエハ１０の側面１０ａとが接触し、好ましくは面接触するようになっている。ここで、「面接触する」とは、実質的に面接触している状態を包含する。具体的には、ポケット２の直径（接触部４が形成されている部分の内周壁の直径）を基準として、ウエハ１０と接触している接触部４上の任意の点とポケット２に載置されるウエハ１０の側面１０ａとの最短距離が、０（接触部４がウエハ１０の側面１０ａに物理的に接触している状態）から、上記直径の２％以下までの距離、好ましくは１％以下までの距離に接近している状態を指す。従って、接触部４全体にわたって当該接触部４がウエハ１０の側面１０ａに物理的に接触している必要は無い。
　一つの接触部４の周方向の長さ（ポケット２を上方から見たときの周方向の長さ）は、ウエハ１０の接触部分への遠心力による応力集中を低減するために、２ｍｍ以上であることが好ましい。接触部４の個数および個々の接触部４の周方向の長さは、ウエハ１０の温度を均一にすることができるように設定すればよく、特に限定されない。また、ポケット２の円周（接触部４が形成されている箇所の円の円周）における、上記複数の接触部４の周方向の長さの合計の割合は、１．５～５０％であることが好ましい。
　ポケット２における、接触部４が形成されている部分の内周壁の断面形状は、図３の（ｄ）に示すように、底面２ａから上に向かって垂直となっていてもよく、図３の（ｅ）に示すように、底面２ａから上に向かって拡がるような傾斜が設けられていてもよく、図３の（ｆ）に示すように、底面２ａから上に向かって狭まるような傾斜が設けられていてもよい。尚、上記傾斜の角度は、底面２ａから上に向かって垂直に内周壁が形成されている場合を０°として、－１０°～１０°程度が好適である。
　非接触部５は、ポケット２の内周壁における、支持部３の形成位置に隣接した位置に形成されている。従って、支持部３が形成されているところに接触部４は形成されていない。このため、ポケット２においては、支持部３と接触部４とが隣接して形成されていないので、ウエハ１０に対して伝導熱が局所的に加わらないようになっている。
　非接触部５は、当該非接触部５からのウエハ１０に対する伝導熱の影響が無いように、ウエハ１０から離間している。つまり、非接触部５は、接触部４よりも、ポケット２の中心Ｏから離れた位置に形成されていればよい。
　非接触部５は、接触部４の分割等を行うために、必要に応じて、支持部３の形成位置に隣接しない位置（支持部３が形成されていないところ）に形成されていてもよい。また、図１の（ｂ）に示すように、複数のポケット２が互いに連通している場合には、連通部分ａも非接触部に相当し、当該連通部分ａには、支持部３が形成されていなくてもよい。
　また、ポケット２には、本実施の形態に係る配置で支持部３、接触部４および非接触部５が形成されている箇所が複数存在していればよい。即ち、本実施の形態に係るポケット２には、従来の配置で支持部、接触部および非接触部が形成されている箇所が存在していてもよい。さらに、サセプタ１に複数のポケット２が設けられている場合において、当該サセプタ１には、本実施の形態に係るポケット２が少なくとも一つ形成されていればよい。即ち、本実施の形態に係るポケット２が少なくとも一つ形成されているサセプタ１には、従来の個数および配置で支持部、接触部および非接触部が形成されたポケットがさらに形成されていてもよい。従って、ウエハ１０を載置するポケット２を複数備え、これらポケット２の内の少なくとも一つが、上述した構成の支持部３、接触部４、および非接触部５を備えるサセプタも、本発明の実施形態に包含される。
　本発明の一実施形態に係るサセプタは、半導体の製造に用いられる。半導体の製造装置は、排気口を有するチャンバ、チャンバ内に収容されるサセプタ、チャンバ内に原料ガスを供給する原料ガス供給装置、チャンバ内にキャリアガスを供給するキャリアガス供給装置、サセプタを回転させる回転装置、およびチャンバ内を加熱するチャンバ加熱装置を少なくとも備えている。半導体の製造装置は、サセプタを回転させながら、当該サセプタに載置したウエハの表面に薄膜結晶層を製膜して積層し、半導体を製造する。つまり、半導体は、サセプタを回転させ、当該サセプタに載置したウエハを加熱し、表面に薄膜結晶層を製膜して積層する方法によって製造される。
　上記製造装置によって各種処理が施されたウエハは、チップ化、パッケージ（モジュール）化されて半導体デバイスとされ、例えばＬＥＤ等の各種製品とされる。
　〔実施形態２〕
　本発明の他の実施形態について、以下に説明する。尚、説明の便宜上、実施形態１にて説明した部材と同じ機能を有する部材については、同じ符号を付記し、その説明を省略する。
　実施形態１において説明した支持部３、接触部４および非接触部５は、ポケット２内に等間隔に（例えばポケット２を上方から見たときに線対称または点対称となるように）形成されている必要はなく、サセプタ１における当該ポケット２の形成位置、加熱装置の位置等に応じて、ウエハ１０に対して伝導熱を均一に加えることができるように、その個数、配置、および大きさ（長さ）が適宜設定される。従って、サセプタ１に複数のポケット２が設けられている場合において、個々のポケット２の支持部３、接触部４および非接触部５の個数、配置、および大きさ（長さ）は、互いに異なっていてもよい。
　具体的には、実施形態１における説明を行うのに用いた、支持部３、接触部４、および非接触部５が各６個（偶数）で等間隔に配置されているポケット２（図２の実施例１）は、一例に過ぎない。本発明の他の実施形態であって、上記ポケット２の変形例（パターン）としては、図４に示すように、例えば、支持部３、接触部４、および非接触部５が各５個（奇数）で配置されているポケット２（変形例１）、支持部３、接触部４、および非接触部５が各６個で、等間隔でない間隔で配置されているポケット２（変形例２）等、種々の例が挙げられる。
　次に、本発明に係るサセプタに関して、実施例および比較例を挙げてさらに詳細に説明するが、本発明は係る実施例のみに制限されるものではない。
　〔実施例１〕
　サセプタに、独立して形成されたポケットである、実施例１として図２の（ａ），（ｂ）に示すポケット２を作製した。即ち、高純度の等方性黒鉛の表面にＳｉＣがコーティングされたサセプタであって、ポケット２の直径（φ）は５０ｍｍであり、ポケット２に六つの支持部３を備え、当該支持部３の形成位置に隣接するポケット２の内周壁に、非接触部５が六つ形成され、当該非接触部５間に、一つの長さ（ポケットを上方から見たときの周方向の長さ）が１３ｍｍの接触部４が六つ形成された、円周における接触部４の周方向の長さの合計の割合が約５０％のサセプタを作製した。そして、図２の（ｂ）に示すように、ポケット２にウエハ１０を載置した上記サセプタを用いて半導体を製造した。
　〔実施例２〕
　実施例２として図４の（ａ），（ｂ）に示すように、ポケット２の直径（φ）を２００ｍｍとし、各接触部４の長さを２ｍｍとした以外は、実施例１と同様にして、円周における接触部４の周方向の長さの合計の割合が約１．９％のサセプタを作製し、半導体を製造した。
　〔比較例１〕
　サセプタに、独立して形成されたポケットである、比較例１として図２の（ａ）に示すポケット２’を作製した。即ち、高純度の等方性黒鉛の表面にＳｉＣがコーティングされたサセプタであって、ポケット２’に六つの支持部３’を備え、当該支持部３’の形成位置に隣接するポケット２’の内周壁に、一つの長さ（ポケットを上方から見たときの周方向の長さ）が１ｍｍの接触部４’が六つ形成され、当該接触部４’間に非接触部５’が六つ形成されたサセプタを作製した。そして、図２の（ｂ）に示すように、ポケット２’にウエハ１０を載置した上記サセプタを用いて半導体を製造した。
　〔比較例２〕
　サセプタに、独立して形成されたポケットである、比較例２として図２の（ａ）に示すポケット２''を作製した。即ち、高純度の等方性黒鉛の表面にＳｉＣがコーティングされたサセプタであって、ポケット２''に六つの支持部３''を備え、ポケット２''の内周壁全周にわたって接触部４''が形成されたサセプタを作製した。そして、図２の（ｂ）に示すように、ポケット２''にウエハ１０を載置した上記サセプタを用いて半導体を製造した。
　（結果）
　比較例１のサセプタと比較して、実施例１のサセプタの寿命は二倍となった。また、ウエハから作製される半導体チップの歩留まりが１０％向上した。
　比較例２のサセプタと比較して、実施例１のサセプタの寿命は同程度であったものの、ウエハから作製される半導体チップの歩留まりが２０％向上した。
　比較例１のサセプタと比較して、実施例２のサセプタの寿命は二倍となった。また、ウエハから作製される半導体チップの歩留まりが１５％向上した。
　比較例２のサセプタと比較して、実施例２のサセプタの寿命は同程度であったものの、ウエハから作製される半導体チップの歩留まりが２５％向上した。
　比較例１のサセプタは、一つの接触部４’の長さが１ｍｍと短く、また、支持部３’が形成されているところに接触部４’も形成されているので、ウエハ１０に対して伝導熱が局所的に加わり易い。このため、ポケット２’に接触している外周部分と接触していない中央部分との間でウエハ１０に温度差が生じ、半導体チップの歩留まりが悪くなった。また、一つの接触部４’の長さが１ｍｍと短いため、各種処理時にサセプタを回転させたときに当該接触部４’に遠心力による応力が集中し、サセプタやウエハ１０にチッピングが生じ易くなった。
　比較例２のサセプタは、ポケット２''の内周壁全周にわたって接触部４''が形成されているので、ウエハ１０の全周にわたって伝導熱が多く加わるだけでなく、支持部３''の近傍では当該支持部３''からの伝導熱も加わり、ポケット２''に接触している外周部分と接触していない中央部分との間でウエハ１０に大きな温度差が生じ、半導体チップの歩留まりが悪くなった。
　本発明に係るサセプタは、半導体の製造に広く利用することができる。
　１　サセプタ
　２　ポケット
　３　支持部
　４　接触部
　５　非接触部
１０　ウエハ

Claims (3)

  1. 　ウエハを載置するポケットを備えたサセプタであって、
    　上記ポケットのうちの少なくとも一つは、ウエハを支持する複数の支持部、ウエハの側面と接触する複数の接触部、およびウエハの側面と接触しない複数の非接触部を備え、
    　上記接触部および非接触部は、ポケットの内周壁に交互に形成され、
    　上記支持部のうちの少なくとも二つは、サセプタを上方から見たときにポケットの中心と非接触部とを結ぶ線上に形成されている、サセプタ。
  2. 　一つの接触部の周方向の長さが２ｍｍ以上である、請求項１に記載のサセプタ。
  3. 　ポケットの円周における、上記複数の接触部の周方向の長さの合計の割合が１．５～５０％である、請求項１または２に記載のサセプタ。
PCT/JP2019/038492 2018-10-04 2019-09-30 サセプタ WO2020071308A1 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
CN201980065073.XA CN112789719A (zh) 2018-10-04 2019-09-30 基座
EP19868808.7A EP3863043A4 (en) 2018-10-04 2019-09-30 SUSCEPTOR
US17/282,095 US20210375663A1 (en) 2018-10-04 2019-09-30 Susceptor
JP2020550416A JPWO2020071308A1 (ja) 2018-10-04 2019-09-30 サセプタ
KR1020217011895A KR20210066851A (ko) 2018-10-04 2019-09-30 서셉터

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018188952 2018-10-04
JP2018-188952 2018-10-04

Publications (1)

Publication Number Publication Date
WO2020071308A1 true WO2020071308A1 (ja) 2020-04-09

Family

ID=70055140

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2019/038492 WO2020071308A1 (ja) 2018-10-04 2019-09-30 サセプタ

Country Status (7)

Country Link
US (1) US20210375663A1 (ja)
EP (1) EP3863043A4 (ja)
JP (1) JPWO2020071308A1 (ja)
KR (1) KR20210066851A (ja)
CN (1) CN112789719A (ja)
TW (1) TW202029399A (ja)
WO (1) WO2020071308A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7421578B2 (ja) 2022-01-28 2024-01-24 日機装株式会社 サセプタ及び窒化物半導体発光素子の製造方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102277918B1 (ko) * 2016-07-09 2021-07-14 어플라이드 머티어리얼스, 인코포레이티드 기판 캐리어

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007123628A (ja) * 2005-10-28 2007-05-17 Mitsubishi Electric Corp 半導体製造方法及びサテライト
JP2007251078A (ja) * 2006-03-20 2007-09-27 Nuflare Technology Inc 気相成長装置
JP2013138224A (ja) 2008-08-29 2013-07-11 Veeco Instruments Inc 一様でない熱抵抗を有するウエハキャリア
JP2014209534A (ja) * 2013-03-22 2014-11-06 株式会社東芝 半導体製造装置、半導体製造方法、および半導体ウェーハホルダ

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007210875A (ja) * 2005-07-29 2007-08-23 Nuflare Technology Inc 気相成長装置及び気相成長方法
TWI327339B (en) * 2005-07-29 2010-07-11 Nuflare Technology Inc Vapor phase growing apparatus and vapor phase growing method
JP5539116B2 (ja) 2010-08-31 2014-07-02 日立建機株式会社 油圧作業機
DE102011055061A1 (de) * 2011-11-04 2013-05-08 Aixtron Se CVD-Reaktor bzw. Substrathalter für einen CVD-Reaktor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007123628A (ja) * 2005-10-28 2007-05-17 Mitsubishi Electric Corp 半導体製造方法及びサテライト
JP2007251078A (ja) * 2006-03-20 2007-09-27 Nuflare Technology Inc 気相成長装置
JP2013138224A (ja) 2008-08-29 2013-07-11 Veeco Instruments Inc 一様でない熱抵抗を有するウエハキャリア
JP2014209534A (ja) * 2013-03-22 2014-11-06 株式会社東芝 半導体製造装置、半導体製造方法、および半導体ウェーハホルダ

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3863043A4 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7421578B2 (ja) 2022-01-28 2024-01-24 日機装株式会社 サセプタ及び窒化物半導体発光素子の製造方法

Also Published As

Publication number Publication date
TW202029399A (zh) 2020-08-01
EP3863043A1 (en) 2021-08-11
EP3863043A4 (en) 2021-11-03
CN112789719A (zh) 2021-05-11
US20210375663A1 (en) 2021-12-02
KR20210066851A (ko) 2021-06-07
JPWO2020071308A1 (ja) 2021-09-02

Similar Documents

Publication Publication Date Title
KR101885747B1 (ko) 개선된 웨이퍼 캐리어
TWI327339B (en) Vapor phase growing apparatus and vapor phase growing method
JP4798163B2 (ja) エピタキシャル成長用サセプタ
JP6539929B2 (ja) ウェハ支持機構、化学気相成長装置およびエピタキシャルウェハの製造方法
WO2013033315A2 (en) Wafer carrier with thermal features
KR101992564B1 (ko) 열 특성이 개선된 웨이퍼 서셉터
WO2020071308A1 (ja) サセプタ
CN109841541B (zh) SiC外延生长装置
JP7419779B2 (ja) サセプタ及び化学気相成長装置
JP6562546B2 (ja) ウェハ支持台、ウェハ支持体、化学気相成長装置
CN111295737B (zh) 基座、外延生长装置、外延硅晶片的制造方法及外延硅晶片
JP6477419B2 (ja) 炭化珪素エピタキシャル成長装置、炭化珪素エピタキシャルウエハの製造方法及び炭化珪素半導体装置の製造方法
JP7233361B2 (ja) サセプタ、エピタキシャル基板の製造方法、及びエピタキシャル基板
US20130180446A1 (en) Susceptor
JP2011077476A (ja) エピタキシャル成長用サセプタ
JP5306432B2 (ja) 気相成長方法
JP2009182009A (ja) 気相成長装置および気相成長方法
JP6587354B2 (ja) サセプタ
US20150034010A1 (en) Susceptor and apparatus including the same
JP2015195259A (ja) サセプターおよび気相成長装置
KR101259006B1 (ko) 웨이퍼 제조장치의 서셉터
KR102209032B1 (ko) 웨이퍼 캐리어
JP6493982B2 (ja) サセプタ

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19868808

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2020550416

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

ENP Entry into the national phase

Ref document number: 20217011895

Country of ref document: KR

Kind code of ref document: A

ENP Entry into the national phase

Ref document number: 2019868808

Country of ref document: EP

Effective date: 20210504