WO2020057218A1 - 微小极间距电容式力敏传感器及其制造方法 - Google Patents

微小极间距电容式力敏传感器及其制造方法 Download PDF

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WO2020057218A1
WO2020057218A1 PCT/CN2019/093415 CN2019093415W WO2020057218A1 WO 2020057218 A1 WO2020057218 A1 WO 2020057218A1 CN 2019093415 W CN2019093415 W CN 2019093415W WO 2020057218 A1 WO2020057218 A1 WO 2020057218A1
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diaphragm
silicon wafer
frame
electrode plate
layer
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PCT/CN2019/093415
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English (en)
French (fr)
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胡耿
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胡耿
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L1/00—Measuring force or stress, in general
    • G01L1/14—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators
    • G01L1/142—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators using capacitors

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  • the invention relates to a micro-pitch capacitive force-sensitive sensor, in particular to a miniaturized capacitive force-sensitive sensor, and belongs to the technical field of micro-electromechanical devices.
  • Capacitive force-sensing devices generally use a force-sensitive elastic film as a movable electrode for sensing capacitance.
  • some people have proposed a scheme of adding a flat electrode to the sensing diaphragm.
  • U.S. Patent4203128 represented by U.S. Patent 4203128, used semiconductor micromachining technology to manufacture miniaturized force-sensitive sensors, but there were no plans to add flat electrodes to the center of the elastic diaphragm.
  • capacitive force-sensitive sensors have six technical indicators: 1. Repeatability, 2. Linearity, 3. Product consistency, 4. Sensitivity, 5. Stability, 6. Miniaturization.
  • flat diaphragms including E-diaphragms
  • the same technical index puts forward the opposite requirements for the structural parameters. For example, reducing the distance between the sensing capacitor electrodes can increase the sensing capacitance and improve its stability.
  • the purpose of the present invention is to improve the sensor structure on the basis of the existing technology, and to propose a simple and convenient mass production method for precisely controlling the thickness and flatness of the diaphragm, the uniformity, and the fine pole spacing of the sensor.
  • a low-cost force-sensitive sensor device with high sensitivity, high repeatability, high accuracy, high stability, natural linear output, and small drift is produced, especially a MEMS device.
  • the present invention relates to a capacitive micro-pitch force-sensitive sensor.
  • a capacitive micro-pitch force-sensitive sensor Referring to FIG. 10, it is composed of a diaphragm 2, a lower frame 5 and an upper frame 5 ', a fixed electrode plate 6, a movable electrode plate 4', a cover plate 19, and the like.
  • the diaphragm 2 is generated by chemically polishing a silicon wafer and bonding it with a frame after etching.
  • the lower frame 5 is integrated into a whole by the peripheral portion of the diaphragm and the upper frame 5 '.
  • the fixed electrode plate 6 is sealed into a whole with a frame by means of a low-melting glass 7 through a bracket 6 ', and is kept at a precise distance from the movable electrode plate 4'.
  • the movable electrode plate 4 maintains low-ohmic contact with the outside world through the diaphragm 2 and the aluminum plating layer 13 on the outside of the frame 5.
  • the conductive layer on the stator plate 6 leads the feeder through the bonding hole 8 on the bracket 6 'through the center hole 17 of the cover plate.
  • the main contents of the present invention are as follows:
  • the diaphragm and the frame are manufactured separately.
  • the movable electrode 4 '(or 12) is first anchored to the smooth surface of the diaphragm, and then it is melt-bonded with the frame. After bonding, the diaphragm is corroded and thinned, which makes the diaphragm's Thickness and uniformity are more precisely controlled and highly flat, and it is easy to use integrated circuit technology and equipment for mass production and miniaturization.
  • ⁇ 2> Precisely determine the tiny pole spacing between the two plates of the sensing capacitor.
  • the basic steps are: a. First, a layer of potassium chloride is vacuum-evaporated on the surface of the stationary electrode plate 6. b. Apply low-melting glass paste to both ends of the stationary plate support 6 '. c. Then place them directly above the movable plate as shown in Figure 1 ⁇ J>. d. Then press down along the center normal of the stationary electrode plate 6 to make the stationary electrode plate 6 translate downward until it touches the upper surface of the diaphragm 2 to achieve stable balance. At this time, the distance that the movable electrode plate 6 translates downward is equal to the thickness of the sacrificial layer 3.
  • the low-melting glass paste 7 is sandwiched between the bracket 6 'and the frame 5' without any gap. Then, the low-melting glass 7 is melted to seal the stationary electrode plate 6 and the frame 5 'as a whole. Finally remove the down pressure, rinse the potassium chloride with deionized water and dry it.
  • the thickness of the potassium chloride layer should be the designed pole spacing plus the thickness of the sacrificial layer 3.
  • the thickness of the elastic film 2 and the movable electrode plate 4 'formed by epitaxial or diffusion doping is limited.
  • the present invention uses a silicon-silicon bonding method to break through this limitation.
  • a chemical mechanical polishing method is used to precisely control their thickness and uniformity.
  • the present invention also proposes a new structure of such a capacitive force-sensitive sensor.
  • the bracket 14 'of the stationary pole plate 14 has a bent portion, or a slit 18 is opened in the straight stationary pole plate bracket 6'.
  • the effect of these two measures is to reduce the temperature and static temperature caused by the difference in the thermal expansion coefficient of the fixed plate support 6 (made of borosilicate glass such as PYREX) and the silicon frame 5 '(or 5) and the Young's elastic modulus. Pressure drift.
  • FIG. 1 is a manufacturing flowchart of the first embodiment.
  • FIG. 2 is a manufacturing flowchart of the second embodiment.
  • Fig. 3 is a side view ⁇ a> and a top view ⁇ b> of the fixed electrode plate 6 and its support 6 '.
  • Fig. 4 ⁇ a> shows that the diameter of the movable electrode plate 4 'in the first and second embodiments may be larger than the side length of the square diaphragm 2 (or 2').
  • Fig. 4 ⁇ b> is a sectional view of the third embodiment.
  • Fig. 5 is a manufacturing flowchart of the fourth embodiment.
  • Fig. 6 is a manufacturing flowchart of the fifth embodiment.
  • FIG. 7 is a manufacturing flowchart of the sixth embodiment.
  • FIG. 8 is a manufacturing flowchart of the seventh embodiment.
  • Figure 9 shows another way to determine the tiny pole spacing of a capacitor.
  • Figure 10 ⁇ a> shows the sensor cover, and ⁇ b> is a perspective view of the sensor.
  • Fig. 11 shows a manufacturing flow chart of the stationary electrode plate 6 and its support 6 '.
  • the first example is as follows:
  • a double-sided silicon wafer 1 forms a silicon dioxide layer 3 with a thickness of 1 micron.
  • the silicon dioxide layer 3 is photoetched and etched on the upper surface of the silicon wafer to form a hole of about 200 micrometers x 200 micrometers. The silicon surface under the hole is exposed, and then the photoresist is removed.
  • a boron-doped polysilicon layer 4 is epitaxially grown on the silicon dioxide layer 3 with through holes.
  • the thickness of the epitaxial layer 4 is greater than 15 micrometers, and then the epitaxial layer 4 is chemically and mechanically polished to make the surface smooth and flat without burrs.
  • the epitaxial layer 4 is etched and etched to form a movable electrode plate 4 ', and the silicon dioxide layer 3 other than 4' is removed using 4 'as a mask.
  • the silicon dioxide layer under the movable plate 4 ' is still retained and designated 3'.
  • the method of anodic bonding, gold-silicon eutectic bonding or eutectic bonding can also be used to integrate the silicon wafer 1 with the upper frame 5 '. This can reduce the bonding temperature, reduce the requirements of environmental equipment, and facilitate the integration of the sensor and related circuits. However, the interlayer between the two silicon wafers will cause some drift.
  • a 1-micron-thick silicon dioxide layer is oxidized on the surface to be bonded of the upper frame 5 'of the etched through hole, and then a 1-micron-thick PYREX7740 glass coating is sputtered thereon.
  • ⁇ d> Appropriate DC voltage of 200 volts or more is applied between the upper frame 5 'and the lower silicon wafer 1.
  • the upper frame is the negative electrode.
  • the temperature is raised to 450 °, and the bonding is completed by holding for about 20 minutes.
  • a square hole is etched on the silicon dioxide layer 3 of the lower silicon wafer 1.
  • the center normal of the square hole coincides with the center normal of the movable plate 4 ', and the edge of the hole is parallel to the reference plane.
  • Its side length is equal to the side length of the silica square hole opened when the upper frame 5 'is etched (if the two frames have the same thickness). If the upper and lower border thicknesses are not equal, the side length can be determined through simple design calculations. Because for the (100) silicon wafer, the intersection angle of the (111) plane and the (100) plane is 54.7 °. The side length of the square silica hole determines the side length of the diaphragm.
  • the etchant may be an EDP etchant for anisotropic etching.
  • the front surface is etched to the concentrated boron diffusion layer to stop forming the diaphragm 2.
  • the side surface erodes to the (111) plane and stops, forming the lower frame 5.
  • 13 in the figure is an aluminum-silicon alloy plating layer with a silicon content of 1-2%.
  • the movable electrode plate 4 ' is in contact with its low-ohmic resistance through the diaphragm 2. 13 is also the contact (pad) for lead ultrasonic welding.
  • the aluminum plating layer 13 should be formed after the frames 5 and 5 'are melt-bonded, and after the formation, it needs to be alloyed at 500 ° C for 15 minutes.
  • a photoresist is applied to the surface with the movable electrode plate 4 ', the frame 5', and the conductive layer 13, and after exposure and development, the photoresist covers the interface between the upper frame 5 'and the diaphragm 2. 21 and the conductive layer 13 and all the seams of the upper and lower frames, and then use 49% hydrofluoric acid to remove the silicon dioxide sacrificial layer 3 'under the movable plate 4' at room temperature to shorten the time for removing the sacrificial layer 3 '.
  • the diaphragm 2 should be made to vibrate slightly at a low frequency and sufficiently agitate the etching solution.
  • the fixed electrode plate 6 and the bracket 6 'of the force-sensitive sensor are made of borosilicate glass.
  • a conductive aluminum layer 8 is sputtered on the surface of the electrode plate.
  • the aluminum layer 8 extends along the side surface of the electrode plate to the back and then extends to the middle of the upper surface of the bracket 6 'to form a wire bonding contact 8'.
  • the surface of the conductive layer 8 needs to be sputtered with an aluminum oxide layer having a thickness of about 50 nanometers as an insulating layer. (This insulating layer is not shown in the figure)
  • Metal halide salts such as potassium chloride or sodium chloride are sputtered on the end plated layer 8 of the indefinite electrode plate 6, and low melting glass paste 7 is coated on both ends of the bracket 6 ', and then Place it as shown in Figure 1 ⁇ J>.
  • Appropriate pressure is applied along the normal direction of the center of the movable electrode plate, so that both ends of the bracket 6 'and the frame 5' are seamlessly connected through the low-melting glass paste 7. Then, the low-melting glass is heated and melted by laser, and finally the fixed electrode plate 6 and the bracket 6 'are fused with the frame 5' to form a whole.
  • the potassium chloride layer between the two capacitor plates was washed with deionized water, and the production was completed after dehydration and drying.
  • the key is to accurately maintain the tiny pole spacing of the sensing capacitor.
  • the detailed steps are as follows:
  • an appropriate force should be applied in advance along the center normal of the movable electrode plate 4 ', so that the movable electrode plate 4' is translated downward until its periphery contacts the diaphragm 2 to form a stable balance.
  • the diameter of the movable electrode plate 4 ' is larger than the distance between the opposite sides of the diaphragm 2' (see Fig. 4 ⁇ a>). In this way, when the movable electrode plate 4 '(or 12) is pressed down to contact the surface of the frame 5', it is difficult to change the position as the down pressure increases, thereby greatly reducing the operation difficulty.
  • this method for accurately determining the minute pole spacing between two plates is also applicable to other embodiments. If the diaphragm does not have a lower frame, the outer surface of the diaphragm can be cushioned high, and the thickness of the potassium chloride layer will not change. If it is not raised, the thickness of potassium chloride is the set distance between electrodes.
  • the formed film will not be too thick, and it is generally easier to do within 20 microns. If a thicker elastic membrane 2 'or a thicker movable plate 4' is required, a slightly different implementation path is required.
  • FIG. 2 ⁇ A> A (100) type P-type silicon wafer 1 and a (100) P + type silicon wafer 2 '.
  • the two silicon wafers were fusion bonded according to the same process specifications as the previous embodiment.
  • the surface of the silicon wafer 2 ' is chemically mechanically ground and polished, so that it has a required thickness and has a smooth and flat surface.
  • the dashed line in the figure indicates that part of the silicon material is ground and polished.
  • a silicon dioxide layer 3 is oxidized on the upper and lower surfaces of the composite silicon wafer. (See Figure 2 ⁇ C>)
  • a thick boron-doped polysilicon layer 10 is epitaxially formed on the surface of the silicon wafer 9 with the anchor holes 20, and the thickness is about 15 microns. (See Figure 2 ⁇ F>)
  • a metal plug 11 is added to the central pit of the polysilicon epitaxial layer 10.
  • the process is as follows: using Ti and Tin as transition layers, tungsten is deposited on the surface of the polycrystalline layer 10 (including the central hole). Then use chemical mechanical polishing to remove the metal layer other than the central pit, and make its surface flat and smooth to form Metal Race 11.
  • the silicon wafer 9 and the silicon layer 10 are subjected to photolithographic etching to form a movable electrode plate 12. Because the movable electrode plate 12 is thicker, XeF2 vapor corrosion is a better choice.
  • the subsequent process flow can be performed with reference to FIG. 1 ⁇ G> to FIG. 1 ⁇ J>.
  • the thickness of the diaphragm 2 is selected in the range of approximately 1 micrometer to 15 micrometers.
  • the thickness of the movable plate is not more than 20 microns.
  • the diameter of the thickness of the movable electrode plate is not more than 1 mm.
  • the ratio of the aperture of the part anchored on the diaphragm to the diameter of the movable plate is not greater than 1:10.
  • the distance between the movable plate and the stationary plate can be as small as about 1 micron.
  • the thickness of the diaphragm 2 ' can be more than 50 microns.
  • the thickness of the movable electrode plate 12 is 100 micrometers to 400 micrometers, and its diameter can reach 5 mm or more. Different size combinations can meet the requirements of different ranges and different drive circuits.
  • Fig. 4 ⁇ b> shows a third embodiment of the present invention. It is characterized in that the bracket 14 'for fixing the electrode plate 14 has a bent portion, and is sealed with the frame 5 as a whole through the low-melting glass layer 7 and the sealing base 15.
  • the sealing base 15 and the movable plate 4 ' are produced at the same time. They are the same height.
  • the end face of the bent portion of the stationary electrode plate holder 14 ' is narrower than the end face of the stationary electrode plate 14 by 0.1 mm.
  • a potassium chloride layer is sputtered on the surface of the fixed electrode plate 14.
  • the thickness of the potassium chloride is the design distance of the sensing capacitor plus the thickness of the sacrificial layer 3.
  • low melting glass can also be replaced by eutectic alloys such as gold-tin alloys, bismuth-tin alloys, and the like. If so, a chromium-gold coating should be sputtered on the surface to be sealed.
  • the aluminum layer 13 for the pressure-bonding lead shown in FIG. 4 ⁇ b> should be formed before the stationary electrode plate 14 is sealed. This not only facilitates cleaning, but also allows its alloying step to be combined with the step of sealing the stationary plate 14.
  • the bonding of the upper frame 5 "and the lower frame 5 uses an epoxy-based organic paste material, which can directly make the auxiliary circuit on the frame 5".
  • Figures 5 and 6 show the fourth and fifth embodiments of the present invention. They have in common the fact that the silicon wafer is first melt-bonded, and then subjected to chemical mechanical polishing to precisely control the thickness of the diaphragm 2 ', and then the movable electrode plate 4' (or 12) is fabricated on the surface of the diaphragm 2 ', Then, the membrane sheet 2 'and the frame 5' are melt-bonded, and after the bonding, the membrane sheet 2 'is selectively etched and released. This ensures the thickness, accuracy, uniformity and flatness of the diaphragm 2 '. This improves product consistency and facilitates mass production.
  • Fig. 5 is a flow chart of the manufacturing process of the first stage of the fourth embodiment.
  • 5 ⁇ A> and 5 ⁇ B> show the (100) P-type lower silicon wafer 1 and the (111) P + -type upper silicon wafer 2 respectively.
  • the doping concentration of the upper silicon wafer 2 is about 8 ⁇ 1019 cm 3.
  • the (111) P + type upper silicon wafer 2 is chemically and mechanically polished to accurately determine its thickness. And uniformity.
  • the dotted line in Figure 5 ⁇ D> indicates that the surface portion of the silicon wafer has been ground and polished to the required thickness, flatness, and finish. The following process flow can be performed as shown in Figure 1 ⁇ c> to Figure 1 ⁇ J>.
  • FIG. 6 The embodiment shown in FIG. 6 is formed by bonding upper and lower (100) P-type silicon wafers.
  • Fig. 6 ⁇ A> shows the lower silicon wafer 1
  • Fig. 6 ⁇ B> shows the upper silicon wafer 2 '.
  • a boron-doped layer 2 is formed on one surface of the lower silicon wafer 2 '(see FIG. 6 ⁇ c>). After the surface is chemically and mechanically polished, it is melt-bonded with the lower silicon wafer 1 and is bonded to the upper surface. The surface of the silicon wafer 2 'is subjected to chemical mechanical polishing in order to precisely control its thickness and flatness (see FIG. 6 ⁇ D>), and the dotted line in the figure indicates the part removed by polishing). This surface is then doped with concentrated boron as shown in Figure 6 ⁇ E>. The following process flow can be performed according to ⁇ C> to ⁇ H> in Figure 2.
  • FIG. 7 is a process flowchart of a sixth embodiment of the present invention.
  • This embodiment is different from the previous embodiment in three aspects: 1. Its elastic membrane 2 'and the silicon material used to fix its frame 5', regardless of the crystal orientation, doping material, doping concentration, and even the orientation of the reference plane. They are all the same, which basically eliminates many drift factors caused by material differences. 2.
  • its frame 5 ' is also provided with a small through hole 23 outside the through hole for drawing out the feeder of the diaphragm 2' and the movable plate 4 'from the front. This simplifies the process and improves production efficiency. 3.
  • the outer surface of the elastic diaphragm 2 ' is highly flat, which simplifies the method of determining the distance between the sensing capacitor poles. Only the flat plate 24 with a protruding round table 25 is used to closely adhere to the outer surface of the diaphragm 2', so that the diaphragm 2 'And the movable electrode plate 4' protrude inward to a certain height, and then can be sealed with low melting glass or eutectic gold-tin alloy or bismuth-tin alloy according to the conventional method. (See FIG. 9) The height of the circular table 25 is the distance between the sensing capacitor poles. If the diameter of the circular table 25 is smaller than or equal to the diameter of the anchor hole of the movable plate 4 '.
  • FIG. 7 ⁇ A> shows two silicon wafers.
  • the upper silicon wafer 2 ' is a (111) P + type silicon wafer, and the lower silicon wafer is a 100 (P) type silicon wafer.
  • a silicon dioxide layer 3 is generated on the surface of the silicon wafer 2 ', and the anchor hole 22 is etched in the center portion thereof, so that the underlying silicon surface is exposed.
  • a boron-doped polysilicon layer 4 is deposited in the silicon dioxide layer 3 and the holes 22 so that the thickness reaches about 20 microns.
  • Fig. 7 ⁇ G> is an upper frame 5 'made of a (111) P + type silicon wafer.
  • a small through hole 23 is also opened outside the central through hole. Vias are formed by deep reactive ion etching (DRIE) and have nearly vertical sidewalls.
  • DRIE deep reactive ion etching
  • FIG. 8 is a seventh embodiment of the present invention.
  • the structure of this embodiment is basically the same as that of the sixth embodiment, but its elastic diaphragm 2 'and upper and lower frames 5' and 5 are both (111) P + type silicon wafers. Their crystal orientation, doping concentration, and orientation of the primary and secondary reference planes are completely the same. This minimizes the associated temperature drift and static pressure drift. Its manufacturing process is as follows:
  • Fig. 8 ⁇ A> shows an SOI silicon wafer.
  • the upper silicon wafer 2 'and the lower silicon wafer 1 are both (100) P + type silicon wafers, and the middle interlayer is a silicon dioxide layer 3 with a thickness of about several microns.
  • Fig. 8 ⁇ F> shows the upper frame 5 ', which uses deep reactive ion etching (DRIE) to form a through hole with a nearly vertical hole wall.
  • DRIE deep reactive ion etching
  • a small through hole 23 on the outside of the central through hole is used for the sputtered (aluminum-silicon) conductive layer 24 to achieve low-ohmic contact with the diaphragm 2 'and the movable plate 4' and the feed path.
  • the fixed electrode plates 6 are placed above the movable electrode plate 4 ', and the end of the bracket 6' is coated with low melting glass, and they are sealed with the upper frame 5 'by using the aforementioned method of determining the minute electrode spacing. Into a whole.

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Abstract

一种带有弹性薄膜的电容式力敏传感器件，属于微机电器件技术领域。在传感器的弹性薄膜（2）的中心部位设有可动的电容极板（4'），电容的固定极板(6)则通过支架(6')固定在边框(5')上，与可动极板(4')保持微小极间距。制造时事先对用以制造弹性膜片（2）的基片进行精密外形加工，然后把可动极板（4'）锚定到膜片（2）表面，再把固定极板（6）封接到边框（5'）上。从而精密控制膜片（2）厚度、均匀性、平整度及传感电容的微小极间距，新结构在微型化同时具有高精度、高稳定性，便于廉价的批量生产。

Description

微小极间距电容式力敏传感器及其制造方法 技术领域
本发明涉及微小极间距电容式力敏传感器，特别涉及微型化的电容式力敏传感器，属微机电器件技术领域。
背景技术
电容式力敏器件一般都把对力敏感的弹性薄膜作为传感电容的可动极板。为了提高电容式力敏传感器的灵敏度和线性度，陆续有人提出在传感膜片上附加平板电极的方案。如英国专利GB2189607A，美国专利U.S.Patent4562742。及至MEMS器件问世，以U.S.Patent4203128为代表的利用半导体微加工技术制造小型化的力敏传感器的发明很多，但未见在弹性膜片中心附加平电极的方案。近年来市场上出现E型膜结构(也称岛膜结构)的电容式力敏器件，如中国专利03284809.9，它的弹性膜片中心厚四周薄，这样虽改善了线性，但弹性牺牲很大，仍有明显技术缺陷。
一般说，电容式力敏传感器有六大技术指标：1.重复性，2.线性度，3.产品一致性，4.灵敏度，5.稳定性，6.小型化。把平膜片(包括E型膜片)作为传感电容可动极板的力敏器件，结构上难以兼顾以上六大指标。例如：要提高第1.2.3.项指标需要使电容极间距加大，而要满足第4.5.6.项指标有应该减少电容极间距。有时同一技术指标又对结构参数提出相反要求。例如：减小传感电容极间距可以增大传感电容量从而提高其稳定性，但如果弹性膜片有潜在的应力变化，或周边固支强度不足，则电容极间距的减小，反而会降低它的稳定性。再加上与表面微加工伴生的不同材料的叠加，导电层与绝缘层的叠加，带来了诸多漂移因素。这使制造精密的、稳定性好的电容式力敏传感器成为难事。最终的结果是它的精度每提高一个数量级，价格也提升一个数量级甚至更多。
经分析，本人认为通过在电容式力敏传感器的弹性膜片上附加可动平板电极的方法可以较好的解决上述问题，从而方便、廉价地生产出高精度、高灵敏度、高稳定性、高一致性、高线性度、易于小型化的电容式力敏传感器。为此本人先后申请了以此为基本发明思想的三个中国专利。专利号分别是93118056.2、98100185.8、03131054.0。申请号为98100185.8的专利申请首次提出了用半导体微加工技术制造出弹性膜片中心带有附加平电极的MEMS电容式传感器件。本发明是它的后续技术。
发明内容
本发明的目的是在已有技术基础上改进传感器结构，并提出精密控制膜片厚度和平整度、均匀性、以及精密控制传感器微小极间距的简便的、便于批量生产方法。从而制造出高灵敏度、高重复性、高精度、高稳定性、天然线性输出且漂移小的廉价的力敏传感器件，特别是MEMS器件。
本发明的内容是电容式微小极间距力敏传感器。参见图10，它由膜片2、下边框5和上边框5’、定极板6、可动极板4’、盖板19等部分组成。膜片2由硅片经化学机械抛光并与边框键合后腐蚀产生。下边框5通过膜片外围部分和上边框5’键合成一个整体。不动极板6通过支架6’借助于低熔点玻璃7与边框封结成一个整体，并与可动极板4’保持精确间距。可动极板4’通过膜片2与边框5外侧的铝镀层13与外界保持低欧姆接触。而定极板6上的导电层通过支架6’上的键合点8经由盖板中心孔17引出馈线。
本发明主要内容如下：
<1>在本发明中，膜片和边框先是分开制造的。先把可动极板4’(或12)锚定到膜片的光滑表面，然后把它和边框熔融键合到一起，键合后在对膜片进行腐蚀减薄，这就使膜片的厚度和均匀性得到更精密的控制且高度平整，且便于利用集成电路工艺、设备进行批量生产、便于小型化。
<2>精密确定传感电容两极板微小极间距。基本步骤是：a.先在不动极板6的表面上真空蒸镀上一层氯化钾。b.再在不动极板支架6’两端涂上低熔点玻璃浆料。c.然后把它们放到可动极板正上方如图1<J>所示位置。d.接着沿不动极板6中心法线下压使不动极板6向下平移直至接触到膜片2的上表面以达到稳定平衡。此时可动极板6向下平移的距离等于牺牲层3的厚度。至此，低熔点玻璃浆料7被夹在支架6’与边框5’之间无缝隙。然后使低熔点玻璃7熔化把不动极板6与边框5’封接成一个整体。最后撤去下压力，用去离子水冲洗氯化钾并脱水干燥即可。氯化钾层的厚度应是所设计的极间距加上牺牲层3的厚度。
<3>用外延或扩散掺杂的方式形成弹性膜片2及可动极板4’的厚度有限。本发明采用硅—硅键合的方法突破这一限制。在形成膜片2(或2’)及可动极板4’(或12)的过程中，都采用化学机械抛光方法精密控制他们的厚度和均匀性。
<4>不动极板6(或14)的馈线由盖板19中心孔17引出以最大限度减少寄生电容及相关的介电漂移。
<5>本发明还提出了此类电容式力敏传感器的新结构。在这一结构中，不动极板14的支架14’带有弯折部分，或是在平直的不动极板支架6’上开出狭缝18。此两项措施的作用都是减小不动极板支架6(用硼硅玻璃如PYREX制造)和硅边框5’(或5)的热膨胀系数及杨氏弹性模量的差异造成的温度、静压漂移。
附图说明
图1为第一实施例制造流程图。
图2为第二实施例制造流程图。
图3为固定极板6及其支架6’的侧视图<a>及顶视图<b>。
图4<a>表示第一第二实施例中可动极板4’直径可大于正方形膜片2(或2’) 的边长。
图4<b>是第三实施例的剖面图。
图5是第四实施例的制作流程图。
图6是第五实施例的制造流程图。
图7是第六实施例的制造流程图。
图8是第七实施例的制造流程图。
图9表示另一种确定电容微小极间距的办法。
图10<a>所示为传感器盖板，<b>为该传感器立体图。
图11所示为不动极板6及其支架6’的制造流程图。
具体实施方式
第一个实施例如下：
参见图1<A><B>。在(100)P型单晶硅片上用扩散法进行浓硼扩散，然后高温退火，形成掺杂浓度为是的1019/cm 3的掺杂层2。
参见图1<c>。双面氧化硅片1，形成1微米厚的二氧化硅层3。
参见图1<D>。在此硅片的上表面光刻腐蚀二氧化硅层3，形成约200微米×200微米的孔，把孔下面的硅表面暴露出来，随后出去光刻胶。
参见图1<E>。在带有通孔的二氧化硅层3上外延生长浓硼掺杂的多晶硅层4。其厚度大于15微米，随后对外延层4进行化学机械抛光，使其表面光滑平整无毛刺。
参见图1<F>。光刻、腐蚀外延层4形成可动极板4’，并以4’为掩膜去除4’以外的二氧化硅层3。可动极板4’下面的二氧化硅层仍保留，标记为3’。
参见图1<G>。把在(111)晶面自停止腐蚀的有通孔的另一(100)P型硅片5’准确叠加到硅片1上(注意两硅片事先要用标准的RCA步骤清洗)两硅片叠加后实行熔融键合(SFB)。具体步骤参见“微机电系统(MEMS)工艺基础与应用”p106-p108。
当然，也可用用阳极键合或金硅共熔键合或共晶键合等方法把硅片1与上边框5’键合成整体。这样可降低键合温度、降低环境设备要求，便于把传感器与相关电路一体化制作。但两硅片之间的夹层会产生某种程度的漂移。
阳极键合上边框5’的具体步骤如下：
<a>在已蚀好通孔的上边框5’的欲键合表面先氧化出1微米厚的二氧化硅层，再在上面溅射约1微米厚的PYREX7740玻璃镀层。
<b>参见图1<F>。在形成了可动极板4’后，再以可动极板4’为掩膜去除其外的二氧化硅层3，仅留二氧化硅层3’。
<c>参见图1<G>。经过充分清洁处理，把上边框5’的PYREX7740玻璃镀层与下硅片1叠加。
<d>在上边框5’与下硅片1之间加200伏以上的适当直流电压，上边框为负极， 升温至450°，保温约20分钟完成键合。
参见图1<H><I>。对包括上边框5’的整个上表面隔离保护后，对下硅片1进行自停止腐蚀。基本步骤如下：
<a>在下硅片1的二氧化硅层3上腐蚀出方孔，方孔的中心法线与可动极板4’的中心法线重合，孔边与参考面平行。其边长与腐蚀形成上边框5’时所开的二氧化硅方孔的边长相等(如果两边框厚度相等的话)。如果上下边框厚度不相等可以通过简单设计计算确定边长。因为对于(100)硅片而言，(111)面与(100)面的交角54.7°是确定的。二氧化硅方孔的边长决定膜片的边长。
腐蚀液可以是各向异性腐蚀用的EDP腐蚀液。正面腐蚀到浓硼扩散层自停止形成膜片2。侧面腐蚀到(111)面自停止，形成下边框5。
参见图1<I>。图中13为含硅量为1-2％的铝-硅合金镀层。可动极板4’通过膜片2与其低欧姆电阻接触。13同时也是引线超声压焊的触点(焊盘)。铝镀层13应在边框5和5’熔融键合后形成，形成后需经500℃15分钟合金化处理。
参见图1<I>。合金化处理后，在带有可动极板4’及边框5’和导电层13的表面涂敷光刻胶，经曝光显影，使光刻胶覆盖上边框5’与膜片2的交接处21以及导电层13以及上下边框的全部接缝，然后用49％的氢氟酸在常温下去除可动极板4’下面的二氧化硅牺牲层3’，为缩短去除牺牲层3’的时间，应使膜片2以低频率轻微振动并充分搅动腐蚀液。
参见图3<a><b>。该力敏传感器的固定极板6及支架6’是用硼硅玻璃制造。极板表面溅射有导电铝层8.铝层8沿极板侧面延伸到背面再延伸支架6’上表面中部形成引线键合触点8’。导电层8的表面还需溅射上约50纳米厚的氧化铝层作为绝缘层。(此绝缘层在图中未画出)
参见图1<J>。在不定极板6的端面镀层8上溅射一定厚度的氯化钾或氯化钠之类的金属卤化物盐类，再在支架6’两端涂上低熔点玻璃浆料7，接着把它放在如图1<J>所示位置上。沿着可动极板中心法线方向施加适当压力，使支架6’两端与边框5’通过低熔点玻璃浆料7无缝连结。然后用激光使低熔点玻璃升温熔化，最终把不动极板6及支架6’与边框5’融封成一个整体。用去离子水洗去两电容极板间的氯化钾层，脱水、干燥后制作完成。
问题的关键在于如何精确保持传感电容的微小极间距，详细步骤如下：
精确控制氯化钾层的厚度。它的厚度应等于可动极板4’与不动极板6的设计间距加上牺牲层3的厚度。
在熔封低熔点玻璃7时，应事先沿着可动极板4’中心法线施加适当的力，使可动极板4’向下平移直至其周边接触到膜片2形成稳定平衡。为降低对下压力的控制精度要求从而方便操作，使可动极板4’的直径大于膜片2’的对边距离(参见 图4<a>)。这样，当可动极板4’(或12)被下压接触到边框5’的表面后，便难以随下压力的增加而改变位置，从而大大减轻操作难度。显然，此精确确定两极板微小极间距的方法也适用于其他实施例。如果膜片没有下边框，可把膜片外表面周围垫高，则氯化钾层厚度不变。如果不垫高，则氯化钾厚度即为设定的极间距离。
无论是扩散掺杂还是外延生长，受工艺条件限制，所形成的膜片都不会太厚，一般在20微米以内较容易做到。若需要较厚的弹性膜片2’或较厚的可动极板4’，则需要略有不同的实施途径。
下面是第二个实施例
如图2<A>所示。(100)型P型硅片1以及(100)P+型硅片2’。按与前一实施例相同的工艺规范对两个硅片实施熔融键合。再对硅片2’表面进行化学机械磨平抛光，使它达到所要求的的厚度并且有光洁平坦的表面。(参见图2<B>，图中虚线表示部分硅材料被磨削抛光。)
在此复合硅片上下表面氧化出二氧化硅层3。(参见图2<C>)
再把另一硅片9通过氧化层3与硅片2’熔融键合到一起。随后再次进行化学机械抛光，使硅片9具有所要求的的厚度。(参见图2<D>)
然后在硅片9的中心部位通过光刻，用BHF腐蚀液腐蚀出窗口，并以此窗口为掩膜去除它下面的二氧化硅层使硅片2’的相应部分裸露出来，形成锚定孔20，最后去除光刻胶。(参见图2<E>)
在开有锚定孔20的硅片9的表面外延浓硼掺杂的多晶硅层10，其厚度为15微米左右。(参见图2<F>)
参见图2<G>。对多晶硅外延层10的中心凹坑处加金属塞11。工艺过程如下：以Ti、Tin为过渡层对多晶层10表面(包括中心孔处)淀积钨。然后用化学机械抛光去除中心凹坑以外的金属层，并使其表面平坦光滑，形成金属赛11。
参见图2<H>。对硅片9及硅层10进行光刻腐蚀，形成可动极板12。因可动极板12较厚，采用XeF2蒸气腐蚀是更好的选择。
参见图2<H>。以可动电极12为掩膜，去除其外的二氧化硅层，留下二氧化硅层3’，然后去除光刻胶层。
此后的工艺流程可参照图1<G>至图1<J>进行。
在图1所示的第1个实施例中，膜片2的厚度约在1微米至15微米的大约范围内选择。可动极板的厚度不大于20微米。可动极板的厚度的直径不大于1毫米。它锚定在膜片上的部分的孔径与可动极板的直径的比例不大于1:10。可动极板与不动极板的间距可小到1微米左右。
在图2所示的实施例中，膜片2’的厚度可达50微米以上。可动极板12的厚度100微米至400微米，其直径可达5mm以上。不同尺寸组合适应不同的量程和不 同的驱动电路的要求。
图4<b>所示的是本发明的第三个实施例。它的特征在于其固定极板14的支架14’带有弯折部分，通过低熔点玻璃层7和封接基座15与边框5封接成一个整体。封接基座15与可动极板4’是同时生成的。它们的高度相同。不动极板支架14’的弯折部分的端面比不动极板14端面内缩0.1毫米。封接前先在不动极板14表面溅射上氯化钾层，氯化钾厚度为传感电容设计间距加上牺牲层3的厚度。在支架14’弯头端面上涂上适量的低熔点玻璃浆料7。把不动极板14放到图4<b>所示位置，注意使可动极板4’和不动极板14的中心法线重合。沿着此中心法线施加适当的力，使可动极板4’向下平移直至接触到边框5的表面。这时低熔点玻璃浆料7被夹在支架14’的端面和封接基座15之间，使两者之间无缝隙。最后使用激光焊接法局部加热或者整体升温使低熔点玻璃熔化，把两者封接成一个整体。当然低熔点玻璃也可用共晶合金如金锡合金、铋锡合金等来代替。如果这样做，应在拟封接的表面先溅射上一层铬—金镀层。
图4<b>所示的压焊引线用铝层13应在封接不动极板14前形成。这不但便于清洗，也使它的合金化工序可以和封接不动极板14的工序合并进行。
本实施例中上边框5”和下面框5的键合使用环氧树脂类有机粘贴材料，这可以把附属电路直接制作到边框5”上。
图5、图6所示为本发明的第四个和第五个实施例。它们的共同点是先把硅片熔融键合，然后在进行化学机械抛光，以精密控制膜片2’的厚度，随后把可动极板4’(或12)制作在膜片2’表面，接着把膜片2’与边框5’熔融键合，键合后再选择性腐蚀释放出膜片2’。这样做保证了膜片2’的厚度、精度及均匀性和平整度。从而提高产品的一致性并便于大批量生产。
图5为第四个实施例的前段制造工艺流程图。图5<A>和图5<B>分别表示出(100)P型下硅片1和(111)P+型上硅片2。
上硅片2的掺杂浓度约为8×1019cm 3，两硅片熔融键合如图5<c>所示后，对(111)P+型上硅片2进行化学机械抛光以精确确定其厚度及均匀性。图5<D>中的虚线表示此硅片表面部分被磨削抛光已达到要求的厚度、平整度、光洁度。接下去的工艺流程可按图1<c>至图1<J>所示进行。
图6所示实施例是由上、下(100)P型硅片键合而成。图6<A>所示为下硅片1，图6<B>所示为上硅片2’。
先在下硅片2’的一个表面形成浓硼掺杂层2(参见图6<c>)，对此表面进行化学机械抛光后，将它与下硅片1熔融键合，键合后对上硅片2’的表面进行化学机械抛光，以精密控制它的厚度、平整度(参见图6<D>)，图中虚线表示被抛光去除的部分)。然后对此表面进行浓硼掺杂如图6<E>所示。接下去的工艺流程可按照图 2<C>至<H>进行。
图7为本发明的第六个实施例的工艺流程图。此实施例有别于前实施例的特点有三：1.它的弹性膜片2’与固支它的边框5’所用的硅材料无论是晶向、掺杂材料、掺杂浓度乃至参考面方位都相同，这样就从根本上消除了由材料差异带来的诸多漂移因素。2.它的边框5’除中心通孔外，还在此通孔外开有小的通孔23，用以从正面引出膜片2’及可动极板4’的馈线。这简化了工艺，提高了生产效率。3.弹性膜片2’的外表面高度平坦，简化了确定传感电容极间距的方法——只需用带有突出圆台25的平板24紧贴膜片2’的外表面，使膜片2’及可动极板4’向内凸起一定高度，然后再按常规方法用低熔点玻璃或共晶金锡合金或铋锡合金封接即可。(参见图9)圆台25的高度即为传感电容极间距。如果圆台25的直径小于或等于可动极板4’锚定孔直径的话。
下面参考图7叙述此例实施过程。
图7<A>示出两个硅片。上硅片2’为(111)P+型硅片，下硅片为100(P)型硅片。
如图7<B>所示。把两个硅片熔融键合后，对硅片2’表面进行化学机械抛光，使硅片2’的厚度达到设计要求，并且高度平坦。图中虚线为被抛光去除的部分。
参见图7<C>。接着在硅片2’表面产生二氧化硅层3，并在其中心部位腐蚀出锚定孔22，使下面的硅表面裸露。
参见图7<D>。接着在二氧化硅层3及孔22内淀积浓硼掺杂的多晶硅层4，使其厚度达到20微米左右。
参见图7<E>和<F>。对多晶硅层4进行化学机械抛光后，把它腐蚀成可动极板4’，接着以4’为掩膜去除二氧化硅层3，仅保留4’下面的二氧化硅层3’。
图7<G>是用(111)P+型硅片制造的上边框5’。在它的中心通孔外侧还开有一个小通孔23。通孔是用深反应离子蚀到(DRIE)形成的，有近乎垂直的侧壁。
参见图7<H>。把边框5’与复合硅片(2’+1)熔融键合后，再去除可动极板4’下面的二氧化硅层3’。去除二氧化硅层3’的方法与第一个实施例论述相同(参见图1<I>)。接着，在遮挡住中心通孔后对通孔23的孔壁及孔底及部分端面溅射铝—硅合金层，并进行合金化处理，以形成对膜片2’和可动极板4’的馈电通道。
参见图7<I>。在保护住上表面的情况下腐蚀掉与膜片2’键合的(100)P型硅片。腐蚀液用EDP腐蚀液。
参见图7<J>。最后用低熔点玻璃或金锡共晶合金或铋锡合金7把不动极板6与边框5’封接到一起。精确保持极间距的方法前面已论述。(参见图9)
图8为本发明的第七个实施例。
该实施例的结构与第六实施例基本相同，但它的弹性膜片2’及上下边框5’和 5都是(111)P+型硅片。他们的晶向、掺杂浓度、以及主、副参考面的方位完全一致。这使与之相关的温度漂移及静压漂移都达到最小。其制造流程如下：
图8<A>所示为SOI硅片，上硅片2’与下硅片1均为(100)P+型硅片，中间夹层为二氧化硅层3，厚度约几微米。
对上硅片进行精密磨削和化学机械抛光。以精确控制它的厚度和平整度形成膜片2’。(参见图8<B>)然后双面氧化出二氧化硅层3。(参见图8<C>)在上氧化层上开锚定孔后淀积多晶硅层4经化学机械抛光后，光刻腐蚀出可动极板4’并去除4’以外的二氧化硅层3，仅留自身下面的二氧化硅层3’。图8<F>所示为上边框5’，它用深反应离子蚀刻技术(DRIE)形成有近乎垂直孔壁的通孔。中心通孔外侧的小通孔23供溅射(铝-硅)导电层24以实现与膜片2’及可动极板4’的低欧姆接触及馈道。
参见图8<G>。将上边框5’与由膜片2’和下硅片1组成的SOI复合硅片熔融键合。然后对下硅片进行深反应离子刻蚀，形成下边框5并以5为掩膜去除二氧化硅中间层3使膜片2’释放。再依前例除去可动极板4’下面的二氧化硅层3’。接着在孔23内壁与孔底膜片2’的裸露部分溅射上厚的铝硅合金层。最后，把不动极板6放置于可动极板4’上方，并在支架6’的端头涂上低熔点玻璃，并利用前述的确定微小极间距的方法把它们与上边框5’封成一个整体。

Claims (15)

  1. 一种微小极间距电容式力敏传感器，包括膜片.边框.不动极板及支架.可动极板.盖板。可动极板的中心部位锚定在膜片的中心部位。不动极板通过支架与边框封接成一个整体。盖板与边框上表面键合。其特征在于：先对膜片表面进行磨平抛光，再把可动极板锚定到膜片中心部位，然后把膜片周围部分与边框键合成一个整体，再对膜片的外表面腐蚀减薄，形成膜片外表面。
  2. 如权利要求1所述的电容式力敏传感器。其特征在于：所述的膜片是对带有重硼掺杂层或重硼掺杂外延层的(100)P型硅片实行自停止腐蚀产生的；硅片未受腐蚀部分形成下边框，上边框通过膜片外围部分和下边框键合，膜片位于两边框之间。
  3. 如权利要求1所述的电容式力敏传感器。其特征在于：所述的(100)P+型硅膜片是通过对复合硅片进行自停止腐蚀产生的；复合硅片由(100)P+型重硼掺杂硅片(100)P型硅片熔融键合而成。对(100)P+型硅片进行化学机械抛光以精密确定其厚度和平整度；(100)P型硅片受腐蚀部分形成下边框，上边框通过膜片外围部分与下边框键合。膜片位于两边框之间。
  4. 如权利要求1所述的电容式力敏传感器，其特征在于：其(111)P+型硅膜片是通过对复合硅片进行自停止腐蚀产生；复合硅片由(100)P型硅片和(111)P+型重硼掺杂硅片熔融键合而成，键合后对(111)P+型硅片表面进行磨平抛光以精确控制其厚度和平整度；复合硅片中的(100)P型硅片的未受腐蚀部分形成膜片的下边框，上边框通过膜片外围部分与下边框键合。膜片位于两边框之间。
  5. 如权利要求1所述的电容式力敏传感器，其特征在于它的(100)P型硅膜片是通过对复合硅片进行自停止腐蚀形成的；复合硅片由两片(100)P型硅片熔融键合而成，其中一硅片在键合前先掺杂一层重硼掺杂层，两硅片键合时此掺杂层夹在中间。键合后对有掺杂层的硅层表面进行化学机械抛光，然后对抛光表面再次进行重硼掺杂并再次进行化学机械抛光。在此表面锚定可动极板后，将此表面外围部分与边框键合。最后对此复合硅片的另一(100)P型硅片进行自停止腐蚀释放弹性膜片，其未受腐蚀部分形成下边框。下边框通过膜片外围部分与上边框键合。
  6. 如权利要求1所述的电容式力敏传感器，其特征在于：其(111)P+型硅膜片是通过对复合硅片自停止腐蚀产生；复合硅片由(111)P+型硅片及(100)P型硅片熔融键合而成，然后对其中的(111)P+型硅片进行化学机械抛光并在上面形成可动极板；最终，此表面与同为(111)P+型硅片熔融键合，然后用自停止腐蚀的方法去除复合硅片中全部(100)P型硅片层以形成(111)P+型硅膜片。膜片外围部分和(111)P+型硅边框键合成整体。当然，对于这个(100)P型硅片也可以只去除中间部分形成硅片，四周保留形成边框。
  7. 如权利要求1所述的电容式力敏传感器，其特征在于：其(100)P+型硅膜片是通过对SOI硅片的上层硅片进行磨削及化学机械抛光产生，然后在此表面形成可动极板；接着把此表面与(100)P+型的硅边框熔融键合；最后全部或部分蚀去SOI硅片的下层支撑硅片。
  8. 如权利要求1所述的电容式力敏传感器，其特征在于：它的可动极板包含两层材料。一层是通过二氧化硅层与膜片键合的单晶硅层，另一层是淀积其上并通过锚定孔锚定在膜片上的多晶硅层。
  9. 如权利要求1所述的电容式力敏传感器，其特征在于：其不动极板支架带有弯折部分。弯折部分的端头被封接在封接基座上，封接基座与下边框连为一体。
  10. 如权利要求1所述的电容式力敏传感器，其特征在于：精确确定可动极板与不动极板微小极间距的方法。此方法基本步骤如下：
    <a>在不动极板表面溅射上一层氯化钾。如果膜片四周带有下边框，氯化钾的厚度等于两极板之间设定的极间距加可动极板与膜片之间的间距。如果膜片周围不带有下边框，则氯化钾层的厚度即等于两极板间的设定极间距。在此情况下，也可将膜片外围垫高，垫高的高度大于可动极板与膜片之间距，则氯化钾层的厚度应等于两极板之间设定的极间距加可动极板与膜片之间的距离。
    <b>将不动极板置于可动极板正上方，在支架端头与边框(或封接基座)之间用低熔点玻璃浆料填满无缝隙。
    <c>沿着可动极板中心法线方向向下压可动极板，使它向下平移直至接触膜片表面形成稳定平衡。
    <d>升温熔化低熔点玻璃，把不动极板与边框封成整体。
    <e>用去离子水洗去氯化钾.脱水干燥。
    低熔点玻璃可用金锡共晶合金或铋锡合金等焊料取代。但是先要在封接部位溅射上铬金镀层。
  11. 如权利要求1所述的电容式力敏传感器，其特征在于：精确确定可动极板与不动极板微小极间距的方法。此方法基本步骤如下：
    <a>在高度平坦的硼硅玻璃表面用镀膜光刻腐蚀的方法形成柱状凸起，其直径略小于可动极板锚定孔的直径，其高度或等于设定的两极板的极间距(在没有下边框的情况下)，或等于设定的两极板的极间距加下边框的高度(在有下边框的情况下)。
    <b>把待封结的传感器置于此玻璃表面，其柱状凸起对准膜片中心即可动极板锚定孔位置。
    <c>对传感器边框施加适当压力，使它的下表面紧贴玻璃表面，从而使可动极板相对抬升。
    <d>把不动极板放到可动极板正上方，在用低熔点玻璃浆料填充支架端头与边框内壁(或封接基座)之间的缝隙。
    <e>升温熔化低熔点玻璃完成封接。
    低熔点玻璃可用金锡共晶合金或铋锡合金封焊料取代，但事先要在支架端头及边框封结部位先镀上铬—金镀层。
  12. 如权利要求1所述的电容式力敏传感器，其特征在于：精确确定可动极板与不动极板微小极间距的方法。此方法的基本步骤如下：
    <a>通过密封圈将待封接的传感器传压膜片外围与可控气压的管道连通。
    <b>将管道内气压升至大于满量程的某一值。
    <c>将不动极板放在可动极板的正上方，其支架与边框内壁或封接基座相邻，并用低熔点玻璃填充支架端头与边框间的缝隙。
    <d>用激光焊接的方法把不动极板与边框封成一个整体。
    <e>如果用金锡共晶合金或铋锡合金等金属焊料取代低熔点玻璃，应事先封接住镀上铬—金镀层。
  13. 如权利要求1所述的电容式力敏传感器，其特征在于：不动极板的直径略大于膜片对边距离。如果膜片是圆形的，则不动极板直径略大于膜片直径。
  14. 如权利要求1所述的电容式力敏传感器，其特征在于：不动极板的引出线被键合在不动极板支架中部顶端，由盖板中心孔引出。
  15. 如权利要求1所述的电容式力敏传感器，其特征在于：在不动极板支架上开有两两一组的一端开口另一端封口的狭缝。狭缝的开口端分别位于支架两侧。
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