WO2020051993A1 - 一种显示面板及其第一基板的制作方法 - Google Patents

一种显示面板及其第一基板的制作方法 Download PDF

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Publication number
WO2020051993A1
WO2020051993A1 PCT/CN2018/111333 CN2018111333W WO2020051993A1 WO 2020051993 A1 WO2020051993 A1 WO 2020051993A1 CN 2018111333 W CN2018111333 W CN 2018111333W WO 2020051993 A1 WO2020051993 A1 WO 2020051993A1
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Prior art keywords
shielding layer
film transistor
drain
source
thin film
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PCT/CN2018/111333
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English (en)
French (fr)
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刘凯军
卓恩宗
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惠科股份有限公司
重庆惠科金渝光电科技有限公司
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Priority to US16/311,177 priority Critical patent/US11249364B2/en
Publication of WO2020051993A1 publication Critical patent/WO2020051993A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1292—Multistep manufacturing methods using liquid deposition, e.g. printing

Definitions

  • This solution relates to the field of display technology, and more specifically, to a manufacturing method of a display panel and a first substrate thereof.
  • the liquid crystal display has many advantages such as a thin body, power saving, and no radiation, and has been widely used.
  • Most of the liquid crystal displays on the market are backlit liquid crystal displays, which include a liquid crystal panel and a backlight module.
  • the working principle of a liquid crystal panel is to place liquid crystal molecules in two parallel glass substrates, and apply a driving voltage to the two glass substrates to control the rotation direction of the liquid crystal molecules so as to refract the light of the backlight module to generate a picture.
  • Thin film transistor liquid crystal display (TFT-LCD) is mainly used for each pixel controlled by a thin film transistor (TFT) switch.
  • the gates of the TFT switches are connected together to form a gate line and a source electrode. Connected together to form a signal line.
  • TFT thin film transistor
  • the TFT can be brought into a conductive state, and at the same time, the display data reaches the drain of the TFT through a signal line, and the conductive TFT forms an electric field on the pixel and displays the liquid crystal display effect.
  • the light diffracted or refracted by the liquid crystal layer in the panel will partially enter the channel of the TFT, which affects the display effect.
  • the present application provides a display panel with reduced leakage current and a method for manufacturing a first substrate thereof.
  • a display panel including:
  • a second substrate corresponding to the first substrate
  • the thin film transistor includes a gate, a gate insulating layer and an active layer disposed on the gate, and a source and a drain;
  • the direction of the channel of the thin film transistor is inside, and the direction of the source and drain away from the channel is outside;
  • the thin film transistor In the direction away from the first substrate, the thin film transistor is provided with an insulating light shielding layer on an outer side surface of the source and an outer side surface of the drain, respectively.
  • the light shielding layer is an insulating light shielding layer
  • a source of the thin film transistor is directly in contact with the insulating light shielding layer
  • a drain of the thin film transistor is directly in contact with the insulating light shielding layer.
  • an insulating light-shielding layer is also provided on an upper surface of the gate insulating layer corresponding to a side of the source and not covered by the source.
  • an upper side of the gate insulating layer corresponding to a side of the drain and not covered by the drain is also provided with an insulating light-shielding layer.
  • the insulating light-shielding layer is formed by spraying with a high-precision spraying equipment.
  • an insulating light-shielding layer is not provided at a channel of the thin film transistor.
  • the source and drain electrodes are not provided with an insulating light-shielding layer on an upper surface close to the channel, and an insulating light-shielding layer is provided on an upper surface remote from the channel.
  • neither of the upper surfaces of the source and the drain is provided with an insulating light-shielding layer, and the insulating light-shielding layer is provided only on the outer side of the source and the outer side of the drain.
  • the present application also discloses a method for manufacturing a first substrate of a display panel, including a step of forming a thin film transistor on the first substrate;
  • the step of forming a thin film transistor includes the steps of forming a gate, forming a gate insulating layer and an active layer, and a source and a drain;
  • the step of forming a thin film transistor further includes a step of forming a light shielding layer on the outer side surface of the source and the outer side surface of the drain in a direction in which the thin film transistor is away from the first substrate, and a channel direction of the thin film transistor is inward The source and drain away from the channel are outside.
  • the step of forming a thin film transistor includes:
  • an insulating light-shielding layer is sprayed by a high-precision spraying device, respectively.
  • the inventor's research found that as the TFT of an ideal TFT-LCD display has a larger on-state current, the better, and a smaller off-state current, the better.
  • the TFT display mainly adopts a "back-through" irradiation method, even if a bottom-gate structure is used. There is still some diffracted or scattered light entering the TFT channel, which causes an increase in the off-state leakage current, which affects the display effect and even generates image sticking (IS).
  • an insulating light shielding layer is provided on the outer side of the source and the outer side of the drain, respectively, which can effectively block light reflected from the liquid crystal layer from entering the TFT channel from the outer side of the TFT, thereby reducing off-state leakage current.
  • FIG. 1 is a schematic diagram of a display panel according to an embodiment of the present application.
  • FIG. 2 is a schematic diagram of applying an insulating light-shielding layer according to an embodiment of the present application
  • FIG. 3 is a schematic diagram of another embodiment of applying an insulating light-shielding layer
  • FIG. 4 is a diagram of a method for manufacturing a first substrate of a display panel according to an embodiment of the present application.
  • an embodiment of the present application discloses a display panel, including:
  • the thin film transistor includes a gate electrode 20, a gate insulating layer 30 and an active layer 40 disposed on the gate electrode 20, and a source electrode 50 and a drain electrode 60;
  • the channel direction of the thin film transistor is inside, and the direction where the source 50 and the drain 60 are away from the channel is outside;
  • the thin film transistor is provided in a direction away from the first substrate 10, on an outer side surface of the source electrode 50 and above the gate insulating layer 30 on a side corresponding to the source electrode 50 and not covered by the source electrode 50.
  • the insulating light-shielding layer 70 has an insulating light-shielding layer 70 on the outer surface of the drain 60 and on the side of the drain 60 that is above the gate insulating layer 30 and is not covered by the drain 60. 70 is sprayed with high precision spray (Inkjet) equipment.
  • the TFT display mainly adopts a "back-through" irradiation method, even if a bottom-gate structure is used. There is still some diffracted or scattered light entering the TFT channel which causes the increase of off-state leakage current, which affects the display effect and even produces image sticking.
  • an insulating light shielding layer 70 is provided on the outer side of the source 50 and the outer side of the drain 60, which can effectively block light reflected from the liquid crystal layer from entering the TFT channel from the outer side of the TFT, thereby reducing off-state leakage. Current.
  • the active layer includes a doped layer 42 and an amorphous silicon layer 41, and the doped layer is located above the amorphous silicon layer.
  • the display panel includes:
  • the thin film transistor includes a gate, a gate insulating layer 30 and an active layer 40 disposed on the gate, and a source 50 and a drain 60;
  • the channel direction of the thin film transistor is inside, and the direction where the source 50 and the drain 60 are away from the channel is outside;
  • the thin film transistor is provided with a light shielding layer on an outer side surface of the source electrode 50 and an outer side surface of the drain electrode 60, respectively.
  • the TFT display mainly adopts a "back-through" irradiation method, even if a bottom-gate structure is used. There is still some diffracted or scattered light entering the TFT channel which causes the increase of off-state leakage current, which affects the display effect and even produces image sticking.
  • an insulating light shielding layer 70 is provided on the outer side of the source 50 and the outer side of the drain 60, which can effectively block light reflected from the liquid crystal layer from entering the TFT channel from the outer side of the TFT, thereby reducing off-state leakage. Current.
  • the light shielding layer is an insulating light shielding layer 70
  • the insulating light shielding layer 70 is a black matrix
  • the source electrode 50 of the thin film transistor is directly in contact with the insulating light shielding layer 70
  • the drain of the thin film transistor is The electrode 60 is in direct contact with the insulating light-shielding layer 70.
  • the source electrode 50 and the drain electrode 60 of the thin film transistor are in direct contact with the insulating light shielding layer 70, and the direct contact is the closest, so the light shielding effect is the best.
  • an upper surface of the gate insulating layer 30 corresponding to a side of the source electrode 50 and not covered by the source electrode 50 is also provided. Insulation light-shielding layer 70.
  • the insulation light-shielding layer 70 on the source 50 side covers a wider area, which can better prevent light from entering and better reduce off-state leakage current.
  • the upper surface of the gate insulating layer 30 corresponding to the side of the drain 60 and not covered by the drain 60 is also provided. Insulation light-shielding layer 70.
  • the insulating light-shielding layer 70 on the side of the drain 60 covers a wider area, can better absorb light and prevent light from entering, and can further reduce leakage current.
  • the insulating light-shielding layer 70 is formed by spraying with a high-precision spraying equipment.
  • the high-precision Inkjet equipment has a spray accuracy of 1 micron, and the operation process is simpler, without exposure and development; of course, it can also be formed on the outside using exposure and development.
  • the channel of the thin film transistor is not provided with an insulating light shielding layer 70.
  • the channel between the source electrode 50 and the drain electrode 60 is not provided with an insulating light-shielding layer 70, so as to avoid adverse effects on the channel region during the process of processing the insulating light-shielding layer 70;
  • an additional protective layer is provided to protect the channel material. Improper processing may cause an increase in leakage current and cause afterimages. The appearance of (IS), so the insulating light-shielding layer 70 is not coated on the channel of the thin film transistor, which has the least influence on the channel region and the simplest process.
  • the source electrode 50 and the drain electrode 60 are not provided with an insulating light shielding layer 70 on an upper surface close to the channel, and an insulating light shielding layer 70 is provided on an upper surface remote from the channel.
  • the source electrode 50 and the drain electrode 60 are not provided with an insulating light shielding layer 70 on the upper surface near the channel, so as to avoid a process error in the process of processing the insulating light shielding layer 70 from adversely affecting the channel region;
  • the upper surface of the source 50 and the drain 60 far from the channel is also provided with an insulating light-shielding layer 70 to make the light-shielding effect at the junction of the edges of the source 50 and the drain 60 better.
  • neither of the upper surfaces of the source electrode 50 and the drain electrode 60 is provided with an insulating light-shielding layer 70.
  • the insulating light-shielding layer 70 is provided only on the outer side surface of the source electrode 50 and the drain electrode 60. Outside.
  • the source electrode 50 and the drain electrode 60 have a light-shielding effect, the source electrode 50 and the drain electrode 60 may not be provided with the insulating light-shielding layer 70 on the upper surface far from the channel. Such a design has higher requirements for processing accuracy.
  • a method for manufacturing a first substrate of a display panel including a step of forming a thin film transistor on the first substrate 10;
  • the step of forming a thin film transistor includes the steps of forming a gate, forming a gate insulating layer 30 and an active layer 40, and a source 50 and a drain 60;
  • the step of forming a thin film transistor further includes a step of forming a light shielding layer on an outer side surface of the source electrode 50 and an outer side surface of the drain electrode 60 in a direction in which the thin film transistor is far from the first substrate 10, and a channel of the thin film transistor.
  • the direction is the inside, and the direction in which the source 50 and the drain 60 are away from the channel is the outside.
  • the light-shielding layer is an insulating light-shielding layer 70.
  • the insulation light-shielding layer 70 is formed and brought into direct contact with the source electrode 50 of the thin film transistor;
  • the light shielding layer 70 is in direct contact with the drain electrode 60 of the thin film transistor.
  • the source electrode 50 and the drain electrode 60 of the thin film transistor are in direct contact with the insulating light shielding layer 70, and the direct contact is the closest, so the light shielding effect is the best.
  • the gate electrode of the thin film transistor is located outside the gate, and the upper side of the gate insulating layer 30 corresponds to a side of the source electrode 50 and is not the source electrode 50
  • the covered upper surface is also provided with an insulating light-shielding layer 70.
  • the insulating light-shielding layer 70 on the source 50 side covers a wider area, can better absorb light to prevent light from entering, and can better reduce leakage current.
  • the gate electrode of the thin film transistor is located outside the gate, and the upper side of the gate insulating layer 30 corresponds to a side of the drain electrode 60 without being leaked.
  • the upper surface covered by the electrode 60 is also provided with an insulating light-shielding layer 70.
  • the insulating light-shielding layer 70 on the side of the drain 60 covers a wider area, can better absorb light and prevent light from entering, and can further reduce leakage current.
  • the source light source 50 and the drain electrode 60 are not provided with an insulating light-shielding layer 70 on an upper surface near the channel.
  • the insulating light-shielding layer 70 on the side of the drain 60 covers a wider area, can better absorb light and prevent light from entering, and can further reduce leakage current.
  • the channel of the thin film transistor is not provided with the insulating light shielding layer 70.
  • the channel between the source electrode 50 and the drain electrode 60 is not provided with an insulating light-shielding layer 70, so as to avoid adverse effects on the channel region during the process of processing the insulating light-shielding layer 70;
  • an additional protective layer is provided to protect the channel material. Improper processing may cause an increase in leakage current and cause afterimages. The appearance of (IS), so the insulating light-shielding layer 70 is not coated on the channel of the thin film transistor, which has the least influence on the channel region and the simplest process.
  • both ends of the gate electrode exceed both ends of the corresponding source electrode 50 and the drain electrode 60.
  • the two ends of the gate extend beyond the corresponding ends of the source 50 and the drain 60, and the space into which light can enter is relatively reduced, which can better prevent light from entering.
  • the step of forming a thin film transistor includes:
  • S41 forming a gate, a gate insulating layer 30 and an active layer 40, and a source 50 and a drain 60;
  • the insulating light-shielding layer 70 is sprayed on the outer side surface of the source electrode 50 and the outer side surface of the drain electrode 60 by high-precision spraying equipment, respectively.
  • the spray accuracy of the high-precision spraying (Inkjet) equipment has been as small as 1 micron or less, and its processing accuracy is sufficient.
  • the use of high-precision spraying equipment to form the insulating light-shielding layer 70 has a simpler operation process and does not involve exposure and development.
  • the panel of the present application may be a TN panel (full name is Twisted Nematic, that is, a twisted nematic panel), an IPS panel (In-Plane Switching, plane conversion), a VA panel (Multi-domain Vertical Alignment), Of course, other types of panels can also be used, as long as they are applicable.
  • TN panel full name is Twisted Nematic, that is, a twisted nematic panel
  • IPS panel In-Plane Switching, plane conversion
  • VA panel Multi-domain Vertical Alignment

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Abstract

本申请公开了一种显示面板及其第一基板的制作方法，显示面板包括：第一基板，设置有薄膜晶体管；薄膜晶体管包括栅极、源极和漏极，在源极和漏极的外侧面分别设置有遮光层。

Description

一种显示面板及其第一基板的制作方法
本申请要求于2018年9月11日提交中国专利局、申请号为CN 201811054993.5、发明名称为“一种显示面板及其第一基板的制作方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本方案涉及显示技术领域，更具体的说，涉及一种显示面板及其第一基板的制作方法。
背景技术
液晶显示器具有机身薄、省电、无辐射等众多优点，得到了广泛的应用。市场上的液晶显示器大部分为背光型液晶显示器，其包括液晶面板及背光模组(Backlight Module)。液晶面板的工作原理是在两片平行的玻璃基板当中放置液晶分子，并在两片玻璃基板上施加驱动电压来控制液晶分子的旋转方向，以将背光模组的光线折射出来产生画面。
薄膜晶体管液晶显示器(Thin film transistor-liquid crystal display,TFT-LCD)主要采用每一个像素由一个薄膜晶体管(Thin film transistor，TFT)开关控制，TFT开关的栅极连在一起组成栅线，源极连在一起组成信号线。当在TFT的栅极上施加电压时，可使TFT进入导通状态，同时显示数据通过信号线、导通的TFT到达TFT的漏极上，在像素上形成电场并对液晶充电实现显示效果。
示例性的液晶显示装置的背光发出的光射入面板中后，光线在面板中经液晶层衍射或折射的光会有部分进入TFT的沟道内，影响显示效果。
技术解决方案
本申请提供一种降低漏电流的显示面板及其第一基板的制作方法。
为实现上述目的，本申请提供了一种显示面板，包括：
第一基板，所述第一基板上设置有薄膜晶体管；
第二基板，与所述第一基板对应设置；
所述薄膜晶体管包括有栅极、设置在栅极上的栅极绝缘层和有源层以及源极和漏极；
所述薄膜晶体管的沟道方向为内侧，源极和漏极远离沟道的方向为外侧；
所述薄膜晶体管在远离第一基板的方向上，在源极的外侧面和漏极的外侧面分别设置有绝缘遮光层。
可选的，所述的遮光层为绝缘遮光层，所述薄膜晶体管的源极直接与绝缘遮光层接触，所述薄膜晶体管的漏极直接与绝缘遮光层接触。
可选的，所述薄膜晶体管的栅极的外侧方向上，所述栅极绝缘层的上方对应源极的一侧且未被所述源极覆盖的上表面也设置有绝缘遮光层。
可选的，所述薄膜晶体管的栅极的外侧方向上，所述栅极绝缘层的上方对应漏极的一侧且未被所述漏极覆盖的上表面也设置有绝缘遮光层。
可选的，所述绝缘遮光层利用高精度喷涂设备喷涂形成。
可选的，所述薄膜晶体管的沟道处不设置有绝缘遮光层。
可选的，所述源极和漏极在靠近沟道的上表面不设置有绝缘遮光层，在远离沟道的上表面设置有绝缘遮光层。
可选的，所述源极和漏极的上表面均不设置有绝缘遮光层，所述绝缘遮光层仅设置在所述源极的外侧面和漏极的外侧面。
本申请还公开了一种显示面板的第一基板的制作方法，包括在第一基板上形成薄膜晶体管的步骤；
所述形成薄膜晶体管的步骤包括有形成栅极、形成栅极绝缘层和有源层以及源极和漏极的步骤；
其中，所述形成薄膜晶体管的步骤还包括有在薄膜晶体管远离第一基板的方向上源极的外侧面和漏极的外侧面分别形成遮光层的步骤，所述薄膜晶体管的沟道方向为内侧，源极和漏极远离沟道的方向为外侧。
可选的，所述形成薄膜晶体管的步骤包括：
形成栅极、栅极绝缘层和有源层以及源极和漏极；
在源极的外侧面和漏极的外侧面分别通过高精度喷涂设备喷涂绝缘遮光层。
发明人研究发现，由于理想TFT-LCD显示器的TFT的开态电流越 大越好，关态电流越小越好。但是TFT的显示主要采用“背透式”的照射方式，即使采用底栅结构。仍然有部分衍射或散射光等进入TFT沟道内引起关态漏电流的增大，从而影响显示效果，甚至产生图像残留(Image Sticking，IS)。本方案中，在源极的外侧面和漏极的外侧面分别设置有绝缘遮光层，可以有效遮挡从液晶层反射的光从TFT的外侧面进入TFT沟道内，从而降低关态漏电流。
附图说明
所包括的附图用来提供对本申请实施例的进一步的理解，其构成了说明书的一部分，也是本申请的实施方式的示例，并与文字描述一起来阐释本申请的原理。显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。在附图中：
图1是本申请实施例一种显示面板的示意图；
图2是本申请实施例一种涂布绝缘遮光层的示意图；
图3是本申请实施例另一种涂布绝缘遮光层的示意图；
图4是本申请实施例一种显示面板的第一基板的制作方法图。
本发明的实施方式
这里所公开的具体结构和功能细节仅仅是代表性的，是描述本申请的示例性实施例的目的。但是本申请可以通过许多替换形式来具体实现，并且不应当被解释成仅仅受限于这里所阐述的实施例。
在本申请的描述中，要理解的是，术语“中心”、“横向”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，术语“第一”、“第二”仅描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请的描述中，除非另有说明，“多个”的含义是两个或两个以上。另外，术语“包括”及其任何变形，意图在于覆盖不排他的包含。
在本申请的描述中，说明的是，除非另有明确的规定和限定，术 语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本申请中的具体含义。
这里所使用的术语仅仅是为了描述具体实施例而不意图限制示例性实施例。除非上下文明确地另有所指，否则这里所使用的单数形式“一个”、“一项”还意图包括复数。还应当理解的是，这里所使用的术语“包括”和/或“包含”规定所陈述的特征、整数、步骤、操作、单元和/或组件的存在，而不排除存在或添加一个或更多其他特征、整数、步骤、操作、单元、组件和/或其组合。
在图中，结构相似的单元是以相同标号表示。
如图1至图3所示，本申请实施例公布了一种显示面板，包括：
第一基板10，所述第一基板10上设置有薄膜晶体管；
第二基板，与所述第一基板10对应设置；
所述薄膜晶体管包括有栅极20、设置在栅极20上的栅极绝缘层30和有源层40以及源极50和漏极60；
所述薄膜晶体管的沟道方向为内侧，源极50和漏极60远离沟道的方向为外侧；
所述薄膜晶体管在远离第一基板10的方向上，在源极50的外侧面及栅极绝缘层30的上方对应源极50的一侧且未被所述源极50覆盖的上表面设置有绝缘遮光层70，在漏极60的外侧面及栅极绝缘层30的上方对应漏极60的一侧且未被所述漏极60覆盖的上表面有绝缘遮光层70，所述绝缘遮光层70用高精度喷涂(Inkjet)设备喷涂。
由于理想TFT-LCD显示器的TFT的开态电流越大越好，关态电流越小越好。但是TFT的显示主要采用“背透式”的照射方式，即使采用底栅结构。仍然有部分衍射或散射光等进入TFT沟道内引起关态漏电流的增大，从而影响显示效果，甚至产生Image sticking。本方案中，在源极50的外侧面和漏极60的外侧面分别设置有绝缘遮光层70，可以有效遮挡从液晶层反射的光从TFT的外侧面进入TFT沟道内，从而降低关态漏电流。
其中，有源层包括掺杂层42和非晶硅层41，掺杂层位于非晶硅 层的上方。
作为本申请的另一实施例，参考1至图4所示，公开了一种显示面板，所述显示面板包括：
第一基板10，所述第一基板10上设置有薄膜晶体管；
第二基板，与所述第一基板10对应设置；
所述薄膜晶体管包括有栅极、设置在栅极上的栅极绝缘层30和有源层40以及源极50和漏极60；
所述薄膜晶体管的沟道方向为内侧，源极50和漏极60远离沟道的方向为外侧；
所述薄膜晶体管在远离第一基板10的方向上，在源极50的外侧面和漏极60的外侧面分别设置有遮光层。
由于理想TFT-LCD显示器的TFT的开态电流越大越好，关态电流越小越好。但是TFT的显示主要采用“背透式”的照射方式，即使采用底栅结构。仍然有部分衍射或散射光等进入TFT沟道内引起关态漏电流的增大，从而影响显示效果，甚至产生Image sticking。本方案中，在源极50的外侧面和漏极60的外侧面分别设置有绝缘遮光层70，可以有效遮挡从液晶层反射的光从TFT的外侧面进入TFT沟道内，从而降低关态漏电流。
本实施例可选的，所述的遮光层为绝缘遮光层70，所述绝缘遮光层70为黑矩阵，所述薄膜晶体管的源极50直接与绝缘遮光层70接触，所述薄膜晶体管的漏极60直接与绝缘遮光层70接触。
本方案中，薄膜晶体管的源极50和漏极60直接和绝缘遮光层70接触，直接接触最紧密，因此遮光效果最好。
本实施例可选的，所述薄膜晶体管的栅极的外侧方向上，所述栅极绝缘层30的上方对应源极50的一侧且未被所述源极50覆盖的上表面也设置有绝缘遮光层70。
源极50一侧的绝缘遮光层70覆盖的范围更广，能更好的防止光的进入，更好的降低关态漏电流。
本实施例可选的，所述薄膜晶体管的栅极的外侧方向上，所述栅极绝缘层30的上方对应漏极60的一侧且未被所述漏极60覆盖的上表面也设置有绝缘遮光层70。
漏极60一侧的绝缘遮光层70覆盖的范围更广，能更好的吸光防 止光的进入，更好的降低漏电流。
本实施例可选的，所述绝缘遮光层70利用高精度喷涂设备喷涂形成。
高精度Inkjet设备的喷射精度为1微米，操作工序更简单，不曝光显影；当然，使用曝光显影在外侧也可形成。
本实施例可选的，所述薄膜晶体管的沟道处不设置有绝缘遮光层70。
本方案中，源极50和漏极60之间的沟道不设置有绝缘遮光层70，以避免在加工绝缘遮光层70的工艺中对沟道区域产生不良影响；尤其是对采用高精度喷涂设备喷涂制程绝缘遮光层70的方案来说，由于沟道内的非晶硅对水等材料非常敏感，额外设置保护层保护沟道材料，处理不好就可能引起漏电流的增大，导致残影(IS)的出现，因此绝缘遮光层70不涂布在薄膜晶体管的沟道处，其对沟道区的影响最小，制程最简单。
本实施例可选的，所述源极50和漏极60在靠近沟道的上表面不设置有绝缘遮光层70，在远离沟道的上表面设置有绝缘遮光层70。
本方案中，源极50和漏极60的在靠近沟道的上表面不设置有绝缘遮光层70，以避免在加工绝缘遮光层70的工艺中的工艺误差对沟道区域产生不良影响；在远离沟道的源极50和漏极60的上表面也设置有绝缘遮光层70，以使得源极50和漏极60边缘交接处的遮光效果更好。
本实施例可选的，所述源极50和漏极60的上表面均不设置有绝缘遮光层70，所述绝缘遮光层70仅设置在所述源极50的外侧面和漏极60的外侧面。
由于源极50和漏极60本身就具有遮光效果，源极50和漏极60在远离沟道的上表面也可同样不设置有绝缘遮光层70，这样的设计对加工精度的要求较高。
作为本申请的另一实施例，参考图4所示，公开了一种显示面板的第一基板的制作方法，包括在第一基板10上形成薄膜晶体管的步骤；
所述形成薄膜晶体管的步骤包括有形成栅极、形成栅极绝缘层30和有源层40以及源极50和漏极60的步骤；
其中，所述形成薄膜晶体管的步骤还包括有在薄膜晶体管远离第一基板10的方向上源极50的外侧面和漏极60的外侧面分别形成遮光 层的步骤，所述薄膜晶体管的沟道方向为内侧，源极50和漏极60远离沟道的方向为外侧。
本实施例可选的，所述的遮光层为绝缘遮光层70，其中，在形成绝缘遮光层70的步骤中，形成绝缘遮光层70并使其与薄膜晶体管的源极50直接接触；形成绝缘遮光层70并使其与薄膜晶体管的漏极60直接接触。
本方案中，薄膜晶体管的源极50和漏极60直接和绝缘遮光层70接触，直接接触最紧密，因此遮光效果最好。
本实施例可选的，在形成绝缘遮光层70的步骤中，薄膜晶体管的栅极的外侧方向，所述栅极绝缘层30的上方对应源极50的一侧且未被所述源极50覆盖的上表面也设置有绝缘遮光层70。
源极50一侧的绝缘遮光层70覆盖的范围更广，能更好的吸光防止光的进入，更好的降低漏电流。
本实施例可选的，在形成绝缘遮光层70的步骤中，所述薄膜晶体管的栅极的外侧方向，所述栅极绝缘层30的上方对应漏极60的一侧且未被所述漏极60覆盖的上表面也设置有绝缘遮光层70。
漏极60一侧的绝缘遮光层70覆盖的范围更广，能更好的吸光防止光的进入，更好的降低漏电流。
本实施例可选的，在形成绝缘遮光层70的步骤中，所述源极50和漏极60的在靠近沟道的上表面不设置有绝缘遮光层70。
漏极60一侧的绝缘遮光层70覆盖的范围更广，能更好的吸光防止光的进入，更好的降低漏电流。
本实施例可选的，在形成绝缘遮光层70的步骤中，所述薄膜晶体管的沟道处不设置有绝缘遮光层70。
本方案中，源极50和漏极60之间的沟道不设置有绝缘遮光层70，以避免在加工绝缘遮光层70的工艺中对沟道区域产生不良影响；尤其是对采用高精度喷涂设备喷涂制程绝缘遮光层70的方案来说，由于沟道内的非晶硅对水等材料非常敏感，额外设置保护层保护沟道材料，处理不好就可能引起漏电流的增大，导致残影(IS)的出现，因此绝缘遮光层70不涂布在薄膜晶体管的沟道处，其对沟道区的影响最小，制程最简单。
本实施例可选的，在形成绝缘遮光层70的步骤中，所述栅极的 两端超出对应的源极50和漏极60的两端。
本方案中，栅极的两端超出对应的源极50和漏极60的两端，光照可进入的空间相对减少，可以更好的避免光的进入。
本实施例可选的，所述形成薄膜晶体管的步骤包括：
S41：形成栅极、栅极绝缘层30和有源层40以及源极50和漏极60；
S42：在源极50的外侧面和漏极60的外侧面分别通过高精度喷涂设备喷涂绝缘遮光层70。
高精度喷涂(Inkjet)设备的喷射精度最小已经到1微米甚至更小，其加工精度已经足够。而使用高精度喷涂设备形成绝缘遮光层70，其操作工序更简单，不曝光显影。
本申请的面板可以是TN面板(全称为Twisted Nematic，即扭曲向列型面板)、IPS面板(In-Plane Switching，平面转换)、VA面板(Multi-domain Vertical Alignment，多象限垂直配向技术)，当然，也可以是其他类型的面板，适用即可。
以上内容是结合具体的优选实施方式对本申请所作的进一步详细说明，不能认定本申请的具体实施只局限于这些说明。对于本申请所属技术领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干简单推演或替换，都应当视为属于本申请的保护范围。

Claims (17)

  1. 一种显示面板，包括：
    第一基板，设置有薄膜晶体管；
    所述薄膜晶体管包括栅极、设置在栅极上的栅极绝缘层和有源层以及源极和漏极；
    所述薄膜晶体管的沟道方向为内侧，源极和漏极远离沟道的方向为外侧；
    所述薄膜晶体管在远离第一基板的方向上，在源极的外侧面和漏极的外侧面分别设置有遮光层。
  2. 如权利要求1所述的一种显示面板，其中，所述的遮光层为绝缘遮光层，所述薄膜晶体管的源极直接与所述绝缘遮光层接触，所述薄膜晶体管的漏极直接与所述绝缘遮光层接触。
  3. 如权利要求2所述的一种显示面板，其中，所述薄膜晶体管的栅极的外侧方向上，所述栅极绝缘层的上方对应源极的一侧且未被所述源极覆盖的上表面也设置有绝缘遮光层。
  4. 如权利要求2所述的一种显示面板，其中，所述薄膜晶体管的栅极的外侧方向上，所述栅极绝缘层的上方对应漏极的一侧且未被所述漏极覆盖的上表面也设置有绝缘遮光层。
  5. 如权利要求2所述的一种显示面板，其中，所述绝缘遮光层利用高精度喷涂设备喷涂形成。
  6. 如权利要求2所述的一种显示面板，其中，所述薄膜晶体管的沟道处不设置有绝缘遮光层。
  7. 如权利要求5所述的一种显示面板，其中，所述源极和漏极在靠近沟道的上表面不设置有绝缘遮光层，在远离沟道的上表面设置有绝缘遮光层。
  8. 如权利要求7所述的一种显示面板，其中，所述源极和漏极的上表面均不设置有绝缘遮光层，所述绝缘遮光层仅设置在所述源极的外侧面和漏极的外侧面。
  9. 一种显示面板，包括：
    第一基板，所述第一基板上设置有薄膜晶体管；
    第二基板，与所述第一基板对应设置；
    所述薄膜晶体管包括有栅极、设置在栅极上的栅极绝缘层和有源层以及源极和漏极；
    所述薄膜晶体管的沟道方向为内侧，源极和漏极远离沟道的方向为外侧；
    所述薄膜晶体管在远离第一基板的方向上，在源极的外侧面及栅极绝缘层的上方对应源极的一侧且未被所述源极覆盖的上表面设置有绝缘遮光层，在漏极的外侧面及栅极绝缘层的上方对应漏极的一侧且未被所述漏极覆盖的上表面有绝缘遮光层，所述绝缘遮光层用高精度喷涂设备喷涂。
  10. 一种显示面板的第一基板的制作方法，包括：
    在第一基板上形成薄膜晶体管；
    所述在第一基板上形成薄膜晶体管的步骤包括：形成栅极、形成栅极绝缘层和有源层以及源极和漏极；
    所述在第一基板上形成薄膜晶体管的步骤还包括：有在薄膜晶体管远离第一基板的方向上源极的外侧面和漏极的外侧面分别形成遮光层；其中，所述薄膜晶体管的沟道方向为内侧，源极和漏极远离沟道的方向为外侧。
  11. 如权利要求10所述的一种显示面板的第一基板的制作方法，其中，所述薄膜晶体管在远离第一基板的方向上，在源极的外侧面和漏极的外侧面分别设置有遮光层的步骤包括：
    所述的遮光层为绝缘遮光层，薄膜晶体管的源极直接与绝缘遮光层接触，薄膜晶体管的漏极直接与绝缘遮光层接触。
  12. 如权利要求10所述的一种显示面板的第一基板的制作方法，其中，在薄膜晶体管远离第一基板的方向上源极的外侧面和漏极的外侧面分别形成遮光层的步骤包括：
    薄膜晶体管的栅极的外侧方向上，所述栅极绝缘层的上方对应源极的一侧且未被所述源极覆盖的上表面也设置有绝缘遮光层。
  13. 如权利要求10所述的一种显示面板的第一基板的制作方法，其中， 在薄膜晶体管远离第一基板的方向上源极的外侧面和漏极的外侧面分别形成遮光层的步骤包括：
    薄膜晶体管的栅极的外侧方向上，栅极绝缘层的上方对应漏极的一侧且未被漏极覆盖的上表面也设置有绝缘遮光层。
  14. 如权利要求10所述的一种显示面板的第一基板的制作方法，其中，在薄膜晶体管远离第一基板的方向上源极的外侧面和漏极的外侧面分别形成遮光层的步骤包括：
    利用高精度喷涂设备喷涂形成绝缘遮光层。
  15. 如权利要求10所述的一种显示面板的第一基板的制作方法，其中，在薄膜晶体管远离第一基板的方向上源极的外侧面和漏极的外侧面分别形成遮光层的步骤包括：
    所述薄膜晶体管的沟道处不设置有绝缘遮光层。
  16. 如权利要求15所述的一种显示面板的第一基板的制作方法，其中，在薄膜晶体管远离第一基板的方向上源极的外侧面和漏极的外侧面分别形成遮光层的步骤包括：
    源极和漏极在靠近沟道的上表面不设置绝缘遮光层，在远离沟道的上表面设置绝缘遮光层。
  17. 如权利要求15所述的一种显示面板的第一基板的制作方法，其中，源极和漏极在靠近沟道的上表面不设置绝缘遮光层，在远离沟道的上表面设置绝缘遮光层的步骤包括：
    所述源极和漏极的上表面均不设置有绝缘遮光层，所述绝缘遮光层仅设置在所述源极的外侧面和漏极的外侧面。
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