WO2020044398A1 - Dispositif de localisation de point de défaillance et procédé de localisation de point de défaillance - Google Patents

Dispositif de localisation de point de défaillance et procédé de localisation de point de défaillance Download PDF

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Publication number
WO2020044398A1
WO2020044398A1 PCT/JP2018/031536 JP2018031536W WO2020044398A1 WO 2020044398 A1 WO2020044398 A1 WO 2020044398A1 JP 2018031536 W JP2018031536 W JP 2018031536W WO 2020044398 A1 WO2020044398 A1 WO 2020044398A1
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WIPO (PCT)
Prior art keywords
signal
surge
transmission
point
unit
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PCT/JP2018/031536
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English (en)
Japanese (ja)
Inventor
平 和田
潤 下川床
田島　賢一
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三菱電機株式会社
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Priority to JP2020539173A priority Critical patent/JP6789456B2/ja
Priority to PCT/JP2018/031536 priority patent/WO2020044398A1/fr
Publication of WO2020044398A1 publication Critical patent/WO2020044398A1/fr

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/08—Locating faults in cables, transmission lines, or networks
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y04—INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
    • Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
    • Y04S10/00—Systems supporting electrical power generation, transmission or distribution
    • Y04S10/50—Systems or methods supporting the power network operation or management, involving a certain degree of interaction with the load-side end user applications
    • Y04S10/52—Outage or fault management, e.g. fault detection or location

Definitions

  • the present invention relates to an accident point locating device and an accident point locating method for calculating an accident point which is a damaged position of a transmission line.
  • the accident point locating device is a device that calculates an accident point, which is a damaged position of a transmission line, when the transmission line is damaged.
  • a master station and a slave station are connected to a transmission line.
  • a transmission line fault point locating method for locating an accident point based on the obtained voltage information and the voltage information on the A-end side is disclosed.
  • the master station and the slave station are connected via a communication line different from the transmission line, and the slave station transmits voltage information on the B-end side of the transmission line to the master station via the communication line. .
  • a slave station transmits voltage information on the B end side to a master station via a communication line.
  • the voltage information at the B end receives a transmission delay in a communication line before being transmitted from the slave station to the master station, and also receives a transmission processing delay in a modem of the slave station that transmits the voltage information,
  • the modem of the master station receiving the voltage information receives a reception processing delay. Therefore, even if the master station locates the fault point based on the voltage information transmitted from the slave station and the voltage information on the A-end side, the influence of the delay received on the voltage information on the B-end side, There was a problem that it was not possible to accurately locate the accident point.
  • the present invention has been made to solve the above-described problems, and an accident point locating device and an accident point locating apparatus capable of calculating an accident point of a transmission line without transmitting and receiving voltage information and the like via a communication line.
  • the aim is to obtain a point location method.
  • An accident point locating device has one end connected to a first point in a transmission line that transmits power as a transmission signal, and generates a first signal when a surge signal is generated due to damage to the transmission line.
  • a first surge detection unit for detecting a surge signal in synchronization with a transmission signal flowing through the point, and one end connected to a second point different from the first point on the transmission line;
  • a second surge detector for detecting a surge signal in synchronization with a transmission signal flowing through the first and second surge detectors; a surge signal detected by the first surge detector; and a surge signal detected by the second surge detector.
  • an accident point calculation unit for calculating an accident point which is a damaged position of the transmission line.
  • the present invention it is possible to calculate the fault point of the transmission line without transmitting and receiving voltage information and the like via the communication line.
  • FIG. 1 is a configuration diagram illustrating an accident point locating device according to Embodiment 1.
  • FIG. FIG. 3 is a configuration diagram illustrating a first signal separation unit 21 of the accident point locating device according to Embodiment 1.
  • FIG. 3 is a configuration diagram illustrating a second signal separation unit 31 of the accident point locating device according to Embodiment 1.
  • FIG. 2 is a configuration diagram illustrating an accident point calculation unit 40 of the accident point locating device according to Embodiment 1. It is a flowchart which shows the accident point locating method which is a processing procedure of the accident point locating device shown in FIG. It is a block diagram which shows the accident point locating device which concerns on Embodiment 2.
  • FIG. 3 is a configuration diagram illustrating a first signal separation unit 21 of the accident point locating device according to Embodiment 1.
  • FIG. 3 is a configuration diagram illustrating a second signal separation unit 31 of the accident point locating device according to Embodiment 1.
  • FIG. 2 is a configuration diagram
  • FIG. 9 is a configuration diagram illustrating an accident point calculation unit 80 of the accident point location device according to the second embodiment.
  • FIG. 4 is an explanatory diagram illustrating signals handled by a first surge detection unit 20.
  • FIG. 4 is an explanatory diagram showing signals handled by a second surge detector 30. It is a block diagram which shows the accident point locating device which concerns on Embodiment 3.
  • FIG. 10 is a configuration diagram illustrating a first synchronization signal generation unit 103 of the accident point locating device according to Embodiment 3.
  • FIG. 13 is a configuration diagram illustrating a second synchronization signal generation unit 113 of the accident point locating device according to Embodiment 3.
  • FIG. FIG. 1 is a configuration diagram showing the accident point locating device according to the first embodiment.
  • the transmission line 1 is a one line, transmitting power as the transmission signal S p.
  • the transmission signal S p is flowing in a direction from the first point 11 to a second point 12.
  • damage to the transmission line 1 is only a part of damage and is not cut. Thus, even if damage to the transmission line 1, the transmission of the transmission signal S p in transmission lines 1 shall be continued.
  • the first point 11 is a point where the input terminal 20a (one end) of the first surge detection unit 20 is connected to the transmission line 1.
  • the second point 12 is a point where the input terminal 30a (one end) of the second surge detector 30 is connected to the transmission line 1 and is different from the first point 11.
  • the accident point 13 is a position where the transmission line 1 is damaged, and is between the first point 11 and the second point 12.
  • Surge signal S s which is generated by damage to the transmission line 1, flows from the fault point 13 in a direction towards the first point 11, also flows from the fault point 13 in a direction toward the second point 12.
  • the surge signal flowing in the direction from the accident point 13 to the first point 11 is referred to as S s_a
  • the surge signal flowing in the direction from the accident point 13 to the second point 12 is S s_b.
  • the frequency of the S S_B shall be greater than the frequency of the transmission signal S p.
  • the first surge detector 20 includes a first signal separator 21, a first synchronization signal generator 22, and a first converter 23.
  • the input terminal 20a is connected to the first point 11, and the output terminal 20b is connected to the first input terminal 40a of the fault point calculator 40.
  • the first surge detector 20 when a surge signal S s by damage to the transmission line 1 is generated occurs in synchronization with the transmission signal S p flowing through the first point 11, the surge signal S s_a To detect.
  • the first surge detector 20 converts the surge signal Ss_a from an analog signal to a digital signal, and outputs the digital signal to the fault point calculator 40 as a first digital signal Da.
  • the first signal separation unit 21 has an input terminal 21 a connected to the first point 11, a first output terminal 21 b connected to an input terminal 22 a of the first synchronization signal generation unit 22, and a second output terminal. 21 c is connected to the input terminal 23 a of the first converter 23.
  • the first signal separating unit 21 the signal flowing through the first point 11, to extract a respective transmit signal S p_a and surge signal S s_a.
  • a transmission signal extracted by the first separator 21 in order to distinguish the transmission signal S p flowing through the transmission line 1, the transmission signals extracted by the first separator 21 ' Sp_a ".
  • the first signal separation unit 21 outputs the extracted transmission signal Sp_a to the first synchronization signal generation unit 22 and outputs the extracted surge signal Ss_a to the first conversion unit 23.
  • the first synchronization signal generation unit 22 is realized by, for example, a PLL (Phase Locked Loop) circuit, a multiplier, or a DDS (Direct Digital Synthesizer).
  • the first synchronization signal generation unit 22 has an input terminal 22 a connected to a first output terminal 21 b of the first signal separation unit 21, and an output terminal 22 b connected to a clock terminal 23 b of the first conversion unit 23.
  • First synchronizing signal generating unit 22 in synchronization with the transmission signal S p_a extracted by the first signal separator 21 first generates a clock signal C a and the first clock signal C a first 1 to the conversion unit 23.
  • the frequency of the transmission signal S p_a extracted by the first separator 21, and the frequency of the first clock signal C a, which is generated by the first synchronizing signal generator 22 may be the same , May be different.
  • the first synchronization signal generating unit 22 when it is implemented by a PLL circuit or DDS, the frequency of the first clock signal C a is determined according to an externally applied control signal .
  • the first conversion unit 23 is realized by, for example, a ⁇ -type or flash-type ADC (Analog to Digital Converter).
  • the first conversion unit 23 has an input terminal 23a connected to a second output terminal 21c of the first signal separation unit 21, a clock terminal 23b connected to an output terminal 22b of the first synchronization signal generation unit 22,
  • the output terminal 23c is connected to the first input terminal 40a of the accident point calculator 40.
  • First converting section 23 in synchronization with the first clock signal C a, which is generated by the first synchronizing signal generating unit 22, a surge signal S s_a extracted by the first separator 21 analog
  • the analog signal is converted into a digital signal by sampling the signal.
  • the first converter 23 outputs the digital signal to the accident point calculator 40 as a first digital signal Da.
  • the second surge detector 30 includes a second signal separator 31, a second synchronization signal generator 32, and a second converter 33.
  • the input terminal 30a is connected to the second point 12, and the output terminal 30b is connected to the second input terminal 40b of the fault point calculator 40.
  • the second surge detector 30, when a surge signal S s by damage to the transmission line 1 is generated, in synchronization with the transmission signal S p flowing through the second point 12, a surge signal S S_B To detect.
  • the second surge detector 30, a surge signal S S_B converted from an analog signal to a digital signal, and outputs the accident point calculation unit 40 the digital signal as a second digital signal D b.
  • the second signal separation unit 31 has an input terminal 31a connected to the second point 12, a first output terminal 31b connected to an input terminal 32a of the second synchronization signal generation unit 32, and a second output terminal. 31c is connected to the input terminal 33a of the second converter 33.
  • Second signal separating unit 31 the signal flowing through the second point 12, extracts the respective transmission signal S p_b and surge signal S S_B.
  • a transmission signal extracted by the second signal separating unit 31 in order to distinguish the transmission signal S p flowing through the transmission line 1, the transmission signals extracted by the second signal separating unit 31 It is described as " Sp_b ".
  • the second signal separation unit 31 outputs the extracted transmission signal Sp_b to the second synchronization signal generation unit 32, and outputs the extracted surge signal Ss_b to the second conversion unit 33.
  • the second synchronization signal generator 32 is realized by, for example, a PLL circuit, a multiplier, or a DDS.
  • the second synchronization signal generator 32 has an input terminal 32 a connected to the first output terminal 31 b of the second signal separator 31, and an output terminal 32 b connected to the clock terminal 33 b of the second converter 33. I have.
  • Second synchronizing signal generating unit 32 generates a second clock signal C b are synchronized with the transmission signal S p_b extracted by the second signal separating unit 31, the second clock signal C b the 2 to the conversion unit 33.
  • the frequency of the transmission signal S p_b extracted by the second signal separating unit 31, and the frequency of the second clock signal C b generated by the second synchronizing signal generating unit 32 may be the same , May be different.
  • a second synchronizing signal generation unit 32 when it is implemented by a PLL circuit or DDS, the frequency of the second clock signal C b is determined according to an externally applied control signal .
  • the frequency of the second clock signal C b generated by the second synchronizing signal generating unit 32 is the same as the frequency of the first clock signal C a, which is generated by the first synchronizing signal generator 22 .
  • the second clock signal C b of the phase generated by the second synchronizing signal generator 32 synchronized with the first clock signal C a phase generated by the first synchronizing signal generator 22 Absent.
  • the second conversion unit 33 is realized by, for example, a ⁇ -type or flash-type ADC.
  • the second conversion unit 33 has an input terminal 33a connected to the second output terminal 31c of the second signal separation unit 31, a clock terminal 33b connected to an output terminal 32b of the second synchronization signal generation unit 32, The output terminal 33c is connected to the second input terminal 40b of the fault point calculator 40.
  • the second converter 33 in synchronization with the second clock signal C b generated by the second synchronizing signal generating unit 32, a surge signal S S_B extracted by the second signal separating unit 31 Analog An analog signal is converted into a digital signal by sampling the signal.
  • the second conversion unit 33 outputs the digital signal to the fault point calculating section 40 as the second digital signal D b.
  • the fault point calculation unit 40 includes a phase difference detection unit 61, an angular frequency detection unit 62, and a fault point calculation processing unit 63 (see FIG. 4) described later, and is realized by, for example, an FPGA (Field Programmable Gate Array). You.
  • the first input terminal 40a is connected to the output terminal 20b of the first surge detection unit 20, and the second input terminal 40b is connected to the output terminal 30b of the second surge detection unit 30.
  • ⁇ a is the time required for the surge signal S s_a to reach the first point 11 from the accident point 13
  • ⁇ b is the time required for the surge signal S s_b to reach the second point 12 from the accident point 13 It is the time required.
  • FIG. 2 is a configuration diagram illustrating the first signal separation unit 21 of the accident point locating device according to the first embodiment.
  • the first filter 51 is a filter in which the frequency of the transmission signal Sp_a is within the pass band and the frequency of the surge signal S s_a is outside the pass band, and is implemented by, for example, an LPF (Low Pass Filter). Is done.
  • the first filter 51 suppresses the surge signal S s_a included in the signal flowing through the first point 11 and extracts the transmission signal Sp_a from the signal flowing through the first point 11,
  • the transmission signal Sp_a is output to the first synchronization signal generation unit 22.
  • the LPF is realized using a chip inductor or a chip capacitor.
  • the LPF may mount a microstrip line or a coaxial resonator according to the pass band of the LPF and the suppression amount of the surge signal Ss_a .
  • the second filter 52 is a filter in which the frequency of the surge signal S s_a is within the pass band and the frequency of the transmission signal Sp_a is outside the pass band, and is realized by, for example, an HPF (High Pass Filter).
  • HPF High Pass Filter
  • the second filter 52 suppresses the transmission signal Sp_a included in the signal flowing through the first point 11 and extracts the surge signal Ss_a from the signal flowing through the first point 11; It outputs the surge signal Ss_a to the first converter 23.
  • the HPF is realized using a chip inductor or a chip capacitor.
  • the HPF may include a microstrip line or a coaxial resonator according to the passband of the HPF and the amount of suppression of the transmission signal Sp_a .
  • FIG. 3 is a configuration diagram illustrating the second signal separation unit 31 of the accident point locating device according to the first embodiment.
  • the third filter 53 is a filter in which the frequency of the transmission signal Sp_b is within the pass band and the frequency of the surge signal S s_b is outside the pass band, and is realized by, for example, an LPF.
  • the third filter 53 suppresses the surge signal S s_b included in the signal flowing through the second point 12 and extracts the transmission signal Sp_b from the signal flowing through the second point 12,
  • the transmission signal Sp_b is output to the second synchronization signal generator 32.
  • the LPF may mount a microstrip line or a coaxial resonator according to the pass band of the LPF and the amount of suppression of the surge signal Ss_b .
  • the fourth filter 54 is a filter in which the frequency of the surge signal S s_b is within the pass band and the frequency of the transmission signal Sp_b is outside the pass band, and is realized by, for example, an HPF.
  • the fourth filter 54 suppresses the transmission signal Sp_b included in the signal flowing through the second point 12 and extracts the surge signal Ss_b from the signal flowing through the second point 12;
  • the surge signal S s_b is output to the second converter 33.
  • the HPF may include a microstrip line or a coaxial resonator according to the passband of the HPF and the amount of suppression of the transmission signal Sp_b .
  • FIG. 4 is a configuration diagram illustrating the accident point calculation unit 40 of the accident point locating device according to the first embodiment. 4, the phase difference detection unit 61, the phase of the first digital signal D a which is output from the first conversion unit 23, the second digital signal D b output from the second conversion unit 33 It detects the phase difference D c between the phase, and outputs the phase difference D c accident point calculation unit 63.
  • the angular frequency detection unit 62 converts the angular frequency ⁇ s of the surge signal S s_b by performing , for example, Fast Fourier Transform (FFT) on the second digital signal D b output from the second conversion unit 33. To detect.
  • FFT Fast Fourier Transform
  • angular frequency detection unit 62 detects the angular frequency omega s of the surge signal S S_B.
  • the angular frequency detection unit 62 by FFT the first digital signal D a which is output from the first converter 23, detects the angular frequency omega s of the surge signal S s_a You may make it do.
  • Fault point calculation unit 63 a phase difference D c detected by the phase difference detection unit 61, from the detected angular frequency omega s by the angular frequency detection unit 62, the surges signal S s_a accident point 13 1 ⁇ a required to reach the point 11 is calculated.
  • FIG. 5 is a flowchart showing an accident point locating method which is a processing procedure of the accident point locator shown in FIG.
  • the transmission delay of the transmission delay and the surge signal S s of the transmission signal S p is not generated.
  • the transmission signal S p to be transmitted to the transmission line 1 is represented by the following equation (1).
  • the formula (1) is omega p, the angular frequency of the transmission signal S p, theta p is the initial phase of the transmission signal S p. Also, t is a time, and the same applies to the following equation.
  • the first point 11 when the starting point of the transmission signal S p, the transmission signal S p_a at the first point 11 is expressed by the following equation (2).
  • the surge signal S s generated at the fault point 13 is damaged position is expressed by the following equation (3).
  • the omega s, the angular frequency of the surge signal S s, theta s is the initial phase of the surge signal S s.
  • the surge signal S s_a flowing from the fault point 13 in a direction towards the first point 11, to the accident point 13 until it reaches the first point 11, it takes time for tau a. Therefore, the surge signal Ss_a at the first point 11 is represented by the following equation (4).
  • the surge signal S s_b flowing in the direction from the accident point 13 to the second point 12 requires a time ⁇ b from the accident point 13 to the second point 12. . Therefore, the surge signal S s_b at the second point 12 is represented by the following equation (5).
  • Transmission signal S p to the starting point of the first point 11, to reach the second point 12, takes time ⁇ a + ⁇ b. Therefore, the transmission signal Sp_b at the second point 12 is represented by the following equation (6).
  • the first separator 21 of the first surge detector 20, the signal flowing through the first point 11, to extract a respective transmit signal S p_a and surge signal S s_a (step ST1 in FIG. 5) .
  • the processing procedure of the first signal separation unit 21 will be specifically described.
  • the first filter 51 suppresses the surge signal S s_a included in the signal flowing through the first point 11, and The transmission signal Sp_a is extracted from the signal flowing through.
  • the first filter 51 outputs the transmission signal Sp_a to the first synchronization signal generator 22.
  • the second filter 52 suppresses the transmission signal Sp_a included in the signal flowing through the first point 11, and The surge signal S s_a is extracted from the signal flowing through.
  • the second filter 52 outputs the surge signal Ss_a to the first converter 23.
  • the first synchronization signal generation unit 22 Upon receiving the transmission signal Sp_a from the first signal separation unit 21, the first synchronization signal generation unit 22 generates a first clock signal Ca synchronized with the transmission signal Sp_a , and generates a first clock signal. and it outputs the signal C a in the first conversion unit 23 (step ST2 of FIG. 5).
  • the angular frequency of the first clock signal C a can, when it is N times the angular frequency omega p of the transmit signal S p_a, the first clock signal C a can be expressed by the following equation (7) . And a 2N ⁇ p> ⁇ s.
  • First converting section 23 in synchronization with the first clock signal C a, which is generated by the first synchronizing signal generating unit 22, a surge signal S s_a output from the first separator 21 analog
  • the analog signal is converted into a digital signal by sampling the signal (step ST3 in FIG. 5).
  • the first converter 23 samples an analog signal by oversampling.
  • the first conversion unit 23 for example, to sample the digital signal to analog signal at the rising edge of the first clock signal C a.
  • Rise timing t C_A of the first clock signal C a can be expressed by the following equation (8).
  • First digital signal D a which is output from the first converter 23 to the fault point calculation unit 40, the equation (4) and (8), is expressed by the following equation (9).
  • the processing procedure of the second signal separation unit 31 will be specifically described.
  • the third filter 53 suppresses the surge signal S s_b included in the signal flowing through the second point 12, and The transmission signal Sp_b is extracted from the signal flowing through.
  • the third filter 53 outputs the transmission signal Sp_b to the second synchronization signal generator 32.
  • the fourth filter 54 suppresses the transmission signal Sp_b included in the signal flowing through the second point 12, and The surge signal S s_b is extracted from the signal flowing through.
  • the fourth filter 54 outputs the surge signal Ss_b to the second converter 33.
  • Second synchronizing signal generating unit 32 receives the transmission signal S p_b from the second signal separating unit 31, and generates a second clock signal C b are synchronized with the transmission signal S p_b, a second clock and outputs the signal C b in the second conversion unit 33 (step ST5 in FIG. 5).
  • the angular frequency of the second clock signal C b is, when an N times the angular frequency omega p of the transmit signal S p_b, the second clock signal C b is expressed by the following equation (10) .
  • the second converter 33 in synchronization with the second clock signal C b generated by the second synchronizing signal generating unit 32, a surge signal S S_B outputted from the second signal separating unit 31 Analog
  • the analog signal is converted into a digital signal by sampling the signal (step ST6 in FIG. 5).
  • the second converter 33 samples an analog signal by oversampling.
  • the second converter 33 for example, to sample the digital signal to analog signal at the rising edge of the second clock signal C b.
  • Rise timing t C_B of the second clock signal C b is expressed by the following equation (11).
  • Second digital signal D b output from the second converter 33 to the fault point calculation unit 40, the equation (5) and (11), is expressed by the following equation (12).
  • Phase difference detection unit 61 includes a first digital signal D a phase output from the first converting section 23, position of the second digital signal D b of the phase output from the second conversion unit 33 detecting a phase difference D c, and outputs the phase difference D c accident point calculation unit 63.
  • the angular frequency detection unit 62 detects the angular frequency ⁇ s of the surge signal S s_b by performing an FFT on the second digital signal D b output from the second conversion unit 33, and determines the angular frequency ⁇ s as an accident point. Output to the calculation processing unit 63.
  • Fault point calculation processing section 63 receives the phase difference D c from the phase difference detecting unit 61 receives the angular frequency omega s from angular frequency detection unit 62, as shown in the following equation (13), the phase difference D c from the angular frequency ⁇ s, to calculate the time ⁇ a. Then, the fault point calculation unit 63, and a transmission speed v and time tau a surge signal S s_a, calculates the fault point 13.
  • the distance L from the first point 11 to the accident point 13 is represented by the following equation (14), and calculating the distance L corresponds to calculating the accident point 13.
  • L v ⁇ ⁇ a (14)
  • one end is connected to the first point 11 on the transmission line 1, and when the surge signal is generated due to damage to the transmission line 1, the signal flows through the first point 11.
  • One end is connected to a first surge detector 20 that detects a surge signal in synchronization with the transmission signal, and a second point 12 different from the first point 11 in the transmission line 1.
  • a second surge detector 30 for detecting a surge signal in synchronization with a transmission signal flowing through the first and second surge detectors, and a surge signal detected by the first surge detector 20 and a second surge detector 30 detecting the surge signal.
  • the fault point locating device was configured to include a fault point calculation unit 40 that calculates a fault point 13 which is a damage position of the transmission line 1 from a surge signal. Therefore, the fault point locating device can calculate the fault point 13 of the transmission line 1 without transmitting and receiving voltage information and the like via the communication line.
  • the first filter 51 is realized by an LPF
  • the second signal separation unit 31 shown in FIG. 3 the third filter 53 is realized by an LPF.
  • the first filter 51 only needs to be able to suppress the surge signal S s_a included in the signal flowing through the first point 11 and extract the transmission signal Sp_a, and is limited to the one realized by the LPF. Not something.
  • the third filter 53 only needs to be able to suppress the surge signal S s_b included in the signal flowing through the second point 12 and extract the transmission signal Sp_b, and is limited to those realized by the LPF. Not something. Therefore, each of the first filter 51 and the third filter 53 may be realized by, for example, a BPF (Band Pass Filter) or a BRF (Band Rejection Filter).
  • the second filter 52 is realized by an HPF
  • the fourth filter 54 is realized by an HPF.
  • the second filter 52 suppresses the transmission signal Sp_a included in the signal flowing through the first point 11 and extracts the surge signal S s_a from the signal flowing through the first point 11. It is sufficient if possible, and the invention is not limited to the one realized by the HPF.
  • the fourth filter 54 suppresses the transmission signal Sp_b included in the signal flowing through the second point 12 and extracts the surge signal S s_b from the signal flowing through the second point 12. It is sufficient if possible, and the invention is not limited to the one realized by the HPF. Therefore, each of the second filter 52 and the fourth filter 54 may be realized by, for example, a BPF or a BRF.
  • each of the first converter 23 and the second converter 33 samples an analog signal by oversampling.
  • Embodiment 2 FIG.
  • a transmission delay occurs in the first and second transmission lines connecting the first surge detector 20 and the fault point calculator 80, and the second surge detector 30 and the fault point calculator 80
  • An accident point locator in which a transmission delay occurs in the third and fourth transmission lines connecting the two will be described.
  • FIG. 6 is a configuration diagram illustrating an accident point locating device according to the second embodiment. 6, the same reference numerals as those in FIG. 1 denote the same or corresponding parts, and a description thereof will not be repeated.
  • the signal generator 24 is provided.
  • 20 c is an output terminal of the first surge detector 20.
  • 30c is an output terminal of the second surge detector 30.
  • the first trigger signal generation unit 24 is realized by, for example, a PLL circuit, a DDS, or an ADC.
  • the first trigger signal generation unit 24 has an input terminal 24 a connected to the first output terminal 21 b of the first signal separation unit 21, and an output terminal 24 b connected to an input terminal of the second transmission line 72.
  • First trigger signal generator 24 generates a first trigger signal E a which synchronizes with the transmission signal S p_a extracted by the first separator 21, via the second transmission line 72 , and outputs a first trigger signal E a an accident point calculation unit 80.
  • the frequency of the transmission signal S p_a extracted by the first separator 21, and the frequency of the first trigger signal E a which is produced by the first trigger signal generator 24 may be the same , May be different.
  • the first trigger signal generation unit 24 when it is implemented by a PLL circuit or DDS, the frequency of the first trigger signal E a is determined according to an externally applied control signal .
  • the first trigger signal generation unit 24 converts the transmission signal Sp_a from an analog signal to a digital signal in synchronization with an externally supplied clock signal. It converted to, or the digital signal as a first trigger signal E a.
  • First trigger signal generator 24 as a clock signal given from the outside, may be used first clock signal C a, which is generated by the first synchronizing signal generator 22.
  • the second trigger signal generation unit 34 is realized by, for example, a PLL circuit, a DDS, or an ADC.
  • the input terminal 34a is connected to the first output terminal 31b in the second signal separator 31, and the output terminal 34b is connected to the input end of the fourth transmission line 74.
  • the second trigger signal generation unit 34 generates a second trigger signal Eb synchronized with the transmission signal Sp_b extracted by the second signal separation unit 31, and outputs the second trigger signal Eb via the fourth transmission line 74. , And outputs the second trigger signal Eb to the accident point calculation unit 80.
  • the frequency of the transmission signal S p_b extracted by the second signal separating unit 31, and the frequency of the second trigger signal E b generated by the second trigger signal generator 34 may be the same , May be different.
  • the frequency of the second trigger signal Eb is determined according to a control signal provided from the outside.
  • the second trigger signal generator 34 converts the transmission signal Sp_b from an analog signal to a digital signal in synchronization with an externally applied clock signal. And the digital signal may be used as the second trigger signal Eb .
  • Second trigger signal generator 34 a clock signal given from the outside, may be used a second clock signal C b generated by the second synchronizing signal generating unit 32.
  • Each of the first transmission line 71, the second transmission line 72, the third transmission line 73, and the fourth transmission line 74 is realized by, for example, a coaxial cable or a twisted pair line including a signal line and a ground line. Is done.
  • the first transmission line 71 has an input terminal connected to the output terminal 20 b of the first surge detector 20 and an output terminal connected to the first input terminal 80 a of the fault point calculator 80.
  • the first transmission line 71, the first digital signal D a which is output from the first conversion unit 23 is delayed by a first delay time t d1, the first digital signal D a of the delayed first Is output to the accident point calculation unit 80 as the digital signal D a1 of.
  • the second transmission line 72 has an input terminal connected to the output terminal 20 c of the first surge detector 20 and an output terminal connected to the second input terminal 80 b of the fault point calculator 80.
  • Second transmission line 72 the first trigger signal E a which is produced by the first trigger signal generator 24 is delayed by a first delay time t d1, the first trigger signal E a the delayed The signal is output to the accident point calculation unit 80 as the first trigger signal Ea1 .
  • the third transmission line 73 has an input terminal connected to the output terminal 30 b of the second surge detection unit 30 and an output terminal connected to the third input terminal 80 c of the fault point calculation unit 80.
  • the third transmission line 73, the second digital signal D b output from the second conversion unit 33 is delayed by a second delay time t d2, the second digital signal D b of the delayed second Is output to the accident point calculation unit 80 as the digital signal D b1 of
  • the fourth transmission line 74 has an input terminal connected to the output terminal 30 c of the second surge detection unit 30 and an output terminal connected to the fourth input terminal 80 d of the fault point calculation unit 80.
  • the fourth transmission line 74 delays the second trigger signal Eb generated by the second trigger signal generator 34 by a second delay time td2, and converts the delayed second trigger signal Eb .
  • the signal is output to the accident point calculation unit 80 as the second trigger signal Eb1 .
  • the accident point calculation unit 80 includes a first time difference calculation unit 81, a second time difference calculation unit 82, and an accident point calculation processing unit 83 (see FIG. 7), which will be described later.
  • the first input terminal 80a is connected to the output terminal of the first transmission line 71
  • the second input terminal 80b is connected to the output terminal of the second transmission line 72.
  • the third input terminal 80c is connected to the output terminal of the third transmission line 73
  • the fourth input terminal 80d is connected to the output terminal of the fourth transmission line 74.
  • the fault point calculation unit 80 calculates the fault point 13 from the first digital signal D a1 , the first trigger signal E a1 , the second digital signal D b1 , and the second trigger signal E b1. .
  • FIG. 7 is a configuration diagram illustrating an accident point calculation unit 80 of the accident point location device according to the second embodiment.
  • a first time difference calculation unit 81 includes a rising time of the first digital signal D a1 output from the first transmission line 71 and a first trigger output from the second transmission line 72.
  • a first time difference which is a time difference from the rising time of the signal Ea1 , is calculated.
  • the first time difference calculation section 81 outputs the first time difference to the accident point calculation processing section 83.
  • the second time difference calculation unit 82 calculates the rising time of the second digital signal D b1 output from the third transmission line 73 and the second trigger signal E b1 output from the fourth transmission line 74.
  • a second time difference which is a time difference from the rising time, is calculated.
  • the second time difference calculation unit 82 outputs the second time difference to the accident point calculation processing unit 83.
  • the accident point calculation processing unit 83 calculates the accident point 13 based on the first time difference calculated by the first time difference calculation unit 81 and the second time difference calculated by the second time difference calculation unit 82. Is calculated.
  • FIG. 8 is an explanatory diagram showing signals handled by the first surge detector 20.
  • Y D of the first digital signal D a to be discretely outputted from the first converter 23, a fault point 13 by the surge signal S s is generated, initially non-zero a D a which is changed to a value, the rise time of the D a.
  • Y E of the first trigger signal E a to be discretely outputted from the first trigger signal generator 24, the signal level is L level (for example, "0") from the H level (for example, "1" ) is the first E b at a transition to.
  • t a is the time difference between the time of the time and Y D of Y E.
  • t d1 is the delay time of the first digital signal D first trigger signal for the first delay time and a first trigger signal E a of the digital signal D a1 for a E a1.
  • Time difference t a, the first digital signal D a and a first trigger signal E a is, before and after passing through the first transmission line 71 and the second transmission line 72, there is no change.
  • FIG. 9 is an explanatory diagram showing signals handled by the second surge detector 30.
  • Z D of the second digital signal D b that is discretely output from the second conversion unit 33, the accident point 13 by the surge signal S s is generated, initially non-zero a D b was changed to a value, which is D b at the time of rising.
  • Z E among the second trigger signal E b are discretely output from the second trigger signal generator 34, which is the first E b when the signal level is changed from L level to H level.
  • t b is the time difference between the time of the time and Z D of Z E.
  • t d2 is the delay time of the second digital signal D b second trigger signal to the second delay time and a second trigger signal of the digital signal D b1 for E b E b1.
  • Time difference t b, the second digital signal D b and the second trigger signal E b is, before and after passing through the third transmission line 73 and the fourth transmission line 74, there is no change.
  • transmission line 1 the first transmission line 71, the second transmission line 72, other than the third transmission line 73 and the fourth transmission line 74, the transmission delay and the surge signal S s of the transmission signal S p It is assumed that no transmission delay occurs.
  • the first trigger signal generation unit 24 Upon receiving the transmission signal Sp_a from the first signal separation unit 21, the first trigger signal generation unit 24 generates a first trigger signal Ea synchronized with the transmission signal Sp_a , and generates a first trigger signal. and outputs a signal E a to the second transmission line 72.
  • First trigger signal E a for example, as shown in FIG. 8, the transmit signal when the amplitude of S p_a is equal to or larger than the threshold Th, the signal level becomes the H level, the transmission signal S p_a amplitude is less than the threshold value Th of , The signal level becomes L level.
  • the threshold value Th is, for example, a value that is half of the maximum amplitude of the transmission signal Sp_a .
  • the threshold value Th is stored in, for example, the internal memory of the first trigger signal generation unit 24 and the internal memory of the second trigger signal generation unit 34.
  • the threshold Th may be externally given to each of the first trigger signal generator 24 and the second trigger signal generator 34.
  • First digital signal D a which is output from the first conversion unit 23, the first transmission line 71 is transmitted to the fault point calculation unit 80.
  • the first digital signal Da is delayed by the first delay time t d1 in the first transmission line 71, so that the delayed first digital signal Da is converted to the first digital signal Da. It is input to the accident point calculation unit 80 as Da1 .
  • the first trigger signal E a which is produced by the first trigger signal generator 24, the second transmission line 72 is transmitted to the fault point calculation unit 80.
  • the first trigger signal E a in the second transmission line 72, to be delayed by the first delay time t d1, the first trigger signal E a post delay, the first trigger signal E a1 is input to the accident point calculation unit 80.
  • Second trigger signal generator 34 receives the transmission signal S p_b from the second signal separating unit 31, to generate a second trigger signal E b which is synchronized with the transmission signal S p_b, second trigger The signal Eb is output to the fourth transmission line 74.
  • Second trigger signal E b is, for example, as shown in FIG. 9, the transmission signal when the amplitude of S p_b is equal to or larger than the threshold Th, the signal level becomes the H level, the transmission signal S p_b amplitude is less than the threshold value Th of , The signal level becomes L level.
  • Second digital signal D b output from the second converter 33, the third transmission line 73 is transmitted to the fault point calculation unit 80.
  • the second digital signal Db is delayed by the second delay time td2 in the third transmission line 73, so that the delayed second digital signal Db is converted to the second digital signal Db.
  • Db1 is input to the accident point calculation unit 80.
  • the second trigger signal Eb generated by the second trigger signal generator 34 is transmitted to the fault point calculator 80 via the fourth transmission line 74.
  • the second trigger signal Eb is delayed by the second delay time td2 in the fourth transmission line 74, so that the delayed second trigger signal Eb is changed to the second trigger signal.
  • Eb1 is input to the accident point calculation unit 80.
  • the fault point calculation unit 80 calculates the fault point 13 from the first digital signal D a1 , the first trigger signal E a1 , the second digital signal D b1 , and the second trigger signal E b1. .
  • the processing procedure of the accident point calculation unit 80 will be specifically described.
  • the first time difference calculating unit 81 detects the rising of the first digital signal Da1 output from the first transmission line 71, and also detects the first trigger signal E output from the second transmission line 72. The rising edge of a1 is detected.
  • the first time difference calculating unit 81 calculates a time difference between the detected rising time of the first digital signal D a1 and the detected rising time of the first trigger signal E a1 as a first time difference ta. I do.
  • a first time difference calculation section 81 outputs a first time difference t a the fault point calculation processing unit 83.
  • the second time difference calculation unit 82 detects the rising of the second digital signal D b1 output from the third transmission line 73, and also detects the second trigger signal E output from the fourth transmission line 74. The rise of b1 is detected.
  • the second time difference calculator 82 calculates a time difference between the detected rising time of the second digital signal D b1 and the detected rising time of the second trigger signal E b1 as a second time difference t b. I do.
  • the second time difference calculating unit 82 outputs the second time difference t b the fault point calculation processing unit 83.
  • Fault point calculation unit 83 holds the phase information of the transmission signal S p_b in the phase information and the second point 12 of the transmission signal S p_a at the first point 11. These phase information may be externally provided to the fault point calculation processing unit 83 or may be measured by the fault point calculation processing unit 83. Further, the distance from the not shown source of the transmission signal S p to the first point 11 and second point 12, and a frequency of the transmission signal S p, the fault point calculation processing unit 83, a phase information calculation May be performed.
  • Fault point calculation unit 83 the phase information of the transmission signal S p_a at the first point 11, and calculates the time t YE of Y E. Further, the fault point calculation unit 83, the phase information of the transmission signal S p_b at the second point 12 to calculate the time t ZE of Z E.
  • the processing itself for calculating the times t YE and t ZE from the phase information is a known technique, and a detailed description thereof will be omitted.
  • Fault point calculation unit 83 from a first time difference t a which is output from the first time difference calculation unit 81, the time t YE of the calculated Y E, and calculates the time t YD of Y D. Further, the fault point calculation processing unit 83, calculates a second time difference t b output from the second time difference calculating portion 82, from the time t ZE of the calculated Z E, the time t ZD of Z D I do.
  • the fault point calculation processing unit 83 calculates the fault point 13.
  • Distance L b from the second point 12 to the fault point 13 is expressed as the following equation (15), to calculate the distance L b is equivalent to calculating the fault point 13.
  • the distance La is a distance from the first point 11 to the accident point 13, and
  • t YD > t ZD the accident point 13 is a position closer to the second point 12 than to the first point 11. If t YD ⁇ t ZD , the accident point 13 is a position closer to the first point 11 than to the second point 12.
  • the accident point calculation unit 80 determines that the first digital signal D a1 , the first trigger signal E a1 , the second digital signal D b1 , and the second trigger signal E b1
  • the accident point locating device was configured to calculate the accident point 13. Therefore, the fault point locating device of the second embodiment can calculate the fault point 13 without transmitting and receiving voltage information and the like via the communication line, similarly to the fault point locating device of the first embodiment.
  • the fault point locating device according to the second embodiment includes a delay time in a transmission line between the first surge detector 20 and the fault point calculator 80, a second surge detector 30, and a fault point calculator.
  • the fault point 13 can be calculated even when the delay time in the transmission line between the fault point 80 and the delay time 80 differs. Therefore, the fault point locating device according to the second embodiment can increase the selectivity of the line length of the transmission line as compared with the fault point locating device according to the first embodiment, and can further increase the selectivity of the first surge detector 20 and the second surge detector. The selectivity of each installation position in the surge detection unit 30 and the accident point calculation unit 80 can be improved.
  • the first time difference calculating section 81 calculates the time difference between the rising time of the first digital signal D a1 and the rising time of the first trigger signal E a1 by the first time. It is calculated as the time difference t a. However, this is only an example, and the first time difference calculation unit 81 calculates the time difference between the falling time of the first digital signal D a1 and the falling time of the first trigger signal E a1 by the first time. May be calculated as the time difference ta.
  • the second time difference calculation unit 82 calculates the time difference between the rising time of the second digital signal D b1 and the rising time of the second trigger signal E b1 in the second time.
  • the second time difference calculating unit 82 calculates the time difference between the falling time of the second digital signal D b1 and the falling time of the second trigger signal E b1 by the second time. May be calculated as the time difference tb.
  • the first time difference calculation unit 81 calculates a time difference between the fall time of the first digital signal Da1 and the fall time of the first trigger signal Ea1 as a first time difference ta.
  • the second time difference calculator 82 calculates the time difference between the rising time of the second digital signal D b1 and the rising time of the second trigger signal E b1 as the second time difference t b. It may be.
  • the first time difference calculation section 81 calculates the rise time of the first digital signal D a1, the time difference between the rise time of the first trigger signal E a1 as the first time difference t a,
  • the second time difference calculation unit 82 calculates the time difference between the fall time of the second digital signal D b1 and the fall time of the second trigger signal E b1 as a second time difference t b. It may be.
  • a first trigger signal generator 24 generates a first trigger signal E a which synchronizes with the transmission signal S p_a, a second trigger signal generator 34, and it generates a second trigger signal E b which is synchronized with the transmission signal S p_b.
  • the first trigger signal E a has only to be synchronized with the transmission signal S p_a
  • the second trigger signal E b has only to be synchronized with the transmission signal S p_b . Therefore, the first trigger signal generation unit 24, a first trigger signal E a, using the transmission signal S p_a, the second trigger signal generation unit 34, as a second trigger signal E b, the transmission signal S p_b may be used.
  • the first surge detector 20 includes a first converter 23, and the second surge detector 30 includes a second converter 33.
  • the first time difference calculation unit 81 if detects a rise of the surge signal S s_a, can calculate the first time difference t a, the second time difference calculating section 82, the rise of the surge signal S S_B if detected, it calculates the second time difference t b. Therefore, the first surge detector 20 includes a detector that detects the surge signal S s_a instead of the first converter 23, and the second surge detector 30 replaces the second converter 33.
  • a detector for detecting the surge signal Ss_b may be provided.
  • FIG. 10 is a configuration diagram illustrating an accident point locating device according to the third embodiment.
  • the transmission line 2 has three transmission lines 2a, 2b, 2c.
  • Transmission signal S p is a power transmitted by the transmission line 2 is a signal of the three-phase AC.
  • the transmission signal S p is flowing in a direction from the first point 11 to a second point 12.
  • the first surge detector 100 includes a first signal synthesizer 101, a first filter 102, a first synchronization signal generator 103, a second filter 104, and a first converter 23.
  • the input terminals 100a, 100b, 100c are connected to the first point 11, and the output terminal 100d is connected to the first input terminal 40a of the fault point calculator 40.
  • the first surge detection unit 100 detects the surge signal S s_a in synchronization with the transmission signal Sp_a flowing through the first point 11. To detect.
  • the first surge detector 100 converts the surge signal Ss_a from an analog signal to a digital signal, and outputs the digital signal to the fault point calculator 40 as a first digital signal Da.
  • the first signal combining unit 101 is realized by, for example, a combiner mounting a resistor and a transformer, a hybrid circuit, or a circuit in which a 180-degree hybrid circuit and a 180-degree phase shifter are combined.
  • the input terminal 101a is connected to the first point 11 on the transmission line 2a
  • the input terminal 101b is connected to the first point 11 on the transmission line 2b
  • the input terminal 101c is connected to the transmission line 2c. Is connected to the first point 11 in.
  • the output terminal 101 d of the first signal synthesis unit 101 is connected to the input terminal 104 a of the second filter 104.
  • the first signal combining unit 101 adds the voltages or currents of the three-phase AC signals flowing through the first point 11 in the three transmission lines 2a, 2b, and 2c in the same phase, thereby performing the first combining. Generate a signal. First signal combining section 101 outputs the first combined signal to second filter 104.
  • the first filter 102 is a filter in which the frequency of the transmission signal Sp_a is within the passband and the frequency of the surge signal Ss_a is outside the passband, and is realized by, for example, an LPF.
  • the first filter 102 has an input terminal 102a connected to the first point 11 in the transmission line 2a, and an output terminal 102b connected to the input terminal 103a of the first synchronization signal generator 103.
  • the first filter 102 suppresses the surge signal S s_a included in the signal flowing through the first point 11 in the transmission line 2a, and reduces the transmission signal Sp_a from the signal flowing through the first point 11. And outputs the transmission signal Sp_a to the first synchronization signal generation unit 103.
  • the first synchronization signal generation unit 103 is realized by, for example, a PLL circuit, a multiplier, or a DDS.
  • the first synchronization signal generator 103 has an input terminal 103 a connected to an output terminal 102 b of the first filter 102, and an output terminal 103 b connected to a clock terminal 23 b of the first converter 23.
  • First synchronizing signal generating unit 103 generates the first clock signal C a which is synchronized with the transmission signal S p_a extracted by the first filter 102, the first clock signal C a first Output to the converter 23.
  • First synchronizing signal generating unit 103 transmission signal S p_a by the first filter 102 is no longer extracted, the output of the transmission signal S p_a from the first filter 102 is interrupted, interrupted the output of the transmission signal S p_a is outputting a first clock signal C a generated prior to the first converting section 23.
  • the frequency of the transmission signal S p_a extracted by the first filter 102, the frequency of the first clock signal C a, which is generated by the first synchronizing signal generator 103 may be the same, different May be.
  • a first synchronizing signal generator 103 as implemented by the PLL circuit or DDS, the frequency of the first clock signal C a is determined according to an externally applied control signal .
  • the second filter 104 is a filter in which the frequency of the surge signal S s_a is within the pass band and the frequency of the transmission signal Sp_a is outside the pass band, and is realized by, for example, an HPF.
  • the second filter 104 has an input terminal 104 a connected to the output terminal 101 d of the first signal synthesis unit 101, and an output terminal 104 b connected to the input terminal 23 a of the first conversion unit 23.
  • the second filter 104 suppresses the transmission signal Sp_a included in the first combined signal generated by the first signal combining unit 101, and extracts the surge signal Ss_a from the first combined signal. , And outputs the surge signal Ss_a to the first converter 23.
  • the second surge detector 110 includes a second signal synthesizer 111, a third filter 112, a second synchronization signal generator 113, a fourth filter 114, and a second converter 33.
  • the input terminals 110a, 110b, 110c are connected to the second point 12, and the output terminal 110d is connected to the second input terminal 40b of the fault point calculator 40.
  • Second surge detecting unit 110 when a surge signal S s by damage to the transmission line 2 has occurred, in synchronization with the transmission signal S p_b flowing through the second point 12, a surge signal S S_B To detect.
  • Second surge detecting unit 110 a surge signal S S_B converted from an analog signal to a digital signal, and outputs the digital signal to the fault point calculating section 40 as the second digital signal D b.
  • the second signal combining unit 111 is realized by, for example, a combiner mounting a resistor and a transformer, a hybrid circuit, or a circuit in which a 180-degree hybrid circuit and a 180-degree phase shifter are combined.
  • the second signal combining unit 111 has an input terminal 111a connected to the second point 12 on the transmission line 2a, an input terminal 111b connected to the second point 12 on the transmission line 2b, and an input terminal 111c connected to the transmission line 2c. Is connected to the second point 12 at The output terminal 111 d of the second signal synthesizing unit 111 is connected to the input terminal 114 a of the fourth filter 114.
  • the second signal synthesizing unit 111 adds the voltages or currents of the three-phase alternating current signals flowing at the second point 12 in the three transmission lines 2a, 2b, and 2c in the same phase, thereby performing the second synthesis. Generate a signal.
  • the second signal synthesizing section 111 outputs the second synthesized signal to the fourth filter 114.
  • the third filter 112 is a filter in which the frequency of the transmission signal Sp_b is within the pass band and the frequency of the surge signal S s_b is outside the pass band, and is realized by, for example, an LPF.
  • the third filter 112 has an input terminal 112a connected to the second point 12 in the transmission line 2a, and an output terminal 112b connected to the input terminal 113a of the second synchronization signal generator 113.
  • the third filter 112 suppresses the surge signal S s_b included in the signal flowing through the second point 12 in the transmission line 2a, and converts the signal flowing through the second point 12 into the transmission signal Sp_b. And outputs the transmission signal Sp_b to the second synchronization signal generation unit 113.
  • the second synchronization signal generation unit 113 is realized by, for example, a PLL circuit, a multiplier, or a DDS.
  • the second synchronization signal generator 113 has an input terminal 113 a connected to an output terminal 112 b of the third filter 112, and an output terminal 113 b connected to a clock terminal 33 b of the second converter 33.
  • Second synchronizing signal generating unit 113 in synchronization with the transmission signal S p_b extracted by the third filter 112 second to generate a clock signal C b is, the second clock signal C b second Output to the converter 33.
  • Second synchronizing signal generating unit 113 transmission signal S p_b by the third filter 112 is no longer extracted, the output of the transmission signal S p_b from the third filter 112 is interrupted, interrupted the output of the transmission signal S p_b is outputting a second clock signal C b generated prior to the second converter 33.
  • the frequency of the transmission signal S p_b extracted by the third filter 112, and the frequency of the second clock signal C b generated by the second synchronizing signal generator 113 may be the same, different May be.
  • the second synchronizing signal generator 113 as implemented by the PLL circuit or DDS, the frequency of the second clock signal C b is determined according to an externally applied control signal .
  • the fourth filter 114 is a filter in which the frequency of the surge signal S s_b is within the pass band and the frequency of the transmission signal Sp_b is outside the pass band, and is realized by, for example, an HPF.
  • the fourth filter 114 has an input terminal 114 a connected to the output terminal 111 d of the second signal synthesis unit 111, and an output terminal 114 b connected to the input terminal 33 a of the second conversion unit 33.
  • the fourth filter 114 suppresses the transmission signal Sp_b included in the second combined signal generated by the second signal combining unit 111, and extracts the surge signal S s_b from the second combined signal. , And outputs the surge signal Ss_b to the second converter 33.
  • FIG. 11 is a configuration diagram illustrating the first synchronization signal generation unit 103 of the accident point locating device according to the third embodiment.
  • the phase comparator 121 is realized by, for example, a PFD (Phase Frequency Detector).
  • the phase comparator 121 compares the phase of the transmission signal Sp_a extracted by the first filter 102 with the phase of the frequency- divided signal output from the frequency divider 127, and compares the phase of the transmission signal Sp_a with the frequency- divided signal. Is output to the loop filter 122.
  • the loop filter 122 smoothes the phase difference signal output from the phase comparator 121 and outputs the smoothed phase difference signal to each of the voltage detector 124 and the switch 125.
  • the signal detector 123 performs a detection process of the transmission signal Sp_a extracted by the first filter 102, and when the transmission signal Sp_a cannot be detected, non-detection indicating that the transmission signal Sp_a is interrupted.
  • the signal is output to each of the voltage detector 124 and the switch 125.
  • the voltage detector 124 detects the voltage value of the smoothed phase difference signal output from the loop filter 122, and stores the detected voltage value.
  • the voltage detector 124 When receiving the non-detection signal from the signal detector 123, the voltage detector 124 outputs the last stored voltage value to the switch 125 among the voltage values stored before receiving the non-detection signal.
  • the switch 125 When the non-detection signal is not output from the signal detector 123, the switch 125 outputs the smoothed phase difference signal output from the loop filter 122 to the voltage controlled oscillator 126 as a control voltage signal. When receiving the non-detection signal from the signal detector 123, the switch 125 outputs the voltage value output from the voltage detector 124 to the voltage-controlled oscillator 126 as a control voltage signal.
  • the voltage controlled oscillator 126 generates a first clock signal Ca based on the control voltage signal output from the switch 125, and divides the first clock signal Ca into the frequency divider 127 and the first converter 23, respectively.
  • Output to Divider 127 divides the first clock signal C a, which is generated by the voltage controlled oscillator 126, and outputs a divided signal of the first clock signal C a to the phase comparator 121.
  • the phase comparator 121, the loop filter 122, the switch 125, the voltage controlled oscillator 126, and the frequency divider 127 operate as a PLL circuit.
  • FIG. 12 is a configuration diagram illustrating the second synchronization signal generation unit 113 of the accident point locating device according to the third embodiment.
  • the phase comparator 131 is realized by, for example, a PFD.
  • the phase comparator 131 compares the phase of the transmission signal Sp_b extracted by the third filter 112 with the phase of the frequency- divided signal output from the frequency divider 137, and compares the phase of the transmission signal Sp_b with the frequency- divided signal. Is output to the loop filter 132.
  • the loop filter 132 smoothes the phase difference signal output from the phase comparator 131 and outputs the smoothed phase difference signal to each of the voltage detector 134 and the switch 135.
  • the signal detector 133 performs detection processing of the transmission signal Sp_b extracted by the third filter 112, and when the transmission signal Sp_b cannot be detected, non-detection indicating that the transmission signal Sp_b is interrupted.
  • the signal is output to each of the voltage detector 134 and the switch 135.
  • the voltage detector 134 detects the voltage value of the smoothed phase difference signal output from the loop filter 132, and stores the detected voltage value.
  • the voltage detector 134 When receiving the non-detection signal from the signal detector 133, the voltage detector 134 outputs to the switch 135 the last stored voltage value among the voltage values stored before receiving the non-detection signal.
  • the switch 135 When the non-detection signal is not output from the signal detector 133, the switch 135 outputs the smoothed phase difference signal output from the loop filter 132 to the voltage controlled oscillator 136 as a control voltage signal. When the switch 135 receives the non-detection signal from the signal detector 133, the switch 135 outputs the voltage value output from the voltage detector 134 to the voltage control oscillator 136 as a control voltage signal.
  • Voltage controlled oscillator 136 generates a second clock signal C b on the basis of a control voltage signal output from the switch 135, each of the second clock signal C b a divider 137 and the second conversion unit 33 Output to Divider 137 divides the second clock signal C b generated by the voltage controlled oscillator 136, and outputs a frequency dividing signal of the second clock signal C b to the phase comparator 131.
  • the phase comparator 131, the loop filter 132, the switch 135, the voltage controlled oscillator 136, and the frequency divider 137 operate as a PLL circuit.
  • the first surge detection unit 100 detects the surge signal S s_a in synchronization with the transmission signal Sp_a flowing through the first point 11. To detect.
  • the first surge detector 100 converts the surge signal Ss_a from an analog signal to a digital signal, and outputs the digital signal to the fault point calculator 40 as a first digital signal Da.
  • the processing procedure of the first surge detection unit 100 will be specifically described.
  • the first signal combining unit 101 adds the voltages or currents of the three-phase AC signals flowing through the first point 11 in the three transmission lines 2a, 2b, and 2c in the same phase, thereby performing the first combining. Generate a signal.
  • First signal combining section 101 outputs the first combined signal to second filter 104.
  • second filter 104 Upon receiving the first combined signal from first signal combining section 101, second filter 104 suppresses transmission signal Sp_a included in the first combined signal, and suppresses a surge from the first combined signal.
  • the signal S s_a is extracted and the surge signal S s_a is output to the first converter 23.
  • the first filter 102 suppresses the surge signal S s_a included in the signal flowing through the first point 11 in the transmission line 2a, and reduces the transmission signal Sp_a from the signal flowing through the first point 11. And outputs the transmission signal Sp_a to the first synchronization signal generation unit 103.
  • the first synchronization signal generation unit 103 synchronizes with the transmission signal Sp_a similarly to the first synchronization signal generation unit 22 illustrated in FIG. It generates a first clock signal C a, and outputs the first clock signal C a in the first conversion section 23.
  • the first synchronization signal generation unit 103 outputs the transmission signal Sp_a . outputting a first clock signal C a generated before the interrupted in the first converter 23.
  • the processing procedure of the first synchronization signal generation unit 103 will be specifically described.
  • the phase comparator 121 compares the phase of the transmission signal Sp_a with the phase of the frequency- divided signal output from the frequency divider 127.
  • the phase comparator 121 outputs a phase difference signal indicating a phase difference between the transmission signal Sp_a and the frequency- divided signal to the loop filter 122.
  • the loop filter 122 smoothes the phase difference signal and outputs the smoothed phase difference signal to each of the voltage detector 124 and the switch 125.
  • the signal detector 123 performs a process of detecting the transmission signal Sp_a extracted by the first filter 102.
  • the signal detector 123 outputs a non-detection signal indicating that the transmission signal Sp_a is interrupted to a voltage detector. 124 and the switch 125.
  • the voltage detector 124 detects the voltage value of the smoothed phase difference signal output from the loop filter 122, and stores the detected voltage value. When receiving the non-detection signal from the signal detector 123, the voltage detector 124 outputs the last stored voltage value to the switch 125 among the voltage values stored before receiving the non-detection signal.
  • the switch 125 When the non-detection signal is not output from the signal detector 123, the switch 125 outputs the smoothed phase difference signal output from the loop filter 122 to the voltage controlled oscillator 126 as a control voltage signal. When receiving the non-detection signal from the signal detector 123, the switch 125 outputs the voltage value output from the voltage detector 124 to the voltage-controlled oscillator 126 as a control voltage signal.
  • Voltage controlled oscillator 126 receives a control voltage signal from the switch 125, the control based on the voltage signal to generate a first clock signal C a, the first clock signal C a divider 127 and the first conversion Output to each of the units 23.
  • Divider 127 receives the first clock signal C a voltage controlled oscillator 126, a first clock signal C a divides the phase comparator divided signal of the first clock signal C a 121 Output to
  • the phase comparator 121, the loop filter 122, the switch 125, the voltage controlled oscillator 126, and the frequency divider 127 operate as a PLL circuit.
  • the signal detector 123 detects the transmission signal Sp_a , the signal detector 123 does not output a non-detection signal to each of the voltage detector 124 and the switch 125. Therefore, the voltage controlled oscillator 126, a first clock signal C a corresponding to the phase difference between the transmission signal S p_a and the division signal is generated.
  • the signal detector 123 does not detect the transmission signal Sp_a and the non-detection signal from the signal detector 123 is detected by voltage detection. Output to each of the switch 124 and the switch 125. Therefore, in the voltage controlled oscillator 126, the first clock signal Ca is generated by the voltage detector 124 based on the last stored voltage value among the voltage values stored before receiving the non-detection signal. Generated. Therefore, the transmission line 2a is cut, even if the transmission signal S p_a is no longer flows through the transmission line 2a, it is possible to continue the generation of the first clock signal C a.
  • First converting section 23 receives the surge signal S s_a from the second filter 104, the the first synchronizing signal generator 103 receives the first clock signal C a, similarly to the first embodiment, the in synchronization with the first clock signal C a, it converts the analog signal which is a surge signal S s_a into a digital signal.
  • the first converter 23 outputs the digital signal to the accident point calculator 40 as a first digital signal Da.
  • Second surge detecting unit 110 when a surge signal S s by damage to the transmission line 2 has occurred, in synchronization with the transmission signal S p_b flowing through the second point 12, a surge signal S S_B To detect. Second surge detecting unit 110, a surge signal S S_B converted from an analog signal to a digital signal, and outputs the digital signal to the fault point calculating section 40 as the second digital signal D b.
  • the processing procedure of the second surge detection unit 110 will be specifically described.
  • the second signal synthesizing unit 111 adds the voltages or currents of the three-phase alternating current signals flowing at the second point 12 in the three transmission lines 2a, 2b, and 2c in the same phase, thereby performing the second synthesis. Generate a signal.
  • the second signal synthesizing section 111 outputs the second synthesized signal to the fourth filter 114.
  • fourth filter 114 suppresses transmission signal Sp_b included in the second combined signal, and suppresses surge from the second combined signal.
  • the signal S s_b is extracted, and the surge signal S s_b is output to the second converter 33.
  • the third filter 112 suppresses the surge signal S s_b included in the signal flowing through the second point 12 in the transmission line 2a, and converts the signal flowing through the second point 12 into the transmission signal Sp_b. And outputs the transmission signal Sp_b to the second synchronization signal generation unit 113.
  • Second synchronizing signal generating unit 113 receives the transmission signal S p_b from the third filter 112, as with the second synchronizing signal generating unit 32 shown in FIG. 1, the synchronized with the transmission signal S p_b It generates a second clock signal C b, and outputs the second clock signal C b to the second converter 33.
  • the second synchronization signal generation unit 113 outputs the transmission signal Sp_b . outputting a second clock signal C b generated before the interrupted in the second converter 33.
  • the processing procedure of the second synchronization signal generation unit 113 will be specifically described.
  • the phase comparator 131 Upon receiving the transmission signal Sp_b from the third filter 112, the phase comparator 131 compares the phase of the transmission signal Sp_b with the phase of the frequency- divided signal output from the frequency divider 137. The phase comparator 131 outputs a phase difference signal indicating a phase difference between the transmission signal Sp_b and the frequency- divided signal to the loop filter 132. Upon receiving the phase difference signal from the phase comparator 131, the loop filter 132 smoothes the phase difference signal and outputs the smoothed phase difference signal to each of the voltage detector 134 and the switch 135.
  • the signal detector 133 performs a process of detecting the transmission signal Sp_b extracted by the third filter 112. When the transmission signal Sp_b is not extracted by the third filter 112 and the transmission signal Sp_b cannot be detected by the third filter 112, the signal detector 133 outputs a non-detection signal indicating that the transmission signal Sp_b is interrupted to a voltage detector. 134 and the switch 135.
  • the voltage detector 134 detects the voltage value of the smoothed phase difference signal output from the loop filter 132, and stores the detected voltage value. When receiving the non-detection signal from the signal detector 133, the voltage detector 134 outputs to the switch 135 the last stored voltage value among the voltage values stored before receiving the non-detection signal.
  • the switch 135 When the non-detection signal is not output from the signal detector 133, the switch 135 outputs the smoothed phase difference signal output from the loop filter 132 to the voltage controlled oscillator 136 as a control voltage signal. When the switch 135 receives the non-detection signal from the signal detector 133, the switch 135 outputs the voltage value output from the voltage detector 134 to the voltage control oscillator 136 as a control voltage signal.
  • Voltage controlled oscillator 136 receives a control voltage signal from the switch 135, the control second to generate a clock signal C b based on the voltage signal, the second clock signal C b divider 137 and the second conversion Output to each of the units 33.
  • Divider 137 receives the second clock signal C b from the voltage controlled oscillator 136, the second clock signal C b divides the second clock signal C b of the divided signal to the phase comparator 131 Output to
  • the phase comparator 131, the loop filter 132, the switch 135, the voltage controlled oscillator 136, and the frequency divider 137 operate as a PLL circuit.
  • the signal detector 133 detects the transmission signal Sp_b , the signal detector 133 does not output a non-detection signal to each of the voltage detector 134 and the switch 135. Therefore, the voltage controlled oscillator 136, the second clock signal C b corresponding to the phase difference between the transmission signal S p_b and the division signal is generated.
  • the signal detector 133 does not detect the transmission signal Sp_b , and a non-detection signal is detected from the signal detector 133. Output to each of the switch 134 and the switch 135. Accordingly, the voltage controlled oscillator 136, the voltage detector 134, among the voltage values stored prior to receiving the non-detection signal, the second clock signal C b on the basis of the voltage value last stored is Generated. Therefore, the transmission line 2a is cut, even if the transmission signal S p_b is no longer flows through the transmission line 2a, it is possible to continue the generation of the second clock signal C b.
  • the second converter 33 receives the surge signal S S_B from the fourth filter 114, the second synchronizing signal generator 113 receives the second clock signal C b, as in the first embodiment, the in synchronism with the second clock signal C b, it converts the analog signal which is a surge signal S S_B to a digital signal.
  • the second conversion unit 33 outputs the digital signal to the fault point calculating section 40 as the second digital signal D b.
  • the Fault point calculation unit 40 as in the first embodiment, the second digital signal D b output from the first digital signal D a and the second converter 33 which is outputted from the first converter 23 Then, the fault point 13 of the transmission line 2 is calculated.
  • the transmission line 2 3 transmission lines 2a, 2b has a 2c, transmission signal S p to be transmitted by the transmission line 2, three-phase AC Can be calculated without transmitting or receiving voltage information or the like via the communication line.
  • any combination of the embodiments, a modification of an arbitrary component of each embodiment, or an omission of an arbitrary component in each embodiment is possible within the scope of the invention. .
  • the present invention is suitable for an accident point locating apparatus and an accident point locating method for calculating an accident point which is a damaged position of a transmission line.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Locating Faults (AREA)

Abstract

L'invention concerne un dispositif de localisation de point de défaillance, comprenant : une première unité de détection de surtension (20) connectée à une extrémité à un premier point (11) dans une ligne de transmission (1) et qui détecte un signal de surtension lorsque le signal de surtension est généré en raison de l'endommagement de la ligne de transmission (1), en synchronisation avec un signal de transmission circulant à travers le premier point (11) ; une seconde unité de détection de surtension (30) connectée à une extrémité à un second point (12), différent du premier point (11), dans la ligne de transmission (1) et qui détecte un signal de surtension en synchronisation avec un signal de transmission circulant à travers le second point (12) ; et une unité de calcul de point de défaillance (40) qui calcule un point de défaillance (13) indiquant un emplacement endommagé de la ligne de transmission (1) en fonction du signal de surtension détecté par la première unité de détection de surtension (20) et du signal de surtension détecté par la seconde unité de détection de surtension (30).
PCT/JP2018/031536 2018-08-27 2018-08-27 Dispositif de localisation de point de défaillance et procédé de localisation de point de défaillance WO2020044398A1 (fr)

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JP2020539173A JP6789456B2 (ja) 2018-08-27 2018-08-27 事故点標定装置及び事故点標定方法
PCT/JP2018/031536 WO2020044398A1 (fr) 2018-08-27 2018-08-27 Dispositif de localisation de point de défaillance et procédé de localisation de point de défaillance

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5875419A (ja) * 1981-10-29 1983-05-07 株式会社東芝 サンプリング時刻同期装置
JPH09166640A (ja) * 1995-12-19 1997-06-24 Hitachi Ltd 送電線故障点標定装置及び送電線故障点標定方法
JP2008141866A (ja) * 2006-12-01 2008-06-19 Kyushu Electric Power Co Inc 送配電系統の時刻同期方法およびそれを用いた事故点標定方法および装置
JP2013251969A (ja) * 2012-05-31 2013-12-12 Toshiba Corp 保護制御装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5875419A (ja) * 1981-10-29 1983-05-07 株式会社東芝 サンプリング時刻同期装置
JPH09166640A (ja) * 1995-12-19 1997-06-24 Hitachi Ltd 送電線故障点標定装置及び送電線故障点標定方法
JP2008141866A (ja) * 2006-12-01 2008-06-19 Kyushu Electric Power Co Inc 送配電系統の時刻同期方法およびそれを用いた事故点標定方法および装置
JP2013251969A (ja) * 2012-05-31 2013-12-12 Toshiba Corp 保護制御装置

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