WO2020044398A1 - Fault point locating device and fault point locating method - Google Patents

Fault point locating device and fault point locating method Download PDF

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Publication number
WO2020044398A1
WO2020044398A1 PCT/JP2018/031536 JP2018031536W WO2020044398A1 WO 2020044398 A1 WO2020044398 A1 WO 2020044398A1 JP 2018031536 W JP2018031536 W JP 2018031536W WO 2020044398 A1 WO2020044398 A1 WO 2020044398A1
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WIPO (PCT)
Prior art keywords
signal
surge
transmission
point
unit
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PCT/JP2018/031536
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French (fr)
Japanese (ja)
Inventor
平 和田
潤 下川床
田島 賢一
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三菱電機株式会社
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Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP2020539173A priority Critical patent/JP6789456B2/en
Priority to PCT/JP2018/031536 priority patent/WO2020044398A1/en
Publication of WO2020044398A1 publication Critical patent/WO2020044398A1/en

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/08Locating faults in cables, transmission lines, or networks
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y04INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
    • Y04SSYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
    • Y04S10/00Systems supporting electrical power generation, transmission or distribution
    • Y04S10/50Systems or methods supporting the power network operation or management, involving a certain degree of interaction with the load-side end user applications
    • Y04S10/52Outage or fault management, e.g. fault detection or location

Definitions

  • the present invention relates to an accident point locating device and an accident point locating method for calculating an accident point which is a damaged position of a transmission line.
  • the accident point locating device is a device that calculates an accident point, which is a damaged position of a transmission line, when the transmission line is damaged.
  • a master station and a slave station are connected to a transmission line.
  • a transmission line fault point locating method for locating an accident point based on the obtained voltage information and the voltage information on the A-end side is disclosed.
  • the master station and the slave station are connected via a communication line different from the transmission line, and the slave station transmits voltage information on the B-end side of the transmission line to the master station via the communication line. .
  • a slave station transmits voltage information on the B end side to a master station via a communication line.
  • the voltage information at the B end receives a transmission delay in a communication line before being transmitted from the slave station to the master station, and also receives a transmission processing delay in a modem of the slave station that transmits the voltage information,
  • the modem of the master station receiving the voltage information receives a reception processing delay. Therefore, even if the master station locates the fault point based on the voltage information transmitted from the slave station and the voltage information on the A-end side, the influence of the delay received on the voltage information on the B-end side, There was a problem that it was not possible to accurately locate the accident point.
  • the present invention has been made to solve the above-described problems, and an accident point locating device and an accident point locating apparatus capable of calculating an accident point of a transmission line without transmitting and receiving voltage information and the like via a communication line.
  • the aim is to obtain a point location method.
  • An accident point locating device has one end connected to a first point in a transmission line that transmits power as a transmission signal, and generates a first signal when a surge signal is generated due to damage to the transmission line.
  • a first surge detection unit for detecting a surge signal in synchronization with a transmission signal flowing through the point, and one end connected to a second point different from the first point on the transmission line;
  • a second surge detector for detecting a surge signal in synchronization with a transmission signal flowing through the first and second surge detectors; a surge signal detected by the first surge detector; and a surge signal detected by the second surge detector.
  • an accident point calculation unit for calculating an accident point which is a damaged position of the transmission line.
  • the present invention it is possible to calculate the fault point of the transmission line without transmitting and receiving voltage information and the like via the communication line.
  • FIG. 1 is a configuration diagram illustrating an accident point locating device according to Embodiment 1.
  • FIG. FIG. 3 is a configuration diagram illustrating a first signal separation unit 21 of the accident point locating device according to Embodiment 1.
  • FIG. 3 is a configuration diagram illustrating a second signal separation unit 31 of the accident point locating device according to Embodiment 1.
  • FIG. 2 is a configuration diagram illustrating an accident point calculation unit 40 of the accident point locating device according to Embodiment 1. It is a flowchart which shows the accident point locating method which is a processing procedure of the accident point locating device shown in FIG. It is a block diagram which shows the accident point locating device which concerns on Embodiment 2.
  • FIG. 3 is a configuration diagram illustrating a first signal separation unit 21 of the accident point locating device according to Embodiment 1.
  • FIG. 3 is a configuration diagram illustrating a second signal separation unit 31 of the accident point locating device according to Embodiment 1.
  • FIG. 2 is a configuration diagram
  • FIG. 9 is a configuration diagram illustrating an accident point calculation unit 80 of the accident point location device according to the second embodiment.
  • FIG. 4 is an explanatory diagram illustrating signals handled by a first surge detection unit 20.
  • FIG. 4 is an explanatory diagram showing signals handled by a second surge detector 30. It is a block diagram which shows the accident point locating device which concerns on Embodiment 3.
  • FIG. 10 is a configuration diagram illustrating a first synchronization signal generation unit 103 of the accident point locating device according to Embodiment 3.
  • FIG. 13 is a configuration diagram illustrating a second synchronization signal generation unit 113 of the accident point locating device according to Embodiment 3.
  • FIG. FIG. 1 is a configuration diagram showing the accident point locating device according to the first embodiment.
  • the transmission line 1 is a one line, transmitting power as the transmission signal S p.
  • the transmission signal S p is flowing in a direction from the first point 11 to a second point 12.
  • damage to the transmission line 1 is only a part of damage and is not cut. Thus, even if damage to the transmission line 1, the transmission of the transmission signal S p in transmission lines 1 shall be continued.
  • the first point 11 is a point where the input terminal 20a (one end) of the first surge detection unit 20 is connected to the transmission line 1.
  • the second point 12 is a point where the input terminal 30a (one end) of the second surge detector 30 is connected to the transmission line 1 and is different from the first point 11.
  • the accident point 13 is a position where the transmission line 1 is damaged, and is between the first point 11 and the second point 12.
  • Surge signal S s which is generated by damage to the transmission line 1, flows from the fault point 13 in a direction towards the first point 11, also flows from the fault point 13 in a direction toward the second point 12.
  • the surge signal flowing in the direction from the accident point 13 to the first point 11 is referred to as S s_a
  • the surge signal flowing in the direction from the accident point 13 to the second point 12 is S s_b.
  • the frequency of the S S_B shall be greater than the frequency of the transmission signal S p.
  • the first surge detector 20 includes a first signal separator 21, a first synchronization signal generator 22, and a first converter 23.
  • the input terminal 20a is connected to the first point 11, and the output terminal 20b is connected to the first input terminal 40a of the fault point calculator 40.
  • the first surge detector 20 when a surge signal S s by damage to the transmission line 1 is generated occurs in synchronization with the transmission signal S p flowing through the first point 11, the surge signal S s_a To detect.
  • the first surge detector 20 converts the surge signal Ss_a from an analog signal to a digital signal, and outputs the digital signal to the fault point calculator 40 as a first digital signal Da.
  • the first signal separation unit 21 has an input terminal 21 a connected to the first point 11, a first output terminal 21 b connected to an input terminal 22 a of the first synchronization signal generation unit 22, and a second output terminal. 21 c is connected to the input terminal 23 a of the first converter 23.
  • the first signal separating unit 21 the signal flowing through the first point 11, to extract a respective transmit signal S p_a and surge signal S s_a.
  • a transmission signal extracted by the first separator 21 in order to distinguish the transmission signal S p flowing through the transmission line 1, the transmission signals extracted by the first separator 21 ' Sp_a ".
  • the first signal separation unit 21 outputs the extracted transmission signal Sp_a to the first synchronization signal generation unit 22 and outputs the extracted surge signal Ss_a to the first conversion unit 23.
  • the first synchronization signal generation unit 22 is realized by, for example, a PLL (Phase Locked Loop) circuit, a multiplier, or a DDS (Direct Digital Synthesizer).
  • the first synchronization signal generation unit 22 has an input terminal 22 a connected to a first output terminal 21 b of the first signal separation unit 21, and an output terminal 22 b connected to a clock terminal 23 b of the first conversion unit 23.
  • First synchronizing signal generating unit 22 in synchronization with the transmission signal S p_a extracted by the first signal separator 21 first generates a clock signal C a and the first clock signal C a first 1 to the conversion unit 23.
  • the frequency of the transmission signal S p_a extracted by the first separator 21, and the frequency of the first clock signal C a, which is generated by the first synchronizing signal generator 22 may be the same , May be different.
  • the first synchronization signal generating unit 22 when it is implemented by a PLL circuit or DDS, the frequency of the first clock signal C a is determined according to an externally applied control signal .
  • the first conversion unit 23 is realized by, for example, a ⁇ -type or flash-type ADC (Analog to Digital Converter).
  • the first conversion unit 23 has an input terminal 23a connected to a second output terminal 21c of the first signal separation unit 21, a clock terminal 23b connected to an output terminal 22b of the first synchronization signal generation unit 22,
  • the output terminal 23c is connected to the first input terminal 40a of the accident point calculator 40.
  • First converting section 23 in synchronization with the first clock signal C a, which is generated by the first synchronizing signal generating unit 22, a surge signal S s_a extracted by the first separator 21 analog
  • the analog signal is converted into a digital signal by sampling the signal.
  • the first converter 23 outputs the digital signal to the accident point calculator 40 as a first digital signal Da.
  • the second surge detector 30 includes a second signal separator 31, a second synchronization signal generator 32, and a second converter 33.
  • the input terminal 30a is connected to the second point 12, and the output terminal 30b is connected to the second input terminal 40b of the fault point calculator 40.
  • the second surge detector 30, when a surge signal S s by damage to the transmission line 1 is generated, in synchronization with the transmission signal S p flowing through the second point 12, a surge signal S S_B To detect.
  • the second surge detector 30, a surge signal S S_B converted from an analog signal to a digital signal, and outputs the accident point calculation unit 40 the digital signal as a second digital signal D b.
  • the second signal separation unit 31 has an input terminal 31a connected to the second point 12, a first output terminal 31b connected to an input terminal 32a of the second synchronization signal generation unit 32, and a second output terminal. 31c is connected to the input terminal 33a of the second converter 33.
  • Second signal separating unit 31 the signal flowing through the second point 12, extracts the respective transmission signal S p_b and surge signal S S_B.
  • a transmission signal extracted by the second signal separating unit 31 in order to distinguish the transmission signal S p flowing through the transmission line 1, the transmission signals extracted by the second signal separating unit 31 It is described as " Sp_b ".
  • the second signal separation unit 31 outputs the extracted transmission signal Sp_b to the second synchronization signal generation unit 32, and outputs the extracted surge signal Ss_b to the second conversion unit 33.
  • the second synchronization signal generator 32 is realized by, for example, a PLL circuit, a multiplier, or a DDS.
  • the second synchronization signal generator 32 has an input terminal 32 a connected to the first output terminal 31 b of the second signal separator 31, and an output terminal 32 b connected to the clock terminal 33 b of the second converter 33. I have.
  • Second synchronizing signal generating unit 32 generates a second clock signal C b are synchronized with the transmission signal S p_b extracted by the second signal separating unit 31, the second clock signal C b the 2 to the conversion unit 33.
  • the frequency of the transmission signal S p_b extracted by the second signal separating unit 31, and the frequency of the second clock signal C b generated by the second synchronizing signal generating unit 32 may be the same , May be different.
  • a second synchronizing signal generation unit 32 when it is implemented by a PLL circuit or DDS, the frequency of the second clock signal C b is determined according to an externally applied control signal .
  • the frequency of the second clock signal C b generated by the second synchronizing signal generating unit 32 is the same as the frequency of the first clock signal C a, which is generated by the first synchronizing signal generator 22 .
  • the second clock signal C b of the phase generated by the second synchronizing signal generator 32 synchronized with the first clock signal C a phase generated by the first synchronizing signal generator 22 Absent.
  • the second conversion unit 33 is realized by, for example, a ⁇ -type or flash-type ADC.
  • the second conversion unit 33 has an input terminal 33a connected to the second output terminal 31c of the second signal separation unit 31, a clock terminal 33b connected to an output terminal 32b of the second synchronization signal generation unit 32, The output terminal 33c is connected to the second input terminal 40b of the fault point calculator 40.
  • the second converter 33 in synchronization with the second clock signal C b generated by the second synchronizing signal generating unit 32, a surge signal S S_B extracted by the second signal separating unit 31 Analog An analog signal is converted into a digital signal by sampling the signal.
  • the second conversion unit 33 outputs the digital signal to the fault point calculating section 40 as the second digital signal D b.
  • the fault point calculation unit 40 includes a phase difference detection unit 61, an angular frequency detection unit 62, and a fault point calculation processing unit 63 (see FIG. 4) described later, and is realized by, for example, an FPGA (Field Programmable Gate Array). You.
  • the first input terminal 40a is connected to the output terminal 20b of the first surge detection unit 20, and the second input terminal 40b is connected to the output terminal 30b of the second surge detection unit 30.
  • ⁇ a is the time required for the surge signal S s_a to reach the first point 11 from the accident point 13
  • ⁇ b is the time required for the surge signal S s_b to reach the second point 12 from the accident point 13 It is the time required.
  • FIG. 2 is a configuration diagram illustrating the first signal separation unit 21 of the accident point locating device according to the first embodiment.
  • the first filter 51 is a filter in which the frequency of the transmission signal Sp_a is within the pass band and the frequency of the surge signal S s_a is outside the pass band, and is implemented by, for example, an LPF (Low Pass Filter). Is done.
  • the first filter 51 suppresses the surge signal S s_a included in the signal flowing through the first point 11 and extracts the transmission signal Sp_a from the signal flowing through the first point 11,
  • the transmission signal Sp_a is output to the first synchronization signal generation unit 22.
  • the LPF is realized using a chip inductor or a chip capacitor.
  • the LPF may mount a microstrip line or a coaxial resonator according to the pass band of the LPF and the suppression amount of the surge signal Ss_a .
  • the second filter 52 is a filter in which the frequency of the surge signal S s_a is within the pass band and the frequency of the transmission signal Sp_a is outside the pass band, and is realized by, for example, an HPF (High Pass Filter).
  • HPF High Pass Filter
  • the second filter 52 suppresses the transmission signal Sp_a included in the signal flowing through the first point 11 and extracts the surge signal Ss_a from the signal flowing through the first point 11; It outputs the surge signal Ss_a to the first converter 23.
  • the HPF is realized using a chip inductor or a chip capacitor.
  • the HPF may include a microstrip line or a coaxial resonator according to the passband of the HPF and the amount of suppression of the transmission signal Sp_a .
  • FIG. 3 is a configuration diagram illustrating the second signal separation unit 31 of the accident point locating device according to the first embodiment.
  • the third filter 53 is a filter in which the frequency of the transmission signal Sp_b is within the pass band and the frequency of the surge signal S s_b is outside the pass band, and is realized by, for example, an LPF.
  • the third filter 53 suppresses the surge signal S s_b included in the signal flowing through the second point 12 and extracts the transmission signal Sp_b from the signal flowing through the second point 12,
  • the transmission signal Sp_b is output to the second synchronization signal generator 32.
  • the LPF may mount a microstrip line or a coaxial resonator according to the pass band of the LPF and the amount of suppression of the surge signal Ss_b .
  • the fourth filter 54 is a filter in which the frequency of the surge signal S s_b is within the pass band and the frequency of the transmission signal Sp_b is outside the pass band, and is realized by, for example, an HPF.
  • the fourth filter 54 suppresses the transmission signal Sp_b included in the signal flowing through the second point 12 and extracts the surge signal Ss_b from the signal flowing through the second point 12;
  • the surge signal S s_b is output to the second converter 33.
  • the HPF may include a microstrip line or a coaxial resonator according to the passband of the HPF and the amount of suppression of the transmission signal Sp_b .
  • FIG. 4 is a configuration diagram illustrating the accident point calculation unit 40 of the accident point locating device according to the first embodiment. 4, the phase difference detection unit 61, the phase of the first digital signal D a which is output from the first conversion unit 23, the second digital signal D b output from the second conversion unit 33 It detects the phase difference D c between the phase, and outputs the phase difference D c accident point calculation unit 63.
  • the angular frequency detection unit 62 converts the angular frequency ⁇ s of the surge signal S s_b by performing , for example, Fast Fourier Transform (FFT) on the second digital signal D b output from the second conversion unit 33. To detect.
  • FFT Fast Fourier Transform
  • angular frequency detection unit 62 detects the angular frequency omega s of the surge signal S S_B.
  • the angular frequency detection unit 62 by FFT the first digital signal D a which is output from the first converter 23, detects the angular frequency omega s of the surge signal S s_a You may make it do.
  • Fault point calculation unit 63 a phase difference D c detected by the phase difference detection unit 61, from the detected angular frequency omega s by the angular frequency detection unit 62, the surges signal S s_a accident point 13 1 ⁇ a required to reach the point 11 is calculated.
  • FIG. 5 is a flowchart showing an accident point locating method which is a processing procedure of the accident point locator shown in FIG.
  • the transmission delay of the transmission delay and the surge signal S s of the transmission signal S p is not generated.
  • the transmission signal S p to be transmitted to the transmission line 1 is represented by the following equation (1).
  • the formula (1) is omega p, the angular frequency of the transmission signal S p, theta p is the initial phase of the transmission signal S p. Also, t is a time, and the same applies to the following equation.
  • the first point 11 when the starting point of the transmission signal S p, the transmission signal S p_a at the first point 11 is expressed by the following equation (2).
  • the surge signal S s generated at the fault point 13 is damaged position is expressed by the following equation (3).
  • the omega s, the angular frequency of the surge signal S s, theta s is the initial phase of the surge signal S s.
  • the surge signal S s_a flowing from the fault point 13 in a direction towards the first point 11, to the accident point 13 until it reaches the first point 11, it takes time for tau a. Therefore, the surge signal Ss_a at the first point 11 is represented by the following equation (4).
  • the surge signal S s_b flowing in the direction from the accident point 13 to the second point 12 requires a time ⁇ b from the accident point 13 to the second point 12. . Therefore, the surge signal S s_b at the second point 12 is represented by the following equation (5).
  • Transmission signal S p to the starting point of the first point 11, to reach the second point 12, takes time ⁇ a + ⁇ b. Therefore, the transmission signal Sp_b at the second point 12 is represented by the following equation (6).
  • the first separator 21 of the first surge detector 20, the signal flowing through the first point 11, to extract a respective transmit signal S p_a and surge signal S s_a (step ST1 in FIG. 5) .
  • the processing procedure of the first signal separation unit 21 will be specifically described.
  • the first filter 51 suppresses the surge signal S s_a included in the signal flowing through the first point 11, and The transmission signal Sp_a is extracted from the signal flowing through.
  • the first filter 51 outputs the transmission signal Sp_a to the first synchronization signal generator 22.
  • the second filter 52 suppresses the transmission signal Sp_a included in the signal flowing through the first point 11, and The surge signal S s_a is extracted from the signal flowing through.
  • the second filter 52 outputs the surge signal Ss_a to the first converter 23.
  • the first synchronization signal generation unit 22 Upon receiving the transmission signal Sp_a from the first signal separation unit 21, the first synchronization signal generation unit 22 generates a first clock signal Ca synchronized with the transmission signal Sp_a , and generates a first clock signal. and it outputs the signal C a in the first conversion unit 23 (step ST2 of FIG. 5).
  • the angular frequency of the first clock signal C a can, when it is N times the angular frequency omega p of the transmit signal S p_a, the first clock signal C a can be expressed by the following equation (7) . And a 2N ⁇ p> ⁇ s.
  • First converting section 23 in synchronization with the first clock signal C a, which is generated by the first synchronizing signal generating unit 22, a surge signal S s_a output from the first separator 21 analog
  • the analog signal is converted into a digital signal by sampling the signal (step ST3 in FIG. 5).
  • the first converter 23 samples an analog signal by oversampling.
  • the first conversion unit 23 for example, to sample the digital signal to analog signal at the rising edge of the first clock signal C a.
  • Rise timing t C_A of the first clock signal C a can be expressed by the following equation (8).
  • First digital signal D a which is output from the first converter 23 to the fault point calculation unit 40, the equation (4) and (8), is expressed by the following equation (9).
  • the processing procedure of the second signal separation unit 31 will be specifically described.
  • the third filter 53 suppresses the surge signal S s_b included in the signal flowing through the second point 12, and The transmission signal Sp_b is extracted from the signal flowing through.
  • the third filter 53 outputs the transmission signal Sp_b to the second synchronization signal generator 32.
  • the fourth filter 54 suppresses the transmission signal Sp_b included in the signal flowing through the second point 12, and The surge signal S s_b is extracted from the signal flowing through.
  • the fourth filter 54 outputs the surge signal Ss_b to the second converter 33.
  • Second synchronizing signal generating unit 32 receives the transmission signal S p_b from the second signal separating unit 31, and generates a second clock signal C b are synchronized with the transmission signal S p_b, a second clock and outputs the signal C b in the second conversion unit 33 (step ST5 in FIG. 5).
  • the angular frequency of the second clock signal C b is, when an N times the angular frequency omega p of the transmit signal S p_b, the second clock signal C b is expressed by the following equation (10) .
  • the second converter 33 in synchronization with the second clock signal C b generated by the second synchronizing signal generating unit 32, a surge signal S S_B outputted from the second signal separating unit 31 Analog
  • the analog signal is converted into a digital signal by sampling the signal (step ST6 in FIG. 5).
  • the second converter 33 samples an analog signal by oversampling.
  • the second converter 33 for example, to sample the digital signal to analog signal at the rising edge of the second clock signal C b.
  • Rise timing t C_B of the second clock signal C b is expressed by the following equation (11).
  • Second digital signal D b output from the second converter 33 to the fault point calculation unit 40, the equation (5) and (11), is expressed by the following equation (12).
  • Phase difference detection unit 61 includes a first digital signal D a phase output from the first converting section 23, position of the second digital signal D b of the phase output from the second conversion unit 33 detecting a phase difference D c, and outputs the phase difference D c accident point calculation unit 63.
  • the angular frequency detection unit 62 detects the angular frequency ⁇ s of the surge signal S s_b by performing an FFT on the second digital signal D b output from the second conversion unit 33, and determines the angular frequency ⁇ s as an accident point. Output to the calculation processing unit 63.
  • Fault point calculation processing section 63 receives the phase difference D c from the phase difference detecting unit 61 receives the angular frequency omega s from angular frequency detection unit 62, as shown in the following equation (13), the phase difference D c from the angular frequency ⁇ s, to calculate the time ⁇ a. Then, the fault point calculation unit 63, and a transmission speed v and time tau a surge signal S s_a, calculates the fault point 13.
  • the distance L from the first point 11 to the accident point 13 is represented by the following equation (14), and calculating the distance L corresponds to calculating the accident point 13.
  • L v ⁇ ⁇ a (14)
  • one end is connected to the first point 11 on the transmission line 1, and when the surge signal is generated due to damage to the transmission line 1, the signal flows through the first point 11.
  • One end is connected to a first surge detector 20 that detects a surge signal in synchronization with the transmission signal, and a second point 12 different from the first point 11 in the transmission line 1.
  • a second surge detector 30 for detecting a surge signal in synchronization with a transmission signal flowing through the first and second surge detectors, and a surge signal detected by the first surge detector 20 and a second surge detector 30 detecting the surge signal.
  • the fault point locating device was configured to include a fault point calculation unit 40 that calculates a fault point 13 which is a damage position of the transmission line 1 from a surge signal. Therefore, the fault point locating device can calculate the fault point 13 of the transmission line 1 without transmitting and receiving voltage information and the like via the communication line.
  • the first filter 51 is realized by an LPF
  • the second signal separation unit 31 shown in FIG. 3 the third filter 53 is realized by an LPF.
  • the first filter 51 only needs to be able to suppress the surge signal S s_a included in the signal flowing through the first point 11 and extract the transmission signal Sp_a, and is limited to the one realized by the LPF. Not something.
  • the third filter 53 only needs to be able to suppress the surge signal S s_b included in the signal flowing through the second point 12 and extract the transmission signal Sp_b, and is limited to those realized by the LPF. Not something. Therefore, each of the first filter 51 and the third filter 53 may be realized by, for example, a BPF (Band Pass Filter) or a BRF (Band Rejection Filter).
  • the second filter 52 is realized by an HPF
  • the fourth filter 54 is realized by an HPF.
  • the second filter 52 suppresses the transmission signal Sp_a included in the signal flowing through the first point 11 and extracts the surge signal S s_a from the signal flowing through the first point 11. It is sufficient if possible, and the invention is not limited to the one realized by the HPF.
  • the fourth filter 54 suppresses the transmission signal Sp_b included in the signal flowing through the second point 12 and extracts the surge signal S s_b from the signal flowing through the second point 12. It is sufficient if possible, and the invention is not limited to the one realized by the HPF. Therefore, each of the second filter 52 and the fourth filter 54 may be realized by, for example, a BPF or a BRF.
  • each of the first converter 23 and the second converter 33 samples an analog signal by oversampling.
  • Embodiment 2 FIG.
  • a transmission delay occurs in the first and second transmission lines connecting the first surge detector 20 and the fault point calculator 80, and the second surge detector 30 and the fault point calculator 80
  • An accident point locator in which a transmission delay occurs in the third and fourth transmission lines connecting the two will be described.
  • FIG. 6 is a configuration diagram illustrating an accident point locating device according to the second embodiment. 6, the same reference numerals as those in FIG. 1 denote the same or corresponding parts, and a description thereof will not be repeated.
  • the signal generator 24 is provided.
  • 20 c is an output terminal of the first surge detector 20.
  • 30c is an output terminal of the second surge detector 30.
  • the first trigger signal generation unit 24 is realized by, for example, a PLL circuit, a DDS, or an ADC.
  • the first trigger signal generation unit 24 has an input terminal 24 a connected to the first output terminal 21 b of the first signal separation unit 21, and an output terminal 24 b connected to an input terminal of the second transmission line 72.
  • First trigger signal generator 24 generates a first trigger signal E a which synchronizes with the transmission signal S p_a extracted by the first separator 21, via the second transmission line 72 , and outputs a first trigger signal E a an accident point calculation unit 80.
  • the frequency of the transmission signal S p_a extracted by the first separator 21, and the frequency of the first trigger signal E a which is produced by the first trigger signal generator 24 may be the same , May be different.
  • the first trigger signal generation unit 24 when it is implemented by a PLL circuit or DDS, the frequency of the first trigger signal E a is determined according to an externally applied control signal .
  • the first trigger signal generation unit 24 converts the transmission signal Sp_a from an analog signal to a digital signal in synchronization with an externally supplied clock signal. It converted to, or the digital signal as a first trigger signal E a.
  • First trigger signal generator 24 as a clock signal given from the outside, may be used first clock signal C a, which is generated by the first synchronizing signal generator 22.
  • the second trigger signal generation unit 34 is realized by, for example, a PLL circuit, a DDS, or an ADC.
  • the input terminal 34a is connected to the first output terminal 31b in the second signal separator 31, and the output terminal 34b is connected to the input end of the fourth transmission line 74.
  • the second trigger signal generation unit 34 generates a second trigger signal Eb synchronized with the transmission signal Sp_b extracted by the second signal separation unit 31, and outputs the second trigger signal Eb via the fourth transmission line 74. , And outputs the second trigger signal Eb to the accident point calculation unit 80.
  • the frequency of the transmission signal S p_b extracted by the second signal separating unit 31, and the frequency of the second trigger signal E b generated by the second trigger signal generator 34 may be the same , May be different.
  • the frequency of the second trigger signal Eb is determined according to a control signal provided from the outside.
  • the second trigger signal generator 34 converts the transmission signal Sp_b from an analog signal to a digital signal in synchronization with an externally applied clock signal. And the digital signal may be used as the second trigger signal Eb .
  • Second trigger signal generator 34 a clock signal given from the outside, may be used a second clock signal C b generated by the second synchronizing signal generating unit 32.
  • Each of the first transmission line 71, the second transmission line 72, the third transmission line 73, and the fourth transmission line 74 is realized by, for example, a coaxial cable or a twisted pair line including a signal line and a ground line. Is done.
  • the first transmission line 71 has an input terminal connected to the output terminal 20 b of the first surge detector 20 and an output terminal connected to the first input terminal 80 a of the fault point calculator 80.
  • the first transmission line 71, the first digital signal D a which is output from the first conversion unit 23 is delayed by a first delay time t d1, the first digital signal D a of the delayed first Is output to the accident point calculation unit 80 as the digital signal D a1 of.
  • the second transmission line 72 has an input terminal connected to the output terminal 20 c of the first surge detector 20 and an output terminal connected to the second input terminal 80 b of the fault point calculator 80.
  • Second transmission line 72 the first trigger signal E a which is produced by the first trigger signal generator 24 is delayed by a first delay time t d1, the first trigger signal E a the delayed The signal is output to the accident point calculation unit 80 as the first trigger signal Ea1 .
  • the third transmission line 73 has an input terminal connected to the output terminal 30 b of the second surge detection unit 30 and an output terminal connected to the third input terminal 80 c of the fault point calculation unit 80.
  • the third transmission line 73, the second digital signal D b output from the second conversion unit 33 is delayed by a second delay time t d2, the second digital signal D b of the delayed second Is output to the accident point calculation unit 80 as the digital signal D b1 of
  • the fourth transmission line 74 has an input terminal connected to the output terminal 30 c of the second surge detection unit 30 and an output terminal connected to the fourth input terminal 80 d of the fault point calculation unit 80.
  • the fourth transmission line 74 delays the second trigger signal Eb generated by the second trigger signal generator 34 by a second delay time td2, and converts the delayed second trigger signal Eb .
  • the signal is output to the accident point calculation unit 80 as the second trigger signal Eb1 .
  • the accident point calculation unit 80 includes a first time difference calculation unit 81, a second time difference calculation unit 82, and an accident point calculation processing unit 83 (see FIG. 7), which will be described later.
  • the first input terminal 80a is connected to the output terminal of the first transmission line 71
  • the second input terminal 80b is connected to the output terminal of the second transmission line 72.
  • the third input terminal 80c is connected to the output terminal of the third transmission line 73
  • the fourth input terminal 80d is connected to the output terminal of the fourth transmission line 74.
  • the fault point calculation unit 80 calculates the fault point 13 from the first digital signal D a1 , the first trigger signal E a1 , the second digital signal D b1 , and the second trigger signal E b1. .
  • FIG. 7 is a configuration diagram illustrating an accident point calculation unit 80 of the accident point location device according to the second embodiment.
  • a first time difference calculation unit 81 includes a rising time of the first digital signal D a1 output from the first transmission line 71 and a first trigger output from the second transmission line 72.
  • a first time difference which is a time difference from the rising time of the signal Ea1 , is calculated.
  • the first time difference calculation section 81 outputs the first time difference to the accident point calculation processing section 83.
  • the second time difference calculation unit 82 calculates the rising time of the second digital signal D b1 output from the third transmission line 73 and the second trigger signal E b1 output from the fourth transmission line 74.
  • a second time difference which is a time difference from the rising time, is calculated.
  • the second time difference calculation unit 82 outputs the second time difference to the accident point calculation processing unit 83.
  • the accident point calculation processing unit 83 calculates the accident point 13 based on the first time difference calculated by the first time difference calculation unit 81 and the second time difference calculated by the second time difference calculation unit 82. Is calculated.
  • FIG. 8 is an explanatory diagram showing signals handled by the first surge detector 20.
  • Y D of the first digital signal D a to be discretely outputted from the first converter 23, a fault point 13 by the surge signal S s is generated, initially non-zero a D a which is changed to a value, the rise time of the D a.
  • Y E of the first trigger signal E a to be discretely outputted from the first trigger signal generator 24, the signal level is L level (for example, "0") from the H level (for example, "1" ) is the first E b at a transition to.
  • t a is the time difference between the time of the time and Y D of Y E.
  • t d1 is the delay time of the first digital signal D first trigger signal for the first delay time and a first trigger signal E a of the digital signal D a1 for a E a1.
  • Time difference t a, the first digital signal D a and a first trigger signal E a is, before and after passing through the first transmission line 71 and the second transmission line 72, there is no change.
  • FIG. 9 is an explanatory diagram showing signals handled by the second surge detector 30.
  • Z D of the second digital signal D b that is discretely output from the second conversion unit 33, the accident point 13 by the surge signal S s is generated, initially non-zero a D b was changed to a value, which is D b at the time of rising.
  • Z E among the second trigger signal E b are discretely output from the second trigger signal generator 34, which is the first E b when the signal level is changed from L level to H level.
  • t b is the time difference between the time of the time and Z D of Z E.
  • t d2 is the delay time of the second digital signal D b second trigger signal to the second delay time and a second trigger signal of the digital signal D b1 for E b E b1.
  • Time difference t b, the second digital signal D b and the second trigger signal E b is, before and after passing through the third transmission line 73 and the fourth transmission line 74, there is no change.
  • transmission line 1 the first transmission line 71, the second transmission line 72, other than the third transmission line 73 and the fourth transmission line 74, the transmission delay and the surge signal S s of the transmission signal S p It is assumed that no transmission delay occurs.
  • the first trigger signal generation unit 24 Upon receiving the transmission signal Sp_a from the first signal separation unit 21, the first trigger signal generation unit 24 generates a first trigger signal Ea synchronized with the transmission signal Sp_a , and generates a first trigger signal. and outputs a signal E a to the second transmission line 72.
  • First trigger signal E a for example, as shown in FIG. 8, the transmit signal when the amplitude of S p_a is equal to or larger than the threshold Th, the signal level becomes the H level, the transmission signal S p_a amplitude is less than the threshold value Th of , The signal level becomes L level.
  • the threshold value Th is, for example, a value that is half of the maximum amplitude of the transmission signal Sp_a .
  • the threshold value Th is stored in, for example, the internal memory of the first trigger signal generation unit 24 and the internal memory of the second trigger signal generation unit 34.
  • the threshold Th may be externally given to each of the first trigger signal generator 24 and the second trigger signal generator 34.
  • First digital signal D a which is output from the first conversion unit 23, the first transmission line 71 is transmitted to the fault point calculation unit 80.
  • the first digital signal Da is delayed by the first delay time t d1 in the first transmission line 71, so that the delayed first digital signal Da is converted to the first digital signal Da. It is input to the accident point calculation unit 80 as Da1 .
  • the first trigger signal E a which is produced by the first trigger signal generator 24, the second transmission line 72 is transmitted to the fault point calculation unit 80.
  • the first trigger signal E a in the second transmission line 72, to be delayed by the first delay time t d1, the first trigger signal E a post delay, the first trigger signal E a1 is input to the accident point calculation unit 80.
  • Second trigger signal generator 34 receives the transmission signal S p_b from the second signal separating unit 31, to generate a second trigger signal E b which is synchronized with the transmission signal S p_b, second trigger The signal Eb is output to the fourth transmission line 74.
  • Second trigger signal E b is, for example, as shown in FIG. 9, the transmission signal when the amplitude of S p_b is equal to or larger than the threshold Th, the signal level becomes the H level, the transmission signal S p_b amplitude is less than the threshold value Th of , The signal level becomes L level.
  • Second digital signal D b output from the second converter 33, the third transmission line 73 is transmitted to the fault point calculation unit 80.
  • the second digital signal Db is delayed by the second delay time td2 in the third transmission line 73, so that the delayed second digital signal Db is converted to the second digital signal Db.
  • Db1 is input to the accident point calculation unit 80.
  • the second trigger signal Eb generated by the second trigger signal generator 34 is transmitted to the fault point calculator 80 via the fourth transmission line 74.
  • the second trigger signal Eb is delayed by the second delay time td2 in the fourth transmission line 74, so that the delayed second trigger signal Eb is changed to the second trigger signal.
  • Eb1 is input to the accident point calculation unit 80.
  • the fault point calculation unit 80 calculates the fault point 13 from the first digital signal D a1 , the first trigger signal E a1 , the second digital signal D b1 , and the second trigger signal E b1. .
  • the processing procedure of the accident point calculation unit 80 will be specifically described.
  • the first time difference calculating unit 81 detects the rising of the first digital signal Da1 output from the first transmission line 71, and also detects the first trigger signal E output from the second transmission line 72. The rising edge of a1 is detected.
  • the first time difference calculating unit 81 calculates a time difference between the detected rising time of the first digital signal D a1 and the detected rising time of the first trigger signal E a1 as a first time difference ta. I do.
  • a first time difference calculation section 81 outputs a first time difference t a the fault point calculation processing unit 83.
  • the second time difference calculation unit 82 detects the rising of the second digital signal D b1 output from the third transmission line 73, and also detects the second trigger signal E output from the fourth transmission line 74. The rise of b1 is detected.
  • the second time difference calculator 82 calculates a time difference between the detected rising time of the second digital signal D b1 and the detected rising time of the second trigger signal E b1 as a second time difference t b. I do.
  • the second time difference calculating unit 82 outputs the second time difference t b the fault point calculation processing unit 83.
  • Fault point calculation unit 83 holds the phase information of the transmission signal S p_b in the phase information and the second point 12 of the transmission signal S p_a at the first point 11. These phase information may be externally provided to the fault point calculation processing unit 83 or may be measured by the fault point calculation processing unit 83. Further, the distance from the not shown source of the transmission signal S p to the first point 11 and second point 12, and a frequency of the transmission signal S p, the fault point calculation processing unit 83, a phase information calculation May be performed.
  • Fault point calculation unit 83 the phase information of the transmission signal S p_a at the first point 11, and calculates the time t YE of Y E. Further, the fault point calculation unit 83, the phase information of the transmission signal S p_b at the second point 12 to calculate the time t ZE of Z E.
  • the processing itself for calculating the times t YE and t ZE from the phase information is a known technique, and a detailed description thereof will be omitted.
  • Fault point calculation unit 83 from a first time difference t a which is output from the first time difference calculation unit 81, the time t YE of the calculated Y E, and calculates the time t YD of Y D. Further, the fault point calculation processing unit 83, calculates a second time difference t b output from the second time difference calculating portion 82, from the time t ZE of the calculated Z E, the time t ZD of Z D I do.
  • the fault point calculation processing unit 83 calculates the fault point 13.
  • Distance L b from the second point 12 to the fault point 13 is expressed as the following equation (15), to calculate the distance L b is equivalent to calculating the fault point 13.
  • the distance La is a distance from the first point 11 to the accident point 13, and
  • t YD > t ZD the accident point 13 is a position closer to the second point 12 than to the first point 11. If t YD ⁇ t ZD , the accident point 13 is a position closer to the first point 11 than to the second point 12.
  • the accident point calculation unit 80 determines that the first digital signal D a1 , the first trigger signal E a1 , the second digital signal D b1 , and the second trigger signal E b1
  • the accident point locating device was configured to calculate the accident point 13. Therefore, the fault point locating device of the second embodiment can calculate the fault point 13 without transmitting and receiving voltage information and the like via the communication line, similarly to the fault point locating device of the first embodiment.
  • the fault point locating device according to the second embodiment includes a delay time in a transmission line between the first surge detector 20 and the fault point calculator 80, a second surge detector 30, and a fault point calculator.
  • the fault point 13 can be calculated even when the delay time in the transmission line between the fault point 80 and the delay time 80 differs. Therefore, the fault point locating device according to the second embodiment can increase the selectivity of the line length of the transmission line as compared with the fault point locating device according to the first embodiment, and can further increase the selectivity of the first surge detector 20 and the second surge detector. The selectivity of each installation position in the surge detection unit 30 and the accident point calculation unit 80 can be improved.
  • the first time difference calculating section 81 calculates the time difference between the rising time of the first digital signal D a1 and the rising time of the first trigger signal E a1 by the first time. It is calculated as the time difference t a. However, this is only an example, and the first time difference calculation unit 81 calculates the time difference between the falling time of the first digital signal D a1 and the falling time of the first trigger signal E a1 by the first time. May be calculated as the time difference ta.
  • the second time difference calculation unit 82 calculates the time difference between the rising time of the second digital signal D b1 and the rising time of the second trigger signal E b1 in the second time.
  • the second time difference calculating unit 82 calculates the time difference between the falling time of the second digital signal D b1 and the falling time of the second trigger signal E b1 by the second time. May be calculated as the time difference tb.
  • the first time difference calculation unit 81 calculates a time difference between the fall time of the first digital signal Da1 and the fall time of the first trigger signal Ea1 as a first time difference ta.
  • the second time difference calculator 82 calculates the time difference between the rising time of the second digital signal D b1 and the rising time of the second trigger signal E b1 as the second time difference t b. It may be.
  • the first time difference calculation section 81 calculates the rise time of the first digital signal D a1, the time difference between the rise time of the first trigger signal E a1 as the first time difference t a,
  • the second time difference calculation unit 82 calculates the time difference between the fall time of the second digital signal D b1 and the fall time of the second trigger signal E b1 as a second time difference t b. It may be.
  • a first trigger signal generator 24 generates a first trigger signal E a which synchronizes with the transmission signal S p_a, a second trigger signal generator 34, and it generates a second trigger signal E b which is synchronized with the transmission signal S p_b.
  • the first trigger signal E a has only to be synchronized with the transmission signal S p_a
  • the second trigger signal E b has only to be synchronized with the transmission signal S p_b . Therefore, the first trigger signal generation unit 24, a first trigger signal E a, using the transmission signal S p_a, the second trigger signal generation unit 34, as a second trigger signal E b, the transmission signal S p_b may be used.
  • the first surge detector 20 includes a first converter 23, and the second surge detector 30 includes a second converter 33.
  • the first time difference calculation unit 81 if detects a rise of the surge signal S s_a, can calculate the first time difference t a, the second time difference calculating section 82, the rise of the surge signal S S_B if detected, it calculates the second time difference t b. Therefore, the first surge detector 20 includes a detector that detects the surge signal S s_a instead of the first converter 23, and the second surge detector 30 replaces the second converter 33.
  • a detector for detecting the surge signal Ss_b may be provided.
  • FIG. 10 is a configuration diagram illustrating an accident point locating device according to the third embodiment.
  • the transmission line 2 has three transmission lines 2a, 2b, 2c.
  • Transmission signal S p is a power transmitted by the transmission line 2 is a signal of the three-phase AC.
  • the transmission signal S p is flowing in a direction from the first point 11 to a second point 12.
  • the first surge detector 100 includes a first signal synthesizer 101, a first filter 102, a first synchronization signal generator 103, a second filter 104, and a first converter 23.
  • the input terminals 100a, 100b, 100c are connected to the first point 11, and the output terminal 100d is connected to the first input terminal 40a of the fault point calculator 40.
  • the first surge detection unit 100 detects the surge signal S s_a in synchronization with the transmission signal Sp_a flowing through the first point 11. To detect.
  • the first surge detector 100 converts the surge signal Ss_a from an analog signal to a digital signal, and outputs the digital signal to the fault point calculator 40 as a first digital signal Da.
  • the first signal combining unit 101 is realized by, for example, a combiner mounting a resistor and a transformer, a hybrid circuit, or a circuit in which a 180-degree hybrid circuit and a 180-degree phase shifter are combined.
  • the input terminal 101a is connected to the first point 11 on the transmission line 2a
  • the input terminal 101b is connected to the first point 11 on the transmission line 2b
  • the input terminal 101c is connected to the transmission line 2c. Is connected to the first point 11 in.
  • the output terminal 101 d of the first signal synthesis unit 101 is connected to the input terminal 104 a of the second filter 104.
  • the first signal combining unit 101 adds the voltages or currents of the three-phase AC signals flowing through the first point 11 in the three transmission lines 2a, 2b, and 2c in the same phase, thereby performing the first combining. Generate a signal. First signal combining section 101 outputs the first combined signal to second filter 104.
  • the first filter 102 is a filter in which the frequency of the transmission signal Sp_a is within the passband and the frequency of the surge signal Ss_a is outside the passband, and is realized by, for example, an LPF.
  • the first filter 102 has an input terminal 102a connected to the first point 11 in the transmission line 2a, and an output terminal 102b connected to the input terminal 103a of the first synchronization signal generator 103.
  • the first filter 102 suppresses the surge signal S s_a included in the signal flowing through the first point 11 in the transmission line 2a, and reduces the transmission signal Sp_a from the signal flowing through the first point 11. And outputs the transmission signal Sp_a to the first synchronization signal generation unit 103.
  • the first synchronization signal generation unit 103 is realized by, for example, a PLL circuit, a multiplier, or a DDS.
  • the first synchronization signal generator 103 has an input terminal 103 a connected to an output terminal 102 b of the first filter 102, and an output terminal 103 b connected to a clock terminal 23 b of the first converter 23.
  • First synchronizing signal generating unit 103 generates the first clock signal C a which is synchronized with the transmission signal S p_a extracted by the first filter 102, the first clock signal C a first Output to the converter 23.
  • First synchronizing signal generating unit 103 transmission signal S p_a by the first filter 102 is no longer extracted, the output of the transmission signal S p_a from the first filter 102 is interrupted, interrupted the output of the transmission signal S p_a is outputting a first clock signal C a generated prior to the first converting section 23.
  • the frequency of the transmission signal S p_a extracted by the first filter 102, the frequency of the first clock signal C a, which is generated by the first synchronizing signal generator 103 may be the same, different May be.
  • a first synchronizing signal generator 103 as implemented by the PLL circuit or DDS, the frequency of the first clock signal C a is determined according to an externally applied control signal .
  • the second filter 104 is a filter in which the frequency of the surge signal S s_a is within the pass band and the frequency of the transmission signal Sp_a is outside the pass band, and is realized by, for example, an HPF.
  • the second filter 104 has an input terminal 104 a connected to the output terminal 101 d of the first signal synthesis unit 101, and an output terminal 104 b connected to the input terminal 23 a of the first conversion unit 23.
  • the second filter 104 suppresses the transmission signal Sp_a included in the first combined signal generated by the first signal combining unit 101, and extracts the surge signal Ss_a from the first combined signal. , And outputs the surge signal Ss_a to the first converter 23.
  • the second surge detector 110 includes a second signal synthesizer 111, a third filter 112, a second synchronization signal generator 113, a fourth filter 114, and a second converter 33.
  • the input terminals 110a, 110b, 110c are connected to the second point 12, and the output terminal 110d is connected to the second input terminal 40b of the fault point calculator 40.
  • Second surge detecting unit 110 when a surge signal S s by damage to the transmission line 2 has occurred, in synchronization with the transmission signal S p_b flowing through the second point 12, a surge signal S S_B To detect.
  • Second surge detecting unit 110 a surge signal S S_B converted from an analog signal to a digital signal, and outputs the digital signal to the fault point calculating section 40 as the second digital signal D b.
  • the second signal combining unit 111 is realized by, for example, a combiner mounting a resistor and a transformer, a hybrid circuit, or a circuit in which a 180-degree hybrid circuit and a 180-degree phase shifter are combined.
  • the second signal combining unit 111 has an input terminal 111a connected to the second point 12 on the transmission line 2a, an input terminal 111b connected to the second point 12 on the transmission line 2b, and an input terminal 111c connected to the transmission line 2c. Is connected to the second point 12 at The output terminal 111 d of the second signal synthesizing unit 111 is connected to the input terminal 114 a of the fourth filter 114.
  • the second signal synthesizing unit 111 adds the voltages or currents of the three-phase alternating current signals flowing at the second point 12 in the three transmission lines 2a, 2b, and 2c in the same phase, thereby performing the second synthesis. Generate a signal.
  • the second signal synthesizing section 111 outputs the second synthesized signal to the fourth filter 114.
  • the third filter 112 is a filter in which the frequency of the transmission signal Sp_b is within the pass band and the frequency of the surge signal S s_b is outside the pass band, and is realized by, for example, an LPF.
  • the third filter 112 has an input terminal 112a connected to the second point 12 in the transmission line 2a, and an output terminal 112b connected to the input terminal 113a of the second synchronization signal generator 113.
  • the third filter 112 suppresses the surge signal S s_b included in the signal flowing through the second point 12 in the transmission line 2a, and converts the signal flowing through the second point 12 into the transmission signal Sp_b. And outputs the transmission signal Sp_b to the second synchronization signal generation unit 113.
  • the second synchronization signal generation unit 113 is realized by, for example, a PLL circuit, a multiplier, or a DDS.
  • the second synchronization signal generator 113 has an input terminal 113 a connected to an output terminal 112 b of the third filter 112, and an output terminal 113 b connected to a clock terminal 33 b of the second converter 33.
  • Second synchronizing signal generating unit 113 in synchronization with the transmission signal S p_b extracted by the third filter 112 second to generate a clock signal C b is, the second clock signal C b second Output to the converter 33.
  • Second synchronizing signal generating unit 113 transmission signal S p_b by the third filter 112 is no longer extracted, the output of the transmission signal S p_b from the third filter 112 is interrupted, interrupted the output of the transmission signal S p_b is outputting a second clock signal C b generated prior to the second converter 33.
  • the frequency of the transmission signal S p_b extracted by the third filter 112, and the frequency of the second clock signal C b generated by the second synchronizing signal generator 113 may be the same, different May be.
  • the second synchronizing signal generator 113 as implemented by the PLL circuit or DDS, the frequency of the second clock signal C b is determined according to an externally applied control signal .
  • the fourth filter 114 is a filter in which the frequency of the surge signal S s_b is within the pass band and the frequency of the transmission signal Sp_b is outside the pass band, and is realized by, for example, an HPF.
  • the fourth filter 114 has an input terminal 114 a connected to the output terminal 111 d of the second signal synthesis unit 111, and an output terminal 114 b connected to the input terminal 33 a of the second conversion unit 33.
  • the fourth filter 114 suppresses the transmission signal Sp_b included in the second combined signal generated by the second signal combining unit 111, and extracts the surge signal S s_b from the second combined signal. , And outputs the surge signal Ss_b to the second converter 33.
  • FIG. 11 is a configuration diagram illustrating the first synchronization signal generation unit 103 of the accident point locating device according to the third embodiment.
  • the phase comparator 121 is realized by, for example, a PFD (Phase Frequency Detector).
  • the phase comparator 121 compares the phase of the transmission signal Sp_a extracted by the first filter 102 with the phase of the frequency- divided signal output from the frequency divider 127, and compares the phase of the transmission signal Sp_a with the frequency- divided signal. Is output to the loop filter 122.
  • the loop filter 122 smoothes the phase difference signal output from the phase comparator 121 and outputs the smoothed phase difference signal to each of the voltage detector 124 and the switch 125.
  • the signal detector 123 performs a detection process of the transmission signal Sp_a extracted by the first filter 102, and when the transmission signal Sp_a cannot be detected, non-detection indicating that the transmission signal Sp_a is interrupted.
  • the signal is output to each of the voltage detector 124 and the switch 125.
  • the voltage detector 124 detects the voltage value of the smoothed phase difference signal output from the loop filter 122, and stores the detected voltage value.
  • the voltage detector 124 When receiving the non-detection signal from the signal detector 123, the voltage detector 124 outputs the last stored voltage value to the switch 125 among the voltage values stored before receiving the non-detection signal.
  • the switch 125 When the non-detection signal is not output from the signal detector 123, the switch 125 outputs the smoothed phase difference signal output from the loop filter 122 to the voltage controlled oscillator 126 as a control voltage signal. When receiving the non-detection signal from the signal detector 123, the switch 125 outputs the voltage value output from the voltage detector 124 to the voltage-controlled oscillator 126 as a control voltage signal.
  • the voltage controlled oscillator 126 generates a first clock signal Ca based on the control voltage signal output from the switch 125, and divides the first clock signal Ca into the frequency divider 127 and the first converter 23, respectively.
  • Output to Divider 127 divides the first clock signal C a, which is generated by the voltage controlled oscillator 126, and outputs a divided signal of the first clock signal C a to the phase comparator 121.
  • the phase comparator 121, the loop filter 122, the switch 125, the voltage controlled oscillator 126, and the frequency divider 127 operate as a PLL circuit.
  • FIG. 12 is a configuration diagram illustrating the second synchronization signal generation unit 113 of the accident point locating device according to the third embodiment.
  • the phase comparator 131 is realized by, for example, a PFD.
  • the phase comparator 131 compares the phase of the transmission signal Sp_b extracted by the third filter 112 with the phase of the frequency- divided signal output from the frequency divider 137, and compares the phase of the transmission signal Sp_b with the frequency- divided signal. Is output to the loop filter 132.
  • the loop filter 132 smoothes the phase difference signal output from the phase comparator 131 and outputs the smoothed phase difference signal to each of the voltage detector 134 and the switch 135.
  • the signal detector 133 performs detection processing of the transmission signal Sp_b extracted by the third filter 112, and when the transmission signal Sp_b cannot be detected, non-detection indicating that the transmission signal Sp_b is interrupted.
  • the signal is output to each of the voltage detector 134 and the switch 135.
  • the voltage detector 134 detects the voltage value of the smoothed phase difference signal output from the loop filter 132, and stores the detected voltage value.
  • the voltage detector 134 When receiving the non-detection signal from the signal detector 133, the voltage detector 134 outputs to the switch 135 the last stored voltage value among the voltage values stored before receiving the non-detection signal.
  • the switch 135 When the non-detection signal is not output from the signal detector 133, the switch 135 outputs the smoothed phase difference signal output from the loop filter 132 to the voltage controlled oscillator 136 as a control voltage signal. When the switch 135 receives the non-detection signal from the signal detector 133, the switch 135 outputs the voltage value output from the voltage detector 134 to the voltage control oscillator 136 as a control voltage signal.
  • Voltage controlled oscillator 136 generates a second clock signal C b on the basis of a control voltage signal output from the switch 135, each of the second clock signal C b a divider 137 and the second conversion unit 33 Output to Divider 137 divides the second clock signal C b generated by the voltage controlled oscillator 136, and outputs a frequency dividing signal of the second clock signal C b to the phase comparator 131.
  • the phase comparator 131, the loop filter 132, the switch 135, the voltage controlled oscillator 136, and the frequency divider 137 operate as a PLL circuit.
  • the first surge detection unit 100 detects the surge signal S s_a in synchronization with the transmission signal Sp_a flowing through the first point 11. To detect.
  • the first surge detector 100 converts the surge signal Ss_a from an analog signal to a digital signal, and outputs the digital signal to the fault point calculator 40 as a first digital signal Da.
  • the processing procedure of the first surge detection unit 100 will be specifically described.
  • the first signal combining unit 101 adds the voltages or currents of the three-phase AC signals flowing through the first point 11 in the three transmission lines 2a, 2b, and 2c in the same phase, thereby performing the first combining. Generate a signal.
  • First signal combining section 101 outputs the first combined signal to second filter 104.
  • second filter 104 Upon receiving the first combined signal from first signal combining section 101, second filter 104 suppresses transmission signal Sp_a included in the first combined signal, and suppresses a surge from the first combined signal.
  • the signal S s_a is extracted and the surge signal S s_a is output to the first converter 23.
  • the first filter 102 suppresses the surge signal S s_a included in the signal flowing through the first point 11 in the transmission line 2a, and reduces the transmission signal Sp_a from the signal flowing through the first point 11. And outputs the transmission signal Sp_a to the first synchronization signal generation unit 103.
  • the first synchronization signal generation unit 103 synchronizes with the transmission signal Sp_a similarly to the first synchronization signal generation unit 22 illustrated in FIG. It generates a first clock signal C a, and outputs the first clock signal C a in the first conversion section 23.
  • the first synchronization signal generation unit 103 outputs the transmission signal Sp_a . outputting a first clock signal C a generated before the interrupted in the first converter 23.
  • the processing procedure of the first synchronization signal generation unit 103 will be specifically described.
  • the phase comparator 121 compares the phase of the transmission signal Sp_a with the phase of the frequency- divided signal output from the frequency divider 127.
  • the phase comparator 121 outputs a phase difference signal indicating a phase difference between the transmission signal Sp_a and the frequency- divided signal to the loop filter 122.
  • the loop filter 122 smoothes the phase difference signal and outputs the smoothed phase difference signal to each of the voltage detector 124 and the switch 125.
  • the signal detector 123 performs a process of detecting the transmission signal Sp_a extracted by the first filter 102.
  • the signal detector 123 outputs a non-detection signal indicating that the transmission signal Sp_a is interrupted to a voltage detector. 124 and the switch 125.
  • the voltage detector 124 detects the voltage value of the smoothed phase difference signal output from the loop filter 122, and stores the detected voltage value. When receiving the non-detection signal from the signal detector 123, the voltage detector 124 outputs the last stored voltage value to the switch 125 among the voltage values stored before receiving the non-detection signal.
  • the switch 125 When the non-detection signal is not output from the signal detector 123, the switch 125 outputs the smoothed phase difference signal output from the loop filter 122 to the voltage controlled oscillator 126 as a control voltage signal. When receiving the non-detection signal from the signal detector 123, the switch 125 outputs the voltage value output from the voltage detector 124 to the voltage-controlled oscillator 126 as a control voltage signal.
  • Voltage controlled oscillator 126 receives a control voltage signal from the switch 125, the control based on the voltage signal to generate a first clock signal C a, the first clock signal C a divider 127 and the first conversion Output to each of the units 23.
  • Divider 127 receives the first clock signal C a voltage controlled oscillator 126, a first clock signal C a divides the phase comparator divided signal of the first clock signal C a 121 Output to
  • the phase comparator 121, the loop filter 122, the switch 125, the voltage controlled oscillator 126, and the frequency divider 127 operate as a PLL circuit.
  • the signal detector 123 detects the transmission signal Sp_a , the signal detector 123 does not output a non-detection signal to each of the voltage detector 124 and the switch 125. Therefore, the voltage controlled oscillator 126, a first clock signal C a corresponding to the phase difference between the transmission signal S p_a and the division signal is generated.
  • the signal detector 123 does not detect the transmission signal Sp_a and the non-detection signal from the signal detector 123 is detected by voltage detection. Output to each of the switch 124 and the switch 125. Therefore, in the voltage controlled oscillator 126, the first clock signal Ca is generated by the voltage detector 124 based on the last stored voltage value among the voltage values stored before receiving the non-detection signal. Generated. Therefore, the transmission line 2a is cut, even if the transmission signal S p_a is no longer flows through the transmission line 2a, it is possible to continue the generation of the first clock signal C a.
  • First converting section 23 receives the surge signal S s_a from the second filter 104, the the first synchronizing signal generator 103 receives the first clock signal C a, similarly to the first embodiment, the in synchronization with the first clock signal C a, it converts the analog signal which is a surge signal S s_a into a digital signal.
  • the first converter 23 outputs the digital signal to the accident point calculator 40 as a first digital signal Da.
  • Second surge detecting unit 110 when a surge signal S s by damage to the transmission line 2 has occurred, in synchronization with the transmission signal S p_b flowing through the second point 12, a surge signal S S_B To detect. Second surge detecting unit 110, a surge signal S S_B converted from an analog signal to a digital signal, and outputs the digital signal to the fault point calculating section 40 as the second digital signal D b.
  • the processing procedure of the second surge detection unit 110 will be specifically described.
  • the second signal synthesizing unit 111 adds the voltages or currents of the three-phase alternating current signals flowing at the second point 12 in the three transmission lines 2a, 2b, and 2c in the same phase, thereby performing the second synthesis. Generate a signal.
  • the second signal synthesizing section 111 outputs the second synthesized signal to the fourth filter 114.
  • fourth filter 114 suppresses transmission signal Sp_b included in the second combined signal, and suppresses surge from the second combined signal.
  • the signal S s_b is extracted, and the surge signal S s_b is output to the second converter 33.
  • the third filter 112 suppresses the surge signal S s_b included in the signal flowing through the second point 12 in the transmission line 2a, and converts the signal flowing through the second point 12 into the transmission signal Sp_b. And outputs the transmission signal Sp_b to the second synchronization signal generation unit 113.
  • Second synchronizing signal generating unit 113 receives the transmission signal S p_b from the third filter 112, as with the second synchronizing signal generating unit 32 shown in FIG. 1, the synchronized with the transmission signal S p_b It generates a second clock signal C b, and outputs the second clock signal C b to the second converter 33.
  • the second synchronization signal generation unit 113 outputs the transmission signal Sp_b . outputting a second clock signal C b generated before the interrupted in the second converter 33.
  • the processing procedure of the second synchronization signal generation unit 113 will be specifically described.
  • the phase comparator 131 Upon receiving the transmission signal Sp_b from the third filter 112, the phase comparator 131 compares the phase of the transmission signal Sp_b with the phase of the frequency- divided signal output from the frequency divider 137. The phase comparator 131 outputs a phase difference signal indicating a phase difference between the transmission signal Sp_b and the frequency- divided signal to the loop filter 132. Upon receiving the phase difference signal from the phase comparator 131, the loop filter 132 smoothes the phase difference signal and outputs the smoothed phase difference signal to each of the voltage detector 134 and the switch 135.
  • the signal detector 133 performs a process of detecting the transmission signal Sp_b extracted by the third filter 112. When the transmission signal Sp_b is not extracted by the third filter 112 and the transmission signal Sp_b cannot be detected by the third filter 112, the signal detector 133 outputs a non-detection signal indicating that the transmission signal Sp_b is interrupted to a voltage detector. 134 and the switch 135.
  • the voltage detector 134 detects the voltage value of the smoothed phase difference signal output from the loop filter 132, and stores the detected voltage value. When receiving the non-detection signal from the signal detector 133, the voltage detector 134 outputs to the switch 135 the last stored voltage value among the voltage values stored before receiving the non-detection signal.
  • the switch 135 When the non-detection signal is not output from the signal detector 133, the switch 135 outputs the smoothed phase difference signal output from the loop filter 132 to the voltage controlled oscillator 136 as a control voltage signal. When the switch 135 receives the non-detection signal from the signal detector 133, the switch 135 outputs the voltage value output from the voltage detector 134 to the voltage control oscillator 136 as a control voltage signal.
  • Voltage controlled oscillator 136 receives a control voltage signal from the switch 135, the control second to generate a clock signal C b based on the voltage signal, the second clock signal C b divider 137 and the second conversion Output to each of the units 33.
  • Divider 137 receives the second clock signal C b from the voltage controlled oscillator 136, the second clock signal C b divides the second clock signal C b of the divided signal to the phase comparator 131 Output to
  • the phase comparator 131, the loop filter 132, the switch 135, the voltage controlled oscillator 136, and the frequency divider 137 operate as a PLL circuit.
  • the signal detector 133 detects the transmission signal Sp_b , the signal detector 133 does not output a non-detection signal to each of the voltage detector 134 and the switch 135. Therefore, the voltage controlled oscillator 136, the second clock signal C b corresponding to the phase difference between the transmission signal S p_b and the division signal is generated.
  • the signal detector 133 does not detect the transmission signal Sp_b , and a non-detection signal is detected from the signal detector 133. Output to each of the switch 134 and the switch 135. Accordingly, the voltage controlled oscillator 136, the voltage detector 134, among the voltage values stored prior to receiving the non-detection signal, the second clock signal C b on the basis of the voltage value last stored is Generated. Therefore, the transmission line 2a is cut, even if the transmission signal S p_b is no longer flows through the transmission line 2a, it is possible to continue the generation of the second clock signal C b.
  • the second converter 33 receives the surge signal S S_B from the fourth filter 114, the second synchronizing signal generator 113 receives the second clock signal C b, as in the first embodiment, the in synchronism with the second clock signal C b, it converts the analog signal which is a surge signal S S_B to a digital signal.
  • the second conversion unit 33 outputs the digital signal to the fault point calculating section 40 as the second digital signal D b.
  • the Fault point calculation unit 40 as in the first embodiment, the second digital signal D b output from the first digital signal D a and the second converter 33 which is outputted from the first converter 23 Then, the fault point 13 of the transmission line 2 is calculated.
  • the transmission line 2 3 transmission lines 2a, 2b has a 2c, transmission signal S p to be transmitted by the transmission line 2, three-phase AC Can be calculated without transmitting or receiving voltage information or the like via the communication line.
  • any combination of the embodiments, a modification of an arbitrary component of each embodiment, or an omission of an arbitrary component in each embodiment is possible within the scope of the invention. .
  • the present invention is suitable for an accident point locating apparatus and an accident point locating method for calculating an accident point which is a damaged position of a transmission line.

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Abstract

This fault point locating device is configured to be provided with: a first surge detection unit (20) that is connected at one end to a first point (11) in a transmission line (1) and that detects a surge signal when the surge signal is generated due to damaging of the transmission line (1), in synchronization with a transmission signal flowing through the first point (11); a second surge detection unit (30) that is connected at one end to a second point (12), different from the first point (11), in the transmission line (1) and that detects a surge signal in synchronization with a transmission signal flowing through the second point (12); and a fault point calculation unit (40) that calculates a fault point (13) indicating a damaged position of the transmission line (1) on the basis of the surge signal detected by the first surge detection unit (20) and the surge signal detected by the second surge detection unit (30).

Description

事故点標定装置及び事故点標定方法Accident point location device and accident point location method
 この発明は、送電線の損傷位置である事故点を算出する事故点標定装置及び事故点標定方法に関するものである。 The present invention relates to an accident point locating device and an accident point locating method for calculating an accident point which is a damaged position of a transmission line.
 事故点標定装置は、送電線に損傷が生じたときに、送電線の損傷位置である事故点を算出する装置である。
 以下の特許文献1には、親局と子局が送電線に接続されており、子局が、送電線のB端側の電圧情報を親局に送信し、親局が、子局から送信された電圧情報とA端側の電圧情報とに基づいて事故点の標定を行う送電線故障点標定方法が開示されている。
 親局と子局は、送電線とは別の通信線を介して接続されており、子局が、通信線を介して、送電線のB端側の電圧情報を親局に送信している。
The accident point locating device is a device that calculates an accident point, which is a damaged position of a transmission line, when the transmission line is damaged.
In Patent Literature 1 below, a master station and a slave station are connected to a transmission line. A transmission line fault point locating method for locating an accident point based on the obtained voltage information and the voltage information on the A-end side is disclosed.
The master station and the slave station are connected via a communication line different from the transmission line, and the slave station transmits voltage information on the B-end side of the transmission line to the master station via the communication line. .
特開平9-166640号公報JP-A-9-166640
 特許文献1に開示されている送電線故障点標定方法では、子局が、通信線を介して、B端側の電圧情報を親局に送信している。
 B端側の電圧情報は、子局から親局に伝送されるまでの間に、通信線において伝送遅延を受けるほか、電圧情報を送信する子局のモデムおいて送信処理遅延を受け、また、電圧情報を受信する親局のモデムにおいて受信処理遅延を受ける。
 したがって、親局が、子局から送信された電圧情報とA端側の電圧情報とに基づいて、事故点の標定を行っても、B端側の電圧情報が受けている遅延の影響で、事故点を正確に標定することができないという課題があった。
In the transmission line fault point locating method disclosed in Patent Literature 1, a slave station transmits voltage information on the B end side to a master station via a communication line.
The voltage information at the B end receives a transmission delay in a communication line before being transmitted from the slave station to the master station, and also receives a transmission processing delay in a modem of the slave station that transmits the voltage information, The modem of the master station receiving the voltage information receives a reception processing delay.
Therefore, even if the master station locates the fault point based on the voltage information transmitted from the slave station and the voltage information on the A-end side, the influence of the delay received on the voltage information on the B-end side, There was a problem that it was not possible to accurately locate the accident point.
 この発明は上記のような課題を解決するためになされたもので、通信線を介して、電圧情報等を送受信することなく、送電線の事故点を算出することができる事故点標定装置及び事故点標定方法を得ることを目的とする。 The present invention has been made to solve the above-described problems, and an accident point locating device and an accident point locating apparatus capable of calculating an accident point of a transmission line without transmitting and receiving voltage information and the like via a communication line. The aim is to obtain a point location method.
 この発明に係る事故点標定装置は、電力を送信信号として伝送する送電線における第1の地点に一端が接続されており、送電線に損傷が生じることでサージ信号が発生したとき、第1の地点を流れている送信信号に同期して、サージ信号を検出する第1のサージ検出部と、送電線における第1の地点と異なる第2の地点に一端が接続されており、第2の地点を流れている送信信号に同期して、サージ信号を検出する第2のサージ検出部と、第1のサージ検出部により検出されたサージ信号と第2のサージ検出部により検出されたサージ信号とから、送電線の損傷位置である事故点を算出する事故点算出部とを備えるようにしたものである。 An accident point locating device according to the present invention has one end connected to a first point in a transmission line that transmits power as a transmission signal, and generates a first signal when a surge signal is generated due to damage to the transmission line. A first surge detection unit for detecting a surge signal in synchronization with a transmission signal flowing through the point, and one end connected to a second point different from the first point on the transmission line; A second surge detector for detecting a surge signal in synchronization with a transmission signal flowing through the first and second surge detectors; a surge signal detected by the first surge detector; and a surge signal detected by the second surge detector. And an accident point calculation unit for calculating an accident point which is a damaged position of the transmission line.
 この発明によれば、通信線を介して、電圧情報等を送受信することなく、送電線の事故点を算出することができる。 According to the present invention, it is possible to calculate the fault point of the transmission line without transmitting and receiving voltage information and the like via the communication line.
実施の形態1に係る事故点標定装置を示す構成図である。1 is a configuration diagram illustrating an accident point locating device according to Embodiment 1. FIG. 実施の形態1に係る事故点標定装置の第1の信号分離部21を示す構成図である。FIG. 3 is a configuration diagram illustrating a first signal separation unit 21 of the accident point locating device according to Embodiment 1. 実施の形態1に係る事故点標定装置の第2の信号分離部31を示す構成図である。FIG. 3 is a configuration diagram illustrating a second signal separation unit 31 of the accident point locating device according to Embodiment 1. 実施の形態1に係る事故点標定装置の事故点算出部40を示す構成図である。FIG. 2 is a configuration diagram illustrating an accident point calculation unit 40 of the accident point locating device according to Embodiment 1. 図1に示す事故点標定装置の処理手順である事故点標定方法を示すフローチャートである。It is a flowchart which shows the accident point locating method which is a processing procedure of the accident point locating device shown in FIG. 実施の形態2に係る事故点標定装置を示す構成図である。It is a block diagram which shows the accident point locating device which concerns on Embodiment 2. 実施の形態2に係る事故点標定装置の事故点算出部80を示す構成図である。FIG. 9 is a configuration diagram illustrating an accident point calculation unit 80 of the accident point location device according to the second embodiment. 第1のサージ検出部20が取り扱う信号を示す説明図である。FIG. 4 is an explanatory diagram illustrating signals handled by a first surge detection unit 20. 第2のサージ検出部30が取り扱う信号を示す説明図である。FIG. 4 is an explanatory diagram showing signals handled by a second surge detector 30. 実施の形態3に係る事故点標定装置を示す構成図である。It is a block diagram which shows the accident point locating device which concerns on Embodiment 3. 実施の形態3に係る事故点標定装置の第1の同期信号生成部103を示す構成図である。FIG. 10 is a configuration diagram illustrating a first synchronization signal generation unit 103 of the accident point locating device according to Embodiment 3. 実施の形態3に係る事故点標定装置の第2の同期信号生成部113を示す構成図である。FIG. 13 is a configuration diagram illustrating a second synchronization signal generation unit 113 of the accident point locating device according to Embodiment 3.
 以下、この発明をより詳細に説明するために、この発明を実施するための形態について、添付の図面に従って説明する。 Hereafter, in order to explain this invention in greater detail, the preferred embodiments of the present invention will be described with reference to the accompanying drawings.
実施の形態1.
 図1は、実施の形態1に係る事故点標定装置を示す構成図である。
 図1において、送電線1は、1本の線路であり、電力を送信信号Sとして伝送する。
 図1に示す事故点標定装置では、送信信号Sが、第1の地点11から第2の地点12に向かう方向に流れている。
 図1に示す事故点標定装置では、送電線1に生じる損傷は、一部の損傷のみであって、切断されていないものとする。したがって、送電線1に損傷が生じても、送電線1における送信信号Sの伝送は、継続されるものとする。
Embodiment 1 FIG.
FIG. 1 is a configuration diagram showing the accident point locating device according to the first embodiment.
In Figure 1, the transmission line 1 is a one line, transmitting power as the transmission signal S p.
In the fault point locating system shown in FIG. 1, the transmission signal S p is flowing in a direction from the first point 11 to a second point 12.
In the accident point locating device shown in FIG. 1, it is assumed that damage to the transmission line 1 is only a part of damage and is not cut. Thus, even if damage to the transmission line 1, the transmission of the transmission signal S p in transmission lines 1 shall be continued.
 第1の地点11は、第1のサージ検出部20の入力端子20a(一端)が送電線1に接続されている地点である。
 第2の地点12は、第2のサージ検出部30の入力端子30a(一端)が送電線1に接続されている地点であり、第1の地点11と異なる地点である。
 事故点13は、送電線1に損傷が生じている位置であり、第1の地点11と第2の地点12との間の位置である。
 送電線1に損傷が生じることで発生したサージ信号Sは、事故点13から第1の地点11に向かう方向に流れ、また、事故点13から第2の地点12に向かう方向に流れる。
 以下、サージ信号Sのうち、事故点13から第1の地点11に向かう方向に流れるサージ信号をSs_aと称し、事故点13から第2の地点12に向かう方向に流れるサージ信号をSs_bと称する。
 サージ信号Ss_a,Ss_bの周波数は、送信信号Sの周波数よりも大きいものとする。
The first point 11 is a point where the input terminal 20a (one end) of the first surge detection unit 20 is connected to the transmission line 1.
The second point 12 is a point where the input terminal 30a (one end) of the second surge detector 30 is connected to the transmission line 1 and is different from the first point 11.
The accident point 13 is a position where the transmission line 1 is damaged, and is between the first point 11 and the second point 12.
Surge signal S s which is generated by damage to the transmission line 1, flows from the fault point 13 in a direction towards the first point 11, also flows from the fault point 13 in a direction toward the second point 12.
Hereinafter, of the surge signals S s , the surge signal flowing in the direction from the accident point 13 to the first point 11 is referred to as S s_a, and the surge signal flowing in the direction from the accident point 13 to the second point 12 is S s_b. Called.
Surge signal S s_a, the frequency of the S S_B shall be greater than the frequency of the transmission signal S p.
 第1のサージ検出部20は、第1の信号分離部21、第1の同期信号生成部22及び第1の変換部23を備えている。
 第1のサージ検出部20は、入力端子20aが第1の地点11と接続され、出力端子20bが事故点算出部40の第1の入力端子40aと接続されている。
 第1のサージ検出部20は、送電線1に損傷が生じることでサージ信号Sが発生したとき、第1の地点11を流れている送信信号Sに同期して、サージ信号Ss_aを検出する。
 第1のサージ検出部20は、サージ信号Ss_aをアナログ信号からデジタル信号に変換し、当該デジタル信号を第1のデジタル信号Dとして事故点算出部40に出力する。
The first surge detector 20 includes a first signal separator 21, a first synchronization signal generator 22, and a first converter 23.
In the first surge detector 20, the input terminal 20a is connected to the first point 11, and the output terminal 20b is connected to the first input terminal 40a of the fault point calculator 40.
The first surge detector 20, when a surge signal S s by damage to the transmission line 1 is generated occurs in synchronization with the transmission signal S p flowing through the first point 11, the surge signal S s_a To detect.
The first surge detector 20 converts the surge signal Ss_a from an analog signal to a digital signal, and outputs the digital signal to the fault point calculator 40 as a first digital signal Da.
 第1の信号分離部21は、入力端子21aが第1の地点11と接続され、第1の出力端子21bが第1の同期信号生成部22の入力端子22aと接続され、第2の出力端子21cが第1の変換部23の入力端子23aと接続されている。
 第1の信号分離部21は、第1の地点11を流れている信号から、送信信号Sp_a及びサージ信号Ss_aのそれぞれを抽出する。ここでは、第1の信号分離部21により抽出された送信信号と、送電線1を流れている送信信号Sとを区別するため、第1の信号分離部21により抽出された送信信号を「Sp_a」のように表記している。
 第1の信号分離部21は、抽出した送信信号Sp_aを第1の同期信号生成部22に出力し、抽出したサージ信号Ss_aを第1の変換部23に出力する。
The first signal separation unit 21 has an input terminal 21 a connected to the first point 11, a first output terminal 21 b connected to an input terminal 22 a of the first synchronization signal generation unit 22, and a second output terminal. 21 c is connected to the input terminal 23 a of the first converter 23.
The first signal separating unit 21, the signal flowing through the first point 11, to extract a respective transmit signal S p_a and surge signal S s_a. Here, a transmission signal extracted by the first separator 21, in order to distinguish the transmission signal S p flowing through the transmission line 1, the transmission signals extracted by the first separator 21 ' Sp_a ".
The first signal separation unit 21 outputs the extracted transmission signal Sp_a to the first synchronization signal generation unit 22 and outputs the extracted surge signal Ss_a to the first conversion unit 23.
 第1の同期信号生成部22は、例えば、PLL(Phase Locked Loop)回路、逓倍器又はDDS(Direct Digital Synthesizer)によって実現される。
 第1の同期信号生成部22は、入力端子22aが第1の信号分離部21の第1の出力端子21bと接続され、出力端子22bが第1の変換部23のクロック端子23bと接続されている。
 第1の同期信号生成部22は、第1の信号分離部21により抽出された送信信号Sp_aに同期している第1のクロック信号Cを生成し、第1のクロック信号Cを第1の変換部23に出力する。
 第1の信号分離部21により抽出された送信信号Sp_aの周波数と、第1の同期信号生成部22により生成された第1のクロック信号Cの周波数とは、同じであってもよいし、異なっていてもよい。
 図1には記載していないが、第1の同期信号生成部22が、PLL回路又はDDSによって実現される場合、外部から与えられる制御信号に従って第1のクロック信号Cの周波数が決定される。
The first synchronization signal generation unit 22 is realized by, for example, a PLL (Phase Locked Loop) circuit, a multiplier, or a DDS (Direct Digital Synthesizer).
The first synchronization signal generation unit 22 has an input terminal 22 a connected to a first output terminal 21 b of the first signal separation unit 21, and an output terminal 22 b connected to a clock terminal 23 b of the first conversion unit 23. I have.
First synchronizing signal generating unit 22, in synchronization with the transmission signal S p_a extracted by the first signal separator 21 first generates a clock signal C a and the first clock signal C a first 1 to the conversion unit 23.
The frequency of the transmission signal S p_a extracted by the first separator 21, and the frequency of the first clock signal C a, which is generated by the first synchronizing signal generator 22 may be the same , May be different.
Although not shown in FIG. 1, the first synchronization signal generating unit 22, when it is implemented by a PLL circuit or DDS, the frequency of the first clock signal C a is determined according to an externally applied control signal .
 第1の変換部23は、例えば、ΔΣ型又はフラッシュ型のADC(Analog to Digital Converter)によって実現される。
 第1の変換部23は、入力端子23aが第1の信号分離部21の第2の出力端子21cと接続され、クロック端子23bが第1の同期信号生成部22の出力端子22bと接続され、出力端子23cが事故点算出部40の第1の入力端子40aと接続されている。
 第1の変換部23は、第1の同期信号生成部22により生成された第1のクロック信号Cに同期して、第1の信号分離部21により抽出されたサージ信号Ss_aであるアナログ信号を標本化することで、アナログ信号をデジタル信号に変換する。
 第1の変換部23は、当該デジタル信号を第1のデジタル信号Dとして事故点算出部40に出力する。
The first conversion unit 23 is realized by, for example, a ΔΣ-type or flash-type ADC (Analog to Digital Converter).
The first conversion unit 23 has an input terminal 23a connected to a second output terminal 21c of the first signal separation unit 21, a clock terminal 23b connected to an output terminal 22b of the first synchronization signal generation unit 22, The output terminal 23c is connected to the first input terminal 40a of the accident point calculator 40.
First converting section 23 in synchronization with the first clock signal C a, which is generated by the first synchronizing signal generating unit 22, a surge signal S s_a extracted by the first separator 21 analog The analog signal is converted into a digital signal by sampling the signal.
The first converter 23 outputs the digital signal to the accident point calculator 40 as a first digital signal Da.
 第2のサージ検出部30は、第2の信号分離部31、第2の同期信号生成部32及び第2の変換部33を備えている。
 第2のサージ検出部30は、入力端子30aが第2の地点12と接続され、出力端子30bが事故点算出部40の第2の入力端子40bと接続されている。
 第2のサージ検出部30は、送電線1に損傷が生じることでサージ信号Sが発生したとき、第2の地点12を流れている送信信号Sに同期して、サージ信号Ss_bを検出する。
 第2のサージ検出部30は、サージ信号Ss_bをアナログ信号からデジタル信号に変換し、当該デジタル信号を第2のデジタル信号Dとして事故点算出部40に出力する。
The second surge detector 30 includes a second signal separator 31, a second synchronization signal generator 32, and a second converter 33.
In the second surge detector 30, the input terminal 30a is connected to the second point 12, and the output terminal 30b is connected to the second input terminal 40b of the fault point calculator 40.
The second surge detector 30, when a surge signal S s by damage to the transmission line 1 is generated, in synchronization with the transmission signal S p flowing through the second point 12, a surge signal S S_B To detect.
The second surge detector 30, a surge signal S S_B converted from an analog signal to a digital signal, and outputs the accident point calculation unit 40 the digital signal as a second digital signal D b.
 第2の信号分離部31は、入力端子31aが第2の地点12と接続され、第1の出力端子31bが第2の同期信号生成部32の入力端子32aと接続され、第2の出力端子31cが第2の変換部33の入力端子33aと接続されている。
 第2の信号分離部31は、第2の地点12を流れている信号から、送信信号Sp_b及びサージ信号Ss_bのそれぞれを抽出する。ここでは、第2の信号分離部31により抽出された送信信号と、送電線1を流れている送信信号Sとを区別するために、第2の信号分離部31により抽出された送信信号を「Sp_b」のように表記している。
 第2の信号分離部31は、抽出した送信信号Sp_bを第2の同期信号生成部32に出力し、抽出したサージ信号Ss_bを第2の変換部33に出力する。
The second signal separation unit 31 has an input terminal 31a connected to the second point 12, a first output terminal 31b connected to an input terminal 32a of the second synchronization signal generation unit 32, and a second output terminal. 31c is connected to the input terminal 33a of the second converter 33.
Second signal separating unit 31, the signal flowing through the second point 12, extracts the respective transmission signal S p_b and surge signal S S_B. Here, a transmission signal extracted by the second signal separating unit 31, in order to distinguish the transmission signal S p flowing through the transmission line 1, the transmission signals extracted by the second signal separating unit 31 It is described as " Sp_b ".
The second signal separation unit 31 outputs the extracted transmission signal Sp_b to the second synchronization signal generation unit 32, and outputs the extracted surge signal Ss_b to the second conversion unit 33.
 第2の同期信号生成部32は、例えば、PLL回路、逓倍器又はDDSによって実現される。
 第2の同期信号生成部32は、入力端子32aが第2の信号分離部31の第1の出力端子31bと接続され、出力端子32bが第2の変換部33のクロック端子33bと接続されている。
 第2の同期信号生成部32は、第2の信号分離部31により抽出された送信信号Sp_bに同期している第2のクロック信号Cを生成し、第2のクロック信号Cを第2の変換部33に出力する。
 第2の信号分離部31により抽出された送信信号Sp_bの周波数と、第2の同期信号生成部32により生成された第2のクロック信号Cの周波数とは、同じであってもよいし、異なっていてもよい。
 図1には記載していないが、第2の同期信号生成部32が、PLL回路又はDDSによって実現される場合、外部から与えられる制御信号に従って第2のクロック信号Cの周波数が決定される。
 なお、第2の同期信号生成部32により生成された第2のクロック信号Cの周波数は、第1の同期信号生成部22により生成された第1のクロック信号Cの周波数と同じである。しかし、第2の同期信号生成部32により生成された第2のクロック信号Cの位相は、第1の同期信号生成部22により生成された第1のクロック信号Cの位相と同期していない。
The second synchronization signal generator 32 is realized by, for example, a PLL circuit, a multiplier, or a DDS.
The second synchronization signal generator 32 has an input terminal 32 a connected to the first output terminal 31 b of the second signal separator 31, and an output terminal 32 b connected to the clock terminal 33 b of the second converter 33. I have.
Second synchronizing signal generating unit 32 generates a second clock signal C b are synchronized with the transmission signal S p_b extracted by the second signal separating unit 31, the second clock signal C b the 2 to the conversion unit 33.
The frequency of the transmission signal S p_b extracted by the second signal separating unit 31, and the frequency of the second clock signal C b generated by the second synchronizing signal generating unit 32 may be the same , May be different.
Although not shown in FIG. 1, a second synchronizing signal generation unit 32, when it is implemented by a PLL circuit or DDS, the frequency of the second clock signal C b is determined according to an externally applied control signal .
The frequency of the second clock signal C b generated by the second synchronizing signal generating unit 32 is the same as the frequency of the first clock signal C a, which is generated by the first synchronizing signal generator 22 . However, the second clock signal C b of the phase generated by the second synchronizing signal generator 32, synchronized with the first clock signal C a phase generated by the first synchronizing signal generator 22 Absent.
 第2の変換部33は、例えば、ΔΣ型又はフラッシュ型のADCによって実現される。
 第2の変換部33は、入力端子33aが第2の信号分離部31の第2の出力端子31cと接続され、クロック端子33bが第2の同期信号生成部32の出力端子32bと接続され、出力端子33cが事故点算出部40の第2の入力端子40bと接続されている。
 第2の変換部33は、第2の同期信号生成部32により生成された第2のクロック信号Cに同期して、第2の信号分離部31により抽出されたサージ信号Ss_bであるアナログ信号を標本化することで、アナログ信号をデジタル信号に変換する。
 第2の変換部33は、当該デジタル信号を第2のデジタル信号Dとして事故点算出部40に出力する。
The second conversion unit 33 is realized by, for example, a ΔΣ-type or flash-type ADC.
The second conversion unit 33 has an input terminal 33a connected to the second output terminal 31c of the second signal separation unit 31, a clock terminal 33b connected to an output terminal 32b of the second synchronization signal generation unit 32, The output terminal 33c is connected to the second input terminal 40b of the fault point calculator 40.
The second converter 33 in synchronization with the second clock signal C b generated by the second synchronizing signal generating unit 32, a surge signal S S_B extracted by the second signal separating unit 31 Analog An analog signal is converted into a digital signal by sampling the signal.
The second conversion unit 33 outputs the digital signal to the fault point calculating section 40 as the second digital signal D b.
 事故点算出部40は、後述する位相差検出部61、角周波数検出部62及び事故点算出処理部63(図4を参照)を備えており、例えば、FPGA(Field Programmable Gate Array)によって実現される。
 事故点算出部40は、第1の入力端子40aが第1のサージ検出部20の出力端子20bと接続され、第2の入力端子40bが第2のサージ検出部30の出力端子30bと接続されている。
 事故点算出部40は、第1の変換部23から出力された第1のデジタル信号Dと第2の変換部33から出力された第2のデジタル信号Dとから、送電線1の事故点13を算出する。
 τは、サージ信号Ss_aが事故点13から第1の地点11に到達するまでに要する時間であり、τは、サージ信号Ss_bが事故点13から第2の地点12に到達するまでに要する時間である。
 送信信号Sの伝送速度と、サージ信号Ss_a,Ss_bの伝送速度とは、同じ伝送速度vである。
The fault point calculation unit 40 includes a phase difference detection unit 61, an angular frequency detection unit 62, and a fault point calculation processing unit 63 (see FIG. 4) described later, and is realized by, for example, an FPGA (Field Programmable Gate Array). You.
In the fault point calculation unit 40, the first input terminal 40a is connected to the output terminal 20b of the first surge detection unit 20, and the second input terminal 40b is connected to the output terminal 30b of the second surge detection unit 30. ing.
Fault point calculation unit 40, and a second digital signal D b output from the first digital signal D a and the second converter 33, which is output from the first conversion unit 23, an accident of the transmission line 1 Point 13 is calculated.
τ a is the time required for the surge signal S s_a to reach the first point 11 from the accident point 13, and τ b is the time required for the surge signal S s_b to reach the second point 12 from the accident point 13 It is the time required.
A transmission rate of the transmission signal S p, the surge signal S s_a, the transmission speed of S S_B, the same transmission rate v.
 図2は、実施の形態1に係る事故点標定装置の第1の信号分離部21を示す構成図である。
 図2において、第1のフィルタ51は、送信信号Sp_aの周波数が通過帯域内にあり、サージ信号Ss_aの周波数が通過帯域外にあるフィルタであり、例えば、LPF(Low Pass Filter)によって実現される。
 第1のフィルタ51は、第1の地点11を流れている信号に含まれているサージ信号Ss_aを抑圧して、第1の地点11を流れている信号から送信信号Sp_aを抽出し、送信信号Sp_aを第1の同期信号生成部22に出力する。
 LPFは、チップインダクタ又はチップキャパシタなどを用いて実現される。LPFの通過帯域及びサージ信号Ss_aの抑圧量に応じて、LPFが、マイクロストリップ線路又は同軸共振器などを実装していてもよい。
 第2のフィルタ52は、サージ信号Ss_aの周波数が通過帯域内にあり、送信信号Sp_aの周波数が通過帯域外にあるフィルタであり、例えば、HPF(High Pass Filter)によって実現される。
 第2のフィルタ52は、第1の地点11を流れている信号に含まれている送信信号Sp_aを抑圧して、第1の地点11を流れている信号からサージ信号Ss_aを抽出し、サージ信号Ss_aを第1の変換部23に出力する。
 HPFは、チップインダクタ又はチップキャパシタなどを用いて実現される。HPFの通過帯域及び送信信号Sp_aの抑圧量に応じて、HPFが、マイクロストリップ線路又は同軸共振器などを実装していてもよい。
FIG. 2 is a configuration diagram illustrating the first signal separation unit 21 of the accident point locating device according to the first embodiment.
In FIG. 2, the first filter 51 is a filter in which the frequency of the transmission signal Sp_a is within the pass band and the frequency of the surge signal S s_a is outside the pass band, and is implemented by, for example, an LPF (Low Pass Filter). Is done.
The first filter 51 suppresses the surge signal S s_a included in the signal flowing through the first point 11 and extracts the transmission signal Sp_a from the signal flowing through the first point 11, The transmission signal Sp_a is output to the first synchronization signal generation unit 22.
The LPF is realized using a chip inductor or a chip capacitor. The LPF may mount a microstrip line or a coaxial resonator according to the pass band of the LPF and the suppression amount of the surge signal Ss_a .
The second filter 52 is a filter in which the frequency of the surge signal S s_a is within the pass band and the frequency of the transmission signal Sp_a is outside the pass band, and is realized by, for example, an HPF (High Pass Filter).
The second filter 52 suppresses the transmission signal Sp_a included in the signal flowing through the first point 11 and extracts the surge signal Ss_a from the signal flowing through the first point 11; It outputs the surge signal Ss_a to the first converter 23.
The HPF is realized using a chip inductor or a chip capacitor. The HPF may include a microstrip line or a coaxial resonator according to the passband of the HPF and the amount of suppression of the transmission signal Sp_a .
 図3は、実施の形態1に係る事故点標定装置の第2の信号分離部31を示す構成図である。
 図3において、第3のフィルタ53は、送信信号Sp_bの周波数が通過帯域内にあり、サージ信号Ss_bの周波数が通過帯域外にあるフィルタであり、例えば、LPFによって実現される。
 第3のフィルタ53は、第2の地点12を流れている信号に含まれているサージ信号Ss_bを抑圧して、第2の地点12を流れている信号から送信信号Sp_bを抽出し、送信信号Sp_bを第2の同期信号生成部32に出力する。
 LPFの通過帯域及びサージ信号Ss_bの抑圧量に応じて、LPFが、マイクロストリップ線路又は同軸共振器などを実装していてもよい。
 第4のフィルタ54は、サージ信号Ss_bの周波数が通過帯域内にあり、送信信号Sp_bの周波数が通過帯域外にあるフィルタであり、例えば、HPFによって実現される。
 第4のフィルタ54は、第2の地点12を流れている信号に含まれている送信信号Sp_bを抑圧して、第2の地点12を流れている信号からサージ信号Ss_bを抽出し、サージ信号Ss_bを第2の変換部33に出力する。
 HPFの通過帯域及び送信信号Sp_bの抑圧量に応じて、HPFが、マイクロストリップ線路又は同軸共振器などを実装していてもよい。
FIG. 3 is a configuration diagram illustrating the second signal separation unit 31 of the accident point locating device according to the first embodiment.
In FIG. 3, the third filter 53 is a filter in which the frequency of the transmission signal Sp_b is within the pass band and the frequency of the surge signal S s_b is outside the pass band, and is realized by, for example, an LPF.
The third filter 53 suppresses the surge signal S s_b included in the signal flowing through the second point 12 and extracts the transmission signal Sp_b from the signal flowing through the second point 12, The transmission signal Sp_b is output to the second synchronization signal generator 32.
The LPF may mount a microstrip line or a coaxial resonator according to the pass band of the LPF and the amount of suppression of the surge signal Ss_b .
The fourth filter 54 is a filter in which the frequency of the surge signal S s_b is within the pass band and the frequency of the transmission signal Sp_b is outside the pass band, and is realized by, for example, an HPF.
The fourth filter 54 suppresses the transmission signal Sp_b included in the signal flowing through the second point 12 and extracts the surge signal Ss_b from the signal flowing through the second point 12; The surge signal S s_b is output to the second converter 33.
The HPF may include a microstrip line or a coaxial resonator according to the passband of the HPF and the amount of suppression of the transmission signal Sp_b .
 図4は、実施の形態1に係る事故点標定装置の事故点算出部40を示す構成図である。
 図4において、位相差検出部61は、第1の変換部23から出力された第1のデジタル信号Dの位相と、第2の変換部33から出力された第2のデジタル信号Dの位相との位相差Dを検出し、位相差Dを事故点算出処理部63に出力する。
 角周波数検出部62は、第2の変換部33から出力された第2のデジタル信号Dを例えば高速フーリエ変換(FFT:Fast Fourier Transform)することで、サージ信号Ss_bの角周波数ωを検出する。
 ここでは、角周波数検出部62が、サージ信号Ss_bの角周波数ωを検出している。しかし、これは一例に過ぎず、角周波数検出部62が、第1の変換部23から出力された第1のデジタル信号DをFFTすることで、サージ信号Ss_aの角周波数ωを検出するようにしてもよい。
FIG. 4 is a configuration diagram illustrating the accident point calculation unit 40 of the accident point locating device according to the first embodiment.
4, the phase difference detection unit 61, the phase of the first digital signal D a which is output from the first conversion unit 23, the second digital signal D b output from the second conversion unit 33 It detects the phase difference D c between the phase, and outputs the phase difference D c accident point calculation unit 63.
The angular frequency detection unit 62 converts the angular frequency ω s of the surge signal S s_b by performing , for example, Fast Fourier Transform (FFT) on the second digital signal D b output from the second conversion unit 33. To detect.
Here, angular frequency detection unit 62, detects the angular frequency omega s of the surge signal S S_B. However, this is only an example, the angular frequency detection unit 62, by FFT the first digital signal D a which is output from the first converter 23, detects the angular frequency omega s of the surge signal S s_a You may make it do.
 事故点算出処理部63は、位相差検出部61により検出された位相差Dと、角周波数検出部62により検出された角周波数ωとから、サージ信号Ss_aが事故点13から第1の地点11に到達するまでに要する時間τを算出する。
 事故点算出処理部63は、サージ信号Ss_aの伝送速度vと時間τとから、事故点13を算出する。
Fault point calculation unit 63, a phase difference D c detected by the phase difference detection unit 61, from the detected angular frequency omega s by the angular frequency detection unit 62, the surges signal S s_a accident point 13 1 Τ a required to reach the point 11 is calculated.
Fault point calculation unit 63, and a transmission speed v and time tau a surge signal S s_a, it calculates the fault point 13.
 次に、図1に示す事故点標定装置の動作について説明する。
 図5は、図1に示す事故点標定装置の処理手順である事故点標定方法を示すフローチャートである。
 ここでは、送電線1以外では、送信信号Sの伝送遅延及びサージ信号Sの伝送遅延が発生しないものとする。
Next, the operation of the accident point locator shown in FIG. 1 will be described.
FIG. 5 is a flowchart showing an accident point locating method which is a processing procedure of the accident point locator shown in FIG.
Here, other than the transmission line 1, it is assumed that the transmission delay of the transmission delay and the surge signal S s of the transmission signal S p is not generated.
 まず、送電線1を伝送される送信信号Sは、以下の式(1)のように表される。
Figure JPOXMLDOC01-appb-I000001
 式(1)において、ωは、送信信号Sの角周波数、θは、送信信号Sの初期位相である。また、tは、時刻であり、以下の式でも同様である。
 説明の便宜上、第1の地点11が、送信信号Sの出発点であるとすると、第1の地点11での送信信号Sp_aは、以下の式(2)のように表される。
Figure JPOXMLDOC01-appb-I000002
First, the transmission signal S p to be transmitted to the transmission line 1 is represented by the following equation (1).
Figure JPOXMLDOC01-appb-I000001
In the formula (1), is omega p, the angular frequency of the transmission signal S p, theta p is the initial phase of the transmission signal S p. Also, t is a time, and the same applies to the following equation.
For convenience of explanation, the first point 11, when the starting point of the transmission signal S p, the transmission signal S p_a at the first point 11 is expressed by the following equation (2).
Figure JPOXMLDOC01-appb-I000002
 次に、送電線1に損傷が生じることで、損傷位置である事故点13で発生するサージ信号Sは、以下の式(3)のように表される。
Figure JPOXMLDOC01-appb-I000003
 式(3)において、ωは、サージ信号Sの角周波数、θは、サージ信号Sの初期位相である。
Then, by damage to the transmission line 1 occurs, the surge signal S s generated at the fault point 13 is damaged position is expressed by the following equation (3).
Figure JPOXMLDOC01-appb-I000003
In the formula (3), the omega s, the angular frequency of the surge signal S s, theta s is the initial phase of the surge signal S s.
 サージ信号Sのうち、事故点13から第1の地点11に向かう方向に流れるサージ信号Ss_aは、事故点13から第1の地点11に到達するまでに、τの時間を要する。
 したがって、第1の地点11でのサージ信号Ss_aは、以下の式(4)のように表される。
Figure JPOXMLDOC01-appb-I000004
Of surge signal S s, the surge signal S s_a flowing from the fault point 13 in a direction towards the first point 11, to the accident point 13 until it reaches the first point 11, it takes time for tau a.
Therefore, the surge signal Ss_a at the first point 11 is represented by the following equation (4).
Figure JPOXMLDOC01-appb-I000004
 また、サージ信号Sのうち、事故点13から第2の地点12に向かう方向に流れるサージ信号Ss_bは、事故点13から第2の地点12に到達するまでに、τの時間を要する。
 したがって、第2の地点12でのサージ信号Ss_bは、以下の式(5)のように表される。
Figure JPOXMLDOC01-appb-I000005
 第1の地点11を出発点とする送信信号Sは、第2の地点12に到達するまでに、τ+τの時間を要する。
 したがって、第2の地点12での送信信号Sp_bは、以下の式(6)のように表される。
Figure JPOXMLDOC01-appb-I000006
Also, of the surge signals S s , the surge signal S s_b flowing in the direction from the accident point 13 to the second point 12 requires a time τ b from the accident point 13 to the second point 12. .
Therefore, the surge signal S s_b at the second point 12 is represented by the following equation (5).
Figure JPOXMLDOC01-appb-I000005
Transmission signal S p to the starting point of the first point 11, to reach the second point 12, takes time τ a + τ b.
Therefore, the transmission signal Sp_b at the second point 12 is represented by the following equation (6).
Figure JPOXMLDOC01-appb-I000006
 第1のサージ検出部20の第1の信号分離部21は、第1の地点11を流れている信号から、送信信号Sp_a及びサージ信号Ss_aのそれぞれを抽出する(図5のステップST1)。
 以下、第1の信号分離部21の処理手順を具体的に説明する。
 第1のフィルタ51は、第1の地点11を流れている信号を入力すると、第1の地点11を流れている信号に含まれているサージ信号Ss_aを抑圧して、第1の地点11を流れている信号から送信信号Sp_aを抽出する。
 第1のフィルタ51は、送信信号Sp_aを第1の同期信号生成部22に出力する。
 第2のフィルタ52は、第1の地点11を流れている信号を入力すると、第1の地点11を流れている信号に含まれている送信信号Sp_aを抑圧して、第1の地点11を流れている信号からサージ信号Ss_aを抽出する。
 第2のフィルタ52は、サージ信号Ss_aを第1の変換部23に出力する。
The first separator 21 of the first surge detector 20, the signal flowing through the first point 11, to extract a respective transmit signal S p_a and surge signal S s_a (step ST1 in FIG. 5) .
Hereinafter, the processing procedure of the first signal separation unit 21 will be specifically described.
When the signal flowing through the first point 11 is input, the first filter 51 suppresses the surge signal S s_a included in the signal flowing through the first point 11, and The transmission signal Sp_a is extracted from the signal flowing through.
The first filter 51 outputs the transmission signal Sp_a to the first synchronization signal generator 22.
When the signal flowing through the first point 11 is input, the second filter 52 suppresses the transmission signal Sp_a included in the signal flowing through the first point 11, and The surge signal S s_a is extracted from the signal flowing through.
The second filter 52 outputs the surge signal Ss_a to the first converter 23.
 第1の同期信号生成部22は、第1の信号分離部21から送信信号Sp_aを受けると、送信信号Sp_aに同期している第1のクロック信号Cを生成し、第1のクロック信号Cを第1の変換部23に出力する(図5のステップST2)。
 第1のクロック信号Cの角周波数が、送信信号Sp_aの角周波数ωのN倍であるとすると、第1のクロック信号Cは、以下の式(7)のように表される。2Nω>ωであるとする。
Figure JPOXMLDOC01-appb-I000007
Upon receiving the transmission signal Sp_a from the first signal separation unit 21, the first synchronization signal generation unit 22 generates a first clock signal Ca synchronized with the transmission signal Sp_a , and generates a first clock signal. and it outputs the signal C a in the first conversion unit 23 (step ST2 of FIG. 5).
The angular frequency of the first clock signal C a can, when it is N times the angular frequency omega p of the transmit signal S p_a, the first clock signal C a can be expressed by the following equation (7) . And a 2Nω p> ω s.
Figure JPOXMLDOC01-appb-I000007
 第1の変換部23は、第1の同期信号生成部22により生成された第1のクロック信号Cに同期して、第1の信号分離部21から出力されたサージ信号Ss_aであるアナログ信号を標本化することで、アナログ信号をデジタル信号に変換する(図5のステップST3)。
 第1の変換部23は、オーバーサンプリングによってアナログ信号を標本化している。
 第1の変換部23は、例えば、第1のクロック信号Cの立ち上がりのタイミングでアナログ信号をディジタル信号に標本化する。
 第1のクロック信号Cの立ち上がりのタイミングtc_aは、以下の式(8)のように表される。
Figure JPOXMLDOC01-appb-I000008
 第1の変換部23から事故点算出部40に出力される第1のデジタル信号Dは、式(4)及び式(8)より、以下の式(9)のように表される。
Figure JPOXMLDOC01-appb-I000009
First converting section 23 in synchronization with the first clock signal C a, which is generated by the first synchronizing signal generating unit 22, a surge signal S s_a output from the first separator 21 analog The analog signal is converted into a digital signal by sampling the signal (step ST3 in FIG. 5).
The first converter 23 samples an analog signal by oversampling.
The first conversion unit 23, for example, to sample the digital signal to analog signal at the rising edge of the first clock signal C a.
Rise timing t C_A of the first clock signal C a can be expressed by the following equation (8).
Figure JPOXMLDOC01-appb-I000008
First digital signal D a which is output from the first converter 23 to the fault point calculation unit 40, the equation (4) and (8), is expressed by the following equation (9).
Figure JPOXMLDOC01-appb-I000009
 第2のサージ検出部30の第2の信号分離部31は、第2の地点12を流れている信号から、送信信号Sp_b及びサージ信号Ss_bのそれぞれを抽出する(図5のステップST4)。
 以下、第2の信号分離部31の処理手順を具体的に説明する。
 第3のフィルタ53は、第2の地点12を流れている信号を入力すると、第2の地点12を流れている信号に含まれているサージ信号Ss_bを抑圧して、第2の地点12を流れている信号から送信信号Sp_bを抽出する。
 第3のフィルタ53は、送信信号Sp_bを第2の同期信号生成部32に出力する。
 第4のフィルタ54は、第2の地点12を流れている信号を入力すると、第2の地点12を流れている信号に含まれている送信信号Sp_bを抑圧して、第2の地点12を流れている信号からサージ信号Ss_bを抽出する。
 第4のフィルタ54は、サージ信号Ss_bを第2の変換部33に出力する。
The second signal separator 31 of the second surge detector 30, the signal flowing through the second point 12, extracts the respective transmission signal S p_b and surge signal S S_B (step ST4 in FIG. 5) .
Hereinafter, the processing procedure of the second signal separation unit 31 will be specifically described.
When the signal flowing through the second point 12 is input, the third filter 53 suppresses the surge signal S s_b included in the signal flowing through the second point 12, and The transmission signal Sp_b is extracted from the signal flowing through.
The third filter 53 outputs the transmission signal Sp_b to the second synchronization signal generator 32.
When the signal flowing through the second point 12 is input, the fourth filter 54 suppresses the transmission signal Sp_b included in the signal flowing through the second point 12, and The surge signal S s_b is extracted from the signal flowing through.
The fourth filter 54 outputs the surge signal Ss_b to the second converter 33.
 第2の同期信号生成部32は、第2の信号分離部31から送信信号Sp_bを受けると、送信信号Sp_bに同期している第2のクロック信号Cを生成し、第2のクロック信号Cを第2の変換部33に出力する(図5のステップST5)。
 第2のクロック信号Cの角周波数が、送信信号Sp_bの角周波数ωのN倍であるとすると、第2のクロック信号Cは、以下の式(10)のように表される。
Figure JPOXMLDOC01-appb-I000010
Second synchronizing signal generating unit 32 receives the transmission signal S p_b from the second signal separating unit 31, and generates a second clock signal C b are synchronized with the transmission signal S p_b, a second clock and outputs the signal C b in the second conversion unit 33 (step ST5 in FIG. 5).
The angular frequency of the second clock signal C b is, when an N times the angular frequency omega p of the transmit signal S p_b, the second clock signal C b is expressed by the following equation (10) .
Figure JPOXMLDOC01-appb-I000010
 第2の変換部33は、第2の同期信号生成部32により生成された第2のクロック信号Cに同期して、第2の信号分離部31から出力されたサージ信号Ss_bであるアナログ信号を標本化することで、アナログ信号をデジタル信号に変換する(図5のステップST6)。
 第2の変換部33は、オーバーサンプリングによってアナログ信号を標本化している。
 第2の変換部33は、例えば、第2のクロック信号Cの立ち上がりのタイミングでアナログ信号をディジタル信号に標本化する。
 第2のクロック信号Cの立ち上がりのタイミングtc_bは、以下の式(11)のように表される。
Figure JPOXMLDOC01-appb-I000011
 第2の変換部33から事故点算出部40に出力される第2のデジタル信号Dは、式(5)及び式(11)より、以下の式(12)のように表される。
Figure JPOXMLDOC01-appb-I000012
The second converter 33 in synchronization with the second clock signal C b generated by the second synchronizing signal generating unit 32, a surge signal S S_B outputted from the second signal separating unit 31 Analog The analog signal is converted into a digital signal by sampling the signal (step ST6 in FIG. 5).
The second converter 33 samples an analog signal by oversampling.
The second converter 33, for example, to sample the digital signal to analog signal at the rising edge of the second clock signal C b.
Rise timing t C_B of the second clock signal C b is expressed by the following equation (11).
Figure JPOXMLDOC01-appb-I000011
Second digital signal D b output from the second converter 33 to the fault point calculation unit 40, the equation (5) and (11), is expressed by the following equation (12).
Figure JPOXMLDOC01-appb-I000012
 事故点算出部40は、第1の変換部23から出力された第1のデジタル信号Dと第2の変換部33から出力された第2のデジタル信号Dとから、送電線1の事故点13を算出する(図5のステップST7)。
 以下、事故点算出部40の処理手順を具体的に説明する。
Fault point calculation unit 40, and a second digital signal D b output from the first digital signal D a and the second converter 33, which is output from the first conversion unit 23, an accident of the transmission line 1 The point 13 is calculated (step ST7 in FIG. 5).
Hereinafter, the processing procedure of the accident point calculation unit 40 will be specifically described.
 位相差検出部61は、第1の変換部23から出力された第1のデジタル信号Dの位相と、第2の変換部33から出力された第2のデジタル信号Dの位相との位相差Dを検出し、位相差Dを事故点算出処理部63に出力する。
 角周波数検出部62は、第2の変換部33から出力された第2のデジタル信号DをFFTすることで、サージ信号Ss_bの角周波数ωを検出し、角周波数ωを事故点算出処理部63に出力する。
Phase difference detection unit 61 includes a first digital signal D a phase output from the first converting section 23, position of the second digital signal D b of the phase output from the second conversion unit 33 detecting a phase difference D c, and outputs the phase difference D c accident point calculation unit 63.
The angular frequency detection unit 62 detects the angular frequency ω s of the surge signal S s_b by performing an FFT on the second digital signal D b output from the second conversion unit 33, and determines the angular frequency ω s as an accident point. Output to the calculation processing unit 63.
 事故点算出処理部63は、位相差検出部61から位相差Dを受け、角周波数検出部62から角周波数ωを受けると、以下の式(13)に示すように、位相差Dと角周波数ωとから、時間τを算出する。
Figure JPOXMLDOC01-appb-I000013
 次に、事故点算出処理部63は、サージ信号Ss_aの伝送速度vと時間τとから、事故点13を算出する。
 第1の地点11から事故点13までの距離Lは、以下の式(14)のように表され、距離Lを算出することは、事故点13を算出することに相当する。
L=v×τa       (14)
Fault point calculation processing section 63 receives the phase difference D c from the phase difference detecting unit 61 receives the angular frequency omega s from angular frequency detection unit 62, as shown in the following equation (13), the phase difference D c from the angular frequency ω s, to calculate the time τ a.
Figure JPOXMLDOC01-appb-I000013
Then, the fault point calculation unit 63, and a transmission speed v and time tau a surge signal S s_a, calculates the fault point 13.
The distance L from the first point 11 to the accident point 13 is represented by the following equation (14), and calculating the distance L corresponds to calculating the accident point 13.
L = v × τ a (14)
 以上の実施の形態1は、送電線1における第1の地点11に一端が接続されており、送電線1に損傷が生じることでサージ信号が発生したとき、第1の地点11を流れている送信信号に同期して、サージ信号を検出する第1のサージ検出部20と、送電線1における第1の地点11と異なる第2の地点12に一端が接続されており、第2の地点12を流れている送信信号に同期して、サージ信号を検出する第2のサージ検出部30と、第1のサージ検出部20により検出されたサージ信号と第2のサージ検出部30により検出されたサージ信号とから、送電線1の損傷位置である事故点13を算出する事故点算出部40とを備えるように、事故点標定装置を構成した。したがって、事故点標定装置は、通信線を介して、電圧情報等を送受信することなく、送電線1の事故点13を算出することができる。 In the first embodiment described above, one end is connected to the first point 11 on the transmission line 1, and when the surge signal is generated due to damage to the transmission line 1, the signal flows through the first point 11. One end is connected to a first surge detector 20 that detects a surge signal in synchronization with the transmission signal, and a second point 12 different from the first point 11 in the transmission line 1. A second surge detector 30 for detecting a surge signal in synchronization with a transmission signal flowing through the first and second surge detectors, and a surge signal detected by the first surge detector 20 and a second surge detector 30 detecting the surge signal. The fault point locating device was configured to include a fault point calculation unit 40 that calculates a fault point 13 which is a damage position of the transmission line 1 from a surge signal. Therefore, the fault point locating device can calculate the fault point 13 of the transmission line 1 without transmitting and receiving voltage information and the like via the communication line.
 図2に示す第1の信号分離部21では、第1のフィルタ51がLPFによって実現され、図3に示す第2の信号分離部31では、第3のフィルタ53がLPFによって実現されている。しかし、第1のフィルタ51は、第1の地点11を流れている信号に含まれているサージ信号Ss_aを抑圧して、送信信号Sp_aを抽出できればよく、LPFによって実現されるものに限るものではない。また、第3のフィルタ53は、第2の地点12を流れている信号に含まれているサージ信号Ss_bを抑圧して、送信信号Sp_bを抽出できればよく、LPFによって実現されるものに限るものではない。
 したがって、第1のフィルタ51及び第3のフィルタ53のそれぞれは、例えば、BPF(Band Pass Filter)又はBRF(Band Rejection Filter)によって実現されていてもよい。
In the first signal separation unit 21 shown in FIG. 2, the first filter 51 is realized by an LPF, and in the second signal separation unit 31 shown in FIG. 3, the third filter 53 is realized by an LPF. However, the first filter 51 only needs to be able to suppress the surge signal S s_a included in the signal flowing through the first point 11 and extract the transmission signal Sp_a, and is limited to the one realized by the LPF. Not something. The third filter 53 only needs to be able to suppress the surge signal S s_b included in the signal flowing through the second point 12 and extract the transmission signal Sp_b, and is limited to those realized by the LPF. Not something.
Therefore, each of the first filter 51 and the third filter 53 may be realized by, for example, a BPF (Band Pass Filter) or a BRF (Band Rejection Filter).
 図2に示す第1の信号分離部21では、第2のフィルタ52がHPFによって実現され、図3に示す第2の信号分離部31では、第4のフィルタ54がHPFによって実現されている。しかし、第2のフィルタ52は、第1の地点11を流れている信号に含まれている送信信号Sp_aを抑圧して、第1の地点11を流れている信号からサージ信号Ss_aを抽出できればよく、HPFによって実現されるものに限るものではない。また、第4のフィルタ54は、第2の地点12を流れている信号に含まれている送信信号Sp_bを抑圧して、第2の地点12を流れている信号からサージ信号Ss_bを抽出できればよく、HPFによって実現されるものに限るものではない。
 したがって、第2のフィルタ52及び第4のフィルタ54のそれぞれは、例えば、BPF又はBRFによって実現されていてもよい。
In the first signal separation unit 21 shown in FIG. 2, the second filter 52 is realized by an HPF, and in the second signal separation unit 31 shown in FIG. 3, the fourth filter 54 is realized by an HPF. However, the second filter 52 suppresses the transmission signal Sp_a included in the signal flowing through the first point 11 and extracts the surge signal S s_a from the signal flowing through the first point 11. It is sufficient if possible, and the invention is not limited to the one realized by the HPF. Further, the fourth filter 54 suppresses the transmission signal Sp_b included in the signal flowing through the second point 12 and extracts the surge signal S s_b from the signal flowing through the second point 12. It is sufficient if possible, and the invention is not limited to the one realized by the HPF.
Therefore, each of the second filter 52 and the fourth filter 54 may be realized by, for example, a BPF or a BRF.
 図1に示す事故点標定装置では、第1の変換部23及び第2の変換部33のそれぞれが、オーバーサンプリングによってアナログ信号を標本化している。しかし、これは一例に過ぎず、第1の変換部23及び第2の変換部33のそれぞれが、アンダーサンプリング(2Nω≦ω)によってアナログ信号を標本化するようにしてもよい。
 なお、N=1であり、送信信号Sp_aの周波数と第1のクロック信号Cの周波数とが同じである場合、第1の同期信号生成部22を省略するようにしてもよい。また、送信信号Sp_bの周波数と第2のクロック信号Cの周波数とが同じである場合、第2の同期信号生成部32を省略するようにしてもよい。
In the accident point locating device shown in FIG. 1, each of the first converter 23 and the second converter 33 samples an analog signal by oversampling. However, this is only an example, each of the first conversion portion 23 and the second conversion unit 33, may be sampled analog signal by undersampling (2Nω p ≦ ω s).
It is to be N = 1, if the frequency of the transmission signal S p_a the frequency of the first clock signal C a are the same, may be omitted first synchronizing signal generating unit 22. Further, if the frequency of the transmission signal S p_b the frequency of the second clock signal C b are the same may be omitted and the second synchronization signal generating unit 32.
実施の形態2.
 実施の形態2では、第1のサージ検出部20と事故点算出部80とを結ぶ第1及び第2の伝送線路で伝送遅延が発生し、第2のサージ検出部30と事故点算出部80とを結ぶ第3及び第4の伝送線路で伝送遅延が発生する事故点標定装置について説明する。
Embodiment 2 FIG.
In the second embodiment, a transmission delay occurs in the first and second transmission lines connecting the first surge detector 20 and the fault point calculator 80, and the second surge detector 30 and the fault point calculator 80 An accident point locator in which a transmission delay occurs in the third and fourth transmission lines connecting the two will be described.
 図6は、実施の形態2に係る事故点標定装置を示す構成図である。図6において、図1と同一符号は同一又は相当部分を示すので説明を省略する。
 図6に示す事故点標定装置では、第1のサージ検出部20が、第1の信号分離部21、第1の同期信号生成部22及び第1の変換部23の他に、第1のトリガ信号生成部24を備えている。20cは、第1のサージ検出部20の出力端子である。
 また、図6に示す事故点標定装置では、第2のサージ検出部30が、第2の信号分離部31、第2の同期信号生成部32及び第2の変換部33の他に、第2のトリガ信号生成部34を備えている。30cは、第2のサージ検出部30の出力端子である。
FIG. 6 is a configuration diagram illustrating an accident point locating device according to the second embodiment. 6, the same reference numerals as those in FIG. 1 denote the same or corresponding parts, and a description thereof will not be repeated.
In the fault point locating apparatus shown in FIG. The signal generator 24 is provided. 20 c is an output terminal of the first surge detector 20.
Further, in the accident point locating device shown in FIG. Is provided. 30c is an output terminal of the second surge detector 30.
 第1のトリガ信号生成部24は、例えば、PLL回路、DDS又はADCによって実現される。
 第1のトリガ信号生成部24は、入力端子24aが第1の信号分離部21における第1の出力端子21bと接続され、出力端子24bが第2の伝送線路72の入力端と接続されている。
 第1のトリガ信号生成部24は、第1の信号分離部21により抽出された送信信号Sp_aに同期している第1のトリガ信号Eを生成し、第2の伝送線路72を介して、第1のトリガ信号Eを事故点算出部80に出力する。
 第1の信号分離部21により抽出された送信信号Sp_aの周波数と、第1のトリガ信号生成部24により生成された第1のトリガ信号Eの周波数とは、同じであってもよいし、異なっていてもよい。
 図6には記載していないが、第1のトリガ信号生成部24が、PLL回路又はDDSによって実現される場合、外部から与えられる制御信号に従って第1のトリガ信号Eの周波数が決定される。
 また、第1のトリガ信号生成部24が、ADCによって実現される場合、第1のトリガ信号生成部24が、外部から与えられるクロック信号に同期して、送信信号Sp_aをアナログ信号からデジタル信号に変換し、当該デジタル信号を第1のトリガ信号Eとしてもよい。第1のトリガ信号生成部24は、外部から与えられるクロック信号として、第1の同期信号生成部22により生成された第1のクロック信号Cを用いるようにしてもよい。
The first trigger signal generation unit 24 is realized by, for example, a PLL circuit, a DDS, or an ADC.
The first trigger signal generation unit 24 has an input terminal 24 a connected to the first output terminal 21 b of the first signal separation unit 21, and an output terminal 24 b connected to an input terminal of the second transmission line 72. .
First trigger signal generator 24 generates a first trigger signal E a which synchronizes with the transmission signal S p_a extracted by the first separator 21, via the second transmission line 72 , and outputs a first trigger signal E a an accident point calculation unit 80.
The frequency of the transmission signal S p_a extracted by the first separator 21, and the frequency of the first trigger signal E a which is produced by the first trigger signal generator 24 may be the same , May be different.
Although not shown in FIG. 6, the first trigger signal generation unit 24, when it is implemented by a PLL circuit or DDS, the frequency of the first trigger signal E a is determined according to an externally applied control signal .
When the first trigger signal generation unit 24 is realized by an ADC, the first trigger signal generation unit 24 converts the transmission signal Sp_a from an analog signal to a digital signal in synchronization with an externally supplied clock signal. It converted to, or the digital signal as a first trigger signal E a. First trigger signal generator 24 as a clock signal given from the outside, may be used first clock signal C a, which is generated by the first synchronizing signal generator 22.
 第2のトリガ信号生成部34は、例えば、PLL回路、DDS又はADCによって実現される。
 第2のトリガ信号生成部34は、入力端子34aが第2の信号分離部31における第1の出力端子31bと接続され、出力端子34bが第4の伝送線路74の入力端と接続されている。
 第2のトリガ信号生成部34は、第2の信号分離部31により抽出された送信信号Sp_bに同期している第2のトリガ信号Eを生成し、第4の伝送線路74を介して、第2のトリガ信号Eを事故点算出部80に出力する。
 第2の信号分離部31により抽出された送信信号Sp_bの周波数と、第2のトリガ信号生成部34により生成された第2のトリガ信号Eの周波数とは、同じであってもよいし、異なっていてもよい。
 図6には記載していないが、第2のトリガ信号生成部34が、PLL回路又はDDSによって実現される場合、外部から与えられる制御信号に従って第2のトリガ信号Eの周波数が決定される。
 また、第2のトリガ信号生成部34が、ADCによって実現される場合、第2のトリガ信号生成部34が、外部から与えられるクロック信号に同期して、送信信号Sp_bをアナログ信号からデジタル信号に変換し、当該デジタル信号を第2のトリガ信号Eとしてもよい。第2のトリガ信号生成部34は、外部から与えられるクロック信号として、第2の同期信号生成部32により生成された第2のクロック信号Cを用いるようにしてもよい。
The second trigger signal generation unit 34 is realized by, for example, a PLL circuit, a DDS, or an ADC.
In the second trigger signal generator 34, the input terminal 34a is connected to the first output terminal 31b in the second signal separator 31, and the output terminal 34b is connected to the input end of the fourth transmission line 74. .
The second trigger signal generation unit 34 generates a second trigger signal Eb synchronized with the transmission signal Sp_b extracted by the second signal separation unit 31, and outputs the second trigger signal Eb via the fourth transmission line 74. , And outputs the second trigger signal Eb to the accident point calculation unit 80.
The frequency of the transmission signal S p_b extracted by the second signal separating unit 31, and the frequency of the second trigger signal E b generated by the second trigger signal generator 34 may be the same , May be different.
Although not illustrated in FIG. 6, when the second trigger signal generation unit 34 is realized by a PLL circuit or a DDS, the frequency of the second trigger signal Eb is determined according to a control signal provided from the outside. .
When the second trigger signal generator 34 is realized by an ADC, the second trigger signal generator 34 converts the transmission signal Sp_b from an analog signal to a digital signal in synchronization with an externally applied clock signal. And the digital signal may be used as the second trigger signal Eb . Second trigger signal generator 34, a clock signal given from the outside, may be used a second clock signal C b generated by the second synchronizing signal generating unit 32.
 第1の伝送線路71、第2の伝送線路72、第3の伝送線路73及び第4の伝送線路74のそれぞれは、例えば、同軸ケーブル、又は、信号線とグランド線を含むツイストペアの線路によって実現される。
 第1の伝送線路71は、入力端が第1のサージ検出部20の出力端子20bと接続され、出力端が事故点算出部80の第1の入力端子80aと接続されている。
 第1の伝送線路71は、第1の変換部23から出力された第1のデジタル信号Dを第1の遅延時間td1だけ遅延させ、遅延後の第1のデジタル信号Dを第1のデジタル信号Da1として事故点算出部80に出力する。
 第2の伝送線路72は、入力端が第1のサージ検出部20の出力端子20cと接続され、出力端が事故点算出部80の第2の入力端子80bと接続されている。
 第2の伝送線路72は、第1のトリガ信号生成部24により生成された第1のトリガ信号Eを第1の遅延時間td1だけ遅延させ、遅延後の第1のトリガ信号Eを第1のトリガ信号Ea1として事故点算出部80に出力する。
Each of the first transmission line 71, the second transmission line 72, the third transmission line 73, and the fourth transmission line 74 is realized by, for example, a coaxial cable or a twisted pair line including a signal line and a ground line. Is done.
The first transmission line 71 has an input terminal connected to the output terminal 20 b of the first surge detector 20 and an output terminal connected to the first input terminal 80 a of the fault point calculator 80.
The first transmission line 71, the first digital signal D a which is output from the first conversion unit 23 is delayed by a first delay time t d1, the first digital signal D a of the delayed first Is output to the accident point calculation unit 80 as the digital signal D a1 of.
The second transmission line 72 has an input terminal connected to the output terminal 20 c of the first surge detector 20 and an output terminal connected to the second input terminal 80 b of the fault point calculator 80.
Second transmission line 72, the first trigger signal E a which is produced by the first trigger signal generator 24 is delayed by a first delay time t d1, the first trigger signal E a the delayed The signal is output to the accident point calculation unit 80 as the first trigger signal Ea1 .
 第3の伝送線路73は、入力端が第2のサージ検出部30の出力端子30bと接続され、出力端が事故点算出部80の第3の入力端子80cと接続されている。
 第3の伝送線路73は、第2の変換部33から出力された第2のデジタル信号Dを第2の遅延時間td2だけ遅延させ、遅延後の第2のデジタル信号Dを第2のデジタル信号Db1として事故点算出部80に出力する。
 第4の伝送線路74は、入力端が第2のサージ検出部30の出力端子30cと接続され、出力端が事故点算出部80の第4の入力端子80dと接続されている。
 第4の伝送線路74は、第2のトリガ信号生成部34により生成された第2のトリガ信号Eを第2の遅延時間td2だけ遅延させ、遅延後の第2のトリガ信号Eを第2のトリガ信号Eb1として事故点算出部80に出力する。
The third transmission line 73 has an input terminal connected to the output terminal 30 b of the second surge detection unit 30 and an output terminal connected to the third input terminal 80 c of the fault point calculation unit 80.
The third transmission line 73, the second digital signal D b output from the second conversion unit 33 is delayed by a second delay time t d2, the second digital signal D b of the delayed second Is output to the accident point calculation unit 80 as the digital signal D b1 of
The fourth transmission line 74 has an input terminal connected to the output terminal 30 c of the second surge detection unit 30 and an output terminal connected to the fourth input terminal 80 d of the fault point calculation unit 80.
The fourth transmission line 74 delays the second trigger signal Eb generated by the second trigger signal generator 34 by a second delay time td2, and converts the delayed second trigger signal Eb . The signal is output to the accident point calculation unit 80 as the second trigger signal Eb1 .
 事故点算出部80は、後述する第1の時刻差算出部81、第2の時刻差算出部82及び事故点算出処理部83(図7を参照)を備えており、例えば、FPGAによって実現される。
 事故点算出部80は、第1の入力端子80aが第1の伝送線路71の出力端と接続され、第2の入力端子80bが第2の伝送線路72の出力端と接続されている。また、事故点算出部80は、第3の入力端子80cが第3の伝送線路73の出力端と接続され、第4の入力端子80dが第4の伝送線路74の出力端と接続されている。
 事故点算出部80は、第1のデジタル信号Da1と、第1のトリガ信号Ea1と、第2のデジタル信号Db1と、第2のトリガ信号Eb1とから、事故点13を算出する。
The accident point calculation unit 80 includes a first time difference calculation unit 81, a second time difference calculation unit 82, and an accident point calculation processing unit 83 (see FIG. 7), which will be described later. You.
In the fault point calculation unit 80, the first input terminal 80a is connected to the output terminal of the first transmission line 71, and the second input terminal 80b is connected to the output terminal of the second transmission line 72. In the accident point calculation unit 80, the third input terminal 80c is connected to the output terminal of the third transmission line 73, and the fourth input terminal 80d is connected to the output terminal of the fourth transmission line 74. .
The fault point calculation unit 80 calculates the fault point 13 from the first digital signal D a1 , the first trigger signal E a1 , the second digital signal D b1 , and the second trigger signal E b1. .
 図7は、実施の形態2に係る事故点標定装置の事故点算出部80を示す構成図である。
 図7において、第1の時刻差算出部81は、第1の伝送線路71から出力された第1のデジタル信号Da1の立ち上がり時刻と、第2の伝送線路72から出力された第1のトリガ信号Ea1の立ち上がり時刻との時刻差である第1の時刻差を算出する。
 第1の時刻差算出部81は、第1の時刻差を事故点算出処理部83に出力する。
 第2の時刻差算出部82は、第3の伝送線路73から出力された第2のデジタル信号Db1の立ち上がり時刻と、第4の伝送線路74から出力された第2のトリガ信号Eb1の立ち上がり時刻との時刻差である第2の時刻差を算出する。
 第2の時刻差算出部82は、第2の時刻差を事故点算出処理部83に出力する。
 事故点算出処理部83は、第1の時刻差算出部81により算出された第1の時刻差と、第2の時刻差算出部82により算出された第2の時刻差とから、事故点13を算出する。
FIG. 7 is a configuration diagram illustrating an accident point calculation unit 80 of the accident point location device according to the second embodiment.
In FIG. 7, a first time difference calculation unit 81 includes a rising time of the first digital signal D a1 output from the first transmission line 71 and a first trigger output from the second transmission line 72. A first time difference, which is a time difference from the rising time of the signal Ea1 , is calculated.
The first time difference calculation section 81 outputs the first time difference to the accident point calculation processing section 83.
The second time difference calculation unit 82 calculates the rising time of the second digital signal D b1 output from the third transmission line 73 and the second trigger signal E b1 output from the fourth transmission line 74. A second time difference, which is a time difference from the rising time, is calculated.
The second time difference calculation unit 82 outputs the second time difference to the accident point calculation processing unit 83.
The accident point calculation processing unit 83 calculates the accident point 13 based on the first time difference calculated by the first time difference calculation unit 81 and the second time difference calculated by the second time difference calculation unit 82. Is calculated.
 図8は、第1のサージ検出部20が取り扱う信号を示す説明図である。
 図8において、Yは、第1の変換部23から離散的に出力される第1のデジタル信号Dのうち、事故点13からサージ信号Sが発生することで、最初に0以外の値に変化したDであって、立ち上がり時のDである。
 Yは、第1のトリガ信号生成部24から離散的に出力される第1のトリガ信号Eのうち、信号レベルがLレベル(例えば、“0”)からHレベル(例えば、“1”)に遷移する際の最初のEである。
 tは、Yの時刻とYの時刻との時刻差である。td1は、第1のデジタル信号Dに対する第1のデジタル信号Da1の遅延時間及び第1のトリガ信号Eに対する第1のトリガ信号Ea1の遅延時間である。
 時刻差tは、第1のデジタル信号D及び第1のトリガ信号Eが、第1の伝送線路71及び第2の伝送線路72を通過する前後において、変化がない。
FIG. 8 is an explanatory diagram showing signals handled by the first surge detector 20.
In FIG. 8, Y D, of the first digital signal D a to be discretely outputted from the first converter 23, a fault point 13 by the surge signal S s is generated, initially non-zero a D a which is changed to a value, the rise time of the D a.
Y E, of the first trigger signal E a to be discretely outputted from the first trigger signal generator 24, the signal level is L level (for example, "0") from the H level (for example, "1" ) is the first E b at a transition to.
t a is the time difference between the time of the time and Y D of Y E. t d1 is the delay time of the first digital signal D first trigger signal for the first delay time and a first trigger signal E a of the digital signal D a1 for a E a1.
Time difference t a, the first digital signal D a and a first trigger signal E a is, before and after passing through the first transmission line 71 and the second transmission line 72, there is no change.
 図9は、第2のサージ検出部30が取り扱う信号を示す説明図である。
 図9において、Zは、第2の変換部33から離散的に出力される第2のデジタル信号Dのうち、事故点13からサージ信号Sが発生することで、最初に0以外の値に変化したDであって、立ち上がり時のDである。
 Zは、第2のトリガ信号生成部34から離散的に出力される第2のトリガ信号Eのうち、信号レベルがLレベルからHレベルに遷移する際の最初のEである。
 tは、Zの時刻とZの時刻との時刻差である。td2は、第2のデジタル信号Dに対する第2のデジタル信号Db1の遅延時間及び第2のトリガ信号Eに対する第2のトリガ信号Eb1の遅延時間である。
 時刻差tは、第2のデジタル信号D及び第2のトリガ信号Eが、第3の伝送線路73及び第4の伝送線路74を通過する前後において、変化がない。
FIG. 9 is an explanatory diagram showing signals handled by the second surge detector 30.
In Figure 9, Z D, of the second digital signal D b that is discretely output from the second conversion unit 33, the accident point 13 by the surge signal S s is generated, initially non-zero a D b was changed to a value, which is D b at the time of rising.
Z E, among the second trigger signal E b are discretely output from the second trigger signal generator 34, which is the first E b when the signal level is changed from L level to H level.
t b is the time difference between the time of the time and Z D of Z E. t d2 is the delay time of the second digital signal D b second trigger signal to the second delay time and a second trigger signal of the digital signal D b1 for E b E b1.
Time difference t b, the second digital signal D b and the second trigger signal E b is, before and after passing through the third transmission line 73 and the fourth transmission line 74, there is no change.
 次に、図6に示す事故点標定装置の動作について説明する。
 ただし、第1のトリガ信号生成部24、第2のトリガ信号生成部34及び事故点算出部80以外は、図1に示す事故点標定装置と同様であるため、ここでは、第1のトリガ信号生成部24、第2のトリガ信号生成部34及び事故点算出部80の動作を説明する。
 ここでは、送電線1、第1の伝送線路71、第2の伝送線路72、第3の伝送線路73及び第4の伝送線路74以外では、送信信号Sの伝送遅延及びサージ信号Sの伝送遅延が発生しないものとする。
Next, the operation of the accident point locating device shown in FIG. 6 will be described.
However, except for the first trigger signal generation unit 24, the second trigger signal generation unit 34, and the accident point calculation unit 80, they are the same as the accident point locating device shown in FIG. The operation of the generator 24, the second trigger signal generator 34, and the accident point calculator 80 will be described.
Here, transmission line 1, the first transmission line 71, the second transmission line 72, other than the third transmission line 73 and the fourth transmission line 74, the transmission delay and the surge signal S s of the transmission signal S p It is assumed that no transmission delay occurs.
 第1のトリガ信号生成部24は、第1の信号分離部21から送信信号Sp_aを受けると、送信信号Sp_aに同期している第1のトリガ信号Eを生成し、第1のトリガ信号Eを第2の伝送線路72に出力する。
 第1のトリガ信号Eは、例えば、図8に示すように、送信信号Sp_aの振幅が閾値Th以上であるとき、信号レベルがHレベルになり、送信信号Sp_aの振幅が閾値Th未満であるとき、信号レベルがLレベルになる。閾値Thは、例えば、送信信号Sp_aの最大振幅の半分の値である。閾値Thは、例えば、第1のトリガ信号生成部24の内部メモリ及び第2のトリガ信号生成部34の内部メモリに格納されている。閾値Thは、外部から、第1のトリガ信号生成部24及び第2のトリガ信号生成部34のそれぞれに与えられるものであってもよい。
Upon receiving the transmission signal Sp_a from the first signal separation unit 21, the first trigger signal generation unit 24 generates a first trigger signal Ea synchronized with the transmission signal Sp_a , and generates a first trigger signal. and outputs a signal E a to the second transmission line 72.
First trigger signal E a, for example, as shown in FIG. 8, the transmit signal when the amplitude of S p_a is equal to or larger than the threshold Th, the signal level becomes the H level, the transmission signal S p_a amplitude is less than the threshold value Th of , The signal level becomes L level. The threshold value Th is, for example, a value that is half of the maximum amplitude of the transmission signal Sp_a . The threshold value Th is stored in, for example, the internal memory of the first trigger signal generation unit 24 and the internal memory of the second trigger signal generation unit 34. The threshold Th may be externally given to each of the first trigger signal generator 24 and the second trigger signal generator 34.
 第1の変換部23から出力された第1のデジタル信号Dは、第1の伝送線路71によって、事故点算出部80まで伝送される。このとき、第1のデジタル信号Dは、第1の伝送線路71において、第1の遅延時間td1だけ遅延されるため、遅延後の第1のデジタル信号Dが、第1のデジタル信号Da1として事故点算出部80に入力される。
 第1のトリガ信号生成部24により生成された第1のトリガ信号Eは、第2の伝送線路72によって、事故点算出部80まで伝送される。このとき、第1のトリガ信号Eは、第2の伝送線路72において、第1の遅延時間td1だけ遅延されるため、遅延後の第1のトリガ信号Eが、第1のトリガ信号Ea1として事故点算出部80に入力される。
First digital signal D a which is output from the first conversion unit 23, the first transmission line 71 is transmitted to the fault point calculation unit 80. At this time, the first digital signal Da is delayed by the first delay time t d1 in the first transmission line 71, so that the delayed first digital signal Da is converted to the first digital signal Da. It is input to the accident point calculation unit 80 as Da1 .
The first trigger signal E a which is produced by the first trigger signal generator 24, the second transmission line 72 is transmitted to the fault point calculation unit 80. In this case, the first trigger signal E a, in the second transmission line 72, to be delayed by the first delay time t d1, the first trigger signal E a post delay, the first trigger signal E a1 is input to the accident point calculation unit 80.
 第2のトリガ信号生成部34は、第2の信号分離部31から送信信号Sp_bを受けると、送信信号Sp_bに同期している第2のトリガ信号Eを生成し、第2のトリガ信号Eを第4の伝送線路74に出力する。
 第2のトリガ信号Eは、例えば、図9に示すように、送信信号Sp_bの振幅が閾値Th以上であるとき、信号レベルがHレベルになり、送信信号Sp_bの振幅が閾値Th未満であるとき、信号レベルがLレベルになる。
Second trigger signal generator 34 receives the transmission signal S p_b from the second signal separating unit 31, to generate a second trigger signal E b which is synchronized with the transmission signal S p_b, second trigger The signal Eb is output to the fourth transmission line 74.
Second trigger signal E b is, for example, as shown in FIG. 9, the transmission signal when the amplitude of S p_b is equal to or larger than the threshold Th, the signal level becomes the H level, the transmission signal S p_b amplitude is less than the threshold value Th of , The signal level becomes L level.
 第2の変換部33から出力された第2のデジタル信号Dは、第3の伝送線路73によって、事故点算出部80まで伝送される。このとき、第2のデジタル信号Dは、第3の伝送線路73において、第2の遅延時間td2だけ遅延されるため、遅延後の第2のデジタル信号Dが、第2のデジタル信号Db1として事故点算出部80に入力される。
 第2のトリガ信号生成部34により生成された第2のトリガ信号Eは、第4の伝送線路74によって、事故点算出部80まで伝送される。このとき、第2のトリガ信号Eは、第4の伝送線路74において、第2の遅延時間td2だけ遅延されるため、遅延後の第2のトリガ信号Eが、第2のトリガ信号Eb1として事故点算出部80に入力される。
Second digital signal D b output from the second converter 33, the third transmission line 73 is transmitted to the fault point calculation unit 80. At this time, the second digital signal Db is delayed by the second delay time td2 in the third transmission line 73, so that the delayed second digital signal Db is converted to the second digital signal Db. Db1 is input to the accident point calculation unit 80.
The second trigger signal Eb generated by the second trigger signal generator 34 is transmitted to the fault point calculator 80 via the fourth transmission line 74. At this time, the second trigger signal Eb is delayed by the second delay time td2 in the fourth transmission line 74, so that the delayed second trigger signal Eb is changed to the second trigger signal. Eb1 is input to the accident point calculation unit 80.
 事故点算出部80は、第1のデジタル信号Da1と、第1のトリガ信号Ea1と、第2のデジタル信号Db1と、第2のトリガ信号Eb1とから、事故点13を算出する。
 以下、事故点算出部80の処理手順を具体的に説明する。
The fault point calculation unit 80 calculates the fault point 13 from the first digital signal D a1 , the first trigger signal E a1 , the second digital signal D b1 , and the second trigger signal E b1. .
Hereinafter, the processing procedure of the accident point calculation unit 80 will be specifically described.
 第1の時刻差算出部81は、第1の伝送線路71から出力された第1のデジタル信号Da1の立ち上がりを検出するとともに、第2の伝送線路72から出力された第1のトリガ信号Ea1の立ち上がりを検出する。
 第1の時刻差算出部81は、検出した第1のデジタル信号Da1の立ち上がり時刻と、検出した第1のトリガ信号Ea1の立ち上がり時刻との時刻差を第1の時刻差tとして算出する。
 第1の時刻差算出部81は、第1の時刻差tを事故点算出処理部83に出力する。
The first time difference calculating unit 81 detects the rising of the first digital signal Da1 output from the first transmission line 71, and also detects the first trigger signal E output from the second transmission line 72. The rising edge of a1 is detected.
The first time difference calculating unit 81 calculates a time difference between the detected rising time of the first digital signal D a1 and the detected rising time of the first trigger signal E a1 as a first time difference ta. I do.
A first time difference calculation section 81 outputs a first time difference t a the fault point calculation processing unit 83.
 第2の時刻差算出部82は、第3の伝送線路73から出力された第2のデジタル信号Db1の立ち上がりを検出するとともに、第4の伝送線路74から出力された第2のトリガ信号Eb1の立ち上がりを検出する。
 第2の時刻差算出部82は、検出した第2のデジタル信号Db1の立ち上がり時刻と、検出した第2のトリガ信号Eb1の立ち上がり時刻との時刻差を第2の時刻差tとして算出する。
 第2の時刻差算出部82は、第2の時刻差tを事故点算出処理部83に出力する。
The second time difference calculation unit 82 detects the rising of the second digital signal D b1 output from the third transmission line 73, and also detects the second trigger signal E output from the fourth transmission line 74. The rise of b1 is detected.
The second time difference calculator 82 calculates a time difference between the detected rising time of the second digital signal D b1 and the detected rising time of the second trigger signal E b1 as a second time difference t b. I do.
The second time difference calculating unit 82 outputs the second time difference t b the fault point calculation processing unit 83.
 事故点算出処理部83は、第1の地点11での送信信号Sp_aの位相情報及び第2の地点12での送信信号Sp_bの位相情報を保持している。
 これらの位相情報は、外部から事故点算出処理部83に与えられるものであってもよいし、事故点算出処理部83によって測定されるものであってもよい。
 また、送信信号Sの図示せぬ信号源から第1の地点11及び第2の地点12までの距離と、送信信号Sの周波数とから、事故点算出処理部83によって、位相情報が算出されるものであってもよい。
Fault point calculation unit 83 holds the phase information of the transmission signal S p_b in the phase information and the second point 12 of the transmission signal S p_a at the first point 11.
These phase information may be externally provided to the fault point calculation processing unit 83 or may be measured by the fault point calculation processing unit 83.
Further, the distance from the not shown source of the transmission signal S p to the first point 11 and second point 12, and a frequency of the transmission signal S p, the fault point calculation processing unit 83, a phase information calculation May be performed.
 事故点算出処理部83は、第1の地点11での送信信号Sp_aの位相情報から、Yの時刻tYEを算出する。
 また、事故点算出処理部83は、第2の地点12での送信信号Sp_bの位相情報から、Zの時刻tZEを算出する。
 位相情報から時刻tYE,tZEを算出する処理自体は、公知の技術であるため詳細な説明を省略する。
 事故点算出処理部83は、第1の時刻差算出部81から出力された第1の時刻差tと、算出したYの時刻tYEとから、Yの時刻tYDを算出する。
 また、事故点算出処理部83は、第2の時刻差算出部82から出力された第2の時刻差tと、算出したZの時刻tZEとから、Zの時刻tZDを算出する。
Fault point calculation unit 83, the phase information of the transmission signal S p_a at the first point 11, and calculates the time t YE of Y E.
Further, the fault point calculation unit 83, the phase information of the transmission signal S p_b at the second point 12 to calculate the time t ZE of Z E.
The processing itself for calculating the times t YE and t ZE from the phase information is a known technique, and a detailed description thereof will be omitted.
Fault point calculation unit 83, from a first time difference t a which is output from the first time difference calculation unit 81, the time t YE of the calculated Y E, and calculates the time t YD of Y D.
Further, the fault point calculation processing unit 83, calculates a second time difference t b output from the second time difference calculating portion 82, from the time t ZE of the calculated Z E, the time t ZD of Z D I do.
 次に、事故点算出処理部83は、サージ信号Ss_aの伝送速度vと、Yの時刻tYD及びZの時刻tZDとから、事故点13を算出する。
 第2の地点12から事故点13までの距離Lは、以下の式(15)のように表され、距離Lを算出することは、事故点13を算出することに相当する。
Figure JPOXMLDOC01-appb-I000014
 式(15)において、距離Lは、第1の地点11から事故点13までの距離であり、|L+L|は、事故点算出処理部83において既知である。
 このとき、tYD>tZDであれば、事故点13は、第1の地点11よりも第2の地点12に近い位置である。
 また、tYD<tZDであれば、事故点13は、第2の地点12よりも第1の地点11に近い位置である。
Then, the fault point calculation processing unit 83, from the transmission speed v of the surge signal S s_a, the time t ZD time t YD and Z D of Y D, calculates the fault point 13.
Distance L b from the second point 12 to the fault point 13 is expressed as the following equation (15), to calculate the distance L b is equivalent to calculating the fault point 13.
Figure JPOXMLDOC01-appb-I000014
In Expression (15), the distance La is a distance from the first point 11 to the accident point 13, and | L a + L b | is known in the accident point calculation processing unit 83.
At this time, if t YD > t ZD , the accident point 13 is a position closer to the second point 12 than to the first point 11.
If t YD <t ZD , the accident point 13 is a position closer to the first point 11 than to the second point 12.
 以上の実施の形態2は、事故点算出部80が、第1のデジタル信号Da1と、第1のトリガ信号Ea1と、第2のデジタル信号Db1と、第2のトリガ信号Eb1とから、事故点13を算出するように、事故点標定装置を構成した。したがって、実施の形態2の事故点標定装置は、実施の形態1の事故点標定装置と同様に、通信線を介して、電圧情報等を送受信することなく、事故点13を算出することができる。
 また、実施の形態2の事故点標定装置は、第1のサージ検出部20と事故点算出部80との間の伝送線路での遅延時間と、第2のサージ検出部30と事故点算出部80との間の伝送線路での遅延時間とが異なる場合でも、事故点13を算出することができる。したがって、実施の形態2の事故点標定装置は、実施の形態1の事故点標定装置よりも、伝送線路の線路長の選択性を高めることができるほか、第1のサージ検出部20、第2のサージ検出部30及び事故点算出部80におけるそれぞれの設置位置の選択性を高めることができる。
In the second embodiment described above, the accident point calculation unit 80 determines that the first digital signal D a1 , the first trigger signal E a1 , the second digital signal D b1 , and the second trigger signal E b1 Thus, the accident point locating device was configured to calculate the accident point 13. Therefore, the fault point locating device of the second embodiment can calculate the fault point 13 without transmitting and receiving voltage information and the like via the communication line, similarly to the fault point locating device of the first embodiment. .
In addition, the fault point locating device according to the second embodiment includes a delay time in a transmission line between the first surge detector 20 and the fault point calculator 80, a second surge detector 30, and a fault point calculator. The fault point 13 can be calculated even when the delay time in the transmission line between the fault point 80 and the delay time 80 differs. Therefore, the fault point locating device according to the second embodiment can increase the selectivity of the line length of the transmission line as compared with the fault point locating device according to the first embodiment, and can further increase the selectivity of the first surge detector 20 and the second surge detector. The selectivity of each installation position in the surge detection unit 30 and the accident point calculation unit 80 can be improved.
 図6に示す事故点標定装置では、第1の時刻差算出部81が、第1のデジタル信号Da1の立ち上がり時刻と、第1のトリガ信号Ea1の立ち上がり時刻との時刻差を第1の時刻差tとして算出している。しかし、これは一例に過ぎず、第1の時刻差算出部81が、第1のデジタル信号Da1の立ち下がり時刻と、第1のトリガ信号Ea1の立ち下がり時刻との時刻差を第1の時刻差tとして算出するようにしてもよい。
 図6に示す事故点標定装置では、第2の時刻差算出部82が、第2のデジタル信号Db1の立ち上がり時刻と、第2のトリガ信号Eb1の立ち上がり時刻との時刻差を第2の時刻差tとして算出している。しかし、これは一例に過ぎず、第2の時刻差算出部82が、第2のデジタル信号Db1の立ち下がり時刻と、第2のトリガ信号Eb1の立ち下がり時刻との時刻差を第2の時刻差tとして算出するようにしてもよい。
 また、第1の時刻差算出部81が、第1のデジタル信号Da1の立ち下がり時刻と、第1のトリガ信号Ea1の立ち下がり時刻との時刻差を第1の時刻差tとして算出し、第2の時刻差算出部82が、第2のデジタル信号Db1の立ち上がり時刻と、第2のトリガ信号Eb1の立ち上がり時刻との時刻差を第2の時刻差tとして算出するようにしてもよい。
 また、第1の時刻差算出部81が、第1のデジタル信号Da1の立ち上がり時刻と、第1のトリガ信号Ea1の立ち上がり時刻との時刻差を第1の時刻差tとして算出し、第2の時刻差算出部82が、第2のデジタル信号Db1の立ち下がり時刻と、第2のトリガ信号Eb1の立ち下がり時刻との時刻差を第2の時刻差tとして算出するようにしてもよい。
In the accident point locating device shown in FIG. 6, the first time difference calculating section 81 calculates the time difference between the rising time of the first digital signal D a1 and the rising time of the first trigger signal E a1 by the first time. It is calculated as the time difference t a. However, this is only an example, and the first time difference calculation unit 81 calculates the time difference between the falling time of the first digital signal D a1 and the falling time of the first trigger signal E a1 by the first time. May be calculated as the time difference ta.
In the accident point locating device shown in FIG. 6, the second time difference calculation unit 82 calculates the time difference between the rising time of the second digital signal D b1 and the rising time of the second trigger signal E b1 in the second time. It is calculated as the time difference t b. However, this is only an example, and the second time difference calculating unit 82 calculates the time difference between the falling time of the second digital signal D b1 and the falling time of the second trigger signal E b1 by the second time. May be calculated as the time difference tb.
In addition, the first time difference calculation unit 81 calculates a time difference between the fall time of the first digital signal Da1 and the fall time of the first trigger signal Ea1 as a first time difference ta. Then, the second time difference calculator 82 calculates the time difference between the rising time of the second digital signal D b1 and the rising time of the second trigger signal E b1 as the second time difference t b. It may be.
The first time difference calculation section 81 calculates the rise time of the first digital signal D a1, the time difference between the rise time of the first trigger signal E a1 as the first time difference t a, The second time difference calculation unit 82 calculates the time difference between the fall time of the second digital signal D b1 and the fall time of the second trigger signal E b1 as a second time difference t b. It may be.
 図6に示す事故点標定装置では、第1のトリガ信号生成部24が、送信信号Sp_aに同期している第1のトリガ信号Eを生成し、第2のトリガ信号生成部34が、送信信号Sp_bに同期している第2のトリガ信号Eを生成している。
 しかし、これは一例に過ぎず、第1のトリガ信号Eは、送信信号Sp_aに同期していればよく、第2のトリガ信号Eは、送信信号Sp_bに同期していればよい。したがって、第1のトリガ信号生成部24が、第1のトリガ信号Eとして、送信信号Sp_aを用い、第2のトリガ信号生成部34が、第2のトリガ信号Eとして、送信信号Sp_bを用いるようにしてもよい。
In the fault point locating system shown in FIG. 6, a first trigger signal generator 24 generates a first trigger signal E a which synchronizes with the transmission signal S p_a, a second trigger signal generator 34, and it generates a second trigger signal E b which is synchronized with the transmission signal S p_b.
However, this is only an example, the first trigger signal E a has only to be synchronized with the transmission signal S p_a, the second trigger signal E b has only to be synchronized with the transmission signal S p_b . Therefore, the first trigger signal generation unit 24, a first trigger signal E a, using the transmission signal S p_a, the second trigger signal generation unit 34, as a second trigger signal E b, the transmission signal S p_b may be used.
 図6に示す事故点標定装置では、第1のサージ検出部20が第1の変換部23を備え、第2のサージ検出部30が第2の変換部33を備えている。
 しかし、第1の時刻差算出部81では、サージ信号Ss_aの立ち上がりを検出できれば、第1の時刻差tを算出でき、第2の時刻差算出部82では、サージ信号Ss_bの立ち上がりを検出できれば、第2の時刻差tを算出できる。したがって、第1のサージ検出部20が、第1の変換部23の代わりに、サージ信号Ss_aを検波する検波器を備え、第2のサージ検出部30が、第2の変換部33の代わりに、サージ信号Ss_bを検波する検波器を備えるようにしてもよい。
In the accident point locating device shown in FIG. 6, the first surge detector 20 includes a first converter 23, and the second surge detector 30 includes a second converter 33.
However, the first time difference calculation unit 81, if detects a rise of the surge signal S s_a, can calculate the first time difference t a, the second time difference calculating section 82, the rise of the surge signal S S_B if detected, it calculates the second time difference t b. Therefore, the first surge detector 20 includes a detector that detects the surge signal S s_a instead of the first converter 23, and the second surge detector 30 replaces the second converter 33. In addition, a detector for detecting the surge signal Ss_b may be provided.
実施の形態3.
 実施の形態3では、3本の伝送線路2a,2b,2cを有る送電線2の事故点13を算出する事故点標定装置について説明する。
 図10は、実施の形態3に係る事故点標定装置を示す構成図である。図10において、図1と同一符号は同一又は相当部分を示すので説明を省略する。
 送電線2は、3本の伝送線路2a,2b,2cを有している。送電線2により伝送される電力である送信信号Sは、三相交流の信号である。
 図10に示す事故点標定装置では、送信信号Sが、第1の地点11から第2の地点12に向かう方向に流れている。
Embodiment 3 FIG.
In the third embodiment, a fault point locating device that calculates a fault point 13 of a transmission line 2 having three transmission lines 2a, 2b, and 2c will be described.
FIG. 10 is a configuration diagram illustrating an accident point locating device according to the third embodiment. In FIG. 10, the same reference numerals as those in FIG.
The transmission line 2 has three transmission lines 2a, 2b, 2c. Transmission signal S p is a power transmitted by the transmission line 2 is a signal of the three-phase AC.
In the fault point locating system shown in FIG. 10, the transmission signal S p is flowing in a direction from the first point 11 to a second point 12.
 第1のサージ検出部100は、第1の信号合成部101、第1のフィルタ102、第1の同期信号生成部103、第2のフィルタ104及び第1の変換部23を備えている。
 第1のサージ検出部100は、入力端子100a,100b,100cが第1の地点11と接続され、出力端子100dが事故点算出部40の第1の入力端子40aと接続されている。
 第1のサージ検出部100は、送電線2に損傷が生じることでサージ信号Sが発生したとき、第1の地点11を流れている送信信号Sp_aに同期して、サージ信号Ss_aを検出する。
 第1のサージ検出部100は、サージ信号Ss_aをアナログ信号からデジタル信号に変換し、当該デジタル信号を第1のデジタル信号Dとして事故点算出部40に出力する。
The first surge detector 100 includes a first signal synthesizer 101, a first filter 102, a first synchronization signal generator 103, a second filter 104, and a first converter 23.
In the first surge detector 100, the input terminals 100a, 100b, 100c are connected to the first point 11, and the output terminal 100d is connected to the first input terminal 40a of the fault point calculator 40.
When the surge signal S s is generated due to damage to the transmission line 2, the first surge detection unit 100 detects the surge signal S s_a in synchronization with the transmission signal Sp_a flowing through the first point 11. To detect.
The first surge detector 100 converts the surge signal Ss_a from an analog signal to a digital signal, and outputs the digital signal to the fault point calculator 40 as a first digital signal Da.
 第1の信号合成部101は、例えば、抵抗及びトランスを実装している合成器、ハイブリッド回路、又は、180度ハイブリッド回路と180度移相器とが組み合わされた回路によって実現される。
 第1の信号合成部101は、入力端子101aが伝送線路2aにおける第1の地点11と接続され、入力端子101bが伝送線路2bにおける第1の地点11と接続され、入力端子101cが伝送線路2cにおける第1の地点11と接続されている。
 また、第1の信号合成部101は、出力端子101dが第2のフィルタ104の入力端子104aと接続されている。
 第1の信号合成部101は、3本の伝送線路2a,2b,2cにおける第1の地点11を流れている三相交流の信号の電圧もしくは電流を同相で足し合わせることで、第1の合成信号を生成する。
 第1の信号合成部101は、第1の合成信号を第2のフィルタ104に出力する。
The first signal combining unit 101 is realized by, for example, a combiner mounting a resistor and a transformer, a hybrid circuit, or a circuit in which a 180-degree hybrid circuit and a 180-degree phase shifter are combined.
In the first signal combining unit 101, the input terminal 101a is connected to the first point 11 on the transmission line 2a, the input terminal 101b is connected to the first point 11 on the transmission line 2b, and the input terminal 101c is connected to the transmission line 2c. Is connected to the first point 11 in.
Further, the output terminal 101 d of the first signal synthesis unit 101 is connected to the input terminal 104 a of the second filter 104.
The first signal combining unit 101 adds the voltages or currents of the three-phase AC signals flowing through the first point 11 in the three transmission lines 2a, 2b, and 2c in the same phase, thereby performing the first combining. Generate a signal.
First signal combining section 101 outputs the first combined signal to second filter 104.
 第1のフィルタ102は、送信信号Sp_aの周波数が通過帯域内にあり、サージ信号Ss_aの周波数が通過帯域外にあるフィルタであり、例えば、LPFによって実現される。
 第1のフィルタ102は、入力端子102aが伝送線路2aにおける第1の地点11と接続され、出力端子102bが第1の同期信号生成部103の入力端子103aと接続されている。
 第1のフィルタ102は、伝送線路2aにおける第1の地点11を流れている信号に含まれているサージ信号Ss_aを抑圧して、第1の地点11を流れている信号から送信信号Sp_aを抽出し、送信信号Sp_aを第1の同期信号生成部103に出力する。
The first filter 102 is a filter in which the frequency of the transmission signal Sp_a is within the passband and the frequency of the surge signal Ss_a is outside the passband, and is realized by, for example, an LPF.
The first filter 102 has an input terminal 102a connected to the first point 11 in the transmission line 2a, and an output terminal 102b connected to the input terminal 103a of the first synchronization signal generator 103.
The first filter 102 suppresses the surge signal S s_a included in the signal flowing through the first point 11 in the transmission line 2a, and reduces the transmission signal Sp_a from the signal flowing through the first point 11. And outputs the transmission signal Sp_a to the first synchronization signal generation unit 103.
 第1の同期信号生成部103は、例えば、PLL回路、逓倍器又はDDSによって実現される。
 第1の同期信号生成部103は、入力端子103aが第1のフィルタ102の出力端子102bと接続され、出力端子103bが第1の変換部23のクロック端子23bと接続されている。
 第1の同期信号生成部103は、第1のフィルタ102により抽出された送信信号Sp_aに同期している第1のクロック信号Cを生成し、第1のクロック信号Cを第1の変換部23に出力する。
 第1の同期信号生成部103は、第1のフィルタ102により送信信号Sp_aが抽出されなくなり、第1のフィルタ102からの送信信号Sp_aの出力が途絶えると、送信信号Sp_aの出力が途絶える前に生成した第1のクロック信号Cを第1の変換部23に出力する。
 第1のフィルタ102により抽出された送信信号Sp_aの周波数と、第1の同期信号生成部103により生成された第1のクロック信号Cの周波数とは、同じであってもよいし、異なっていてもよい。
 図10には記載していないが、第1の同期信号生成部103が、PLL回路又はDDSによって実現される場合、外部から与えられる制御信号に従って第1のクロック信号Cの周波数が決定される。
The first synchronization signal generation unit 103 is realized by, for example, a PLL circuit, a multiplier, or a DDS.
The first synchronization signal generator 103 has an input terminal 103 a connected to an output terminal 102 b of the first filter 102, and an output terminal 103 b connected to a clock terminal 23 b of the first converter 23.
First synchronizing signal generating unit 103 generates the first clock signal C a which is synchronized with the transmission signal S p_a extracted by the first filter 102, the first clock signal C a first Output to the converter 23.
First synchronizing signal generating unit 103, transmission signal S p_a by the first filter 102 is no longer extracted, the output of the transmission signal S p_a from the first filter 102 is interrupted, interrupted the output of the transmission signal S p_a is outputting a first clock signal C a generated prior to the first converting section 23.
The frequency of the transmission signal S p_a extracted by the first filter 102, the frequency of the first clock signal C a, which is generated by the first synchronizing signal generator 103, may be the same, different May be.
Although not shown in FIG. 10, a first synchronizing signal generator 103, as implemented by the PLL circuit or DDS, the frequency of the first clock signal C a is determined according to an externally applied control signal .
 第2のフィルタ104は、サージ信号Ss_aの周波数が通過帯域内にあり、送信信号Sp_aの周波数が通過帯域外にあるフィルタであり、例えば、HPFによって実現される。
 第2のフィルタ104は、入力端子104aが第1の信号合成部101の出力端子101dと接続され、出力端子104bが第1の変換部23の入力端子23aと接続されている。
 第2のフィルタ104は、第1の信号合成部101により生成された第1の合成信号に含まれている送信信号Sp_aを抑圧して、第1の合成信号からサージ信号Ss_aを抽出し、サージ信号Ss_aを第1の変換部23に出力する。
The second filter 104 is a filter in which the frequency of the surge signal S s_a is within the pass band and the frequency of the transmission signal Sp_a is outside the pass band, and is realized by, for example, an HPF.
The second filter 104 has an input terminal 104 a connected to the output terminal 101 d of the first signal synthesis unit 101, and an output terminal 104 b connected to the input terminal 23 a of the first conversion unit 23.
The second filter 104 suppresses the transmission signal Sp_a included in the first combined signal generated by the first signal combining unit 101, and extracts the surge signal Ss_a from the first combined signal. , And outputs the surge signal Ss_a to the first converter 23.
 第2のサージ検出部110は、第2の信号合成部111、第3のフィルタ112、第2の同期信号生成部113、第4のフィルタ114及び第2の変換部33を備えている。
 第2のサージ検出部110は、入力端子110a,110b,110cが第2の地点12と接続され、出力端子110dが事故点算出部40の第2の入力端子40bと接続されている。
 第2のサージ検出部110は、送電線2に損傷が生じることでサージ信号Sが発生したとき、第2の地点12を流れている送信信号Sp_bに同期して、サージ信号Ss_bを検出する。
 第2のサージ検出部110は、サージ信号Ss_bをアナログ信号からデジタル信号に変換し、当該デジタル信号を第2のデジタル信号Dとして事故点算出部40に出力する。
The second surge detector 110 includes a second signal synthesizer 111, a third filter 112, a second synchronization signal generator 113, a fourth filter 114, and a second converter 33.
In the second surge detector 110, the input terminals 110a, 110b, 110c are connected to the second point 12, and the output terminal 110d is connected to the second input terminal 40b of the fault point calculator 40.
Second surge detecting unit 110, when a surge signal S s by damage to the transmission line 2 has occurred, in synchronization with the transmission signal S p_b flowing through the second point 12, a surge signal S S_B To detect.
Second surge detecting unit 110, a surge signal S S_B converted from an analog signal to a digital signal, and outputs the digital signal to the fault point calculating section 40 as the second digital signal D b.
 第2の信号合成部111は、例えば、抵抗及びトランスを実装している合成器、ハイブリッド回路、又は、180度ハイブリッド回路と180度移相器とが組み合わされた回路によって実現される。
 第2の信号合成部111は、入力端子111aが伝送線路2aにおける第2の地点12と接続され、入力端子111bが伝送線路2bにおける第2の地点12と接続され、入力端子111cが伝送線路2cにおける第2の地点12と接続されている。
 また、第2の信号合成部111は、出力端子111dが第4のフィルタ114の入力端子114aと接続されている。
 第2の信号合成部111は、3本の伝送線路2a,2b,2cにおける第2の地点12を流れている三相交流の信号の電圧もしくは電流を同相で足し合わせることで、第2の合成信号を生成する。
 第2の信号合成部111は、第2の合成信号を第4のフィルタ114に出力する。
The second signal combining unit 111 is realized by, for example, a combiner mounting a resistor and a transformer, a hybrid circuit, or a circuit in which a 180-degree hybrid circuit and a 180-degree phase shifter are combined.
The second signal combining unit 111 has an input terminal 111a connected to the second point 12 on the transmission line 2a, an input terminal 111b connected to the second point 12 on the transmission line 2b, and an input terminal 111c connected to the transmission line 2c. Is connected to the second point 12 at
The output terminal 111 d of the second signal synthesizing unit 111 is connected to the input terminal 114 a of the fourth filter 114.
The second signal synthesizing unit 111 adds the voltages or currents of the three-phase alternating current signals flowing at the second point 12 in the three transmission lines 2a, 2b, and 2c in the same phase, thereby performing the second synthesis. Generate a signal.
The second signal synthesizing section 111 outputs the second synthesized signal to the fourth filter 114.
 第3のフィルタ112は、送信信号Sp_bの周波数が通過帯域内にあり、サージ信号Ss_bの周波数が通過帯域外にあるフィルタであり、例えば、LPFによって実現される。
 第3のフィルタ112は、入力端子112aが伝送線路2aにおける第2の地点12と接続され、出力端子112bが第2の同期信号生成部113の入力端子113aと接続されている。
 第3のフィルタ112は、伝送線路2aにおける第2の地点12を流れている信号に含まれているサージ信号Ss_bを抑圧して、第2の地点12を流れている信号から送信信号Sp_bを抽出し、送信信号Sp_bを第2の同期信号生成部113に出力する。
The third filter 112 is a filter in which the frequency of the transmission signal Sp_b is within the pass band and the frequency of the surge signal S s_b is outside the pass band, and is realized by, for example, an LPF.
The third filter 112 has an input terminal 112a connected to the second point 12 in the transmission line 2a, and an output terminal 112b connected to the input terminal 113a of the second synchronization signal generator 113.
The third filter 112 suppresses the surge signal S s_b included in the signal flowing through the second point 12 in the transmission line 2a, and converts the signal flowing through the second point 12 into the transmission signal Sp_b. And outputs the transmission signal Sp_b to the second synchronization signal generation unit 113.
 第2の同期信号生成部113は、例えば、PLL回路、逓倍器又はDDSによって実現される。
 第2の同期信号生成部113は、入力端子113aが第3のフィルタ112の出力端子112bと接続され、出力端子113bが第2の変換部33のクロック端子33bと接続されている。
 第2の同期信号生成部113は、第3のフィルタ112により抽出された送信信号Sp_bに同期している第2のクロック信号Cを生成し、第2のクロック信号Cを第2の変換部33に出力する。
 第2の同期信号生成部113は、第3のフィルタ112により送信信号Sp_bが抽出されなくなり、第3のフィルタ112からの送信信号Sp_bの出力が途絶えると、送信信号Sp_bの出力が途絶える前に生成した第2のクロック信号Cを第2の変換部33に出力する。
 第3のフィルタ112により抽出された送信信号Sp_bの周波数と、第2の同期信号生成部113により生成された第2のクロック信号Cの周波数とは、同じであってもよいし、異なっていてもよい。
 図10には記載していないが、第2の同期信号生成部113が、PLL回路又はDDSによって実現される場合、外部から与えられる制御信号に従って第2のクロック信号Cの周波数が決定される。
The second synchronization signal generation unit 113 is realized by, for example, a PLL circuit, a multiplier, or a DDS.
The second synchronization signal generator 113 has an input terminal 113 a connected to an output terminal 112 b of the third filter 112, and an output terminal 113 b connected to a clock terminal 33 b of the second converter 33.
Second synchronizing signal generating unit 113, in synchronization with the transmission signal S p_b extracted by the third filter 112 second to generate a clock signal C b is, the second clock signal C b second Output to the converter 33.
Second synchronizing signal generating unit 113, transmission signal S p_b by the third filter 112 is no longer extracted, the output of the transmission signal S p_b from the third filter 112 is interrupted, interrupted the output of the transmission signal S p_b is outputting a second clock signal C b generated prior to the second converter 33.
The frequency of the transmission signal S p_b extracted by the third filter 112, and the frequency of the second clock signal C b generated by the second synchronizing signal generator 113, may be the same, different May be.
Although not shown in FIG. 10, the second synchronizing signal generator 113, as implemented by the PLL circuit or DDS, the frequency of the second clock signal C b is determined according to an externally applied control signal .
 第4のフィルタ114は、サージ信号Ss_bの周波数が通過帯域内にあり、送信信号Sp_bの周波数が通過帯域外にあるフィルタであり、例えば、HPFによって実現される。
 第4のフィルタ114は、入力端子114aが第2の信号合成部111の出力端子111dと接続され、出力端子114bが第2の変換部33の入力端子33aと接続されている。
 第4のフィルタ114は、第2の信号合成部111により生成された第2の合成信号に含まれている送信信号Sp_bを抑圧して、第2の合成信号からサージ信号Ss_bを抽出し、サージ信号Ss_bを第2の変換部33に出力する。
The fourth filter 114 is a filter in which the frequency of the surge signal S s_b is within the pass band and the frequency of the transmission signal Sp_b is outside the pass band, and is realized by, for example, an HPF.
The fourth filter 114 has an input terminal 114 a connected to the output terminal 111 d of the second signal synthesis unit 111, and an output terminal 114 b connected to the input terminal 33 a of the second conversion unit 33.
The fourth filter 114 suppresses the transmission signal Sp_b included in the second combined signal generated by the second signal combining unit 111, and extracts the surge signal S s_b from the second combined signal. , And outputs the surge signal Ss_b to the second converter 33.
 図11は、実施の形態3に係る事故点標定装置の第1の同期信号生成部103を示す構成図である。
 図11において、位相比較器121は、例えば、PFD(Phase Frequency Detector)によって実現される。
 位相比較器121は、第1のフィルタ102により抽出された送信信号Sp_aの位相と、分周器127から出力された分周信号の位相とを比較し、送信信号Sp_aと分周信号との位相差を示す位相差信号をループフィルタ122に出力する。
 ループフィルタ122は、位相比較器121から出力された位相差信号を平滑化して、平滑化後の位相差信号を電圧検出器124及びスイッチ125のそれぞれに出力する。
FIG. 11 is a configuration diagram illustrating the first synchronization signal generation unit 103 of the accident point locating device according to the third embodiment.
In FIG. 11, the phase comparator 121 is realized by, for example, a PFD (Phase Frequency Detector).
The phase comparator 121 compares the phase of the transmission signal Sp_a extracted by the first filter 102 with the phase of the frequency- divided signal output from the frequency divider 127, and compares the phase of the transmission signal Sp_a with the frequency- divided signal. Is output to the loop filter 122.
The loop filter 122 smoothes the phase difference signal output from the phase comparator 121 and outputs the smoothed phase difference signal to each of the voltage detector 124 and the switch 125.
 信号検出器123は、第1のフィルタ102により抽出された送信信号Sp_aの検出処理を実施し、送信信号Sp_aの検出ができなくなると、送信信号Sp_aが途絶えている旨を示す非検出信号を電圧検出器124及びスイッチ125のそれぞれに出力する。
 電圧検出器124は、ループフィルタ122から出力された平滑化後の位相差信号の電圧値を検出し、検出した電圧値を記憶する。
 電圧検出器124は、信号検出器123から非検出信号を受けると、非検出信号を受ける前に記憶している電圧値の中で、最後に記憶した電圧値をスイッチ125に出力する。
The signal detector 123 performs a detection process of the transmission signal Sp_a extracted by the first filter 102, and when the transmission signal Sp_a cannot be detected, non-detection indicating that the transmission signal Sp_a is interrupted. The signal is output to each of the voltage detector 124 and the switch 125.
The voltage detector 124 detects the voltage value of the smoothed phase difference signal output from the loop filter 122, and stores the detected voltage value.
When receiving the non-detection signal from the signal detector 123, the voltage detector 124 outputs the last stored voltage value to the switch 125 among the voltage values stored before receiving the non-detection signal.
 スイッチ125は、信号検出器123から非検出信号が出力されていなければ、ループフィルタ122から出力された平滑化後の位相差信号を制御電圧信号として電圧制御発振器126に出力する。
 スイッチ125は、信号検出器123から非検出信号を受けると、電圧検出器124から出力された電圧値を制御電圧信号として電圧制御発振器126に出力する。
When the non-detection signal is not output from the signal detector 123, the switch 125 outputs the smoothed phase difference signal output from the loop filter 122 to the voltage controlled oscillator 126 as a control voltage signal.
When receiving the non-detection signal from the signal detector 123, the switch 125 outputs the voltage value output from the voltage detector 124 to the voltage-controlled oscillator 126 as a control voltage signal.
 電圧制御発振器126は、スイッチ125から出力された制御電圧信号に基づいて第1のクロック信号Cを生成し、第1のクロック信号Cを分周器127及び第1の変換部23のそれぞれに出力する。
 分周器127は、電圧制御発振器126により生成された第1のクロック信号Cを分周し、第1のクロック信号Cの分周信号を位相比較器121に出力する。
 信号検出器123から非検出信号が出力されていない状態では、位相比較器121、ループフィルタ122、スイッチ125、電圧制御発振器126及び分周器127は、PLL回路として動作する。
The voltage controlled oscillator 126 generates a first clock signal Ca based on the control voltage signal output from the switch 125, and divides the first clock signal Ca into the frequency divider 127 and the first converter 23, respectively. Output to
Divider 127 divides the first clock signal C a, which is generated by the voltage controlled oscillator 126, and outputs a divided signal of the first clock signal C a to the phase comparator 121.
When the non-detection signal is not output from the signal detector 123, the phase comparator 121, the loop filter 122, the switch 125, the voltage controlled oscillator 126, and the frequency divider 127 operate as a PLL circuit.
 図12は、実施の形態3に係る事故点標定装置の第2の同期信号生成部113を示す構成図である。
 図12において、位相比較器131は、例えば、PFDによって実現される。
 位相比較器131は、第3のフィルタ112により抽出された送信信号Sp_bの位相と、分周器137から出力された分周信号の位相とを比較し、送信信号Sp_bと分周信号との位相差を示す位相差信号をループフィルタ132に出力する。
 ループフィルタ132は、位相比較器131から出力された位相差信号を平滑化して、平滑化後の位相差信号を電圧検出器134及びスイッチ135のそれぞれに出力する。
FIG. 12 is a configuration diagram illustrating the second synchronization signal generation unit 113 of the accident point locating device according to the third embodiment.
In FIG. 12, the phase comparator 131 is realized by, for example, a PFD.
The phase comparator 131 compares the phase of the transmission signal Sp_b extracted by the third filter 112 with the phase of the frequency- divided signal output from the frequency divider 137, and compares the phase of the transmission signal Sp_b with the frequency- divided signal. Is output to the loop filter 132.
The loop filter 132 smoothes the phase difference signal output from the phase comparator 131 and outputs the smoothed phase difference signal to each of the voltage detector 134 and the switch 135.
 信号検出器133は、第3のフィルタ112により抽出された送信信号Sp_bの検出処理を実施し、送信信号Sp_bの検出ができなくなると、送信信号Sp_bが途絶えている旨を示す非検出信号を電圧検出器134及びスイッチ135のそれぞれに出力する。
 電圧検出器134は、ループフィルタ132から出力された平滑化後の位相差信号の電圧値を検出し、検出した電圧値を記憶する。
 電圧検出器134は、信号検出器133から非検出信号を受けると、非検出信号を受ける前に記憶している電圧値の中で、最後に記憶した電圧値をスイッチ135に出力する。
The signal detector 133 performs detection processing of the transmission signal Sp_b extracted by the third filter 112, and when the transmission signal Sp_b cannot be detected, non-detection indicating that the transmission signal Sp_b is interrupted. The signal is output to each of the voltage detector 134 and the switch 135.
The voltage detector 134 detects the voltage value of the smoothed phase difference signal output from the loop filter 132, and stores the detected voltage value.
When receiving the non-detection signal from the signal detector 133, the voltage detector 134 outputs to the switch 135 the last stored voltage value among the voltage values stored before receiving the non-detection signal.
 スイッチ135は、信号検出器133から非検出信号が出力されていなければ、ループフィルタ132から出力された平滑化後の位相差信号を制御電圧信号として電圧制御発振器136に出力する。
 スイッチ135は、信号検出器133から非検出信号を受けると、電圧検出器134から出力された電圧値を制御電圧信号として電圧制御発振器136に出力する。
When the non-detection signal is not output from the signal detector 133, the switch 135 outputs the smoothed phase difference signal output from the loop filter 132 to the voltage controlled oscillator 136 as a control voltage signal.
When the switch 135 receives the non-detection signal from the signal detector 133, the switch 135 outputs the voltage value output from the voltage detector 134 to the voltage control oscillator 136 as a control voltage signal.
 電圧制御発振器136は、スイッチ135から出力された制御電圧信号に基づいて第2のクロック信号Cを生成し、第2のクロック信号Cを分周器137及び第2の変換部33のそれぞれに出力する。
 分周器137は、電圧制御発振器136により生成された第2のクロック信号Cを分周し、第2のクロック信号Cの分周信号を位相比較器131に出力する。
 信号検出器133から非検出信号が出力されていない状態では、位相比較器131、ループフィルタ132、スイッチ135、電圧制御発振器136及び分周器137は、PLL回路として動作する。
Voltage controlled oscillator 136 generates a second clock signal C b on the basis of a control voltage signal output from the switch 135, each of the second clock signal C b a divider 137 and the second conversion unit 33 Output to
Divider 137 divides the second clock signal C b generated by the voltage controlled oscillator 136, and outputs a frequency dividing signal of the second clock signal C b to the phase comparator 131.
When no non-detection signal is output from the signal detector 133, the phase comparator 131, the loop filter 132, the switch 135, the voltage controlled oscillator 136, and the frequency divider 137 operate as a PLL circuit.
 次に、図10に示す事故点標定装置の動作について説明する。
 図10に示す事故点標定装置では、伝送線路2b及び伝送線路2cのうち、少なくとも1本の伝送線路が切断されているものとする。
 また、送電線2以外では、送信信号Sの伝送遅延及びサージ信号Sの伝送遅延が発生しないものとする。
Next, the operation of the accident point locator shown in FIG. 10 will be described.
In the fault point locating device shown in FIG. 10, it is assumed that at least one of the transmission lines 2b and 2c is disconnected.
Further, other than the transmission line 2, it is assumed that the transmission delay of the transmission delay and the surge signal S s of the transmission signal S p is not generated.
 第1のサージ検出部100は、送電線2に損傷が生じることでサージ信号Sが発生したとき、第1の地点11を流れている送信信号Sp_aに同期して、サージ信号Ss_aを検出する。
 第1のサージ検出部100は、サージ信号Ss_aをアナログ信号からデジタル信号に変換し、当該デジタル信号を第1のデジタル信号Dとして事故点算出部40に出力する。
 以下、第1のサージ検出部100の処理手順を具体的に説明する。
When the surge signal S s is generated due to damage to the transmission line 2, the first surge detection unit 100 detects the surge signal S s_a in synchronization with the transmission signal Sp_a flowing through the first point 11. To detect.
The first surge detector 100 converts the surge signal Ss_a from an analog signal to a digital signal, and outputs the digital signal to the fault point calculator 40 as a first digital signal Da.
Hereinafter, the processing procedure of the first surge detection unit 100 will be specifically described.
 第1の信号合成部101は、3本の伝送線路2a,2b,2cにおける第1の地点11を流れている三相交流の信号の電圧もしくは電流を同相で足し合わせることで、第1の合成信号を生成する。
 第1の信号合成部101は、第1の合成信号を第2のフィルタ104に出力する。
 第2のフィルタ104は、第1の信号合成部101から第1の合成信号を受けると、第1の合成信号に含まれている送信信号Sp_aを抑圧して、第1の合成信号からサージ信号Ss_aを抽出し、サージ信号Ss_aを第1の変換部23に出力する。
The first signal combining unit 101 adds the voltages or currents of the three-phase AC signals flowing through the first point 11 in the three transmission lines 2a, 2b, and 2c in the same phase, thereby performing the first combining. Generate a signal.
First signal combining section 101 outputs the first combined signal to second filter 104.
Upon receiving the first combined signal from first signal combining section 101, second filter 104 suppresses transmission signal Sp_a included in the first combined signal, and suppresses a surge from the first combined signal. The signal S s_a is extracted and the surge signal S s_a is output to the first converter 23.
 第1のフィルタ102は、伝送線路2aにおける第1の地点11を流れている信号に含まれているサージ信号Ss_aを抑圧して、第1の地点11を流れている信号から送信信号Sp_aを抽出し、送信信号Sp_aを第1の同期信号生成部103に出力する。
 第1の同期信号生成部103は、第1のフィルタ102から送信信号Sp_aを受けると、図1に示す第1の同期信号生成部22と同様に、送信信号Sp_aに同期している第1のクロック信号Cを生成し、第1のクロック信号Cを第1の変換部23に出力する。
 ただし、第1の同期信号生成部103は、第1のフィルタ102により送信信号Sp_aが抽出されなくなり、第1のフィルタ102からの送信信号Sp_aの出力が途絶えると、送信信号Sp_aの出力が途絶える前に生成した第1のクロック信号Cを第1の変換部23に出力する。
 以下、第1の同期信号生成部103の処理手順を具体的に説明する。
The first filter 102 suppresses the surge signal S s_a included in the signal flowing through the first point 11 in the transmission line 2a, and reduces the transmission signal Sp_a from the signal flowing through the first point 11. And outputs the transmission signal Sp_a to the first synchronization signal generation unit 103.
Upon receiving the transmission signal Sp_a from the first filter 102, the first synchronization signal generation unit 103 synchronizes with the transmission signal Sp_a similarly to the first synchronization signal generation unit 22 illustrated in FIG. It generates a first clock signal C a, and outputs the first clock signal C a in the first conversion section 23.
However, when the transmission signal Sp_a is not extracted by the first filter 102 and the output of the transmission signal Sp_a from the first filter 102 is stopped, the first synchronization signal generation unit 103 outputs the transmission signal Sp_a . outputting a first clock signal C a generated before the interrupted in the first converter 23.
Hereinafter, the processing procedure of the first synchronization signal generation unit 103 will be specifically described.
 位相比較器121は、第1のフィルタ102から送信信号Sp_aを受けると、送信信号Sp_aの位相と、分周器127から出力された分周信号の位相とを比較する。
 位相比較器121は、送信信号Sp_aと分周信号との位相差を示す位相差信号をループフィルタ122に出力する。
 ループフィルタ122は、位相比較器121から位相差信号を受けると、位相差信号を平滑化して、平滑化後の位相差信号を電圧検出器124及びスイッチ125のそれぞれに出力する。
When receiving the transmission signal Sp_a from the first filter 102, the phase comparator 121 compares the phase of the transmission signal Sp_a with the phase of the frequency- divided signal output from the frequency divider 127.
The phase comparator 121 outputs a phase difference signal indicating a phase difference between the transmission signal Sp_a and the frequency- divided signal to the loop filter 122.
Upon receiving the phase difference signal from the phase comparator 121, the loop filter 122 smoothes the phase difference signal and outputs the smoothed phase difference signal to each of the voltage detector 124 and the switch 125.
 信号検出器123は、第1のフィルタ102により抽出された送信信号Sp_aの検出処理を実施する。
 信号検出器123は、第1のフィルタ102により送信信号Sp_aが抽出されなくなり、送信信号Sp_aの検出ができなくなると、送信信号Sp_aが途絶えている旨を示す非検出信号を電圧検出器124及びスイッチ125のそれぞれに出力する。
The signal detector 123 performs a process of detecting the transmission signal Sp_a extracted by the first filter 102.
When the transmission signal Sp_a is not extracted by the first filter 102 and the transmission signal Sp_a cannot be detected by the first filter 102, the signal detector 123 outputs a non-detection signal indicating that the transmission signal Sp_a is interrupted to a voltage detector. 124 and the switch 125.
 電圧検出器124は、ループフィルタ122から出力された平滑化後の位相差信号の電圧値を検出し、検出した電圧値を記憶する。
 電圧検出器124は、信号検出器123から非検出信号を受けると、非検出信号を受ける前に記憶している電圧値の中で、最後に記憶した電圧値をスイッチ125に出力する。
The voltage detector 124 detects the voltage value of the smoothed phase difference signal output from the loop filter 122, and stores the detected voltage value.
When receiving the non-detection signal from the signal detector 123, the voltage detector 124 outputs the last stored voltage value to the switch 125 among the voltage values stored before receiving the non-detection signal.
 スイッチ125は、信号検出器123から非検出信号が出力されていなければ、ループフィルタ122から出力された平滑化後の位相差信号を制御電圧信号として電圧制御発振器126に出力する。
 スイッチ125は、信号検出器123から非検出信号を受けると、電圧検出器124から出力された電圧値を制御電圧信号として電圧制御発振器126に出力する。
When the non-detection signal is not output from the signal detector 123, the switch 125 outputs the smoothed phase difference signal output from the loop filter 122 to the voltage controlled oscillator 126 as a control voltage signal.
When receiving the non-detection signal from the signal detector 123, the switch 125 outputs the voltage value output from the voltage detector 124 to the voltage-controlled oscillator 126 as a control voltage signal.
 電圧制御発振器126は、スイッチ125から制御電圧信号を受けると、制御電圧信号に基づいて第1のクロック信号Cを生成し、第1のクロック信号Cを分周器127及び第1の変換部23のそれぞれに出力する。
 分周器127は、電圧制御発振器126から第1のクロック信号Cを受けると、第1のクロック信号Cを分周し、第1のクロック信号Cの分周信号を位相比較器121に出力する。
Voltage controlled oscillator 126 receives a control voltage signal from the switch 125, the control based on the voltage signal to generate a first clock signal C a, the first clock signal C a divider 127 and the first conversion Output to each of the units 23.
Divider 127 receives the first clock signal C a voltage controlled oscillator 126, a first clock signal C a divides the phase comparator divided signal of the first clock signal C a 121 Output to
 信号検出器123から非検出信号が出力されていない状態では、位相比較器121、ループフィルタ122、スイッチ125、電圧制御発振器126及び分周器127は、PLL回路として動作する。
 ここでは、伝送線路2b及び伝送線路2cのうち、少なくとも1本の伝送線路が切断されているものとしており、伝送線路2aには、送信信号Sが流れている。
 したがって、信号検出器123では、送信信号Sp_aが検出されるため、信号検出器123から非検出信号が電圧検出器124及びスイッチ125のそれぞれに出力されない。
 よって、電圧制御発振器126では、送信信号Sp_aと分周信号との位相差に対応する第1のクロック信号Cが生成される。
When the non-detection signal is not output from the signal detector 123, the phase comparator 121, the loop filter 122, the switch 125, the voltage controlled oscillator 126, and the frequency divider 127 operate as a PLL circuit.
Here, it is assumed that at least one of the transmission lines 2b and 2c is disconnected, and the transmission signal Sp flows through the transmission line 2a.
Therefore, since the signal detector 123 detects the transmission signal Sp_a , the signal detector 123 does not output a non-detection signal to each of the voltage detector 124 and the switch 125.
Therefore, the voltage controlled oscillator 126, a first clock signal C a corresponding to the phase difference between the transmission signal S p_a and the division signal is generated.
 仮に、伝送線路2aが切断されて、送信信号Sp_aが伝送線路2aを流れなくなると、信号検出器123では、送信信号Sp_aが検出されずに、信号検出器123から非検出信号が電圧検出器124及びスイッチ125のそれぞれに出力される。
 したがって、電圧制御発振器126では、電圧検出器124によって、非検出信号を受ける前に記憶されている電圧値の中で、最後に記憶されている電圧値に基づいて第1のクロック信号Cが生成される。
 よって、伝送線路2aが切断されて、送信信号Sp_aが伝送線路2aを流れなくなっても、第1のクロック信号Cの生成を継続することができる。
If the transmission line 2a is disconnected and the transmission signal Sp_a does not flow through the transmission line 2a, the signal detector 123 does not detect the transmission signal Sp_a and the non-detection signal from the signal detector 123 is detected by voltage detection. Output to each of the switch 124 and the switch 125.
Therefore, in the voltage controlled oscillator 126, the first clock signal Ca is generated by the voltage detector 124 based on the last stored voltage value among the voltage values stored before receiving the non-detection signal. Generated.
Therefore, the transmission line 2a is cut, even if the transmission signal S p_a is no longer flows through the transmission line 2a, it is possible to continue the generation of the first clock signal C a.
 第1の変換部23は、第2のフィルタ104からサージ信号Ss_aを受け、第1の同期信号生成部103から第1のクロック信号Cを受けると、実施の形態1と同様に、第1のクロック信号Cに同期して、サージ信号Ss_aであるアナログ信号をデジタル信号に変換する。
 第1の変換部23は、当該デジタル信号を第1のデジタル信号Dとして事故点算出部40に出力する。
First converting section 23 receives the surge signal S s_a from the second filter 104, the the first synchronizing signal generator 103 receives the first clock signal C a, similarly to the first embodiment, the in synchronization with the first clock signal C a, it converts the analog signal which is a surge signal S s_a into a digital signal.
The first converter 23 outputs the digital signal to the accident point calculator 40 as a first digital signal Da.
 第2のサージ検出部110は、送電線2に損傷が生じることでサージ信号Sが発生したとき、第2の地点12を流れている送信信号Sp_bに同期して、サージ信号Ss_bを検出する。
 第2のサージ検出部110は、サージ信号Ss_bをアナログ信号からデジタル信号に変換し、当該デジタル信号を第2のデジタル信号Dとして事故点算出部40に出力する。
 以下、第2のサージ検出部110の処理手順を具体的に説明する。
Second surge detecting unit 110, when a surge signal S s by damage to the transmission line 2 has occurred, in synchronization with the transmission signal S p_b flowing through the second point 12, a surge signal S S_B To detect.
Second surge detecting unit 110, a surge signal S S_B converted from an analog signal to a digital signal, and outputs the digital signal to the fault point calculating section 40 as the second digital signal D b.
Hereinafter, the processing procedure of the second surge detection unit 110 will be specifically described.
 第2の信号合成部111は、3本の伝送線路2a,2b,2cにおける第2の地点12を流れている三相交流の信号の電圧もしくは電流を同相で足し合わせることで、第2の合成信号を生成する。
 第2の信号合成部111は、第2の合成信号を第4のフィルタ114に出力する。
 第4のフィルタ114は、第2の信号合成部111から第2の合成信号を受けると、第2の合成信号に含まれている送信信号Sp_bを抑圧して、第2の合成信号からサージ信号Ss_bを抽出し、サージ信号Ss_bを第2の変換部33に出力する。
The second signal synthesizing unit 111 adds the voltages or currents of the three-phase alternating current signals flowing at the second point 12 in the three transmission lines 2a, 2b, and 2c in the same phase, thereby performing the second synthesis. Generate a signal.
The second signal synthesizing section 111 outputs the second synthesized signal to the fourth filter 114.
When receiving the second combined signal from second signal combining section 111, fourth filter 114 suppresses transmission signal Sp_b included in the second combined signal, and suppresses surge from the second combined signal. The signal S s_b is extracted, and the surge signal S s_b is output to the second converter 33.
 第3のフィルタ112は、伝送線路2aにおける第2の地点12を流れている信号に含まれているサージ信号Ss_bを抑圧して、第2の地点12を流れている信号から送信信号Sp_bを抽出し、送信信号Sp_bを第2の同期信号生成部113に出力する。
 第2の同期信号生成部113は、第3のフィルタ112から送信信号Sp_bを受けると、図1に示す第2の同期信号生成部32と同様に、送信信号Sp_bに同期している第2のクロック信号Cを生成し、第2のクロック信号Cを第2の変換部33に出力する。
 ただし、第2の同期信号生成部113は、第3のフィルタ112により送信信号Sp_bが抽出されなくなり、第3のフィルタ112からの送信信号Sp_bの出力が途絶えると、送信信号Sp_bの出力が途絶える前に生成した第2のクロック信号Cを第2の変換部33に出力する。
 以下、第2の同期信号生成部113の処理手順を具体的に説明する。
The third filter 112 suppresses the surge signal S s_b included in the signal flowing through the second point 12 in the transmission line 2a, and converts the signal flowing through the second point 12 into the transmission signal Sp_b. And outputs the transmission signal Sp_b to the second synchronization signal generation unit 113.
Second synchronizing signal generating unit 113 receives the transmission signal S p_b from the third filter 112, as with the second synchronizing signal generating unit 32 shown in FIG. 1, the synchronized with the transmission signal S p_b It generates a second clock signal C b, and outputs the second clock signal C b to the second converter 33.
However, when the transmission signal Sp_b is no longer extracted by the third filter 112 and the output of the transmission signal Sp_b from the third filter 112 stops, the second synchronization signal generation unit 113 outputs the transmission signal Sp_b . outputting a second clock signal C b generated before the interrupted in the second converter 33.
Hereinafter, the processing procedure of the second synchronization signal generation unit 113 will be specifically described.
 位相比較器131は、第3のフィルタ112から送信信号Sp_bを受けると、送信信号Sp_bの位相と、分周器137から出力された分周信号の位相とを比較する。
 位相比較器131は、送信信号Sp_bと分周信号との位相差を示す位相差信号をループフィルタ132に出力する。
 ループフィルタ132は、位相比較器131から位相差信号を受けると、位相差信号を平滑化して、平滑化後の位相差信号を電圧検出器134及びスイッチ135のそれぞれに出力する。
Upon receiving the transmission signal Sp_b from the third filter 112, the phase comparator 131 compares the phase of the transmission signal Sp_b with the phase of the frequency- divided signal output from the frequency divider 137.
The phase comparator 131 outputs a phase difference signal indicating a phase difference between the transmission signal Sp_b and the frequency- divided signal to the loop filter 132.
Upon receiving the phase difference signal from the phase comparator 131, the loop filter 132 smoothes the phase difference signal and outputs the smoothed phase difference signal to each of the voltage detector 134 and the switch 135.
 信号検出器133は、第3のフィルタ112により抽出された送信信号Sp_bの検出処理を実施する。
 信号検出器133は、第3のフィルタ112により送信信号Sp_bが抽出されなくなり、送信信号Sp_bの検出ができなくなると、送信信号Sp_bが途絶えている旨を示す非検出信号を電圧検出器134及びスイッチ135のそれぞれに出力する。
The signal detector 133 performs a process of detecting the transmission signal Sp_b extracted by the third filter 112.
When the transmission signal Sp_b is not extracted by the third filter 112 and the transmission signal Sp_b cannot be detected by the third filter 112, the signal detector 133 outputs a non-detection signal indicating that the transmission signal Sp_b is interrupted to a voltage detector. 134 and the switch 135.
 電圧検出器134は、ループフィルタ132から出力された平滑化後の位相差信号の電圧値を検出し、検出した電圧値を記憶する。
 電圧検出器134は、信号検出器133から非検出信号を受けると、非検出信号を受ける前に記憶している電圧値の中で、最後に記憶した電圧値をスイッチ135に出力する。
The voltage detector 134 detects the voltage value of the smoothed phase difference signal output from the loop filter 132, and stores the detected voltage value.
When receiving the non-detection signal from the signal detector 133, the voltage detector 134 outputs to the switch 135 the last stored voltage value among the voltage values stored before receiving the non-detection signal.
 スイッチ135は、信号検出器133から非検出信号が出力されていなければ、ループフィルタ132から出力された平滑化後の位相差信号を制御電圧信号として電圧制御発振器136に出力する。
 スイッチ135は、信号検出器133から非検出信号を受けると、電圧検出器134から出力された電圧値を制御電圧信号として電圧制御発振器136に出力する。
When the non-detection signal is not output from the signal detector 133, the switch 135 outputs the smoothed phase difference signal output from the loop filter 132 to the voltage controlled oscillator 136 as a control voltage signal.
When the switch 135 receives the non-detection signal from the signal detector 133, the switch 135 outputs the voltage value output from the voltage detector 134 to the voltage control oscillator 136 as a control voltage signal.
 電圧制御発振器136は、スイッチ135から制御電圧信号を受けると、制御電圧信号に基づいて第2のクロック信号Cを生成し、第2のクロック信号Cを分周器137及び第2の変換部33のそれぞれに出力する。
 分周器137は、電圧制御発振器136から第2のクロック信号Cを受けると、第2のクロック信号Cを分周し、第2のクロック信号Cの分周信号を位相比較器131に出力する。
Voltage controlled oscillator 136 receives a control voltage signal from the switch 135, the control second to generate a clock signal C b based on the voltage signal, the second clock signal C b divider 137 and the second conversion Output to each of the units 33.
Divider 137 receives the second clock signal C b from the voltage controlled oscillator 136, the second clock signal C b divides the second clock signal C b of the divided signal to the phase comparator 131 Output to
 信号検出器133から非検出信号が出力されていない状態では、位相比較器131、ループフィルタ132、スイッチ135、電圧制御発振器136及び分周器137は、PLL回路として動作する。
 ここでは、伝送線路2b及び伝送線路2cのうち、少なくとも1本の伝送線路が切断されているものとしており、伝送線路2aには、送信信号Sが流れている。
 したがって、信号検出器133では、送信信号Sp_bが検出されるため、信号検出器133から非検出信号が電圧検出器134及びスイッチ135のそれぞれに出力されない。
 よって、電圧制御発振器136では、送信信号Sp_bと分周信号との位相差に対応する第2のクロック信号Cが生成される。
When no non-detection signal is output from the signal detector 133, the phase comparator 131, the loop filter 132, the switch 135, the voltage controlled oscillator 136, and the frequency divider 137 operate as a PLL circuit.
Here, it is assumed that at least one of the transmission lines 2b and 2c is disconnected, and the transmission signal Sp flows through the transmission line 2a.
Therefore, since the signal detector 133 detects the transmission signal Sp_b , the signal detector 133 does not output a non-detection signal to each of the voltage detector 134 and the switch 135.
Therefore, the voltage controlled oscillator 136, the second clock signal C b corresponding to the phase difference between the transmission signal S p_b and the division signal is generated.
 仮に、伝送線路2aが切断されて、送信信号Sp_bが伝送線路2aを流れなくなると、信号検出器133では、送信信号Sp_bが検出されずに、信号検出器133から非検出信号が電圧検出器134及びスイッチ135のそれぞれに出力される。
 したがって、電圧制御発振器136では、電圧検出器134によって、非検出信号を受ける前に記憶されている電圧値の中で、最後に記憶されている電圧値に基づいて第2のクロック信号Cが生成される。
 よって、伝送線路2aが切断されて、送信信号Sp_bが伝送線路2aを流れなくなっても、第2のクロック信号Cの生成を継続することができる。
If the transmission line 2a is disconnected and the transmission signal Sp_b does not flow through the transmission line 2a, the signal detector 133 does not detect the transmission signal Sp_b , and a non-detection signal is detected from the signal detector 133. Output to each of the switch 134 and the switch 135.
Accordingly, the voltage controlled oscillator 136, the voltage detector 134, among the voltage values stored prior to receiving the non-detection signal, the second clock signal C b on the basis of the voltage value last stored is Generated.
Therefore, the transmission line 2a is cut, even if the transmission signal S p_b is no longer flows through the transmission line 2a, it is possible to continue the generation of the second clock signal C b.
 第2の変換部33は、第4のフィルタ114からサージ信号Ss_bを受け、第2の同期信号生成部113から第2のクロック信号Cを受けると、実施の形態1と同様に、第2のクロック信号Cに同期して、サージ信号Ss_bであるアナログ信号をデジタル信号に変換する。
 第2の変換部33は、当該デジタル信号を第2のデジタル信号Dとして事故点算出部40に出力する。
The second converter 33 receives the surge signal S S_B from the fourth filter 114, the second synchronizing signal generator 113 receives the second clock signal C b, as in the first embodiment, the in synchronism with the second clock signal C b, it converts the analog signal which is a surge signal S S_B to a digital signal.
The second conversion unit 33 outputs the digital signal to the fault point calculating section 40 as the second digital signal D b.
 事故点算出部40は、実施の形態1と同様に、第1の変換部23から出力された第1のデジタル信号Dと第2の変換部33から出力された第2のデジタル信号Dとから、送電線2の事故点13を算出する。 Fault point calculation unit 40, as in the first embodiment, the second digital signal D b output from the first digital signal D a and the second converter 33 which is outputted from the first converter 23 Then, the fault point 13 of the transmission line 2 is calculated.
 以上より、実施の形態3の事故点標定装置は、送電線2が3本の伝送線路2a,2b,2cを有しており、送電線2により伝送される送信信号Sが、三相交流の信号であっても、通信線を介して、電圧情報等を送受信することなく、事故点13を算出することができる。 Thus, the fault point locating system of the third embodiment, the transmission line 2 3 transmission lines 2a, 2b, has a 2c, transmission signal S p to be transmitted by the transmission line 2, three-phase AC Can be calculated without transmitting or receiving voltage information or the like via the communication line.
 なお、本願発明はその発明の範囲内において、各実施の形態の自由な組み合わせ、あるいは各実施の形態の任意の構成要素の変形、もしくは各実施の形態において任意の構成要素の省略が可能である。 In the present invention, any combination of the embodiments, a modification of an arbitrary component of each embodiment, or an omission of an arbitrary component in each embodiment is possible within the scope of the invention. .
 この発明は、送電線の損傷位置である事故点を算出する事故点標定装置及び事故点標定方法に適している。 The present invention is suitable for an accident point locating apparatus and an accident point locating method for calculating an accident point which is a damaged position of a transmission line.
 1,2 送電線、2a,2b,2c 伝送線路、11 第1の地点、12 第2の地点、13 事故点、20 第1のサージ検出部、20a 入力端子、20b,20c 出力端子、21 第1の信号分離部、21a 入力端子、21b 第1の出力端子、21c 第2の出力端子、22 第1の同期信号生成部、22a 入力端子、22b 出力端子、23 第1の変換部、23a 入力端子、23b クロック端子、23c 出力端子、24 第1のトリガ信号生成部、24a 入力端子、24b 出力端子、30 第2のサージ検出部、30a 入力端子、30b,30c 出力端子、31 第2の信号分離部、31a 入力端子、31b 第1の出力端子、31c 第2の出力端子、32 第2の同期信号生成部、32a 入力端子、32b 出力端子、33 第2の変換部、33a 入力端子、33b クロック端子、33c 出力端子、34 第2のトリガ信号生成部、34a 入力端子、34b 出力端子、40 事故点算出部、40a 第1の入力端子、40b 第2の入力端子、51 第1のフィルタ、52 第2のフィルタ、53 第3のフィルタ、54 第4のフィルタ、61 位相差検出部、62 角周波数検出部、63 事故点算出処理部、71 第1の伝送線路、72 第2の伝送線路、73 第3の伝送線路、74 第4の伝送線路、80 事故点算出部、80a 第1の入力端子、80b 第2の入力端子、80c 第3の入力端子、80d 第4の入力端子、81 第1の時刻差算出部、82 第2の時刻差算出部、83 事故点算出処理部、100 第1のサージ検出部、100a,100b,100c 入力端子、100d 出力端子、101 第1の信号合成部、101a,101b,101c 入力端子、101d 出力端子、102 第1のフィルタ、102a 入力端子、102b 出力端子、103 第1の同期信号生成部、103a 入力端子、103b 出力端子、104 第2のフィルタ、104a 入力端子、104b 出力端子、110 第2のサージ検出部、110a,110b,110c 入力端子、110d 出力端子、111 第2の信号合成部、111a,111b,111c 入力端子、111d 出力端子、112 第3のフィルタ、112a 入力端子、112b 出力端子、113 第2の同期信号生成部、113a 入力端子、113b 出力端子、114 第4のフィルタ、114a 入力端子、114b 出力端子、121 位相比較器、122 ループフィルタ、123 信号検出器、124 電圧検出器、125 スイッチ、126 電圧制御発振器、127 分周器、131 位相比較器、132 ループフィルタ、133 信号検出器、134 電圧検出器、135 スイッチ、136 電圧制御発振器、137 分周器。 1, 2 transmission line, 2a, 2b, 2c transmission line, 11 first point, 12 second point, 13 fault point, 20 first surge detector, 20a input terminal, 20b, 20c output terminal, 21st 1 signal separation unit, 21a input terminal, 21b first output terminal, 21c second output terminal, 22 first synchronization signal generation unit, 22a input terminal, 22b output terminal, 23 first conversion unit, 23a input Terminal, 23b clock terminal, 23c output terminal, 24 first trigger signal generator, 24a input terminal, 24b output terminal, 30 second surge detector, 30a input terminal, 30b, 30c output terminal, 31 second signal Separation unit, 31a input terminal, 31b first output terminal, 31c second output terminal, 32 second synchronization signal generation unit, 32a input terminal , 32b 、 output terminal, 33 second conversion unit, 33a input terminal, 33b clock terminal, 33c output terminal, 34 second trigger signal generation unit, 34a input terminal, 34b output terminal, 40 accident point calculation unit, 40a first Input terminal, 40b second input terminal, 51 first filter, 52 second filter, 53 third filter, 54 fourth filter, 61 phase difference detection unit, 62 angular frequency detection unit, 63 injury point Calculation processing unit, 71 first transmission line, 72 second transmission line, 73 third transmission line, 74 fourth transmission line, 80 accident point calculation unit, 80a first input terminal, 80b second input Terminal, 80 c third input terminal, 80 d 4 fourth input terminal, 81 first time difference calculator, 82 2second time difference calculator, 83 accident point calculation processor 100 {first surge detector, 100a, 100b, 100c input terminals, 100d} output terminal, 101 first signal synthesizer, 101a, 101b, 101c input terminals, 101d output terminal, 102 first filter, 102a input terminal, 102b output terminal, 103 first synchronization signal generator, 103a input terminal, 103b output terminal, 104 second filter, 104a input terminal, 104b output terminal, 110 second surge detector, 110a, 110b, 110c input terminal , 110d output terminal, 111 second signal synthesis unit, 111a, 111b, 111c , input terminal, 111d output terminal, 112 third filter, 112a input terminal, 112b output terminal, 113 second synchronization signal generation unit, 113a input Terminal, 113 b output terminal, 114 fourth filter, 114a input terminal, 114b output terminal, 121 phase comparator, 122 loop filter, 123 signal detector, 124 voltage detector, 125 switch, 126 voltage controlled oscillator, 127 frequency divider, 131 phase comparator, 132 loop filter, 133 signal detector, 134 voltage detector, 135 switch, 136 voltage controlled oscillator, 137 frequency divider.

Claims (9)

  1.  電力を送信信号として伝送する送電線における第1の地点に一端が接続されており、前記送電線に損傷が生じることでサージ信号が発生したとき、前記第1の地点を流れている送信信号に同期して、前記サージ信号を検出する第1のサージ検出部と、
     前記送電線における前記第1の地点と異なる第2の地点に一端が接続されており、前記第2の地点を流れている送信信号に同期して、前記サージ信号を検出する第2のサージ検出部と、
     前記第1のサージ検出部により検出されたサージ信号と前記第2のサージ検出部により検出されたサージ信号とから、前記送電線の損傷位置である事故点を算出する事故点算出部と
     を備えた事故点標定装置。
    One end is connected to a first point in a transmission line that transmits power as a transmission signal, and when a surge signal occurs due to damage to the transmission line, the transmission signal flowing through the first point is A first surge detector that detects the surge signal in synchronization with the first surge detector;
    A second surge detector that has one end connected to a second point on the transmission line different from the first point, and detects the surge signal in synchronization with a transmission signal flowing through the second point; Department and
    An accident point calculation unit that calculates an accident point that is a damage position of the transmission line from a surge signal detected by the first surge detection unit and a surge signal detected by the second surge detection unit. Accident point locator.
  2.  前記第1のサージ検出部は、
     前記第1の地点を流れている信号から、送信信号及びサージ信号のそれぞれを抽出する第1の信号分離部と、
     前記第1の信号分離部により抽出された送信信号に同期している第1のクロック信号を生成する第1の同期信号生成部と、
     前記第1の同期信号生成部により生成された第1のクロック信号に同期して、前記第1の信号分離部により抽出されたサージ信号をアナログ信号からデジタル信号に変換し、当該デジタル信号を第1のデジタル信号として前記事故点算出部に出力する第1の変換部とを備え、
     前記第2のサージ検出部は、
     前記第2の地点を流れている信号から、送信信号及びサージ信号のそれぞれを抽出する第2の信号分離部と、
     前記第2の信号分離部により抽出された送信信号に同期している第2のクロック信号を生成する第2の同期信号生成部と、
     前記第2の同期信号生成部により生成された第2のクロック信号に同期して、前記第2の信号分離部により抽出されたサージ信号をアナログ信号からデジタル信号に変換し、当該デジタル信号を第2のデジタル信号として前記事故点算出部に出力する第2の変換部とを備え、
     前記事故点算出部は、前記第1の変換部から出力された第1のデジタル信号と前記第2の変換部から出力された第2のデジタル信号との位相差を検出し、前記位相差から、前記事故点を算出することを特徴とする請求項1記載の事故点標定装置。
    The first surge detection unit includes:
    A first signal separation unit that extracts each of a transmission signal and a surge signal from a signal flowing through the first point;
    A first synchronization signal generation unit that generates a first clock signal synchronized with the transmission signal extracted by the first signal separation unit;
    Synchronizing with the first clock signal generated by the first synchronizing signal generation unit, the surge signal extracted by the first signal separation unit is converted from an analog signal to a digital signal, and the digital signal is converted to a digital signal. A first conversion unit that outputs the digital signal as one digital signal to the accident point calculation unit,
    The second surge detection unit includes:
    A second signal separation unit that extracts each of a transmission signal and a surge signal from the signal flowing through the second point;
    A second synchronization signal generator that generates a second clock signal synchronized with the transmission signal extracted by the second signal separator;
    In synchronization with the second clock signal generated by the second synchronization signal generation unit, the surge signal extracted by the second signal separation unit is converted from an analog signal to a digital signal, and the digital signal is converted to a digital signal. A second conversion unit that outputs the digital signal to the accident point calculation unit as a second digital signal,
    The fault point calculation unit detects a phase difference between a first digital signal output from the first conversion unit and a second digital signal output from the second conversion unit, and calculates a phase difference from the phase difference. The accident point locating device according to claim 1, wherein the accident point is calculated.
  3.  前記第1の信号分離部は、
     前記第1の地点を流れている信号から、送信信号を抽出し、抽出した送信信号を前記第1の同期信号生成部に出力する第1のフィルタと、
     前記第1の地点を流れている信号から、サージ信号を抽出し、抽出したサージ信号を前記第1の変換部に出力する第2のフィルタとを備え、
     前記第2の信号分離部は、
     前記第2の地点を流れている信号から、送信信号を抽出し、抽出した送信信号を前記第2の同期信号生成部に出力する第3のフィルタと、
     前記第2の地点を流れている信号から、サージ信号を抽出し、抽出したサージ信号を前記第2の変換部に出力する第4のフィルタとを備えていることを特徴とする請求項2記載の事故点標定装置。
    The first signal separation unit includes:
    A first filter that extracts a transmission signal from the signal flowing through the first point and outputs the extracted transmission signal to the first synchronization signal generation unit;
    A second filter that extracts a surge signal from the signal flowing through the first point and outputs the extracted surge signal to the first conversion unit;
    The second signal separation unit includes:
    A third filter that extracts a transmission signal from the signal flowing through the second point and outputs the extracted transmission signal to the second synchronization signal generation unit;
    3. The apparatus according to claim 2, further comprising: a fourth filter configured to extract a surge signal from the signal flowing through the second point, and to output the extracted surge signal to the second converter. Accident point locator.
  4.  前記事故点算出部は、
     前記第1の変換部から出力された第1のデジタル信号の角周波数又は前記第2の変換部から出力された第2のデジタル信号の角周波数を検出し、検出した角周波数と前記位相差から前記事故点を算出することを特徴とする請求項2記載の事故点標定装置。
    The accident point calculation unit,
    Detecting an angular frequency of a first digital signal output from the first conversion unit or an angular frequency of a second digital signal output from the second conversion unit; The accident point locating device according to claim 2, wherein the accident point is calculated.
  5.  前記第1のサージ検出部は、
     前記第1の信号分離部により抽出された送信信号に同期している第1のトリガ信号を生成する第1のトリガ信号生成部をさらに備え、
     前記第2のサージ検出部は、
     前記第2の信号分離部により抽出された送信信号に同期している第2のトリガ信号を生成する第2のトリガ信号生成部をさらに備えており、
     前記第1の変換部から出力された第1のデジタル信号を第1の遅延時間だけ遅延させて、前記事故点算出部まで伝送する第1の伝送線路と、
     前記第1のトリガ信号生成部により生成された第1のトリガ信号を前記第1の遅延時間だけ遅延させて、前記事故点算出部まで伝送する第2の伝送線路と、
     前記第2の変換部から出力された第2のデジタル信号を第2の遅延時間だけ遅延させて、前記事故点算出部まで伝送する第3の伝送線路と、
     前記第2のトリガ信号生成部により生成された第2のトリガ信号を前記第2の遅延時間だけ遅延させて、前記事故点算出部まで伝送する第4の伝送線路とを備え、
     前記事故点算出部は、
     前記第1の伝送線路により伝送された第1のデジタル信号と、前記第2の伝送線路により伝送された第1のトリガ信号と、前記第3の伝送線路により伝送された第2のデジタル信号と、前記第4の伝送線路により伝送された第2のトリガ信号とから、前記事故点を算出することを特徴とする請求項2記載の事故点標定装置。
    The first surge detection unit includes:
    A first trigger signal generator that generates a first trigger signal synchronized with the transmission signal extracted by the first signal separator;
    The second surge detection unit includes:
    A second trigger signal generation unit that generates a second trigger signal synchronized with the transmission signal extracted by the second signal separation unit;
    A first transmission line that delays the first digital signal output from the first conversion unit by a first delay time and transmits the first digital signal to the fault point calculation unit;
    A second transmission line that delays the first trigger signal generated by the first trigger signal generation unit by the first delay time and transmits the signal to the fault point calculation unit;
    A third transmission line that delays the second digital signal output from the second conversion unit by a second delay time and transmits the second digital signal to the fault point calculation unit;
    A fourth transmission line that delays the second trigger signal generated by the second trigger signal generation unit by the second delay time and transmits the signal to the fault point calculation unit;
    The accident point calculation unit,
    A first digital signal transmitted by the first transmission line, a first trigger signal transmitted by the second transmission line, and a second digital signal transmitted by the third transmission line. 3. The fault point locating apparatus according to claim 2, wherein the fault point is calculated from a second trigger signal transmitted by the fourth transmission line.
  6.  前記事故点算出部は、
     前記第1の伝送線路により伝送された第1のデジタル信号の立ち上がり時刻と、前記第2の伝送線路により伝送された第1のトリガ信号の立ち上がり時刻との時刻差である第1の時刻差を算出する第1の時刻差算出部と、
     前記第3の伝送線路により伝送された第2のデジタル信号の立ち上がり時刻と、前記第4の伝送線路により伝送された第2のトリガ信号の立ち上がり時刻との時刻差である第2の時刻差を算出する第2の時刻差算出部と、
     前記第1の時刻差算出部により算出された第1の時刻差と、前記第2の時刻差算出部により算出された第2の時刻差とから、前記事故点を算出する事故点算出処理部とを備えていることを特徴とする請求項5記載の事故点標定装置。
    The accident point calculation unit,
    A first time difference which is a time difference between a rising time of a first digital signal transmitted by the first transmission line and a rising time of a first trigger signal transmitted by the second transmission line is calculated. A first time difference calculating unit for calculating,
    A second time difference which is a time difference between a rising time of a second digital signal transmitted through the third transmission line and a rising time of a second trigger signal transmitted through the fourth transmission line is calculated. A second time difference calculating unit for calculating,
    An accident point calculation processing unit that calculates the accident point from a first time difference calculated by the first time difference calculation unit and a second time difference calculated by the second time difference calculation unit The accident point locating device according to claim 5, comprising:
  7.  前記送電線は、3本の伝送線路を有しており、前記送電線により伝送される送信信号は、三相交流の信号であり、
     前記第1のサージ検出部は、
     前記第1の地点を流れている三相交流の信号を合成して第1の合成信号を生成する第1の信号合成部と、
     前記3本の伝送線路のうち、いずれか1本の伝送線路における前記第1の地点を流れている信号から、送信信号を抽出する第1のフィルタと、
     前記第1のフィルタにより抽出された送信信号に同期している第1のクロック信号を生成する第1の同期信号生成部と、
     前記第1の信号合成部により生成された第1の合成信号から、サージ信号を抽出する第2のフィルタと、
     前記第1の同期信号生成部により生成された第1のクロック信号に同期して、前記第2のフィルタにより抽出されたサージ信号をアナログ信号からデジタル信号に変換し、当該デジタル信号を第1のデジタル信号として前記事故点算出部に出力する第1の変換部とを備え、
     前記第2のサージ検出部は、
     前記第2の地点を流れている三相交流の信号を合成して第2の合成信号を生成する第2の信号合成部と、
     前記3本の伝送線路のうち、いずれか1本の伝送線路における前記第2の地点を流れている信号から、送信信号を抽出する第3のフィルタと、
     前記第3のフィルタにより抽出された送信信号に同期している第2のクロック信号を生成する第2の同期信号生成部と、
     前記第2の信号合成部により生成された第2の合成信号から、サージ信号を抽出する第4のフィルタと、
     前記第2の同期信号生成部により生成された第2のクロック信号に同期して、前記第4のフィルタにより抽出されたサージ信号をアナログ信号からデジタル信号に変換し、当該デジタル信号を第2のデジタル信号として前記事故点算出部に出力する第2の変換部とを備え、
     前記事故点算出部は、前記第1の変換部から出力された第1のデジタル信号と前記第2の変換部から出力された第2のデジタル信号との位相差を検出し、前記位相差から、前記事故点を算出することを特徴とする請求項1記載の事故点標定装置。
    The transmission line has three transmission lines, a transmission signal transmitted by the transmission line is a three-phase AC signal,
    The first surge detection unit includes:
    A first signal combining unit that combines the three-phase AC signals flowing through the first point to generate a first combined signal;
    A first filter for extracting a transmission signal from a signal flowing at the first point in any one of the three transmission lines;
    A first synchronization signal generation unit that generates a first clock signal synchronized with the transmission signal extracted by the first filter;
    A second filter for extracting a surge signal from the first combined signal generated by the first signal combining unit;
    The surge signal extracted by the second filter is converted from an analog signal to a digital signal in synchronization with a first clock signal generated by the first synchronization signal generation unit, and the digital signal is converted to a first signal. A first conversion unit that outputs a digital signal to the accident point calculation unit,
    The second surge detection unit includes:
    A second signal combining unit that combines the three-phase AC signals flowing through the second point to generate a second combined signal;
    A third filter for extracting a transmission signal from a signal flowing through the second point in any one of the three transmission lines;
    A second synchronization signal generator that generates a second clock signal synchronized with the transmission signal extracted by the third filter;
    A fourth filter for extracting a surge signal from the second combined signal generated by the second signal combining unit;
    The surge signal extracted by the fourth filter is converted from an analog signal to a digital signal in synchronization with the second clock signal generated by the second synchronization signal generation unit, and the digital signal is converted to a second signal. A second conversion unit that outputs a digital signal to the accident point calculation unit,
    The fault point calculation unit detects a phase difference between a first digital signal output from the first conversion unit and a second digital signal output from the second conversion unit, and calculates a phase difference from the phase difference. The accident point locating device according to claim 1, wherein the accident point is calculated.
  8.  前記第1の同期信号生成部は、
     前記第1のフィルタにより送信信号が抽出されなくなり、前記第1のフィルタからの送信信号の出力が途絶えると、送信信号の出力が途絶える前に生成した第1のクロック信号を前記第1の変換部に出力し、
     前記第2の同期信号生成部は、
     前記第3のフィルタにより送信信号が抽出されなくなり、前記第3のフィルタからの送信信号の出力が途絶えると、送信信号の出力が途絶える前に生成した第2のクロック信号を前記第2の変換部に出力することを特徴とする請求項7記載の事故点標定装置。
    The first synchronization signal generation unit includes:
    When the transmission signal is no longer extracted by the first filter and the output of the transmission signal from the first filter is interrupted, the first clock signal generated before the output of the transmission signal is interrupted is converted to the first converter. Output to
    The second synchronization signal generation unit includes:
    When the transmission signal is no longer extracted by the third filter and the output of the transmission signal from the third filter is interrupted, the second clock signal generated before the output of the transmission signal is interrupted is converted to the second converter. 8. The accident point locating device according to claim 7, wherein the signal is output to a vehicle.
  9.  電力を送信信号として伝送する送電線における第1の地点に一端が接続されている第1のサージ検出部が、前記送電線に損傷が生じることでサージ信号が発生したとき、前記第1の地点を流れている送信信号に同期して、前記サージ信号を検出し、
     前記送電線における前記第1の地点と異なる第2の地点に一端が接続されている第2のサージ検出部が、前記第2の地点を流れている送信信号に同期して、前記サージ信号を検出し、
     事故点算出部が、前記第1のサージ検出部により検出されたサージ信号と前記第2のサージ検出部により検出されたサージ信号とから、前記送電線の損傷位置である事故点を算出する
     事故点標定方法。
    A first surge detector, one end of which is connected to a first point in a transmission line that transmits power as a transmission signal, is configured such that when a surge signal is generated due to damage to the transmission line, the first point is detected. In synchronization with the transmission signal flowing through, the surge signal is detected,
    A second surge detector, one end of which is connected to a second point different from the first point on the transmission line, synchronizes the surge signal with a transmission signal flowing through the second point. Detect
    An accident point calculation unit calculates an accident point, which is a damaged position of the transmission line, from a surge signal detected by the first surge detection unit and a surge signal detected by the second surge detection unit. Point location method.
PCT/JP2018/031536 2018-08-27 2018-08-27 Fault point locating device and fault point locating method WO2020044398A1 (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5875419A (en) * 1981-10-29 1983-05-07 株式会社東芝 Sampling time synchronizing device
JPH09166640A (en) * 1995-12-19 1997-06-24 Hitachi Ltd Apparatus and method for locating fault point in transmission line
JP2008141866A (en) * 2006-12-01 2008-06-19 Kyushu Electric Power Co Inc Method of synchronizing time of transmission and distribution systems, and faulty point locating method and device using it
JP2013251969A (en) * 2012-05-31 2013-12-12 Toshiba Corp Protection controller

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5875419A (en) * 1981-10-29 1983-05-07 株式会社東芝 Sampling time synchronizing device
JPH09166640A (en) * 1995-12-19 1997-06-24 Hitachi Ltd Apparatus and method for locating fault point in transmission line
JP2008141866A (en) * 2006-12-01 2008-06-19 Kyushu Electric Power Co Inc Method of synchronizing time of transmission and distribution systems, and faulty point locating method and device using it
JP2013251969A (en) * 2012-05-31 2013-12-12 Toshiba Corp Protection controller

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