WO2020038459A1 - 编码方法、装置、显示装置、介质及信号传输系统 - Google Patents

编码方法、装置、显示装置、介质及信号传输系统 Download PDF

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Publication number
WO2020038459A1
WO2020038459A1 PCT/CN2019/102225 CN2019102225W WO2020038459A1 WO 2020038459 A1 WO2020038459 A1 WO 2020038459A1 CN 2019102225 W CN2019102225 W CN 2019102225W WO 2020038459 A1 WO2020038459 A1 WO 2020038459A1
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Prior art keywords
din
bit data
data
enc
bit
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PCT/CN2019/102225
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English (en)
French (fr)
Inventor
段欣
孙伟
陈明
罗信忠
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京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方显示技术有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US16/640,316 priority Critical patent/US11081044B2/en
Priority to EP19852517.2A priority patent/EP3842921A4/en
Publication of WO2020038459A1 publication Critical patent/WO2020038459A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G3/2096—Details of the interface to the display terminal specific for a flat panel
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
    • H04L25/4908—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/147—Digital output to display device ; Cooperation and interconnection of the display device with other functional units using display panels
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/1407—General aspects irrespective of display type, e.g. determination of decimal point position, display with fixed or driving decimal point, suppression of non-significant zeros
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
    • H04L25/4915—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using pattern inversion or substitution
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/08—Details of image data interface between the display device controller and the data line driver circuit
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes

Definitions

  • the present application relates to the field of panel manufacturing, and in particular, to a coding method, a device, a display device, a medium, and a signal transmission system.
  • the driving part of the LCD panel usually includes a controller (English Timing Controller), a source driver (English Source Driver) and a gate driver (English Gate Driver).
  • a controller English Timing Controller
  • a source driver English Source Driver
  • a gate driver English Gate Driver
  • the main function of the controller is to process each frame of image data. A data signal and a control signal corresponding to each frame of image data are generated. The data signal is transmitted to a source driver, and the source driver converts the received data signal into a data voltage to write to a corresponding pixel on the liquid crystal display panel.
  • the data transmission rate between the controller and the source driver in the liquid crystal display panel is getting higher and higher.
  • 8b / 10b that is, encoding 8-bit data into 10-bit data.
  • Encoding method for high-speed data transmission Specifically, the 8-bit raw data is divided into two parts, and the first 5 bits are encoded by 5b / 6b (that is, the 5-bit data is encoded into 6-bit data). The 3 bits are encoded in 3b / 4b (that is, encoding 3 bit data into 4 bit data).
  • signal transmission usually has a phase-locked loop (English: Phase Locked Loop; PLL for short) and delayed phase-locked loop (English: Delay-locked Loop; DLL for short) )
  • PLL Phase Locked Loop
  • DLL Delay-locked Loop
  • the above coding method only supports the PLL transmission method, and does not support the DLL transmission method.
  • the encoding process does not take into account the transition edges between each codeword, which is not conducive to using the DLL transmission method, because the transmission method of the DLL requires a transition edge during the transmission process, which depends on the transition Time synchronization is performed along.
  • the embodiments of the present application provide a coding method, a device, a display device, a medium, and a signal transmission system.
  • the technical solution is as follows:
  • an encoding method including:
  • the 8-bit data, the candidate 10-bit data, and the target 10-bit data are all binary data.
  • the candidate 10-bit data satisfies:
  • enc [k1] is specified bit data in the candidate 10-bit data
  • enc [k2] is data other than the specified bit data in the candidate 10-bit data
  • the din [m] Is the specified bit data in the 8-bit data
  • the F is data determined based on at least one of the other bit data in the 8-bit data
  • ⁇ indicates that an inversion operation is performed
  • ⁇ indicates that an XOR operation is performed.
  • encoding the 8-bit data corresponding to the byte to be encoded of the data to be transmitted into the alternative 10-bit data includes:
  • the 8-bit data is encoded into the candidate 10-bit data as follows:
  • enc [i] is the i + 1th bit data in the candidate 10-bit data, 9 ⁇ i ⁇ 0, and i is an integer; din [j] is the j + 1th bit in the 8-bit data Bit data, 7 ⁇ j ⁇ 0, and j is an integer; & represents execution and operation, and
  • the first bit of the candidate 10-bit data is a first value
  • the detecting whether the first bit data of the candidate 10-bit data is the same as the previous bit data adjacent to the first bit data includes:
  • the previous bit data is the first value
  • the method further includes:
  • the first identification code is preset 10-bit data, and the first identification code includes at least 6 consecutive bits of the same data
  • the first identification code is used to identify transmission content, transmission start, or transmission end, and the encoded data to be transmitted includes target 10-bit data obtained by encoding 8-bit data corresponding to the bytes to be encoded so that send.
  • the method further includes:
  • Combining the first identification code and the second identification code to obtain a combination code and the first identification code and the second identification code are both preset 10-bit data and both include the same data of at least 6 consecutive bits, The second identification code is different from the first identification code;
  • an encoding method including:
  • enc [i] is the i + 1th bit data in the 10-bit data, 9 ⁇ i ⁇ 0, and i is an integer; din [j] is the j + 1th bit data in the 8-bit data , 7 ⁇ j ⁇ 0, and j is an integer; ⁇ represents performing a negation operation, & represents performing an AND operation,
  • an encoding device including:
  • An encoder configured to encode 8-bit data corresponding to the bytes to be encoded of the data to be transmitted into candidate 10-bit data, where the data to be transmitted includes at least one byte to be encoded;
  • a detector configured to detect a previous one adjacent to the first bit of data of the candidate 10-bit data when the byte to be encoded is not the first byte of the data to be transmitted Whether the bit data are the same;
  • the encoder is further configured to:
  • the 8-bit data, the candidate 10-bit data, and the target 10-bit data are all binary data.
  • the candidate 10-bit data satisfies:
  • enc [k1] is specified bit data in the candidate 10-bit data
  • enc [k2] is data other than the specified bit data in the candidate 10-bit data
  • the din [m] Is the specified bit data in the 8-bit data
  • the F is data determined based on at least one of the other bit data in the 8-bit data
  • ⁇ indicates that an inversion operation is performed
  • ⁇ indicates that an XOR operation is performed.
  • the encoder is configured to:
  • the 8-bit data is encoded into the candidate 10-bit data as follows:
  • enc [i] is the i + 1th bit data in the candidate 10-bit data, 9 ⁇ i ⁇ 0, and i is an integer; din [j] is the j + 1th bit in the 8-bit data Bit data, 7 ⁇ j ⁇ 0, and j is an integer; & represents execution and operation, and
  • the first bit of the candidate 10-bit data is a first value
  • the detector is used for:
  • the previous bit data is the first value
  • the apparatus further includes:
  • a processor configured to add a first identification code to a preset position of the data to be transmitted after encoding to obtain target data, the first identification code is preset 10-bit data, and the first identification code includes at least continuous 6-bit identical data, the first identification code is used to identify transmission content, transmission start, or transmission end, and the encoded data to be transmitted includes an encoding obtained by encoding 8-bit data corresponding to the byte to be encoded Target 10-bit data for transmission.
  • the processor is configured to:
  • Combining the first identification code and the second identification code to obtain a combination code and the first identification code and the second identification code are both preset 10-bit data and both include the same data of at least 6 consecutive bits, The second identification code is different from the first identification code;
  • an encoding device including:
  • the encoder is configured to encode the 8-bit data corresponding to the bytes to be encoded of the data to be transmitted into the target 10-bit data in the following manner:
  • enc [i] is the i + 1th bit data in the 10-bit data, 9 ⁇ i ⁇ 0, and i is an integer; din [j] is the j + 1th bit data in the 8-bit data , 7 ⁇ j ⁇ 0, and j is an integer; ⁇ represents performing a negation operation, & represents performing an AND operation,
  • a display device including:
  • the controller and the source driving chip include a controller and a plurality of source driving chips, and the controller includes the encoding device according to any one of the third aspect and the fourth aspect.
  • the display device is a liquid crystal display device or an OLED display device
  • the controller includes at least one of a timing controller, an SOC, and an MCU.
  • an encoding device including:
  • a memory for storing executable instructions of the processor
  • the processor When the processor executes the executable instruction, the processor can implement the encoding method according to any one of the first aspects.
  • a computer-readable storage medium is provided, and when the instructions in the computer-readable storage medium are executed by a processing component, the processing component is capable of executing the encoding method according to any one of the first aspect.
  • An eighth aspect provides a signal transmission system, including:
  • the controller and the source driving chip include a controller and a plurality of source driving chips, and the controller and each of the source driving chips include the encoding device according to any one of the third aspect and the fourth aspect.
  • FIG. 1 is a schematic diagram of an application environment of an encoding method and a decoding method provided by an exemplary embodiment of the present disclosure.
  • Fig. 2 is a schematic flowchart of an encoding method according to an exemplary embodiment.
  • Fig. 3 is a schematic flowchart of another encoding method according to an exemplary embodiment.
  • Fig. 4 is a schematic diagram illustrating a relationship between a byte to be encoded and a previous byte according to an exemplary embodiment.
  • Fig. 5 is a schematic diagram illustrating a relationship between an alternative 10-bit data and a previous 10-bit data according to an exemplary embodiment.
  • Fig. 6 is a schematic diagram illustrating a relationship between another byte to be encoded and a previous byte according to an exemplary embodiment.
  • Fig. 7 is a schematic diagram illustrating a relationship between an alternative 10-bit data and a previous 10-bit data according to an exemplary embodiment.
  • Fig. 8 is a schematic flowchart illustrating a process of adding a first identification code before encoding data to be transmitted to obtain target data according to an exemplary embodiment.
  • Fig. 9 is a schematic flowchart of a decoding method according to an exemplary embodiment.
  • Fig. 10 is a schematic diagram illustrating a 9b / 8b decoding manner according to an exemplary embodiment.
  • Fig. 11 is a schematic flowchart of another encoding method according to an exemplary embodiment.
  • Fig. 12 is a schematic flowchart of another decoding method according to an exemplary embodiment.
  • Fig. 13 is a schematic structural diagram of an encoding device according to an exemplary embodiment.
  • Fig. 14 is a schematic structural diagram of another encoding device according to an exemplary embodiment.
  • Fig. 15 is a schematic structural diagram of a display device according to an exemplary embodiment.
  • FIG. 1 is a schematic diagram of an application environment of an encoding method according to an exemplary embodiment of the present disclosure.
  • the encoding method is applied to a display device, which includes a controller 01 and multiple controllers.
  • Source driver chips 02, a plurality of first signal lines H of the controller 01 and a plurality of source driver chips 02 are connected in a one-to-one correspondence, the controller is also connected with a second signal line L, and a plurality of source driver chips 02 is connected in parallel and is connected to the second signal line L.
  • the signal transmission rate of the first signal line is lower than that of the second signal line.
  • the first signal line can be called a low-speed signal line, which is usually used to indicate the level status
  • the second signal line can be called a high-speed signal line, which is usually used to transmit high-speed signals.
  • the controller 01 may be any of a timing controller, a system chip (English: System; Chip: SOC for short), and a micro-control unit (English: Microcontroller Unit; MCU) integrated in the timing controller.
  • FIG. 1 is only a schematic illustration, and the connection relationship between the controller and the source driving chip in FIG. 1 is only a schematic illustration. Actually, The connection relationship between the two only needs to ensure effective data transmission between the two.
  • a new 8b / 10b (that is, 8-bit data is encoded into 10-bit data) encoding method is provided, in which 8-bit data before encoding and target 10-bit data obtained after encoding All are binary data.
  • the data transmitted between the controller 01 and the source driver chip 02 can be encoded using this encoding method.
  • the data transmitted between the controller 01 and the source driver chip 02 can be transmitted in the first signal line.
  • the data may also be data transmitted in the second signal line.
  • an embodiment of the present disclosure provides a schematic flowchart of an encoding method, which can be applied to the environment shown in FIG. 1.
  • the method includes:
  • Step 201 Encode 8-bit data corresponding to a byte to be encoded of data to be transmitted into candidate 10-bit data, where the data to be transmitted includes at least one byte to be encoded.
  • Step 202 When the byte to be encoded is not the first byte of the data to be transmitted, it is detected whether the first bit data of the candidate 10-bit data is the same as the previous bit data adjacent to the first bit data.
  • Step 203 When the value of the first bit of data is the same as the value of the previous bit, the candidate 10-bit data is inverted to obtain the target 10-bit data.
  • Step 204 When the value of the first bit data is different from the value of the previous bit data, determine the candidate 10-bit data as the target 10-bit data.
  • Each of the above data is binary data.
  • the traditional 8b / 10b encoding algorithm can at least ensure that at least one of any consecutive 6 bits in the 10-bit data obtained by encoding is different from other bits.
  • the embodiment of the present disclosure provides a schematic flowchart of another encoding method, which can be applied to the environment shown in FIG. 1.
  • the method includes:
  • enc [i] is the i + 1th bit data in 10-bit data, 9 ⁇ i ⁇ 0, and i is an integer; din [j] is the j + 1th bit data in 8-bit data, 7 ⁇ j ⁇ 0, and j is an integer; ⁇ means perform negation, & means perform and operation,
  • 8-bit data is encoded into target 10-bit data by using the foregoing method. At least one of any consecutive 5 bits of the obtained target 10-bit data is different from other bits, compared with traditional encoding.
  • the method can reduce the number of continuous and identical data in each 10-bit data (that is, each byte after encoding), and can ensure that the encoded data has better jitter performance in the subsequent transmission process, thereby reducing transmission errors. The probability.
  • An embodiment of the present disclosure provides a coding method. As shown in FIG. 3, the method can be applied to the environment shown in FIG. 1. The method includes:
  • Step 301 Encode 8-bit data corresponding to the bytes to be encoded of the data to be transmitted into candidate 10-bit data. Perform step 302 or step 305.
  • the data to be transmitted Before data transmission, the data to be transmitted needs to be encoded.
  • the data to be transmitted includes at least one byte to be encoded, and each byte to be encoded is 8-bit data.
  • the bits of the data are arranged in order from low to high. For example, the order of the data 10000010 is from right to left, that is, the first One bit of data is 0, the last bit is 1, "1000" is its upper 4 bits, and "0010" is its lower four bits.
  • the encoding basis of each bit of data in the candidate 10-bit data includes the same bit data din [m] in the 8-bit data, where the din [m] is a specified bit data in the 8-bit data, 7 ⁇ m ⁇ 0, so that each bit of data in the candidate 10-bit data is associated with the same bit of data din [m].
  • a designated bit data may be set, and the designated bit data is associated with the same bit data din [m].
  • the designated bit data can reflect the candidate 10 bits
  • the state of the data for example, reflects whether the candidate 10-bit data has subsequently undergone an inversion operation. Then, the decoding end may perform corresponding processing based on the value of the specified bit data.
  • the candidate 10-bit data satisfies:
  • enc [k1] is the specified bit data in the alternative 10-bit data
  • the specified bit data is the k1 + 1th bit data
  • enc [k2] is the data other than the specified bit data in the alternative 10-bit data, That is, data other than the k1 + 1th bit data
  • F is data determined based on at least one of the other bit data in the 8-bit data
  • ⁇ indicates a negation operation
  • ⁇ indicates an exclusive OR operation.
  • the negation operation means: negation of binary bits. For example, 1 is negated to 0, and 0 is negated to 1.
  • dout [k1] is the designated bit data in the target 10-bit data obtained by inverting the designated bit data dout [k1] in the alternative 10-bit data, and the designated bit data is the k1 + 1th bit data, and ] The data in the target 10-bit data obtained by reversing the data other than the specified bit data in the alternative 10-bit data.
  • the process of encoding the 8-bit data corresponding to the bytes to be encoded into alternative 10-bit data includes:
  • enc [i] is the i + 1th bit data in the alternative 10-bit data, 9 ⁇ i ⁇ 0, and i is an integer; din [j] is the j + 1th bit data in the 8-bit data, 7 ⁇ j ⁇ 0, and j is an integer; ⁇ means perform negation, & means perform and operation,
  • the rule is that as long as there is one before and after, it is true, where true is 1, false is 0, then 1
  • 1 1, 1
  • 0 1, 0
  • 1 1, 0
  • 0 0.
  • an alternative 10-bit data can be encoded: 1110011101 Among them, in the alternative 10-bit data:
  • the second bit of data enc [1] ⁇ din [3] ⁇ (( ⁇ din [2] & din [1])
  • ( ⁇ din [2 ] & ⁇ Din [0])) 0;
  • the third bit of data enc [2] ⁇ din [3] ⁇ ((din [2] & ⁇ din [1])
  • ( ⁇ din [ 1] & din [0])) 1;
  • the sixth bit of data enc [5] ⁇ din [3] ⁇ (( ⁇ din [2] & ⁇ din [1] & ⁇ din [4])
  • ( din [1] & ⁇ din [0])) 0;
  • the candidate 10-bit data will not have 6 consecutive 0s, or continuous 6 of 1.
  • Step 302 When the byte to be encoded is not the first byte of the data to be transmitted, it is detected whether the first bit data of the candidate 10-bit data is the same as the previous bit data adjacent to the first bit data.
  • the encoding method may be different for the case where the byte to be encoded is the first byte and not the first byte, so when encoding, you can first check whether the byte to be encoded is The first byte of the data to be transmitted, if not, because the data is sequentially encoded, it means that at least one byte has been encoded before the byte to be encoded, that is, the 8b / 10b encoding has been completed Byte, a byte that has completed 8b / 10b encoding is actually converting the original 8-bit data into 10-bit data. Therefore, a byte that has been encoded corresponds to 10-bit data. For the candidate 10-bit data to be encoded, the first bit of the candidate 10-bit data and the previous bit adjacent to the first bit of data (that is, the last bit of the first 10-bit data) can be detected. To compare them.
  • the first bit data of the candidate 10-bit data may be set to be fixed The first value of the first value, so that you can determine whether the first bit of the alternative 10-bit data is adjacent to the first bit of the data by judging whether the first bit of data adjacent to the first bit of data is equal to the first value. Whether the data is the same.
  • step 302 includes:
  • the bit data is different.
  • the first value may also be set to 0, as long as the encoded data can be decoded by the decoding end, which is not limited in this embodiment of the present disclosure.
  • step 303 may be performed. If the first bit data is different from the previous bit data, step 304 may be performed.
  • Step 303 When the value of the first bit of data is the same as the value of the previous bit, the candidate 10-bit data is inverted to obtain the target 10-bit data. Go to step 306.
  • FIG. 4 uses two adjacent bytes of data to be transmitted as an example, where the first to eighth bits of data to be encoded are respectively din [0] -din [7]. Are: 0, 0, 0, 0, 0, 0, 0, and 0.
  • the first to eighth bits of data in the previous byte of the byte to be encoded are din [0] -din [7]: 0, 0, 0, 0, 0, 0, 0, and 0, respectively.
  • the first to tenth bits of the alternative 10-bit data obtained by encoding the two bytes are enc [0] -enc [9]: 1, 0, 1, 1, respectively. 1, 0, 0, 1, 1, and 1.
  • the 10-bit data corresponding to the previous byte of the candidate 10-bit data that is, the first to the tenth data of the previous target 10-bit data (the encoded 10-bit data) to the tenth data enc [0] -enc [ 9] are: 1, 0, 1, 1, 1, 0, 0, 1, 1, and 1. Since the first bit of the candidate 10-bit data is 1, the previous bit is also 1. The two are the same. Invert the candidate 10-bit data to obtain the target 10-bit data.
  • the target 10-bit data is dout [ 0] -dout [9] are: 0, 1, 0, 0, 0, 1, 1, 0, 0, and 0, respectively.
  • Step 304 When the value of the first bit data is different from the value of the previous bit data, determine the candidate 10-bit data as the target 10-bit data. Go to step 306.
  • FIG. 6 uses two adjacent bytes of data to be transmitted as an example, where the first to eighth bits of data to be encoded are din [0] -din [7], respectively. Are: 1, 1, 1, 1, 1, 1, 1 and 1.
  • the first to eighth bits of data din [0] -din [7] of the previous byte of the byte to be encoded are: 1, 1, 1, 1, 1, 1, and 1, respectively.
  • the first to tenth bits of the alternative 10-bit data obtained by encoding the two bytes are enc [0] -enc [9], which are respectively: 1, 0, 0, 1, 1, 0, 1, 1, 1, and 0.
  • the 10-bit data corresponding to the previous byte of the candidate 10-bit data that is, the first to the tenth data of the previous target 10-bit data (the encoded 10-bit data) to the tenth data enc [0] -enc [ 9] are: 1, 0, 0, 1, 1, 0, 1, 1, 1, 1, and 0. Since the first bit of the candidate 10-bit data is 1, and the previous bit is also 0, the two are different.
  • the alternative 10-bit data enc [0] -enc [9] can be directly used as the target 10-bit data dout [0] -dout [9].
  • the above steps 302 to 304 can ensure that there is a transition edge between every two adjacent coded bytes (that is, every two 10-bit data), so that the receiving end can clearly distinguish between every two adjacent coded bytes. Bytes for accurate decoding.
  • Step 305 When the byte to be encoded is the first byte of the data to be transmitted, assuming that the first bit of the first bit of the 9-bit data is 0, perform step 303 or step 304 on the candidate 10-bit data. Process to get the target 10-bit data. Go to step 306.
  • the byte to be encoded is the first byte of the data to be transmitted, the data preceding the first bit of the candidate 10-bit data does not exist.
  • An embodiment of the present disclosure It is only assumed that the previous bit data is 0. In other embodiments, it may also be assumed that the previous bit data of the first bit data is 1, and then other processes may refer to the above steps 302 to 304.
  • the alternative 10-bit data can be processed in other ways to obtain the target 10-bit data, as long as the receiving end can effectively decode it.
  • the byte to be encoded is the first byte of the data to be transmitted, that is, there is no previous bit data before the first bit data, it can be assumed that the first bit data and the previous bit data of the alternative 10 bit data There is a transition edge, and the candidate 10-bit data is directly used as the target 10-bit data.
  • the candidate 10-bit data is directly used as the target 10-bit data.
  • the byte to be encoded is the first byte of the data to be transmitted
  • the first bit of the alternative 10-bit data does not have a transition edge with the previous bit of data
  • the alternative 10 bits The data is inverted to get the target 10-bit data.
  • the byte to be encoded is the first byte of the data to be transmitted, it can also be assumed that the previous bit of the first bit of data is 1, and then the above steps 302 to 304 are performed. Examples do not limit this.
  • Step 306 Add the first identification code to the preset position of the encoded data to be transmitted to obtain the target data.
  • the encoded data to be transmitted includes target 10-bit data obtained by encoding 8-bit data corresponding to the bytes to be encoded.
  • the sending end in order to ensure that the receiving end receives data in units of 10 bits, the sending end also needs to send data in units of 10 bits, so the first identification code needs to be 10-bit data, and it can For the preset data, it can be used for identification.
  • the 8b / 10b encoding algorithm provided in steps 301 to 306 can ensure that at least one of any consecutive 5 bits of 10-bit data is different from other bits. Therefore, the first identification code may include at least 6 consecutive bits of the same data to distinguish it from the normal transmitted 10-bit data. For example, the identification bit may include 6 consecutive 0s or 6 consecutive 1s. The first identification code Used to identify transmission content, transmission start, or end of transmission.
  • the first identification code may be K, and its specific code value may refer to Table 1.
  • 0b means binary
  • each identification code in K1 to K4 corresponds to two kinds of representation methods.
  • the first digit of data (note: here refers to the lower right first digit) is determined based on the previous digit. , To ensure that it forms a flip edge with the previous bit of data. For example, when the first bit of the first bit of data in the K1 code is 0, the K1 code with the first bit of data is 1, that is, 1000000101. The first digit of the first digit is 1, so the K1 code with the first digit of 0 is 0111111010, which can ensure the effective identification of the first identification code.
  • K1 is used to indicate the start of transmission
  • K2 is used to indicate the end of transmission
  • K3 is used to indicate the end position of the line signal
  • K4 is used to indicate the end of the transmission.
  • the first identification code when used to indicate the start of transmission, the first identification code may be added directly before the data to be transmitted, or may be added in the form of a combination code before the data to be transmitted.
  • the process of adding the first identification code before the encoded data to be transmitted to obtain the target data may include:
  • Step 3061 Combine the first identification code and the second identification code to obtain a combination code.
  • the second identification code is preset 10-bit data.
  • the second identification code includes at least 6 consecutive bits of the same data.
  • the second identification code is the same as the first The identification code is different.
  • the combination code may include at least one first identification code and at least one second identification code.
  • the values of the first identification code in different positions in the same combination code may be different, for example, the first An identification code includes different K1s in Table 1.
  • the value of the second identification code in different positions may be different.
  • the sending end and the receiving end can agree on the arrangement of the combination code in advance, and use the combination code table to record.
  • the receiving end may recover the correct combination code by querying the combination code table.
  • the first identification code is K1 and the second identification code is G1.
  • the combination code can be K1G1G1K1.
  • the receiving end can recover K1G1G1K1 according to the G1 lookup table.
  • the second identification code may be recorded as G, and the G may have four forms of G1, G2, G3, and G4.
  • G1, G2, G3, and G4 For specific code values, refer to Table 2, where 0b represents binary.
  • the combination code table may refer to Table 3.
  • the received combination code is 0111111010, 1010101000, 1000000101, and 1111111111 which are arranged in sequence.
  • the combination code table shown in Table 3 you can find that the first three 10-bit data of the combination code are the same as those in Table 3.
  • the first three 10-bit data in the first line of the combination code are the same, so it can be determined that the correct combination code is 0111111010, 1010101000, 1000000101, and 0101010111 arranged in sequence, and the first extractable identification code is K1.
  • Step 3062 adding a combination code to a preset position of the encoded data to be transmitted to obtain target data.
  • the preset position is determined according to the content indicated by the first identification code. For example, when the first identification code indicates the start of transmission, the preset position is the position before the data to be transmitted, that is, Before the first bit of the first group of 10-bit data; when the first identification code indicates the end of the transmission, the preset position is the position after the data to be transmitted, that is, the end of the last group of 10-bit data to be transmitted After the bit data; when the first identification code is used to identify the transmission content, the preset position may be between the specified two groups of 10-bit data to be transmitted.
  • step 307 Send the target data.
  • the receiving end of the data when the transmitting end of the data is a controller, the receiving end of the data may be a source driving chip, and when the transmitting end of the data is a source driving chip, the receiving end of the data may be a controller.
  • the controller may send the target data to a corresponding source driving chip through a first signal line (such as a high-speed differential signal line) or a second signal line, which is not limited in the embodiment of the present disclosure.
  • the encoded data to be transmitted may be sent to the decoding end. Steps 306 and 307 are only to process the encoded data to be transmitted to obtain the target data, and then transmit the data to The decoder is used as an example for a schematic description. In actual implementation, the encoded data to be transmitted may be further processed or not processed, which is not limited in the embodiment of the present disclosure.
  • 8-bit data is first encoded into candidate 10-bit data, and then based on the tenth bit of the candidate 10-bit data, whether to determine the candidate 10-bit data is determined.
  • Perform a negation operation to obtain the final target 10-bit data, so that a transition edge is set between every two adjacent 10-bit data, and based on the tenth bit data, it can be determined whether the target 10-bit data is negated.
  • the data obtained from the operation can effectively ensure that the data to be transmitted can be correctly restored at the receiving end, and the transition edge can effectively reduce transmission errors.
  • PLL in the current field of timing control, there are usually two methods of signal transmission: PLL and DLL.
  • PLL is more common.
  • DLL requires transition edges in the transmission process.
  • the above coding method can guarantee two phases before and after.
  • the 8b / 10b encoding algorithm provided in step 301 can guarantee that at least one of any consecutive 5 bits of 10-bit data is different from other bits. Different, compared with the traditional encoding method, it can reduce the number of continuous and identical data in every 10-bit data (that is, each byte after encoding), which can ensure that the encoded data has a relatively large amount in the subsequent transmission process. Good jitter performance, which reduces the probability of transmission errors.
  • step 301 Because whether the 10-bit data to be decoded is inverted at the decoding end, the relationship between the data of the finally obtained 10-bit data remains unchanged. Therefore, in order to adapt to the related technology, Decoding method.
  • the embodiment of the present disclosure assumes that the specified bit data in the 10-bit data to be decoded is an indication bit for indicating whether to invert, and provides a decoding method.
  • the decoding method and the method provided in FIG. 3 in the embodiment of the present disclosure are provided.
  • the encoding method corresponds. As shown in FIG. 9, the method can be applied to the environment shown in FIG. 1. Assuming that the specified bit data is the tenth bit data, the method includes:
  • Step 401 Receive target data.
  • the target data includes at least one set of 10-bit data, and the 10-bit data is binary data.
  • the target data generally includes at least two sets of 10-bit data, where a first identification code may be included, and the first identification code may identify transmission content, transmission start, or end of transmission, so as to better identify data to be decoded. .
  • the receiving end of the data when the sending end of the data is a controller, the receiving end of the data may be a source driving chip, and when the sending end of the data is a source driving chip, the receiving end of the data is a controller.
  • the source driving chip may send the target data to a corresponding controller through a first signal line (such as a high-speed differential signal line) or a second signal line, which is not limited in the embodiment of the present disclosure. .
  • Step 402 When it is detected that the target data includes a combination code, determine a first identification code according to the combination code, and determine data to be decoded according to the first identification code.
  • the combination code is obtained by splicing the first identification code and the second identification code
  • the first identification code is preset 10-bit data
  • the first identification code includes at least 6 consecutive bits of the same data.
  • the second identification code is also preset 10-bit data.
  • the second identification code also includes at least 6 consecutive bits of the same data.
  • the second identification code is different from the first identification code.
  • the combination code may include at least one first identification code and at least one second identification code.
  • the values of the first identification code at different positions in the same combination code may be different.
  • the first identification code in the combination code includes Table 1
  • the value of the second identification code in different locations may be different.
  • the sending end and the receiving end may pre-arrange the combination code arrangement method, and record the combination code table.
  • the receiving end may recover the correct combination code by querying the combination code table.
  • the receiving end may determine the first identification code according to the combination code, and then determine the data to be decoded according to the first identification code. Specifically, the receiving end can query the combination code table according to the combination code. When at least one identification code in the combination code can be queried in the combination code table, it means that at least one identification code in the combination code is transmitted correctly by looking up the table. The correct combination code can be recovered, and then the first identification code is extracted from the preset position of the combination code to determine the data to be decoded.
  • any identification code in the combination code cannot be queried in the combination code table, it indicates that the combination code is incorrect, and the corresponding data to be decoded is also transmitted incorrectly, and the subsequent processing of the decoded data may not be performed.
  • the position of the first identification code in the target data is determined according to the specific first identification code, and then the data to be decoded is determined according to the first identification code and its position. .
  • the first identification code is carried in the form of a combination code, which can improve the decoding accuracy of the first identification code.
  • Step 403 When it is detected that the target data includes a first identification code, determine the data to be decoded according to the first identification code.
  • the data to be decoded includes at least one set of 10-bit data to be decoded, the first identification code is preset 10-bit data, and the first identification code includes at least 6 consecutive bits of the same data.
  • the position of the first identification code in the target data can be determined according to the specific first identification code, and then to be decoded according to the first identification code and its position data. Reference may be made to related content in step 402 here.
  • Step 404 Detect the tenth-bit data of the 10-bit data to be decoded, where the tenth-bit data is used to indicate whether the first 9-bit data in the 10-bit data to be decoded has undergone a negation operation.
  • the tenth bit of the 10-bit data to be decoded is the first value
  • it indicates that the target 10-bit data is the 10-bit data to be decoded and determined through an inversion operation, that is, it can be considered that The first 9 bits of the 10-bit data to be decoded are inverted.
  • the tenth bit of the 10-bit data to be decoded is not the first value, it indicates that the target 10-bit data is not the 10-bit data to be decoded.
  • the operation is determined, that is, it can be considered that the first 9 bits of the 10-bit data to be decoded have not been inverted.
  • Step 405 When the tenth-bit data indicates that the first 9-bit data undergoes an inversion operation, the first 9-bit data is inverted to obtain pre-decoded 9-bit data.
  • the 9-bit data when the tenth bit data is 1, the 9-bit data may be instructed to undergo a negation operation, and when the tenth bit data is 0, it may be indicated that the 9-bit data is not subject to a negation operation.
  • the 10-bit data to be decoded is 1110011101, and its tenth bit is 1, indicating that the first 9-bit data: 110011101 is inverted, and then the 9-bit data: 110011101 is inverted to obtain pre-decoded 9-bit data: 001100010.
  • Step 406 When the tenth-bit data indicates that the first 9-bit data has not undergone an inversion operation, use the first 9-bit data as the pre-decoded 9-bit data.
  • the 9-bit data when the tenth bit data is 1, the 9-bit data may be instructed to undergo a negation operation, and when the tenth bit data is 0, it may be indicated that the 9-bit data is not subject to a negation operation.
  • the 10-bit data to be decoded is 0001100010, and its tenth bit is 0, indicating that the first 9-bit data: 001100010 has not been inverted, and the first 9-bit data: 001100010 is used as the pre-decoded 9-bit data: 001100010.
  • Step 407 Decode the pre-decoded 9-bit data into 8-bit data.
  • Decoding the pre-decoded 9-bit data into 8-bit data includes decoding the pre-decoded 9-bit data into 8-bit data as follows:
  • Dout [2] (d_code [6] ⁇ d_code [5]) & ⁇ ( ⁇ d_code [2] & d_code [1]);
  • d_code [i] is the i + 1th bit data in 9-bit data, 8 ⁇ i ⁇ 0, and i is an integer
  • Dout [j] is the j + 1th bit data in 8-bit data, 7 ⁇ j ⁇ 0, and j is an integer
  • negation operation, the AND operation, the OR operation, and the XOR operation reference may be made to the foregoing description about step 301.
  • the pre-decoded 9-bit data is: 001100010
  • the first to ninth data is 0, 0, 1, 1, 0, 0, 0, 1, 0,
  • 8-bit data can be decoded: 00000000, where the 8-bit data:
  • the sequence of the steps of the decoding method provided by the embodiments of the present disclosure can be appropriately adjusted, and the steps can be increased or decreased accordingly.
  • the above steps 404 to 406 may not be performed, and the steps may be directly performed after step 403.
  • the first 9-bit data is used as the pre-decoded 9-bit data.
  • the foregoing decoding method is described by using the tenth bit data as the specified bit data as an example.
  • the specified bit data may also be other bit data.
  • the corresponding decoding method may be simply changed with reference to the foregoing embodiments. Embodiments of the present disclosure I will not repeat them here.
  • An embodiment of the present disclosure provides a coding method. As shown in FIG. 11, the method can be applied to the environment shown in FIG. 1. The method includes:
  • Step 501 Encode 8-bit data corresponding to the byte to be encoded of the data to be transmitted into target 10-bit data, and the data to be transmitted includes at least one byte to be encoded.
  • step 501 For the encoding process of step 501, reference may be made to the process of encoding the 8-bit data corresponding to the to-be-encoded bytes of the data to be transmitted into the alternative 10-bit data in step 301, which is not repeatedly described in this embodiment of the present disclosure.
  • Step 502 Add a first identification code to a preset position of the encoded data to be transmitted to obtain target data.
  • step 502 reference may be made to the above step 306.
  • Step 503 Send the target data.
  • step 503 reference may be made to step 307.
  • the encoded data to be transmitted may be sent to the decoding end.
  • Steps 502 and 503 are only to process the encoded data to be transmitted to obtain target data, and then transmit the data to
  • the decoder is used as an example for a schematic description.
  • the encoded data to be transmitted may be further processed or not processed, which is not limited in the embodiment of the present disclosure.
  • 8-bit data is encoded into target 10-bit data by using the foregoing method. At least one of any consecutive 5 bits of the obtained target 10-bit data is different from other bits, compared with traditional encoding.
  • the method can reduce the number of continuous and identical data in each 10-bit data (that is, each byte after encoding), and can ensure that the encoded data has better jitter performance in the subsequent transmission process, thereby reducing transmission errors. The probability.
  • the embodiment of the present disclosure provides a decoding method.
  • the decoding method corresponds to the encoding method provided in FIG. 11 in the embodiment of the present disclosure. As shown in FIG. 12, the method can be applied to the environment shown in FIG. 1. Methods include:
  • Step 601 Receive target data.
  • Step 601 may refer to the above step 401.
  • Step 602 When it is detected that the target data includes a combination code, determine a first identification code according to the combination code, and determine data to be decoded according to the first identification code.
  • step 602 reference may be made to the above step 402.
  • Step 603 When it is detected that the target data includes a first identification code, determine the data to be decoded according to the first identification code.
  • step 603 reference may be made to the foregoing step 403.
  • Step 604 Decode the 10-bit data to be decoded into 8-bit data.
  • the actions of 404 to 406 are not required to be performed at the decoding end, and the tenth bit of the 10-bit data to be decoded may be deleted at the decoding end.
  • the decoding end may also adopt other decoding methods, for example, the decoding process of the decoding end directly adopts the inverse process of the above step 501, which is not described in this embodiment of the present disclosure.
  • the decoding method provided by the embodiment of the present disclosure can effectively realize the decoding of the foregoing encoded data.
  • An embodiment of the present disclosure provides an encoding device. As shown in FIG. 13, the device includes:
  • An encoder 701 configured to encode 8-bit data corresponding to bytes to be encoded of data to be transmitted into candidate 10-bit data, where the data to be transmitted includes at least one byte to be encoded;
  • a detector 702 configured to detect when a first bit of the candidate 10-bit data is adjacent to the first bit of data when the byte to be encoded is not the first byte of the data to be transmitted Whether one bit of data is the same;
  • the encoder 701 is further configured to:
  • the above data is binary data.
  • the encoder when data is encoded, the encoder first encodes 8-bit data into candidate 10-bit data, and then sets a transition edge between every two adjacent 10-bit data, and the transition Edges can effectively reduce transmission errors. And the above coding method meets the requirements of PLL and DLL, so that the receiving end can support the signal transmission method of PLL and DLL at the same time.
  • the candidate 10-bit data satisfies:
  • enc [k1] is specified bit data in the candidate 10-bit data
  • enc [k2] is data other than the specified bit data in the candidate 10-bit data
  • the din [m] Is the specified bit data in the 8-bit data
  • the F is data determined based on at least one of the other bit data in the 8-bit data
  • ⁇ indicates that an inversion operation is performed
  • ⁇ indicates that an XOR operation is performed.
  • the encoder 701 is configured to:
  • the 8-bit data is encoded into the candidate 10-bit data as follows:
  • enc [i] is the i + 1th bit data in the candidate 10-bit data, 9 ⁇ i ⁇ 0, and i is an integer; din [j] is the j + 1th bit in the 8-bit data Bit data, 7 ⁇ j ⁇ 0, and j is an integer; & represents execution and operation, and
  • the first bit of the candidate 10-bit data is a first value
  • the detector 702 is configured to:
  • the previous bit data is the first value
  • the encoding device further includes:
  • a processor 703 configured to add a first identification code to a preset position of the data to be transmitted after encoding to obtain target data, where the first identification code is preset 10-bit data, and the first identification code includes at least 6 consecutive bits of the same data, the first identification code is used to identify transmission content, transmission start or transmission end, and the encoded data to be transmitted includes encoding obtained by encoding 8-bit data corresponding to the bytes to be encoded Target 10-bit data;
  • a sending module 704 is configured to send the target data.
  • the processor 703 is configured to:
  • the second identification code is also preset 10-bit data, and the second identification code also includes at least 6 consecutive bits of the same data, the The second identification code is different from the first identification code;
  • the encoding device when data is encoded, firstly encode 8-bit data into candidate 10-bit data, and then determine whether to select the alternative 10-bit data based on the tenth bit of the candidate 10-bit data. Perform a negation operation to obtain the final target 10-bit data, so that a transition edge is set between every two adjacent 10-bit data, and based on the tenth bit data, it can be determined whether the target 10-bit data is negated.
  • the data obtained from the operation can effectively ensure that the data to be transmitted can be correctly restored at the receiving end, and the transition edge can effectively reduce transmission errors.
  • PLL in the current field of timing control, there are usually two methods of signal transmission: PLL and DLL.
  • PLL is more common.
  • DLL requires transition edges in the transmission process.
  • the above coding method can guarantee two phases before and after.
  • the 8b / 10b encoding algorithm provided in step 301 can guarantee that at least one of any consecutive 5 bits of 10-bit data is different from other bits. Different, compared with the traditional encoding method, it can reduce the number of continuous and identical data in every 10-bit data (that is, each byte after encoding), which can ensure that the encoded data has a relatively large amount in the subsequent transmission process. Good jitter performance, which reduces the probability of transmission errors.
  • An embodiment of the present disclosure provides an encoding device, including:
  • the encoder is configured to encode the 8-bit data corresponding to the bytes to be encoded of the data to be transmitted into the target 10-bit data in the following manner:
  • enc [i] is the i + 1th bit data in the 10-bit data, 9 ⁇ i ⁇ 0, and i is an integer; din [j] is the j + 1th bit data in the 8-bit data , 7 ⁇ j ⁇ 0, and j is an integer; ⁇ represents performing a negation operation, & represents performing an AND operation,
  • the encoding device encodes 8-bit data into target 10-bit data by using the foregoing method. At least one of any consecutive 5 bits of the obtained target 10-bit data is different from other bits, compared with the conventional encoding.
  • the method can reduce the number of continuous and identical data in each 10-bit data (that is, each byte after encoding), and can ensure that the encoded data has better jitter performance in the subsequent transmission process, thereby reducing transmission errors. The probability.
  • An embodiment of the present disclosure provides a display device, including:
  • the controller and the source driving chip include a controller and a plurality of source driving chips.
  • the controller may include an encoding device.
  • the encoding device may be the encoding device shown in FIG. 12 or FIG. 13.
  • the source driving chip may include a decoding device.
  • the decoding device may execute a decoding method provided by the foregoing embodiment of the present disclosure. .
  • the controller may include a decoding device, the decoding device may execute the decoding method provided by the foregoing embodiment of the present disclosure, and the source driving chip may include an encoding device, and the encoding device may be the one shown in FIG. 12 or FIG. 13. Coding device.
  • the controller and the source driving chip can both encode data.
  • the controller and each of the source driving chips Each includes an encoding device provided by an embodiment of the present disclosure.
  • the display device is a liquid crystal display device or an organic light emitting diode (English: Organic Light-Emitting Diode; OLED for short) display device, and the controller is at least one of a timing controller, an SOC, and an MCU.
  • the display device may also be any product or component having a display function, such as electronic paper, a panel, a mobile phone, a tablet computer, a television, a notebook computer, a digital photo frame, a navigator, and the like.
  • An embodiment of the present disclosure provides an encoding device, including:
  • a memory for storing executable instructions of the processor
  • the processor when the processor executes the executable instructions, the processor can implement the encoding method provided by the embodiment of the present disclosure.
  • An embodiment of the present disclosure provides a computer-readable storage medium, and when an instruction in the computer-readable storage medium is executed by a processing component, the processing component can execute an encoding method provided by an embodiment of the present disclosure.
  • a disclosed embodiment provides a signal transmission system including a controller and a source driving chip, including a controller and a plurality of source driving chips, and the controller and each of the source driving chips include a third aspect and The encoding device according to any one of the fourth aspects.
  • FIG. 15 is a structural block diagram of a display device 1000 according to an exemplary embodiment of the present disclosure.
  • the device 1000 may be any product or component having a display function, such as a liquid crystal panel, an electronic paper, an OLED panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.
  • the display device includes a controller and a plurality of source driving chips.
  • the controller is at least one of a timing controller, an SOC, and an MCU.
  • the device 1000 further includes a processor 1001 and a memory 1002.
  • the processor 1001 may include one or more processing cores, such as a 4-core processor, an 8-core processor, and the like.
  • the processor 1001 may use at least one hardware form among DSP (Digital Signal Processing, Digital Signal Processing), FPGA (Field-Programmable Gate Array, Field Programmable Gate Array), and PLA (Programmable Logic Array). achieve.
  • the processor 1001 may also include a main processor and a co-processor.
  • the main processor is a processor for processing data in the awake state, also referred to as a CPU (Central Processing Unit).
  • the co-processor is Low-power processor for processing data in standby.
  • the processor 1001 may be integrated with a GPU (Graphics Processing Unit), and the GPU is responsible for rendering and drawing content required to be displayed on the display screen.
  • the processor 1001 may further include an AI (Artificial Intelligence) processor, and the AI processor is configured to process computing operations related to machine learning.
  • AI Artificial Intelligence
  • the memory 1002 may include one or more computer-readable storage media, which may be non-transitory.
  • the memory 1002 may further include a high-speed random access memory, and a non-volatile memory, such as one or more disk storage devices, flash storage devices.
  • the non-transitory computer-readable storage medium in the memory 1002 is used to store at least one instruction, and the at least one instruction is used to be executed by the processor 1001 to implement data transmission provided by the method embodiment in this application. method.
  • the apparatus 1000 may further include a peripheral device interface 1003 and at least one peripheral device.
  • the processor 1001, the memory 1002, and the peripheral device interface 1003 may be connected through a bus or a signal line.
  • Each peripheral device can be connected to the peripheral device interface 1003 through a bus, a signal line, or a circuit board.
  • the peripheral device includes at least one of a radio frequency circuit 1004, a display screen 1005, a camera 1006, an audio circuit 1007, a positioning component 1008, and a power supply 1009.
  • the peripheral device interface 1003 may be used to connect at least one peripheral device related to I / O (Input / Output) to the processor 1001 and the memory 1002.
  • the processor 1001, the memory 1002, and the peripheral device interface 1003 are integrated on the same chip or circuit board; in some other embodiments, any one of the processor 1001, the memory 1002, and the peripheral device interface 1003 or Two can be implemented on separate chips or circuit boards, which is not limited in this embodiment.
  • the radio frequency circuit 1004 is used to receive and transmit an RF (Radio Frequency) signal, also called an electromagnetic signal.
  • the radio frequency circuit 1004 communicates with a communication network and other communication devices through electromagnetic signals.
  • the radio frequency circuit 1004 converts electrical signals into electromagnetic signals for transmission, or converts received electromagnetic signals into electrical signals.
  • the radio frequency circuit 1004 includes: an antenna system, an RF transceiver, one or more amplifiers, a tuner, an oscillator, a digital signal processor, a codec chipset, a subscriber identity card, and the like.
  • the radio frequency circuit 1004 can communicate with other devices through at least one wireless communication protocol.
  • the wireless communication protocols include, but are not limited to, the World Wide Web, metropolitan area networks, intranets, mobile communication networks (2G, 3G, 4G, and 5G) of various generations, wireless local area networks, and / or WiFi (Wireless Fidelity) networks.
  • the radio frequency circuit 1004 may further include a NFC (Near Field Communication) circuit, which is not limited in this application.
  • the display screen 1005 is used to display a UI (User Interface).
  • the UI can include graphics, text, icons, videos, and any combination thereof.
  • the display screen 1005 also has the ability to collect touch signals on or above the surface of the display screen 1005.
  • the touch signal can be input to the processor 1001 as a control signal for processing.
  • the display screen 1005 may also be used to provide a virtual button and / or a virtual keyboard, which is also called a soft button and / or a soft keyboard.
  • the display screen 1005 may be one, and the front panel of the device 1000 is provided; in other embodiments, the display screen 1005 may be at least two, respectively disposed on different surfaces of the device 1000 or in a folded design; In still other embodiments, the display screen 1005 may be a flexible display screen disposed on a curved surface or a folded surface of the device 1000. Moreover, the display screen 1005 can also be set as a non-rectangular irregular figure, that is, a special-shaped screen.
  • the display 1005 can be made of materials such as LCD (Liquid Crystal Display) and OLED (Organic Light-Emitting Diode).
  • the camera assembly 1006 is used for capturing images or videos.
  • the camera assembly 1006 includes a front camera and a rear camera.
  • a front camera is provided on the front panel of the device, and a rear camera is provided on the back of the device.
  • there are at least two rear cameras each of which is a main camera, a depth-of-field camera, a wide-angle camera, and a telephoto camera, so as to realize the integration of the main camera and the depth-of-field camera, the background blur function, and the main camera. Integrate with a wide-angle camera to achieve panoramic shooting and VR (Virtual Reality) shooting functions or other fusion shooting functions.
  • the camera assembly 1006 may further include a flash.
  • the flash can be a monochrome temperature flash or a dual color temperature flash.
  • a dual color temperature flash is a combination of a warm light flash and a cold light flash, which can be used for light compensation at different color temperatures.
  • the audio circuit 1007 may include a microphone and a speaker.
  • the microphone is used for collecting sound waves of the user and the environment, and converting the sound waves into electrical signals and inputting them to the processor 1001 for processing, or inputting to the radio frequency circuit 1004 to implement voice communication.
  • the microphone can also be an array microphone or an omnidirectional acquisition microphone.
  • the speaker is used to convert electrical signals from the processor 1001 or the radio frequency circuit 1004 into sound waves.
  • the speaker can be a traditional film speaker or a piezoelectric ceramic speaker.
  • the speaker When the speaker is a piezoelectric ceramic speaker, it can not only convert electrical signals into sound waves audible to humans, but also convert electrical signals into sound waves inaudible to humans for ranging purposes.
  • the audio circuit 1007 may further include a headphone jack.
  • the positioning component 1008 is used for positioning the current geographic position of the device 1000 to implement navigation or LBS (Location Based Service).
  • the positioning component 1008 may be a positioning component based on the US GPS (Global Positioning System), the Beidou system in China, or the Galileo system in Russia.
  • the power supply 1009 is used to power various components in the device 1000.
  • the power source 1009 may be an alternating current, a direct current, a disposable battery, or a rechargeable battery.
  • the rechargeable battery may be a wired rechargeable battery or a wireless rechargeable battery.
  • the wired rechargeable battery is a battery charged through a wired line
  • the wireless rechargeable battery is a battery charged through a wireless coil.
  • the rechargeable battery can also be used to support fast charging technology.
  • the device 1000 further includes one or more sensors 1010.
  • the one or more sensors 1010 include, but are not limited to, an acceleration sensor 1011, a gyro sensor 1012, a pressure sensor 1013, a fingerprint sensor 1014, an optical sensor 1015, and a proximity sensor 1016.
  • the acceleration sensor 1011 can detect the magnitude of acceleration on the three coordinate axes of the coordinate system established by the device 1000.
  • the acceleration sensor 1011 may be used to detect components of the acceleration of gravity on three coordinate axes.
  • the processor 1001 may control the touch display screen 1005 to display the user interface in a horizontal view or a vertical view according to the gravity acceleration signal collected by the acceleration sensor 1011.
  • the acceleration sensor 1011 may also be used for collecting motion data of a game or a user.
  • the gyro sensor 1012 can detect the body direction and rotation angle of the device 1000, and the gyro sensor 1012 can cooperate with the acceleration sensor 1011 to collect a 3D motion of the user on the device 1000. Based on the data collected by the gyro sensor 1012, the processor 1001 can implement the following functions: motion sensing (such as changing the UI according to the user's tilt operation), image stabilization during shooting, game control, and inertial navigation.
  • the pressure sensor 1013 may be disposed on a side frame of the device 1000 and / or a lower layer of the touch display screen 1005.
  • a user's holding signal to the device 1000 can be detected, and the processor 1001 can perform left-right hand recognition or quick operation according to the holding signal collected by the pressure sensor 1013.
  • the processor 1001 controls the operability controls on the UI interface according to the user's pressure operation on the touch display screen 1005.
  • the operability controls include at least one of a button control, a scroll bar control, an icon control, and a menu control.
  • the fingerprint sensor 1014 is used to collect a user's fingerprint, and the processor 1001 recognizes the identity of the user based on the fingerprint collected by the fingerprint sensor 1014, or the fingerprint sensor 1014 recognizes the identity of the user based on the collected fingerprint. When identifying the user's identity as a trusted identity, the processor 1001 authorizes the user to perform related sensitive operations, such as unlocking the screen, viewing encrypted information, downloading software, paying and changing settings.
  • the fingerprint sensor 1014 may be disposed on the front, back, or side of the device 1000. When a physical button or a manufacturer's logo is set on the device 1000, the fingerprint sensor 1014 can be integrated with the physical button or the manufacturer's logo.
  • the optical sensor 1015 is used to collect ambient light intensity.
  • the processor 1001 may control the display brightness of the touch display screen 1005 according to the ambient light intensity collected by the optical sensor 1015. Specifically, when the ambient light intensity is high, the display brightness of the touch display screen 1005 is increased; when the ambient light intensity is low, the display brightness of the touch display screen 1005 is decreased.
  • the processor 1001 may also dynamically adjust the shooting parameters of the camera assembly 1006 according to the ambient light intensity collected by the optical sensor 1015.
  • the proximity sensor 1016 also called a distance sensor, is usually disposed on the front panel of the device 1000.
  • the proximity sensor 1016 is used to collect the distance between the user and the front of the device 1000.
  • the processor 1001 controls the touch display screen 1005 to switch from the bright screen state to the closed screen state; when the proximity sensor 1016 detects When the distance between the user and the front of the device 1000 gradually increases, the touch screen display 1005 is controlled by the processor 1001 to switch from the rest screen state to the bright screen state.
  • FIG. 15 does not constitute a limitation on the device 1000, and may include more or fewer components than shown in the figure, or combine certain components, or adopt different component arrangements.
  • An embodiment of the present disclosure provides a chip, where the chip includes a programmable logic circuit and / or a program instruction, and is used to implement the encoding method provided by the embodiment of the present disclosure when the chip is running.
  • An embodiment of the present disclosure provides a computer program product.
  • the computer program product stores instructions that, when run on a computer, cause the computer to execute the encoding method provided by the embodiment of the present disclosure.
  • / may indicate conversion, for example, 8b / 10b indicates that 8-bit data is converted into 10-bit data.
  • modules include routines, programs, objects, elements, components, data structures, etc. that perform specific tasks or implement specific abstract data types.
  • module generally refer to software, firmware, hardware, or a combination thereof.
  • the features of the technologies described herein are platform-independent, meaning that they can be implemented on a variety of computing platforms with a variety of processors.

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Abstract

一种编码方法、装置及显示装置，属于面板制造领域。该编码方法包括：将待传输数据的待编码字节对应的8比特数据编码为备选10比特数据，所述待传输数据包括至少一个待编码字节（201）；当所述待编码字节不是所述待传输数据的首个字节时，检测所述备选10比特数据的第一位数据与所述第一位数据相邻的前一位数据是否相同（202）；当所述第一位数据与所述前一位数据的数值相同时，将所述备选10比特数据取反，得到目标10比特数据（203）；当所述第一位数据与所述前一位数据的数值不同时，将所述备选10比特数据确定为目标10比特数据（204）；其中，所述8比特数据、所述备选10比特数据和所述目标10比特数据为二进制数据。

Description

编码方法、装置、显示装置、介质及信号传输系统
相关申请
本申请要求2018年8月24日提交、申请号为201810979269.7的中国专利申请的优先权，该申请的全部内容通过引用并入本文。
技术领域
本申请涉及面板制造领域，特别涉及一种编码方法、装置、显示装置、介质及信号传输系统。
背景技术
液晶显示面板驱动部分通常包含控制器(英文Timing Controller)、源极驱动器(英文Source Driver)和栅极驱动器(英文Gate Driver)，其中，控制器的主要功能是对每一帧图像数据进行处理，生成每一帧图像数据对应的数据信号和控制信号，数据信号被传送到源极驱动器，源极驱动器将所接收的数据信号转换成数据电压，以写入液晶显示面板上相对应的像素。
随着液晶显示面板分辨率的提升，液晶显示面板中控制器和源极驱动器之间数据传输的速率越来越高，目前有一种8b/10b(即将8比特(bit)数据编码成10比特数据)的编码方法来进行数据的高速传输，具体地，将8比特的原始数据划分成两部分，其前5位进行5b/6b(即将5比特(bit)数据编码成6比特数据)编码，后3位则进行3b/4b(即将3比特(bit)数据编码成4比特数据)编码。
但是，随着编解码技术的发展，目前的时序控制领域，信号传输通常有锁相环(英文：Phase Locked Loop；简称：PLL)和延迟锁相环(英文：Delay-locked Loop；简称：DLL)两种方式，其中PLL较为常见，DLL并不具有普适性，例如上述编码方法，只支持PLL的传输方式，并不支持DLL的传输方式。
发明内容
通常，编码的过程并不会考虑每个码字之间的跳变沿，这不利于使用DLL的传输方式，因为DLL的传输方式要求传输过程中需要出现 跳变沿，它是依赖于跳变沿进行时间同步的。
本申请实施例提供了一种编码方法、装置、显示装置、介质及信号传输系统。所述技术方案如下：
第一方面，提供一种编码方法，包括：
将待传输数据的待编码字节对应的8比特数据编码为备选10比特数据，所述待传输数据包括至少一个待编码字节；
当所述待编码字节不是所述待传输数据的首个字节时，检测所述备选10比特数据的第一位数据与所述第一位数据相邻的前一位数据是否相同；
当所述第一位数据与所述前一位数据的数值相同时，将所述备选10比特数据取反，得到目标10比特数据；
当所述第一位数据与所述前一位数据的数值不同时，将所述备选10比特数据确定为目标10比特数据；
其中，所述8比特数据、所述备选10比特数据和所述目标10比特数据均为二进制数据。
在一个实施例中，所述备选10比特数据满足：
enc[k1]＝～din[m]；
enc[k2]＝～din[m]^F；
其中，enc[k1]为所述备选10比特数据中的指定位数据，enc[k2]为所述备选10比特数据中除所述指定位数据之外的数据，所述din[m]为所述8比特数据中的指定位数据，所述F为基于所述8比特数据中的其他位数据中的至少一者确定的数据，～表示执行取反操作，^表示执行异或操作。
在一个实施例中，所述将待传输数据的待编码字节对应的8比特数据编码为备选10比特数据，包括：
按照如下方式将所述8比特数据编码为所述备选10比特数据：
enc[9]＝～din[3]；
enc[8]＝～din[3]^din[7]；
enc[7]＝～din[3]^din[4]；
enc[6]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&din[0])|(din[1]&din[0]))；
enc[5]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&～din[0]) |(din[1]&～din[0]))；
enc[4]＝～din[3]^din[6]；
enc[3]＝～din[3]^din[5]；
enc[2]＝～din[3]^((din[2]&～din[1])|(din[2]&din[1]&～din[3])|(～din[1]&din[0]))；
enc[1]＝～din[3]^((～din[2]&din[1])|(din[2]&din[1]&～din[3])|(～din[2]&～din[0]))；
enc[0]＝～din[3]^din[3]；
其中，enc[i]为所述备选10比特数据中的第i+1位数据，9≥i≥0，且i为整数；din[j]为所述8比特数据中的第j+1位数据，7≥j≥0，且j为整数；&表示执行与操作，以及|表示执行或操作。
在一个实施例中，所述备选10比特数据的第一位数据为第一数值，
所述检测所述备选10比特数据的第一位数据与所述第一位数据相邻的前一位数据是否相同，包括：
检测与所述前一位数据是否为所述第一数值；
当所述前一位数据为所述第一数值，确定所述第一位数据与所述前一位数据相同；
当所述前一位数据为所述第一数值，确定所述第一位数据与所述前一位数据不同。
在一个实施例中，所述方法还包括：
在编码后的所述待传输数据的预设位置添加第一标识码得到目标数据，所述第一标识码为预设的10比特数据，所述第一标识码包括至少连续6位相同的数据，所述第一标识码用于标识传输内容、传输开始或传输结束，所述编码后的所述待传输数据包括由所述待编码字节对应的8比特数据编码得到的目标10比特数据以便发送。
在一个实施例中，所述方法还包括：
将所述第一标识码和第二标识码拼接得到组合码，所述第一标识码和所述第二标识码均为预设的10比特数据，并且均包括至少连续6位相同的数据，所述第二标识码与所述第一标识码不同；
在编码后的所述待传输数据的预设位置添加所述组合码得到所述目标数据以便发送。
第二方面，提供一种编码方法，包括：
按照如下方式将待传输数据的待编码字节对应的8比特数据编码为目标10比特数据：
enc[9]＝～din[3]；
enc[8]＝～din[3]^din[7]；
enc[7]＝～din[3]^din[4]；
enc[6]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&din[0])|(din[1]&din[0]))；
enc[5]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&～din[0])|(din[1]&～din[0]))；
enc[4]＝～din[3]^din[6]；
enc[3]＝～din[3]^din[5]；
enc[2]＝～din[3]^((din[2]&～din[1])|(din[2]&din[1]&～din[3])|(～din[1]&din[0]))；
enc[1]＝～din[3]^((～din[2]&din[1])|(din[2]&din[1]&～din[3])|(～din[2]&～din[0]))；
enc[0]＝～din[3]^din[3]；
其中，enc[i]为所述10比特数据中的第i+1位数据，9≥i≥0，且i为整数；din[j]为所述8比特数据中的第j+1位数据，7≥j≥0，且j为整数；～表示执行取反操作，&表示执行与操作，|表示执行或操作，^表示执行异或操作，所述8比特数据和所述目标10比特数据为二进制数据。
第三方面，提供一种编码装置，包括：
编码器，用于将待传输数据的待编码字节对应的8比特数据编码为备选10比特数据，所述待传输数据包括至少一个待编码字节；
检测器，用于当所述待编码字节不是所述待传输数据的首个字节时，检测所述备选10比特数据的第一位数据与所述第一位数据相邻的前一位数据是否相同；
所述编码器，还用于：
当所述第一位数据与所述前一位数据的数值相同时，将所述备选10比特数据取反，得到目标10比特数据；
当所述第一位数据与所述前一位数据的数值不同时，将所述备选10比特数据确定为目标10比特数据；
其中，所述8比特数据、所述备选10比特数据和所述目标10比特数据均为二进制数据。
在一个实施例中，所述备选10比特数据满足：
enc[k1]＝～din[m]；
enc[k2]＝～din[m]^F；
其中，enc[k1]为所述备选10比特数据中的指定位数据，enc[k2]为所述备选10比特数据中除所述指定位数据之外的数据，所述din[m]为所述8比特数据中的指定位数据，所述F为基于所述8比特数据中的其他位数据中的至少一者确定的数据，～表示执行取反操作，^表示执行异或操作。
在一个实施例中，所述编码器，用于：
按照如下方式将所述8比特数据编码为所述备选10比特数据：
enc[9]＝～din[3]；
enc[8]＝～din[3]^din[7]；
enc[7]＝～din[3]^din[4]；
enc[6]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&din[0])|(din[1]&din[0]))；
enc[5]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&～din[0])|(din[1]&～din[0]))；
enc[4]＝～din[3]^din[6]；
enc[3]＝～din[3]^din[5]；
enc[2]＝～din[3]^((din[2]&～din[1])|(din[2]&din[1]&～din[3])|(～din[1]&din[0]))；
enc[1]＝～din[3]^((～din[2]&din[1])|(din[2]&din[1]&～din[3])|(～din[2]&～din[0]))；
enc[0]＝～din[3]^din[3]；
其中，enc[i]为所述备选10比特数据中的第i+1位数据，9≥i≥0，且i为整数；din[j]为所述8比特数据中的第j+1位数据，7≥j≥0，且j为整数；&表示执行与操作，以及|表示执行或操作。
在一个实施例中，所述备选10比特数据的第一位数据为第一数值，
所述检测器，用于：
检测与所述前一位数据是否为所述第一数值；
当所述前一位数据为所述第一数值，确定所述第一位数据与所述前一位数据相同；
当所述前一位数据为所述第一数值，确定所述第一位数据与所述前一位数据不同。
在一个实施例中，所述装置还包括：
处理器，用于在编码后的所述待传输数据的预设位置添加第一标识码得到目标数据，所述第一标识码为预设的10比特数据，所述第一标识码包括至少连续6位相同的数据，所述第一标识码用于标识传输内容、传输开始或传输结束，所述编码后的所述待传输数据包括由所述待编码字节对应的8比特数据编码得到的目标10比特数据以便发送。
在一个实施例中，处理器，用于：
将所述第一标识码和第二标识码拼接得到组合码，所述第一标识码和所述第二标识码均为预设的10比特数据，并且均包括至少连续6位相同的数据，所述第二标识码与所述第一标识码不同；
在编码后的所述待传输数据的预设位置添加所述组合码得到所述目标数据以便发送。
第四方面，提供一种编码装置，包括：
编码器，用于按照如下方式将待传输数据的待编码字节对应的8比特数据编码为目标10比特数据：
enc[9]＝～din[3]；
enc[8]＝～din[3]^din[7]；
enc[7]＝～din[3]^din[4]；
enc[6]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&din[0])|(din[1]&din[0]))；
enc[5]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&～din[0])|(din[1]&～din[0]))；
enc[4]＝～din[3]^din[6]；
enc[3]＝～din[3]^din[5]；
enc[2]＝～din[3]^((din[2]&～din[1])|(din[2]&din[1]&～din[3])|(～din[1]&din[0]))；
enc[1]＝～din[3]^((～din[2]&din[1])|(din[2]&din[1]&～din[3])|(～din[2]&～din[0]))；
enc[0]＝～din[3]^din[3]；
其中，enc[i]为所述10比特数据中的第i+1位数据，9≥i≥0，且i为整数；din[j]为所述8比特数据中的第j+1位数据，7≥j≥0，且j为整数；～表示执行取反操作，&表示执行与操作，|表示执行或操作，^表示执行异或操作，所述8比特数据和所述目标10比特数据为二进制数据。
第五方面，提供一种显示装置，包括：
控制器和源极驱动芯片，包括控制器及多个源极驱动芯片，所述控制器包括第三方面和第四方面任一所述的编码装置。
在一个实施例中，所述显示装置为液晶显示装置或OLED显示装置，所述控制器包括时序控制器、SOC和MCU中的至少一种。
第六方面，提供一种编码装置，包括：
处理器；
用于存储所述处理器的可执行指令的存储器；
其中，所述处理器在执行所述可执行指令时，能够实现第一方面任一所述的编码方法。
第七方面，提供一种计算机可读存储介质，当所述计算机可读存储介质中的指令由处理组件执行时，使得处理组件能够执行第一方面任一所述的编码方法。
第八方面，提供一种信号传输系统，包括：
控制器和源极驱动芯片，包括控制器及多个源极驱动芯片，所述控制器和每个所述源极驱动芯片均包括第三方面和第四方面任一所述的编码装置。
应当理解的是，以上的一般描述和后文的细节描述仅是示例性的，并不能限制本申请。
附图说明
为了更清楚地说明本申请的实施例，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是是本公开一示例性实施例提供的一种编码方法和解码方法 的应用环境示意图。
图2是根据一示例性实施例示出的一种编码方法的流程示意图。
图3是根据一示例性实施例示出的另一种编码方法的流程示意图。
图4是根据一示例性实施例示出的一种待编码字节与其前一字节的关系示意图。
图5是根据一示例性实施例示出的一种备选10比特数据与其前一10比特数据的关系示意图。
图6是根据一示例性实施例示出的另一种待编码字节与其前一字节的关系示意图。
图7是根据一示例性实施例示出的一种备选10比特数据与其前一10比特数据的关系示意图。
图8是根据一示例性实施例示出的一种在编码后的待传输数据前添加第一标识码得到目标数据的流程示意图。
图9是根据一示例性实施例示出的一种解码方法的流程示意图。
图10是根据一示例性实施例示出的一种9b/8b的解码方式示意图。
图11是根据一示例性实施例示出的又一种编码方法的流程示意图。
图12是根据一示例性实施例示出的另一种解码方法的流程示意图。
图13是根据一示例性实施例示出的一种编码装置的结构示意图。
图14是根据一示例性实施例示出的另一种编码装置的结构示意图。
图15是根据一示例性实施例示出的一种显示装置的结构示意图。
此处的附图被并入说明书中并构成本说明书的一部分，示出了符合本申请的实施例，并与说明书一起用于解释本申请的原理。
具体实施方式
为了使本申请的目的、技术方案和优点更加清楚，下面将结合附图对本申请作进一步地详细描述，显然，所描述的实施例仅仅是本申请一部份实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例，都属于本申请保护的范围。
请参考图1，图1是本公开一示例性实施例提供的一种编码方法的应用环境示意图，如图1所示，该编码方法应用于显示装置中，该显示装置包括控制器01和多个源极驱动芯片02，该控制器01的多个第一信号线H与多个源极驱动芯片02一一对应连接，该控制器还连接有一第二信号线L，多个源极驱动芯片02并联，且与第二信号线L连接。第一信号线的信号传输速率小于第二信号线，该第一信号线可称为低速信号线，通常用于标识电平状态，第二信号线可称为高速信号线，通常用于传输高速差分信号。控制器01可以为时序控制器，系统芯片(英文：System on Chip；简称：SOC)以及集成在时序控制器中的微控制单元(英文：Microcontroller Unit；MCU)中的任一种。
需要说明的是，本公开实施例提供的编码方法还可以应用于其他实施环境，图1只是示意性说明，且图1中控制器与源极驱动芯片的连接关系也只是示意性说明，实际上两者的连接关系只要保证两者之间能够进行有效的数据传输即可。
在本公开实施例中，提供一种新的8b/10b(即将8比特(bit)数据编码成10比特数据)的编码方法，其中，编码前的8比特数据和编码后得到的目标10比特数据均为二进制数据，控制器01和源极驱动芯片02之间传输的数据可以采用该编码方法进行编码，该控制器01和源极驱动芯片02之间传输的数据可以是第一信号线中传输的数据，也可以是第二信号线中传输的数据。本公开的该实施例对此不做限定。
如图2所示，本公开实施例提供一种编码方法的流程示意图，可以应用于图1所示的环境，该方法包括：
步骤201、将待传输数据的待编码字节对应的8比特数据编码为备选10比特数据，该待传输数据包括至少一个待编码字节。
步骤202、当待编码字节不是待传输数据的首个字节时，检测备选10比特数据的第一位数据与第一位数据相邻的前一位数据是否相同。
步骤203、当第一位数据与前一位数据的数值相同时，将备选10比特数据取反，得到目标10比特数据。
步骤204、当第一位数据与前一位数据的数值不同时，将备选10比特数据确定为目标10比特数据。
其中，上述各数据均为二进制数据。
本公开实施例提供的编码方法，在数据编码时，先将8比特数据 编码为备选10比特数据，然后在每两个相邻的10比特数据间设置一个跳变沿，该跳变沿可以有效减少传输错误。并且上述编码方式符合PLL和DLL的要求，使得接收端能够同时支持PLL和DLL的信号传输方式。
实际应用中，传输的数据中连续且相同的数据越少，抖动性能越好，而抖动性能越好，传输错误的概率越低。传统的8b/10b的编码算法，最少能够保证编码得到的10比特数据中任意连续6位中至少有一位与其他位不相同。
本公开实施例提供另一种编码方法的流程示意图，可以应用于图1所示的环境，该方法包括：
按照如下方式将待传输数据的待编码字节对应的8比特数据编码为目标10比特数据：
enc[9]＝～din[3]；
enc[8]＝～din[3]^din[7]；
enc[7]＝～din[3]^din[4]；
enc[6]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&din[0])|(din[1]&din[0]))；
enc[5]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&～din[0])|(din[1]&～din[0]))；
enc[4]＝～din[3]^din[6]；
enc[3]＝～din[3]^din[5]；
enc[2]＝～din[3]^((din[2]&～din[1])|(din[2]&din[1]&～din[3])|(～din[1]&din[0]))；
enc[1]＝～din[3]^((～din[2]&din[1])|(din[2]&din[1]&～din[3])|(～din[2]&～din[0]))；
enc[0]＝～din[3]^din[3]；
其中，enc[i]为10比特数据中的第i+1位数据，9≥i≥0，且i为整数；din[j]为8比特数据中的第j+1位数据，7≥j≥0，且j为整数；～表示执行取反操作，&表示执行与操作，|表示执行或操作，^表示执行异或操作，目标10比特数据为二进制数据。
本公开实施例提供的编码方法，采用上述方式将8比特数据编码为目标10比特数据，得到的目标10比特数据中任意连续5位中至少 有一位与其他位不相同，相较于传统的编码方法，能够减少每10比特数据(即编码后的每个字节)中连续且相同的数据的个数，可以保证编码后的数据在后续传输过程中有较好的抖动性能，从而降低传输错误的概率。
本公开实施例提供一种编码方法，如图3所示，该方法可以应用于图1所示的环境，该方法包括：
步骤301、将待传输数据的待编码字节对应的8比特数据编码为备选10比特数据。执行步骤302或步骤305。
在进行数据传输前，需要将待传输数据进行编码，待传输数据包括至少一个待编码字节，每个待编码字节为8比特数据。需要说明的是，本公开实施例中，在数据的发送端，数据的比特位是按照从低位到高位的顺序排列的，例如，数据10000010的排列顺序为从右到左，也即是其第一位数据为0，末位数据为1，“1000”为其高4位数据，“0010”为其低四位。
在本公开实施例中，备选10比特数据中每位数据的编码依据均包括8比特数据中的同一位数据din[m]，该din[m]为8比特数据中的一个指定位数据，7≥m≥0，这样备选10比特数据中每位数据均与该同一位数据din[m]关联。本公开实施例中，在该备选10比特数据中，可以设置一指定位数据，该指定位数据与前述同一位数据din[m]关联。由于备选10比特数据中每位数据均与该同一位数据din[m]关联，而该指定位数据又与该同一位数据din[m]关联，则该指定位数据可以反映备选10比特数据的状态，例如，反映该备选10比特数据后续是否经过取反操作。则解码端可以基于该指定位数据的数值进行相应的处理。
示例地，该备选10比特数据满足：
enc[k1]＝～din[m]；
enc[k2]＝～din[m]^F；
其中，enc[k1]为备选10比特数据中的指定位数据，该指定位数据为第k1+1位数据，enc[k2]为备选10比特数据中除指定位数据之外的数据，也即是除了第k1+1位数据之外的数据，F为基于8比特数据中的其他位数据中的至少一者确定的数据，～表示取反操作，^表示执行异或操作。取反操作表示：对二进制位取反，例如，1取反为0，0取反为1；异或操作表示两个二进制位异或，其规则为前后只要不相同就 为真，其中真为1，假为0，则1^1＝0，1^0＝1，0^1＝1，0^0＝0。
由上述公式可知，enc[k2]＝enc[k1]^F，显然可以看出，其他位数据与该指定位数据存在关系。假设对备选10比特数据中所有位数据进行取反得到目标10比特数据，则可以看出：
dout[k1]＝～enc[k1]＝～(～din[m])＝din[m]；
dout[k2]＝～enc[k2]＝～(～din[m]^F)＝din[m]^F；
其中，dout[k1]为备选10比特数据中的指定位数据dout[k1]取反得到的目标10比特数据中的指定位数据，该指定位数据为第k1+1位数据，dout[k2]为备选10比特数据中除指定位数据之外的数据取反得到的目标10比特数据中的数据。
由此可知，dout[k2]＝dout[k1]^F，其与上述enc[k2]＝enc[k1]^F的关系是一致的。因此，在本公开实施例中，采用上述编码方法，无论备选10比特数据是否进行取反，最终获取的目标10比特数据中各个数据之间的关系均相对于备选10比特数据保持不变。因此，当解码端获取该目标10比特数据后，无论是否对其进行取反操作，也可以解码得到相应的8比特数据。这样可以实现本公开实施例提供的编码方法与现有的解码方法的兼容。且在解码时，无需考量待解码的10比特数据与前一10比特数据的关系，能够减少运算代价。
示例地，假设指定数据为备选10位数据的第十位数据，也即是上述k1＝9，din[m]为8位数据的第四位数据，即m＝3，则将待传输数据的待编码字节对应的8比特数据编码为备选10比特数据的过程包括：
按照如下方式将8比特数据编码为备选10比特数据：
enc[9]＝～din[3]；
enc[8]＝～din[3]^din[7]；
enc[7]＝～din[3]^din[4]；
enc[6]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&din[0])|(din[1]&din[0]))；
enc[5]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&～din[0])|(din[1]&～din[0]))；
enc[4]＝～din[3]^din[6]；
enc[3]＝～din[3]^din[5]；
enc[2]＝～din[3]^((din[2]&～din[1])|(din[2]&din[1]&～din[3])| (～din[1]&din[0]))；
enc[1]＝～din[3]^((～din[2]&din[1])|(din[2]&din[1]&～din[3])|(～din[2]&～din[0]))；
enc[0]＝～din[3]^din[3]。
其中，enc[i]为备选10比特数据中的第i+1位数据，9≥i≥0，且i为整数；din[j]为8比特数据中的第j+1位数据，7≥j≥0，且j为整数；～表示执行取反操作，&表示执行与操作，|表示执行或操作，^表示执行异或操作。
上述与操作表示：两个二进制位相与，其规则为前后都为1的时候为真，其他都为假，其中真为1，假为0，则1&1＝1，1&0＝0，0&1＝0，0&0＝0；或操作表示两个二进制位相或，其规则为前后只要有一个为1的时候就为真，其中真为1，假为0，则1|1＝1，1|0＝1，0|1＝1，0|0＝0。
示例地，如图4所示，假设待编码的8比特数据为：00000000，其第一位数据到第八位数据依次为0、0、0、0、0、0、0、0，则如图5所示，根据上述编码方式可以编码得到备选10比特数据：1110011101其中，在该备选10比特数据中：
第一位数据enc[0]＝～din[3]^din[3]＝1；
第二位数据enc[1]＝～din[3]^((～din[2]&din[1])|(din[2]&din[1]&～din[3])|(～din[2]&～din[0]))＝0；
第三位数据enc[2]＝～din[3]^((din[2]&～din[1])|(din[2]&din[1]&～din[3])|(～din[1]&din[0]))＝1；
第四位数据enc[3]＝～din[3]^din[5]＝1；
第五位数据enc[4]＝～din[3]^din[6]＝1；
第六位数据enc[5]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&～din[0])|(din[1]&～din[0]))＝0；
第七位数据enc[6]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&din[0])|(din[1]&din[0]))＝1^(0|0|0)＝0；
第八位数据enc[7]＝～din[3]^din[4]＝1；
第九位数据enc[8]＝～din[3]^din[7]＝1；
第十位数据enc[9]＝～din[3]＝1。
通过上述编码方式可以保证得到的备选10比特数据的任意连续6位中至少有一位与其他位不相同，也即是该备选10比特数据中不会出 现连续的6个0，或者连续的6个1。
步骤302、当待编码字节不是待传输数据的首个字节时，检测备选10比特数据的第一位数据与第一位数据相邻的前一位数据是否相同。
由于待传输数据可能包括多个字节，对于待编码的字节是首个字节和不是首个字节的情况，其编码方式可能不同，所以在编码时，可以先检测待编码字节是否为待传输数据的首个字节，如果不是的话，由于数据是按序编码的，说明在该待编码字节前至少存在一个已完成编码的字节，也即是已完成8b/10b编码的字节，一个已完成8b/10b编码的字节实际上是将原有的8比特位数据转换成10比特位数据，因此，一个已完成编码的字节对应10比特数据。针对待编码的备选10比特数据，可以检测该备选10比特数据的第一位数据，以及与该第一位数据相邻的前一位数据(也即是前10比特数据的末位)，以便比较两者是否相同。
在本公开实施例中，为了快速检测备选10比特数据的第一位数据与第一位数据相邻的前一位数据是否相同，可以将备选10比特数据的第一位数据设置为固定的第一数值，这样就可以通过判断第一位数据相邻的前一位数据是否等于该第一数值来判断备选10比特数据的第一位数据与第一位数据相邻的前一位数据是否相同。
则步骤302包括：
检测与前一位数据是否为第一数值；当前一位数据为第一数值，确定第一位数据与前一位数据相同；当前一位数据为第一数值，确定第一位数据与前一位数据不同。示例地，请参考上述编码方式，第十位数据enc[9]＝～din[m]^din[m]＝1，例如enc[9]＝～din[3]^din[3]＝1，此时第一数值为1。当然，上述第一数值也可以设置为0，只要保证编码后的数据能够被解码端解码即可，本公开实施例对此不作限定。
若第一位数据与前一位数据相同可以执行步骤303，若第一位数据与前一位数据不同，可以执行步骤304。
步骤303、当第一位数据与前一位数据的数值相同时，将备选10比特数据取反，得到目标10比特数据。执行步骤306。
示例地，请参考图4，图4以待传输数据的2个相邻字节为例，其中，待编码字节的第一位数据到第八位数据din[0]-din[7]分别为：0、0、0、0、0、0、0和0。待编码字节的前一个字节的第一位数据到第八位 数据din[0]-din[7]分别为：0、0、0、0、0、0、0和0。
请参考图5，对该两个字节进行编码得到的备选10比特数据的第一位数据到第十位数据enc[0]-enc[9]分别为：1、0、1、1、1、0、0、1、1和1。该备选10比特数据的前一个字节对应的10比特数据，即前一目标10比特数据(已编码完成的10比特数据)的第一位数据到第十位数据enc[0]-enc[9]分别为：1、0、1、1、1、0、0、1、1和1。由于备选10比特数据的第一位数据为1，其前一位数据也为1，两者相同，对备选10比特数据进行取反得到目标10比特数据，该目标10比特数据的dout[0]-dout[9]分别为：0、1、0、0、0、1、1、0、0和0。
步骤304、当第一位数据与前一位数据的数值不同时，将备选10比特数据确定为目标10比特数据。执行步骤306。
示例地，请参考图6，图6以待传输数据的2个相邻字节为例，其中，待编码字节的第一位数据到第八位数据din[0]-din[7]分别为：1、1、1、1、1、1、1和1。待编码字节的前一个字节的第一位数据到第八位数据din[0]-din[7]分别为：1、1、1、1、1、1、1和1。
请参考图7，对该两个字节进行编码得到的备选10比特数据的第一位数据到第十位数据enc[0]-enc[9]分别为：1、0、0、1、1、0、1、1、1和0。该备选10比特数据的前一个字节对应的10比特数据，即前一目标10比特数据(已编码完成的10比特数据)的第一位数据到第十位数据enc[0]-enc[9]分别为：1、0、0、1、1、0、1、1、1和0。由于备选10比特数据的第一位数据为1，其前一位数据也为0，两者不同，可以将备选10比特数据enc[0]-enc[9]直接作为目标10比特数据dout[0]-dout[9]。
上述步骤302至304可以保证每两个相邻的编码后的字节(也即是每两个10比特数据)之间存在跳变沿，这样便于接收端明确区分每两个相邻的编码后的字节，实现准确解码。
步骤305、当待编码字节是待传输数据的首个字节时，假设9比特数据的第一位数据的前一位数据为0，根据步骤303或步骤304，对备选10比特数据进行处理，得到目标10比特数据。执行步骤306。
在本公开实施例中，由于待编码字节是待传输数据的首个字节，因此该备选10比特数据的第一位数据的前一位数据是不存在的，本公开的一个实施例仅仅是假设该前一位数据为0，，在其它实施例中，还 可以假设其第一位数据的前一位数据为1，然后其他过程可以参考上述步骤302至304。
实际应用中，当待编码字节是待传输数据的首个字节时，还可以采用其他方式将备选10比特数据进行处理得到目标10比特数据，只要保证接收端能够有效解码即可。
例如，当待编码字节是待传输数据的首个字节时，也即其第一位数据之前不存在前一位数据，可以假设备选10比特数据的第一位数据与前一位数据存在跳变沿，将备选10比特数据直接作为目标10比特数据，具体过程可以参考上述步骤304。
实际应用中，当待编码字节是待传输数据的首个字节时，也可以假设备选10比特数据的第一位数据与前一位数据不存在跳变沿，可以将备选10比特数据取反后得到目标10比特数据。具体过程可以参考上述步骤303。
还需要说明的是，当待编码字节是待传输数据的首个字节时，还可以假设其第一位数据的前一位数据为1，然后再执行上述步骤302至304，本公开实施例对此不作限定。
步骤306、在编码后的待传输数据的预设位置添加第一标识码得到目标数据。
上述编码后的待传输数据包括由上述待编码字节对应的8比特数据编码得到的目标10比特数据。在一个实施例中，为了保证接收端以每10个比特为一个单位接收数据，发送端也需要以每10个比特位一个单位发送数据，因此第一标识码需要为10比特数据，且其可以为预设的数据，起到标识作用即可。
在本公开实施例中，步骤301至306所提供的8b/10b的编码算法可以保证10比特数据的任意连续5位中至少有一位与其他位不相同。因此，第一标识码可以包括至少连续6位相同的数据，以与正常传输的10比特数据区分开，示例地，该标识位可以包括连续6个0或者连续6个1，该第一标识码用于标识传输内容、传输开始或传输结束。
示例地，该第一标识码可以为K，其具体码值可以参考表1。
表1
K1 0b0111111010 0b1000000101
K2 0b0111111011 0b1000000100
K3 0b0111111001 0b1000000110
K4 0b0111111000 0b1000000111
其中，0b表示2进制，K1至K4中每个标识码分别对应两种表示方式，其第一位数据(注：这里是指右侧低位第一位)是根据前一位数据而确定的，保证与前一位数据形成翻转沿，例如，当K1码的第一位数据的前一位数据为0，则采用第一位数据为1的K1码，也即是1000000101，当K1码的第一位数据的前一位数据为1，则采用第一位数据为0的K1码，也即是0111111010，这样可以保证第一标识码的有效识别。示例地，表1中，K1用于指示传输开始，K2用于指示传输截止，K3用于指示行信号的截止位置，还可以用于指示线性反馈寄存器执行复位操作，K4用于指示传输结束。
例如，当第一标识码用于指示传输开始时，第一标识码可以直接添加在待传输数据之前，也可以以组合码的形式添加在待传输数据之前，示例地，如图8所示，当第一标识码以组合码的形式添加在待传输数据之前，在编码后的待传输数据前添加第一标识码得到目标数据的过程可以包括：
步骤3061、将第一标识码和第二标识码拼接得到组合码，第二标识码为预设的10比特数据，第二标识码包括至少连续6位相同的数据，第二标识码与第一标识码不同。
在本公开实施例中，组合码可以包括至少一个第一标识码和至少一个第二标识码，同一个组合码中不同位置的第一标识码的数值可以不同，例如，在组合码中的第一标识码包括表1中的不同K1，类似地，不同位置的第二标识码的数值可以不同，发送端和接收端可以预先约定组合码的排列方式，并采用组合码表的方式进行记录。在一些实施例中，当组合码中存在至少一个标识码传输正确时，接收端可以通过查询组合码表来恢复出正确的组合码，例如，第一标识码为K1，第二标识码为G1，则组合码可以为K1G1G1K1，当K1传输错误时，接收端可以根据G1查表恢复出K1G1G1K1。
示例地，该第二标识码可以记为G，该G可以有G1，G2，G3和G4共4种形式，其具体码值可以参考表2，其中，0b表示2进制。
表2
G1 0b0101010111 0b1010101000
G2 0b0100011111 0b1011100000
G3 0b0110001111 0b1001110000
G4 0b0111000111 0b1000111000
示例地，假设组合码由第一标识码K和第二标识码G按照KGKG的方式组合得到，则组合码表可以参考表3。假设接收到的组合码为依次排布的0111111010，1010101000，1000000101和1111111111，采用该组合码查询如表3所示的组合码表，可以发现该组合码的前3个10比特数据均与表3中的第一行组合码中的前3个10比特数据相同，因此可以确定正确的组合码为依次排布的0111111010，1010101000，1000000101和0101010111，相应可提取的第一标识码为K1。
表3
Figure PCTCN2019102225-appb-000001
步骤3062、在编码后的待传输数据的预设位置添加组合码得到目标数据。
在一个实施例中，上述预设位置是根据第一标识码指示的内容来确定的，例如，当第一标识码指示传输开始时，该预设位置为待传输数据之前的位置，也即是第一组10比特数据的第一位数据之前；当第 一标识码指示传输结束时，该预设位置为待传输数据之后的位置，也即是待传输数据的最后一组10比特数据的末位数据之后；当第一标识码用于标识传输内容时，该预设位置可以为待传输数据的指定的两组10比特数据之间。
可选地，步骤307、发送目标数据。
在本公开实施例中，数据的发送端是控制器时，数据的接收端可以是源极驱动芯片，数据的发送端是源极驱动芯片时，数据的接收端是可以是控制器。示例地，请参考图1，控制器可以通过第一信号线(例如高速差分信号线)或第二信号线将该目标数据发送至相应的源极驱动芯片，本公开实施例对此不作限定。
本公开实施例中，在将待传输数据编码后，可以将该编码后的待传输数据发送至解码端，步骤306和307只是以对编码后的待传输数据处理得到目标数据，然后再传输至解码端为例进行示意性说明，实际实现时，还可以对该编码后的待传输数据进行其他处理或者不进行处理，本公开实施例对此不做限定。
需要说明的是，本公开实施例提供的编码方法步骤的先后顺序可以进行适当调整，步骤也可以根据情况进行相应增减，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到变化的方法，都应涵盖在本发明的保护范围之内，因此不再赘述。
本公开实施例提供的编码方法，在数据编码时，先将8比特数据编码为备选10比特数据，然后基于该备选10比特数据中的第十位数据确定是否对该备选10比特数据进行取反操作以得到最终的目标10比特数据，这样在每两个相邻的10比特数据间设置一个跳变沿，且基于该第十位数据可以确定该目标10比特数据是否为经过取反操作得到的数据，能有效保证待传输数据在接收端能够被正确复原，且跳变沿可以有效减少传输错误。
值得说明的是，目前的时序控制领域，信号传输通常有PLL和DLL两种方式，其中PLL较为常见，DLL要求传输过程中需要出现跳变沿，而上述编码方法，由于能够保证前后两个相邻的编码后的字节(也即是相邻的两组10比特数据)之间出现一个跳变沿，可以有效降低错误传输的概率，符合PLL和DLL的要求，使得接收端能够同时支持PLL和DLL的信号传输方式。
实际应用中，传输的数据中连续且相同的数据越少，抖动性能越好，由于步骤301所提供的8b/10b的编码算法可以保证10比特数据的任意连续5位中至少有一位与其他位不相同，相较于传统的编码方法，能够减少每10比特数据(即编码后的每个字节)中连续且相同的数据的个数，可以保证编码后的数据在后续传输过程中有较好的抖动性能，从而降低传输错误的概率。
请参考步骤301，由于无论在解码端是否对待解码的10比特数据进行取反操作，最终获取的10比特数据的各个数据之间的关系均保持不变，因此，为了适配于相关技术中的解码方法，本公开实施例假设待解码的10比特数据中的指定位数据为用于指示是否取反的指示位，提供一种解码方法，该解码方法和本公开实施例中图3所提供的编码方法对应，如图9所示，该方法可以应用于图1所示的环境，假设该指定位数据为第十位数据，该方法包括：
步骤401、接收目标数据。
上述目标数据包括至少一组10比特数据，该10比特数据为二进制数据。在一个实施例中，该目标数据通常包括至少两组10比特数据，其中，可以包括第一标识码，第一标识码可以标识传输内容、传输开始或传输结束，便于更好地识别待解码数据。
在本公开实施例中，数据的发送端是控制器时，数据的接收端可以是源极驱动芯片，数据的发送端是源极驱动芯片时，数据的接收端是可以控制器。示例地，如图1所示，源极驱动芯片可以通过第一信号线(例如高速差分信号线)或第二信号线将该目标数据发送至相应的控制器，本公开实施例对此不作限定。
步骤402、当检测到目标数据中包括组合码时，根据组合码确定第一标识码，并根据第一标识码确定待解码数据。
在本公开实施例中，组合码是第一标识码和第二标识码拼接得到的，第一标识码为预设的10比特数据，第一标识码包括至少连续6位相同的数据。第二标识码也为预设的10比特数据，第二标识码也包括至少连续6位相同的数据，第二标识码与第一标识码不同。
组合码可以包括至少一个第一标识码和至少一个第二标识码，同一个组合码中不同位置的第一标识码的数值可以不同，例如，在组合码中的第一标识码包括表1中的不同K1，类似地，不同位置的第二标 识码的数值可以不同，发送端和接收端可以预先约定组合码的排列方式，并采用组合码表的方式进行记录。在一些实施例中，当组合码中存在至少一个标识码传输正确时，接收端可以根据通过查询组合码表来恢复出正确的组合码。
当检测到目标数据中包括组合码时，接收端可以根据组合码确定第一标识码，再根据第一标识码确定待解码数据。具体地，接收端可以根据组合码查询组合码表，当组合码中存在至少一个标识码在组合码表中可以查询到，则说明组合码中存在至少一个标识码传输正确时，通过查表即可恢复出正确的组合码，然后再从组合码的预设位置提取第一标识码，以确定待解码数据。
需要说明的是，当组合码中任意的一个标识码都无法在组合码表中查询到，说明组合码错误，相应的待解码数据也传输有误，可以不对待解码数据进行后续处理。
由于第一标识码用于标识传输内容、传输开始或传输结束，根据具体的第一标识码确定该第一标识码在目标数据中的位置，然后根据第一标识码及其位置确定待解码数据。
在本公开实施例中，通过组合码的形式来携带第一标识码，可以提高第一标识码的解码的准确率。
步骤403、当检测到目标数据中包括第一标识码时，根据第一标识码确定待解码数据。
待解码数据包括至少一组待解码的10比特数据，第一标识码为预设的10比特数据，第一标识码包括至少连续6位相同的数据。
由于第一标识码用于标识传输内容、传输开始或传输结束，可以根据具体的第一标识码确定该第一标识码在目标数据中的位置，然后根据第一标识码及其位置确定待解码数据。此处可以参考步骤402中的相关内容。
步骤404、检测待解码的10比特数据的第十位数据，该第十位数据用于指示待解码的10比特数据中前9比特数据是否经过取反操作。
在本公开实施例中，假设当待解码的10比特数据中的第十位数据为第一数值，指示目标10比特数据是待解码的10比特数据经过取反操作确定的，也即是可以认为待解码的10比特数据的前9比特数据经过取反操作，当待解码的10比特数据中的第十位数据不为第一数值， 指示目标10比特数据不是对待解码的10比特数据经过取反操作确定的，也即是可以认为待解码的10比特数据的前9比特数据未经过取反操作。
步骤405、当第十位数据指示前9比特数据经过取反操作，将前9比特数据取反，得到预解码的9比特数据。
示例地，假设第十位数据为1时可以指示9比特数据经过取反操作，第十位数据为0时可以指示9比特数据未经过取反操作。假设，待解码的10比特数据为1110011101，其第十位为1，说明前9比特数据：110011101经过取反操作，则对该9比特数据：110011101取反得到预解码的9比特数据：001100010。
步骤406、当第十位数据指示前9比特数据未经过取反操作，将前9比特数据作为预解码的9比特数据。
示例地，假设第十位数据为1时可以指示9比特数据经过取反操作，第十位数据为0时可以指示9比特数据未经过取反操作。假设，待解码的10比特数据为0001100010，其第十位为0，说明前9比特数据：001100010未经过取反操作，则将前9比特数据：001100010作为预解码的9比特数据：001100010。
步骤407、将预解码的9比特数据解码为8比特数据。
预解码的9比特数据的任意连续5位中至少有一位与其他位不相同，也即是该9比特数据中不会出现连续的5个0，或者连续的5个1。将预解码的9比特数据解码为8比特数据，包括按照如下方式将预解码的9比特数据解码为8比特数据：
Dout[7]＝d_code[8]；
Dout[6]＝d_code[4]；
Dout[5]＝d_code[3]；
Dout[4]＝d_code[7]；
Dout[3]＝d_code[0]；
Dout[2]＝(d_code[6]^d_code[5])&～(～d_code[2]&d_code[1])；
Dout[1]＝(d_code[6]^d_code[5])&～(d_code[2]&～d_code[1])；
Dout[0]＝(d_code[6]&～d_code[5])|(d_code[6]&d_code[5]&d_code[2])|(～d_code[6]&～d_code[5]&d_code[2])；
其中，d_code[i]为9比特数据中的第i+1位数据，8≥i≥0，且i 为整数；Dout[j]为8比特数据中的第j+1位数据，7≥j≥0，且j为整数；^表示执行异或操作、～表示执行取反操作，&表示执行与操作，以及|表示执行或操作。其中，取反操作、与操作、或操作以及异或操作的解释可以参考上述关于步骤301的描述。
示例地，如图10所示，假设预解码的9比特数据为：001100010，其第一位数据到第九位数据依次为0、0、1、1、0、0、0、1、0，则根据上述解码方式可以解码得到8比特数据：00000000，其中，在该8比特数据中：
第八位数据Dout[7]＝d_code[8]＝0；
第七位数据Dout[6]＝d_code[4]＝0；
第六位数据Dout[5]＝d_code[3]＝0；
第五位数据Dout[4]＝d_code[7]＝0；
第四位数据Dout[3]＝d_code[0]＝0；
第三位数据Dout[2]＝(d_code[6]^d_code[5])&～(～d_code[2]&d_code[1])＝(1^0)&～(～0&1)＝0&～(1&1)＝0&～1＝0&0＝0；
第二位数据Dout[1]＝(d_code[6]^d_code[5])&～(d_code[2]&～d_code[1])＝(1^1)&～(0&～1)＝0&～(0&0)＝0&～0＝0&1＝0；
第一位数据Dout[0]＝(d_code[6]&～d_code[5])|(d_code[6]&d_code[5]&d_code[2])|(～d_code[6]&～d_code[5]&d_code[2])＝(1&～1)|(1&1&0)|(～1&～1&0)＝(1&0)|0|(0&0&0)＝0|0|0＝0。
需要说明的是，本公开各个实施例提供的解码方法步骤的先后顺序可以进行适当调整，步骤也可以根据情况进行相应增减，例如上述步骤404至406可以不执行，可以在步骤403之后直接将前9比特数据作为预解码的9比特数据。任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到变化的方法，都应涵盖在本发明的保护范围之内，因此不再赘述。
并且上述解码方法只是以第十位数据为指定位数据为例进行说明，实际应用中，指定位数据还可以为其他位数据，相应的解码方法可以参考上述实施例进行简单变化，本公开实施例对此不再赘述。
本公开各个实施例提供的解码方法，在数据解码时，先根据第十位数据将10比特数据解码为9比特数据，然后将9比特数据解码为8比特数据，能有效保证传输的数据在接收端能够被正确复原，且跳变 沿可以有效减少传输错误，使得接收端能够通过上述解码方式同时支持PLL和DLL的时钟传输方式。
本公开实施例提供一种编码方法，如图11所示，该方法可以应用于图1所示的环境，该方法包括：
步骤501、将待传输数据的待编码字节对应的8比特数据编码为目标10比特数据，待传输数据包括至少一个待编码字节。
步骤501的编码过程可以参考上述步骤301将待传输数据的待编码字节对应的8比特数据编码为备选10比特数据的过程，本公开实施例对此不再赘述。
步骤502、在编码后的待传输数据的预设位置添加第一标识码得到目标数据。
步骤502可以参考上述步骤306。
步骤503、发送目标数据。
步骤503可以参考上述步骤307。
本公开实施例中，在将待传输数据编码后，可以将该编码后的待传输数据发送至解码端，步骤502和503只是以对编码后的待传输数据处理得到目标数据，然后再传输至解码端为例进行示意性说明，实际实现时，还可以对该编码后的待传输数据进行其他处理或者不进行处理，本公开实施例对此不做限定。
本公开实施例提供的编码方法，采用上述方式将8比特数据编码为目标10比特数据，得到的目标10比特数据中任意连续5位中至少有一位与其他位不相同，相较于传统的编码方法，能够减少每10比特数据(即编码后的每个字节)中连续且相同的数据的个数，可以保证编码后的数据在后续传输过程中有较好的抖动性能，从而降低传输错误的概率。
本公开实施例提供一种解码方法，该解码方法该解码方法和本公开实施例中图11所提供的编码方法对应，如图12所示，该方法可以应用于图1所示的环境，该方法包括：
步骤601、接收目标数据。
步骤601可以参考上述步骤401。
步骤602、当检测到目标数据中包括组合码时，根据组合码确定第一标识码，并根据第一标识码确定待解码数据。
步骤602可以参考上述步骤402。
步骤603、当检测到目标数据中包括第一标识码时，根据第一标识码确定待解码数据。
步骤603可以参考上述步骤403。
步骤604、将待解码的10比特数据解码为8比特数据。
在本公开实施例中，由于在编码端未执行如上述步骤302至步骤305的步骤，在解码端无需执行上述404至406的动作，在解码端可以删除待解码的10比特数据的第十位数据，得到预解码的9比特数据，然后将该预解码的9比特数据解码为8比特数据，该过程可以参考上述步骤407。
当然，解码端还可以采用其他解码方式，例如解码端的解码过程直接采用上述步骤501的逆过程，本公开实施例对此不做赘述。
本公开实施例提供的解码方法，可以有效实现前述编码数据的解码。
本公开实施例提供一种编码装置，如图13所示，该装置包括：
编码器701，用于将待传输数据的待编码字节对应的8比特数据编码为备选10比特数据，所述待传输数据包括至少一个待编码字节；
检测器702，用于当所述待编码字节不是所述待传输数据的首个字节时，检测所述备选10比特数据的第一位数据与所述第一位数据相邻的前一位数据是否相同；
所述编码器701，还用于：
当所述第一位数据与所述前一位数据的数值相同时，将所述备选10比特数据取反，得到目标10比特数据；
当所述第一位数据与所述前一位数据的数值不同时，将所述备选10比特数据确定为目标10比特数据；
其中，上述数据均为二进制数据。
本公开实施例提供的编码装置，在数据编码时，编码器先将8比特数据编码为备选10比特数据，然后在每两个相邻的10比特数据间设置一个跳变沿，该跳变沿可以有效减少传输错误。并且上述编码方式符合PLL和DLL的要求，使得接收端能够同时支持PLL和DLL的信号传输方式。
在一个实施例中，所述备选10比特数据满足：
enc[k1]＝～din[m]；
enc[k2]＝～din[m]^F；
其中，enc[k1]为所述备选10比特数据中的指定位数据，enc[k2]为所述备选10比特数据中除所述指定位数据之外的数据，所述din[m]为所述8比特数据中的指定位数据，所述F为基于所述8比特数据中的其他位数据中的至少一者确定的数据，～表示执行取反操作，^表示执行异或操作。
在一个实施例中，所述编码器701，用于：
按照如下方式将所述8比特数据编码为所述备选10比特数据：
enc[9]＝～din[3]；
enc[8]＝～din[3]^din[7]；
enc[7]＝～din[3]^din[4]；
enc[6]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&din[0])|(din[1]&din[0]))；
enc[5]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&～din[0])|(din[1]&～din[0]))；
enc[4]＝～din[3]^din[6]；
enc[3]＝～din[3]^din[5]；
enc[2]＝～din[3]^((din[2]&～din[1])|(din[2]&din[1]&～din[3])|(～din[1]&din[0]))；
enc[1]＝～din[3]^((～din[2]&din[1])|(din[2]&din[1]&～din[3])|(～din[2]&～din[0]))；
enc[0]＝～din[3]^din[3]；
其中，enc[i]为所述备选10比特数据中的第i+1位数据，9≥i≥0，且i为整数；din[j]为所述8比特数据中的第j+1位数据，7≥j≥0，且j为整数；&表示执行与操作，以及|表示执行或操作。
在一个实施例中，所述备选10比特数据的第一位数据为第一数值，
所述检测器702，用于：
检测与所述前一位数据是否为所述第一数值；
当所述前一位数据为所述第一数值，确定所述第一位数据与所述前一位数据相同；
当所述前一位数据为所述第一数值，确定所述第一位数据与所述 前一位数据不同。
进一步的，如图14所示，编码装置还包括：
处理器703，用于在编码后的所述待传输数据的预设位置添加第一标识码得到目标数据，所述第一标识码为预设的10比特数据，所述第一标识码包括至少连续6位相同的数据，所述第一标识码用于标识传输内容、传输开始或传输结束，所述编码后的所述待传输数据包括由所述待编码字节对应的8比特数据编码得到的目标10比特数据；
以及可选地，发送模块704，用于发送所述目标数据。
在一个实施例中，处理器703，用于：
将所述第一标识码和第二标识码拼接得到组合码，所述第二标识码也为预设的10比特数据，所述第二标识码也包括至少连续6位相同的数据，所述第二标识码与所述第一标识码不同；
在编码后的所述待传输数据的预设位置添加所述组合码得到所述目标数据。
关于第一标识码、第二标识码、组合标识码的以及其它相关特征的解释可以进一步参考上述结合图3和图4的描述。
本公开实施例提供的编码装置，在数据编码时，先将8比特数据编码为备选10比特数据，然后基于该备选10比特数据中的第十位数据确定是否对该备选10比特数据进行取反操作以得到最终的目标10比特数据，这样在每两个相邻的10比特数据间设置一个跳变沿，且基于该第十位数据可以确定该目标10比特数据是否为经过取反操作得到的数据，能有效保证待传输数据在接收端能够被正确复原，且跳变沿可以有效减少传输错误。
值得说明的是，目前的时序控制领域，信号传输通常有PLL和DLL两种方式，其中PLL较为常见，DLL要求传输过程中需要出现跳变沿，而上述编码方法，由于能够保证前后两个相邻的编码后的字节(也即是相邻的两组10比特数据)之间出现一个跳变沿，可以有效降低错误传输的概率，符合PLL和DLL的要求，使得接收端能够同时支持PLL和DLL的信号传输方式。
实际应用中，传输的数据中连续且相同的数据越少，抖动性能越好，由于步骤301所提供的8b/10b的编码算法可以保证10比特数据的任意连续5位中至少有一位与其他位不相同，相较于传统的编码方法， 能够减少每10比特数据(即编码后的每个字节)中连续且相同的数据的个数，可以保证编码后的数据在后续传输过程中有较好的抖动性能，从而降低传输错误的概率。
本公开实施例提供一种编码装置，包括：
编码器，用于按照如下方式将待传输数据的待编码字节对应的8比特数据编码为目标10比特数据：
enc[9]＝～din[3]；
enc[8]＝～din[3]^din[7]；
enc[7]＝～din[3]^din[4]；
enc[6]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&din[0])|(din[1]&din[0]))；
enc[5]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&～din[0])|(din[1]&～din[0]))；
enc[4]＝～din[3]^din[6]；
enc[3]＝～din[3]^din[5]；
enc[2]＝～din[3]^((din[2]&～din[1])|(din[2]&din[1]&～din[3])|(～din[1]&din[0]))；
enc[1]＝～din[3]^((～din[2]&din[1])|(din[2]&din[1]&～din[3])|(～din[2]&～din[0]))；
enc[0]＝～din[3]^din[3]；
其中，enc[i]为所述10比特数据中的第i+1位数据，9≥i≥0，且i为整数；din[j]为所述8比特数据中的第j+1位数据，7≥j≥0，且j为整数；～表示执行取反操作，&表示执行与操作，|表示执行或操作，^表示执行异或操作，所述目标10比特数据为二进制数据。
本公开实施例提供的编码装置，采用上述方式将8比特数据编码为目标10比特数据，得到的目标10比特数据中任意连续5位中至少有一位与其他位不相同，相较于传统的编码方法，能够减少每10比特数据(即编码后的每个字节)中连续且相同的数据的个数，可以保证编码后的数据在后续传输过程中有较好的抖动性能，从而降低传输错误的概率。
本公开实施例提供一种显示装置，包括：
控制器和源极驱动芯片，包括控制器及多个源极驱动芯片。
其中，控制器可以包括编码装置，该编码装置可以为图12或图13所示的编码装置，所述源极驱动芯片可以包括解码装置，该解码装置可以执行本公开上述实施例提供的解码方法。
或者，所述控制器可以包括解码装置，该解码装置可以执行本公开上述实施例提供的解码方法，所述源极驱动芯片可以包括编码装置，该编码装置可以为图12或图13所示的编码装置。
实际应用中，由于控制器和源极驱动芯片的数据是可以进行双向传输的，因此，控制器和源极驱动芯片可以均进行数据的编码，所述控制器和每个所述源极驱动芯片均包括本公开实施例提供的编码装置。
所述显示装置为液晶显示装置或有机发光二极管(英文：Organic Light-Emitting Diode；简称：OLED)显示装置，所述控制器为时序控制器、SOC和MCU中的至少一种。在一个实施例中，该显示装置还可以为电子纸、面板、手机、平板电脑、电视机、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
本公开实施例提供一种编码装置，包括：
处理器；
用于存储所述处理器的可执行指令的存储器；
其中，所述处理器在执行所述可执行指令时，能够实现本公开实施例提供的编码方法。
本公开实施例提供一种计算机可读存储介质，当所述计算机可读存储介质中的指令由处理组件执行时，使得处理组件能够执行本公开实施例提供的编码方法。
公开实施例提供一种信号传输系统，包括：控制器和源极驱动芯片，包括控制器及多个源极驱动芯片，所述控制器和每个所述源极驱动芯片均包括第三方面和第四方面任一所述的编码装置。
图15示出了本公开一个示例性实施例提供的显示装置1000的结构框图。该装置1000可以是液晶面板、电子纸、OLED面板、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。该显示装置包括控制器及多个源极驱动芯片，控制器为时序控制器、SOC和MCU中的至少一种。通常，装置1000还包括有：处理器1001和存储器1002。
处理器1001可以包括一个或多个处理核心，比如4核心处理器、 8核心处理器等。处理器1001可以采用DSP(Digital Signal Processing，数字信号处理)、FPGA(Field-Programmable Gate Array，现场可编程门阵列)、PLA(Programmable Logic Array，可编程逻辑阵列)中的至少一种硬件形式来实现。处理器1001也可以包括主处理器和协处理器，主处理器是用于对在唤醒状态下的数据进行处理的处理器，也称CPU(Central Processing Unit，中央处理器)；协处理器是用于对在待机状态下的数据进行处理的低功耗处理器。在一些实施例中，处理器1001可以在集成有GPU(Graphics Processing Unit，图像处理器)，GPU用于负责显示屏所需要显示的内容的渲染和绘制。一些实施例中，处理器1001还可以包括AI(Artificial Intelligence，人工智能)处理器，该AI处理器用于处理有关机器学习的计算操作。
存储器1002可以包括一个或多个计算机可读存储介质，该计算机可读存储介质可以是非暂态的。存储器1002还可包括高速随机存取存储器，以及非易失性存储器，比如一个或多个磁盘存储设备、闪存存储设备。在一些实施例中，存储器1002中的非暂态的计算机可读存储介质用于存储至少一个指令，该至少一个指令用于被处理器1001所执行以实现本申请中方法实施例提供的数据传输方法。
在一些实施例中，装置1000还可选包括有：外围设备接口1003和至少一个外围设备。处理器1001、存储器1002和外围设备接口1003之间可以通过总线或信号线相连。各个外围设备可以通过总线、信号线或电路板与外围设备接口1003相连。具体地，外围设备包括：射频电路1004、显示屏1005、摄像头1006、音频电路1007、定位组件1008和电源1009中的至少一种。
外围设备接口1003可被用于将I/O(Input/Output，输入/输出)相关的至少一个外围设备连接到处理器1001和存储器1002。在一些实施例中，处理器1001、存储器1002和外围设备接口1003被集成在同一芯片或电路板上；在一些其他实施例中，处理器1001、存储器1002和外围设备接口1003中的任意一个或两个可以在单独的芯片或电路板上实现，本实施例对此不加以限定。
射频电路1004用于接收和发射RF(Radio Frequency，射频)信号，也称电磁信号。射频电路1004通过电磁信号与通信网络以及其他通信设备进行通信。射频电路1004将电信号转换为电磁信号进行发送，或 者，将接收到的电磁信号转换为电信号。可选地，射频电路1004包括：天线系统、RF收发器、一个或多个放大器、调谐器、振荡器、数字信号处理器、编解码芯片组、用户身份器卡等等。射频电路1004可以通过至少一种无线通信协议来与其它装置进行通信。该无线通信协议包括但不限于：万维网、城域网、内联网、各代移动通信网络(2G、3G、4G及5G)、无线局域网和/或WiFi(Wireless Fidelity，无线保真)网络。在一些实施例中，射频电路1004还可以包括NFC(Near Field Communication，近距离无线通信)有关的电路，本申请对此不加以限定。
显示屏1005用于显示UI(User Interface，用户界面)。该UI可以包括图形、文本、图标、视频及其它们的任意组合。当显示屏1005是触摸显示屏时，显示屏1005还具有采集在显示屏1005的表面或表面上方的触摸信号的能力。该触摸信号可以作为控制信号输入至处理器1001进行处理。此时，显示屏1005还可以用于提供虚拟按钮和/或虚拟键盘，也称软按钮和/或软键盘。在一些实施例中，显示屏1005可以为一个，设置装置1000的前面板；在另一些实施例中，显示屏1005可以为至少两个，分别设置在装置1000的不同表面或呈折叠设计；在再一些实施例中，显示屏1005可以是柔性显示屏，设置在装置1000的弯曲表面上或折叠面上。甚至，显示屏1005还可以设置成非矩形的不规则图形，也即异形屏。显示屏1005可以采用LCD(Liquid Crystal Display，液晶显示屏)、OLED(Organic Light-Emitting Diode，有机发光二极管)等材质制备。
摄像头组件1006用于采集图像或视频。可选地，摄像头组件1006包括前置摄像头和后置摄像头。通常，前置摄像头设置在装置的前面板，后置摄像头设置在装置的背面。在一些实施例中，后置摄像头为至少两个，分别为主摄像头、景深摄像头、广角摄像头、长焦摄像头中的任意一种，以实现主摄像头和景深摄像头融合实现背景虚化功能、主摄像头和广角摄像头融合实现全景拍摄以及VR(Virtual Reality，虚拟现实)拍摄功能或者其它融合拍摄功能。在一些实施例中，摄像头组件1006还可以包括闪光灯。闪光灯可以是单色温闪光灯，也可以是双色温闪光灯。双色温闪光灯是指暖光闪光灯和冷光闪光灯的组合，可以用于不同色温下的光线补偿。
音频电路1007可以包括麦克风和扬声器。麦克风用于采集用户及环境的声波，并将声波转换为电信号输入至处理器1001进行处理，或者输入至射频电路1004以实现语音通信。出于立体声采集或降噪的目的，麦克风可以为多个，分别设置在装置1000的不同部位。麦克风还可以是阵列麦克风或全向采集型麦克风。扬声器则用于将来自处理器1001或射频电路1004的电信号转换为声波。扬声器可以是传统的薄膜扬声器，也可以是压电陶瓷扬声器。当扬声器是压电陶瓷扬声器时，不仅可以将电信号转换为人类可听见的声波，也可以将电信号转换为人类听不见的声波以进行测距等用途。在一些实施例中，音频电路1007还可以包括耳机插孔。
定位组件1008用于定位装置1000的当前地理位置，以实现导航或LBS(Location Based Service，基于位置的服务)。定位组件1008可以是基于美国的GPS(Global Positioning System，全球定位系统)、中国的北斗系统或俄罗斯的伽利略系统的定位组件。
电源1009用于为装置1000中的各个组件进行供电。电源1009可以是交流电、直流电、一次性电池或可充电电池。当电源1009包括可充电电池时，该可充电电池可以是有线充电电池或无线充电电池。有线充电电池是通过有线线路充电的电池，无线充电电池是通过无线线圈充电的电池。该可充电电池还可以用于支持快充技术。
在一些实施例中，装置1000还包括有一个或多个传感器1010。该一个或多个传感器1010包括但不限于：加速度传感器1011、陀螺仪传感器1012、压力传感器1013、指纹传感器1014、光学传感器1015以及接近传感器1016。
加速度传感器1011可以检测以装置1000建立的坐标系的三个坐标轴上的加速度大小。比如，加速度传感器1011可以用于检测重力加速度在三个坐标轴上的分量。处理器1001可以根据加速度传感器1011采集的重力加速度信号，控制触摸显示屏1005以横向视图或纵向视图进行用户界面的显示。加速度传感器1011还可以用于游戏或者用户的运动数据的采集。
陀螺仪传感器1012可以检测装置1000的机体方向及转动角度，陀螺仪传感器1012可以与加速度传感器1011协同采集用户对装置1000的3D动作。处理器1001根据陀螺仪传感器1012采集的数据， 可以实现如下功能：动作感应(比如根据用户的倾斜操作来改变UI)、拍摄时的图像稳定、游戏控制以及惯性导航。
压力传感器1013可以设置在装置1000的侧边框和/或触摸显示屏1005的下层。当压力传感器1013设置在装置1000的侧边框时，可以检测用户对装置1000的握持信号，由处理器1001根据压力传感器1013采集的握持信号进行左右手识别或快捷操作。当压力传感器1013设置在触摸显示屏1005的下层时，由处理器1001根据用户对触摸显示屏1005的压力操作，实现对UI界面上的可操作性控件进行控制。可操作性控件包括按钮控件、滚动条控件、图标控件、菜单控件中的至少一种。
指纹传感器1014用于采集用户的指纹，由处理器1001根据指纹传感器1014采集到的指纹识别用户的身份，或者，由指纹传感器1014根据采集到的指纹识别用户的身份。在识别出用户的身份为可信身份时，由处理器1001授权该用户执行相关的敏感操作，该敏感操作包括解锁屏幕、查看加密信息、下载软件、支付及更改设置等。指纹传感器1014可以被设置装置1000的正面、背面或侧面。当装置1000上设置有物理按键或厂商Logo时，指纹传感器1014可以与物理按键或厂商Logo集成在一起。
光学传感器1015用于采集环境光强度。在一个实施例中，处理器1001可以根据光学传感器1015采集的环境光强度，控制触摸显示屏1005的显示亮度。具体地，当环境光强度较高时，调高触摸显示屏1005的显示亮度；当环境光强度较低时，调低触摸显示屏1005的显示亮度。在另一个实施例中，处理器1001还可以根据光学传感器1015采集的环境光强度，动态调整摄像头组件1006的拍摄参数。
接近传感器1016，也称距离传感器，通常设置在装置1000的前面板。接近传感器1016用于采集用户与装置1000的正面之间的距离。在一个实施例中，当接近传感器1016检测到用户与装置1000的正面之间的距离逐渐变小时，由处理器1001控制触摸显示屏1005从亮屏状态切换为息屏状态；当接近传感器1016检测到用户与装置1000的正面之间的距离逐渐变大时，由处理器1001控制触摸显示屏1005从息屏状态切换为亮屏状态。
本领域技术人员可以理解，图15中示出的结构并不构成对装置 1000的限定，可以包括比图示更多或更少的组件，或者组合某些组件，或者采用不同的组件布置。
本公开实施例提供一种芯片，所述芯片包括可编程逻辑电路和/或程序指令，当所述芯片运行时，用于实现本公开实施例提供的编码方法。
本公开实施例提供一种计算机程序产品，所述计算机程序产品中存储有指令，当其在计算机上运行时，使得计算机执行本公开实施例提供的编码方法。
关于上述实施例中的装置，其中各个器执行操作的具体方式已经在有关该方法的实施例中进行了详细描述，此处将不做详细阐述说明。并且，本公开实施例中，“/”可以表示转化，例如，8b/10b表示将8比特数据转化为10比特数据。
本文可以在软件硬件元件或程序模块的一般上下文中描述各种技术。一般地，这些模块包括执行特定任务或实现特定抽象数据类型的例程、程序、对象、元素、组件、数据结构等。本文所使用的术语“模块”，“功能”和“组件”等一般表示软件、固件、硬件或其组合。本文描述的技术的特征是与平台无关的，意味着这些技术可以在具有各种处理器的各种计算平台上实现。
本领域技术人员在考虑说明书及实践这里公开的发明后，将容易想到本申请的其它实施方案。本申请旨在涵盖本申请的任何变型、用途或者适应性变化，这些变型、用途或者适应性变化遵循本申请的一般性原理并包括本申请未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的，本申请的真正范围和精神由权利要求指出。
应当理解的是，本申请并不局限于上面已经描述并在附图中示出的精确结构，并且可以在不脱离其范围进行各种修改和改变。本申请的范围仅由所附的权利要求来限制。

Claims (19)

  1. 一种编码方法，其特征在于，包括：
    将待传输数据的待编码字节对应的8比特数据编码为备选10比特数据，所述待传输数据包括至少一个待编码字节；
    当所述待编码字节不是所述待传输数据的首个字节时，检测所述备选10比特数据的第一位数据与所述第一位数据相邻的前一位数据是否相同；
    当所述第一位数据与所述前一位数据的数值相同时，将所述备选10比特数据取反，得到目标10比特数据；
    当所述第一位数据与所述前一位数据的数值不同时，将所述备选10比特数据确定为目标10比特数据；
    其中，所述8比特数据、所述备选10比特数据和所述目标10比特数据均为二进制数据。
  2. 根据权利要求1所述的方法，其特征在于，
    所述备选10比特数据满足：
    enc[k1]＝～din[m]；
    enc[k2]＝～din[m]^F；
    其中，enc[k1]为所述备选10比特数据中的指定位数据，enc[k2]为所述备选10比特数据中除所述指定位数据之外的数据，所述din[m]为所述8比特数据中的指定位数据，所述F为基于所述8比特数据中的其他位数据中的至少一者确定的数据，～表示执行取反操作，^表示执行异或操作。
  3. 根据权利要求2所述的方法，其特征在于，
    所述将待传输数据的待编码字节对应的8比特数据编码为备选10比特数据，包括：
    按照如下方式将所述8比特数据编码为所述备选10比特数据：
    enc[9]＝～din[3]；
    enc[8]＝～din[3]^din[7]；
    enc[7]＝～din[3]^din[4]；
    enc[6]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&din[0])|(din[1]&din[0]))；
    enc[5]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&～din[0])|(din[1]&～din[0]))；
    enc[4]＝～din[3]^din[6]；
    enc[3]＝～din[3]^din[5]；
    enc[2]＝～din[3]^((din[2]&～din[1])|(din[2]&din[1]&～din[3])|(～din[1]&din[0]))；
    enc[1]＝～din[3]^((～din[2]&din[1])|(din[2]&din[1]&～din[3])|(～din[2]&～din[0]))；
    enc[0]＝～din[3]^din[3]；
    其中，enc[i]为所述备选10比特数据中的第i+1位数据，9≥i≥0，且i为整数；din[j]为所述8比特数据中的第j+1位数据，7≥j≥0，且j为整数；&表示执行与操作，以及|表示执行或操作。
  4. 根据权利要求1至3任一所述的方法，其特征在于，所述备选10比特数据的第一位数据为第一数值，
    所述检测所述备选10比特数据的第一位数据与所述第一位数据相邻的前一位数据是否相同，包括：
    检测与所述前一位数据是否为所述第一数值；
    当所述前一位数据为所述第一数值，确定所述第一位数据与所述前一位数据相同；
    当所述前一位数据为所述第一数值，确定所述第一位数据与所述前一位数据不同。
  5. 根据权利要求1至3任一所述的方法，其特征在于，所述方法还包括：
    在编码后的所述待传输数据的预设位置添加第一标识码得到目标数据，所述第一标识码为预设的10比特数据，所述第一标识码包括至少连续6位相同的数据，所述第一标识码用于标识传输内容、传输开始或传输结束，所述编码后的所述待传输数据包括由所述待编码字节对应的8比特数据编码得到的目标10比特数据以便发送。
  6. 根据权利要求1至3任一所述的方法，其特征在于，所述方法还包括：
    将所述第一标识码和第二标识码拼接得到组合码，所述第一标识码和所述第二标识码均为预设的10比特数据，并且均包括至少连续6 位相同的数据，所述第二标识码与所述第一标识码不同；
    在编码后的所述待传输数据的预设位置添加所述组合码得到所述目标数据以便发送。
  7. 一种编码方法，其特征在于，包括：
    按照如下方式将待传输数据的待编码字节对应的8比特数据编码为目标10比特数据：
    enc[9]＝～din[3]；
    enc[8]＝～din[3]^din[7]；
    enc[7]＝～din[3]^din[4]；
    enc[6]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&din[0])|(din[1]&din[0]))；
    enc[5]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&～din[0])|(din[1]&～din[0]))；
    enc[4]＝～din[3]^din[6]；
    enc[3]＝～din[3]^din[5]；
    enc[2]＝～din[3]^((din[2]&～din[1])|(din[2]&din[1]&～din[3])|(～din[1]&din[0]))；
    enc[1]＝～din[3]^((～din[2]&din[1])|(din[2]&din[1]&～din[3])|(～din[2]&～din[0]))；
    enc[0]＝～din[3]^din[3]；
    其中，enc[i]为所述10比特数据中的第i+1位数据，9≥i≥0，且i为整数；din[j]为所述8比特数据中的第j+1位数据，7≥j≥0，且j为整数；～表示执行取反操作，&表示执行与操作，|表示执行或操作，^表示执行异或操作，所述8比特数据和所述目标10比特数据为二进制数据。
  8. 一种编码装置，其特征在于，包括：
    编码器，用于将待传输数据的待编码字节对应的8比特数据编码为备选10比特数据，所述待传输数据包括至少一个待编码字节；
    检测器，用于当所述待编码字节不是所述待传输数据的首个字节时，检测所述备选10比特数据的第一位数据与所述第一位数据相邻的前一位数据是否相同；
    所述编码器，还用于：
    当所述第一位数据与所述前一位数据的数值相同时，将所述备选10比特数据取反，得到目标10比特数据；
    当所述第一位数据与所述前一位数据的数值不同时，将所述备选10比特数据确定为目标10比特数据；
    其中，所述8比特数据、所述备选10比特数据和所述目标10比特数据均为二进制数据。
  9. 根据权利要求8所述的装置，其特征在于，
    所述备选10比特数据满足：
    enc[k1]＝～din[m]；
    enc[k2]＝～din[m]^F；
    其中，enc[k1]为所述备选10比特数据中的指定位数据，enc[k2]为所述备选10比特数据中除所述指定位数据之外的数据，所述din[m]为所述8比特数据中的指定位数据，所述F为基于所述8比特数据中的其他位数据中的至少一者确定的数据，～表示执行取反操作，^表示执行异或操作。
  10. 根据权利要求9所述的装置，其特征在于，
    所述编码器，用于：
    按照如下方式将所述8比特数据编码为所述备选10比特数据：
    enc[9]＝～din[3]；
    enc[8]＝～din[3]^din[7]；
    enc[7]＝～din[3]^din[4]；
    enc[6]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&din[0])|(din[1]&din[0]))；
    enc[5]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&～din[0])|(din[1]&～din[0]))；
    enc[4]＝～din[3]^din[6]；
    enc[3]＝～din[3]^din[5]；
    enc[2]＝～din[3]^((din[2]&～din[1])|(din[2]&din[1]&～din[3])|(～din[1]&din[0]))；
    enc[1]＝～din[3]^((～din[2]&din[1])|(din[2]&din[1]&～din[3])|(～din[2]&～din[0]))；
    enc[0]＝～din[3]^din[3]；
    其中，enc[i]为所述备选10比特数据中的第i+1位数据，9≥i≥0，且i为整数；din[j]为所述8比特数据中的第j+1位数据，7≥j≥0，且j为整数；&表示执行与操作，以及|表示执行或操作。
  11. 根据权利要求8至10任一所述的装置，其特征在于，所述备选10比特数据的第一位数据为第一数值，
    所述检测器，用于：
    检测与所述前一位数据是否为所述第一数值；
    当所述前一位数据为所述第一数值，确定所述第一位数据与所述前一位数据相同；
    当所述前一位数据为所述第一数值，确定所述第一位数据与所述前一位数据不同。
  12. 根据权利要求8至10任一所述的装置，其特征在于，所述装置还包括：
    处理器，用于在编码后的所述待传输数据的预设位置添加第一标识码得到目标数据，所述第一标识码为预设的10比特数据，所述第一标识码包括至少连续6位相同的数据，所述第一标识码用于标识传输内容、传输开始或传输结束，所述编码后的所述待传输数据包括由所述待编码字节对应的8比特数据编码得到的目标10比特数据以便发送。
  13. 根据权利要求8至10任一所述的装置，其特征在于，处理器，用于：
    将所述第一标识码和第二标识码拼接得到组合码，所述第一标识码和所述第二标识码均为预设的10比特数据，并且均包括至少连续6位相同的数据，所述第二标识码与所述第一标识码不同；
    在编码后的所述待传输数据的预设位置添加所述组合码得到所述目标数据以便发送。
  14. 一种编码装置，其特征在于，包括：
    编码器，用于按照如下方式将待传输数据的待编码字节对应的8比特数据编码为目标10比特数据：
    enc[9]＝～din[3]；
    enc[8]＝～din[3]^din[7]；
    enc[7]＝～din[3]^din[4]；
    enc[6]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&din[0])| (din[1]&din[0]))；
    enc[5]＝～din[3]^((～din[2]&～din[1]&～din[4])|(din[2]&～din[0])|(din[1]&～din[0]))；
    enc[4]＝～din[3]^din[6]；
    enc[3]＝～din[3]^din[5]；
    enc[2]＝～din[3]^((din[2]&～din[1])|(din[2]&din[1]&～din[3])|(～din[1]&din[0]))；
    enc[1]＝～din[3]^((～din[2]&din[1])|(din[2]&din[1]&～din[3])|(～din[2]&～din[0]))；
    enc[0]＝～din[3]^din[3]；
    其中，enc[i]为所述10比特数据中的第i+1位数据，9≥i≥0，且i为整数；din[j]为所述8比特数据中的第j+1位数据，7≥j≥0，且j为整数；～表示执行取反操作，&表示执行与操作，|表示执行或操作，^表示执行异或操作，所述8比特数据和所述目标10比特数据为二进制数据。
  15. 一种显示装置，其特征在于，包括：
    控制器和源极驱动芯片，包括控制器及多个源极驱动芯片，所述控制器包括权利要求7至12任一所述的编码装置。
  16. 根据权利要求15所述的显示装置，其特征在于，
    所述显示装置为液晶显示装置或OLED显示装置，所述控制器包括时序控制器、系统芯片SOC和微控制单元MCU中的至少一种。
  17. 一种编码装置，其特征在于，包括：
    处理器；
    用于存储所述处理器的可执行指令的存储器；
    其中，所述处理器在执行所述可执行指令时，能够实现权利要求1至7任一所述的编码方法。
  18. 一种计算机可读存储介质，其特征在于，
    当所述计算机可读存储介质中的指令由处理组件执行时，使得处理组件能够执行权利要求1至7任一所述的编码方法。
  19. 一种信号传输系统，其特征在于，包括：
    控制器和源极驱动芯片，包括控制器及多个源极驱动芯片，所述控制器和每个所述源极驱动芯片均包括权利要求7至12任一所述的编 码装置。
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