WO2020038079A1 - Igbt及其制造方法 - Google Patents

Igbt及其制造方法 Download PDF

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WO2020038079A1
WO2020038079A1 PCT/CN2019/090835 CN2019090835W WO2020038079A1 WO 2020038079 A1 WO2020038079 A1 WO 2020038079A1 CN 2019090835 W CN2019090835 W CN 2019090835W WO 2020038079 A1 WO2020038079 A1 WO 2020038079A1
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ion
igbt
target region
doped
boron
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PCT/CN2019/090835
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French (fr)
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王学良
刘建华
郎金荣
闵亚能
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上海先进半导体制造股份有限公司
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Priority to US17/259,961 priority Critical patent/US11652164B2/en
Publication of WO2020038079A1 publication Critical patent/WO2020038079A1/zh

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    • HELECTRICITY
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
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    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395Vertical transistors, e.g. vertical IGBT
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    • H01L29/1095Body region, i.e. base region, of DMOS transistors or IGBTs
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    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
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    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66325Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
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    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66325Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
    • H01L29/66333Vertical insulated gate bipolar transistors
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    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395Vertical transistors, e.g. vertical IGBT
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    • H01L29/083Anode or cathode regions of thyristors or gated bipolar-mode devices
    • H01L29/0834Anode regions of thyristors or gated bipolar-mode devices, e.g. supplementary regions surrounding anode regions

Definitions

  • the present invention relates to the field of semiconductor technology, and in particular, to an IGBT and a manufacturing method thereof.
  • IGBT Insulated Gate Bipolar Transistor
  • BJT Bipolar Junction Transistor
  • MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor
  • the PN junction formed by diffusing boron ions is a sudden junction.
  • the PN junction is related to performance such as breakdown voltage and off time.
  • the sudden PN The junction limits the further improvement of current IGBT performance.
  • the technical problem to be solved by the present invention is to overcome the defect that the PN junction of the IGBT is a sudden junction in the prior art, and provides an IGBT and a manufacturing method thereof.
  • An IGBT is characterized in that a target region in the IGBT is doped with a first ion, wherein the target region includes at least one of a P-type substrate, a P-type well region, and a P-type source region.
  • the diffusion coefficient of the first ion is greater than that of the boron ion.
  • the first ion is selected from the group consisting of aluminum ion, gallium ion, indium ion, and thallium ion.
  • the target region is further doped with a second ion, and a diffusion coefficient of the second ion is not less than a diffusion coefficient of the boron ion.
  • the first ion and the second ion are located in different layers.
  • the first ion is selected from the group consisting of aluminum ion, gallium ion, indium ion, and thallium ion;
  • the second ion is selected from the group consisting of boron ion, aluminum ion, gallium ion, indium ion, and thallium ion.
  • the first ion is an aluminum ion
  • the second ion is a gallium ion
  • boron ions are doped on contact surfaces between the target region and other regions in the IGBT.
  • a method for manufacturing an IGBT which is characterized in that the method includes:
  • a first ion is doped in a target region of the IGBT, and the first ion is doped into the target region by any one of ion implantation, diffusion, evaporation, and sputtering;
  • the target region includes at least one of a P-type substrate, a P-type well region, and a P-type source region, and a diffusion coefficient of the first ion is greater than a diffusion coefficient of a boron ion.
  • the method further includes:
  • Doping a second ion into the target region the second ion being doped into the target region by any one of ion implantation, diffusion, evaporation, and sputtering;
  • the diffusion coefficient of the second ion is not less than the diffusion coefficient of the boron ion.
  • the method further includes:
  • a contact surface between the target region and other regions in the IGBT is doped with boron ions.
  • the positive progress effect of the present invention lies in that the diffusion coefficient of doped impurities in the P-type region of the IGBT of the present invention is larger than that of boron ions, unlike the prior art, which uses boron ions as doped impurities, and thus forms under the same conditions
  • the shape of the impurity distribution is more gradual, that is, the PN junction formed is a gradual junction, which further improves the breakdown voltage, shortens the off time, improves the anti-latch ability, and further improves the performance of the IGBT.
  • the impurity diffusion coefficient of the present invention is large, a wider and deeper PN junction can be formed at a lower temperature and in a shorter time, which has a certain cost advantage.
  • FIG. 1 is a schematic structural diagram of an IGBT according to Embodiment 1 of the present invention.
  • FIG. 2 is a flowchart of a method of manufacturing an IGBT according to Embodiment 2 of the present invention.
  • FIG. 3 is a flowchart of a method of manufacturing an IGBT according to Embodiment 4 of the present invention.
  • FIG. 1 shows a schematic structural diagram of this embodiment.
  • the IGBT in this embodiment includes:
  • the target region includes at least one of a P-type substrate 11, a P-type well region 13, and a P-type source region 14.
  • a doping impurity in the target region has a diffusion coefficient greater than that of boron ions.
  • the first ion specifically, the first ion may be, but is not limited to, an aluminum ion, a gallium ion, an indium ion, and a thallium ion.
  • the doping concentration and depth of the first ion can be customized according to specific applications.
  • the first ion doped with impurities in the present embodiment is the above-mentioned metal ion
  • boron ions can be further doped on the contact surface between the target region and other regions, in other words, a surface of the target region is covered with a layer of boron. Ions to avoid metal contamination caused by doped metal ions.
  • the diffusion coefficient of the first ion doped in the IGBT target region is larger than the diffusion coefficient of boron ions, unlike the prior art, which uses boron ions as doping impurities, and thus forms an impurity profile under the same conditions.
  • the appearance is more gradual, that is, the formed PN junction is a gradual junction, which further improves the breakdown voltage, shortens the off time, improves the anti-latch ability, and further improves the performance of the IGBT.
  • the impurity diffusion coefficient of the present invention is large, a wider and deeper PN junction can be formed at a lower temperature and in a shorter time, which has a certain cost advantage.
  • FIG. 2 shows a flowchart of this embodiment. Referring to FIG. 2, the method in this embodiment includes:
  • the corresponding P-type substrate 11, P-type well region 13, and P-type source region 14 are specifically formed, wherein the first ions can be passed through, but not limited to, ion implantation, diffusion, and evaporation. Either sputtering or doping into the target area.
  • the boron ions can also be doped to the specific contact surface through, but not limited to, the above manner to avoid metal contamination caused by the doped metal ions.
  • This embodiment provides an IGBT on the basis of Embodiment 1.
  • the improvement of the IGBT of this embodiment over that of Embodiment 1 is that the target region of this embodiment is at least one of the P-type substrate 11, the P-type well region 13, and the P-type source region 14.
  • a second ion is also doped.
  • the diffusion coefficient of the second ion is not less than that of the boron ion.
  • the second ion may be, but is not limited to, a boron ion and an aluminum ion. , Gallium ion, indium ion, thallium ion.
  • the first ion is preferably an aluminum ion
  • the second ion is preferably a gallium ion
  • the first ion is preferably a gallium ion
  • the second ion is preferably an aluminum ion.
  • the first ions and the second ions can be doped with each other or distributed in different layers according to the specific application. The doping concentration and depth of the second ion can also be customized according to the specific application.
  • the diffusion coefficients of the first ion and the second ion doped in the IGBT target region are not less than the diffusion coefficient of the boron ion.
  • boron ion is used as the doping impurity, so that under the same conditions
  • the shape of the impurity distribution formed below is more gradual, that is, the PN junction formed is a gradual junction, which further improves the breakdown voltage, shortens the off time, improves the anti-latch ability, and further improves the performance of IGBT.
  • the impurity diffusion coefficient of the present invention is large, a wider and deeper PN junction can be formed at a lower temperature and in a shorter time, which has a certain cost advantage.
  • FIG. 3 shows a flowchart of this embodiment. Referring to FIG. 3, the method in this embodiment includes:
  • the corresponding P-type substrate 11, P-type well region 13, and P-type source region 14 are specifically formed.
  • the first and second ions may be implanted through, but not limited to, ion implantation. Doping, diffusion, evaporation, or sputtering into the target area.
  • the boron ions can also be doped to the specific contact surface through, but not limited to, the above manner to avoid metal contamination caused by the doped metal ions.

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Abstract

一种IGBT及其制造方法,其中,所述IGBT中的目标区域掺杂有第一离子,所述目标区域包括P型衬底(11)、P型阱区(13)、P型源区(14)中的至少一种,所述第一离子的扩散系数大于硼离子的扩散系数。采用本发明形成的PN结为渐变结,提高了击穿电压、缩短了关断时间、提升了抗闩锁能力。

Description

IGBT及其制造方法
本申请要求申请日为2018年8月23日的中国专利申请CN201810967106.7的优先权。本申请引用上述中国专利申请的全文。
技术领域
本发明涉及半导体技术领域,尤其涉及一种IGBT及其制造方法。
背景技术
IGBT(Insulated Gate Bipolar Transistor,绝缘栅双极型晶体管)综合了BJT(Bipolar Junction Transistor,双极型三极管)和功率MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor,金氧半场效晶体管)的优点,兼有高输入阻抗和低导通压降两方面的优点,在各种功率集成电路领域得到广泛的应用。
但是,在当前的IGBT中,受限于元素硼的物理性能,扩散硼离子形成的PN结为突变结,又有,PN结与击穿电压、关断时间等性能相关,进而,突变的PN结限制了当前IGBT性能的进一步提升。
发明内容
本发明要解决的技术问题是为了克服现有技术中IGBT的PN结是突变结的缺陷,提供一种IGBT及其制造方法。
本发明是通过下述技术方案来解决上述技术问题:
一种IGBT,其特点在于,所述IGBT中的目标区域掺杂有第一离子,其中,所述目标区域包括P型衬底、P型阱区、P型源区中的至少一种,所述第一离子的扩散系数大于硼离子的扩散系数。
较佳地,所述第一离子选自:铝离子、镓离子、铟离子、铊离子。
较佳地,所述目标区域还掺杂有第二离子,所述第二离子的扩散系数不小于硼离子的扩散系数。
较佳地,所述第一离子和所述第二离子位于不同的层。
较佳地,所述第一离子选自:铝离子、镓离子、铟离子、铊离子;
所述第二离子选自:硼离子、铝离子、镓离子、铟离子、铊离子。
较佳地,所述第一离子是铝离子,所述第二离子是镓离子。
较佳地,所述目标区域与所述IGBT中其他区域的接触面上掺杂有硼离子。
一种制造IGBT的方法,其特点在于,所述方法包括:
在所述IGBT的目标区域掺杂第一离子,所述第一离子经由离子注入、扩散、蒸发、溅射中任一种方式掺杂到所述目标区域;
其中,所述目标区域包括P型衬底、P型阱区、P型源区中的至少一种,所述第一离子的扩散系数大于硼离子的扩散系数。
较佳地,所述方法还包括:
在所述目标区域掺杂第二离子,所述第二离子经由离子注入、扩散、蒸发、溅射中任一种方式掺杂到所述目标区域;
其中,所述第二离子的扩散系数不小于硼离子的扩散系数。
较佳地,所述方法还包括:
在所述目标区域与所述IGBT中其他区域的接触面上掺杂硼离子。
本发明的积极进步效果在于:本发明IGBT的P型区的掺杂杂质的扩散系数大于硼离子的扩散系数,不似现有技术中采用硼离子作为掺杂杂质,从而在相同条件下形成的杂质分布形貌更为渐变,也即形成的PN结为渐变结,进而提高了击穿电压、缩短了关断时间、提升了抗闩锁能力,进一步改良了IGBT的性能。此外,由于本发明的杂质扩散系数较大,从而能够在较低温度、较短时间内形成更宽、更深的PN结,具有一定的成本优势。
附图说明
图1为根据本发明实施例1的IGBT的结构示意图。
图2为根据本发明实施例2的制造IGBT的方法的流程图。
图3为根据本发明实施例4的制造IGBT的方法的流程图。
具体实施方式
下面通过实施例的方式进一步说明本发明,但并不因此将本发明限制在所述的实施例范围之中。
实施例1
本实施例提供了一种IGBT,图1示出了本实施例的结构示意图。参见图1,本实施例的IGBT从下至上依次包括:
位于IGBT背面的集电极C、P型衬底11、N型漂移区12、位于N型漂移区12两端的P型阱区13、位于P型阱区13上方的P型源区14以及N型源区15、位于P型源区14和部分N型源区15上方的发射极E、位于部分N型源区15、部分P型阱区13以及部分N型漂移区12上方的栅极G。
在本实施例的IGBT中,目标区域包括P型衬底11、P型阱区13以及P型源区14中的至少一种,本实施例中目标区域的掺杂杂质是扩散系数大于硼离子的第一离子,具体地,第一离子可以是但不限于铝离子、镓离子、铟离子、铊离子。
在本实施例中,第一离子的掺杂浓度和深度可以根据具体应用进行自定义设置。
由于本实施例中掺杂杂质第一离子是上述金属离子,进而可以在目标区域与其他区域的接触面上再掺杂硼离子,换句话说,也即在目标区域的表面上覆盖一层硼离子,以避免掺杂的金属离子所造成的金属污染。
在本实施例中,IGBT目标区域所掺杂的第一离子的扩散系数大于硼离子的扩散系数,不似现有技术中采用硼离子作为掺杂杂质,从而在相同条件 下形成的杂质分布形貌更为渐变,也即形成的PN结为渐变结,进而提高了击穿电压、缩短了关断时间、提升了抗闩锁能力,进一步改良了IGBT的性能。此外,由于本发明的杂质扩散系数较大,从而能够在较低温度、较短时间内形成更宽、更深的PN结,具有一定的成本优势。
实施例2
本实施例提供一种制造IGBT的方法,用于制造实施例1的IGBT,图2示出了本实施例的流程图。参见图2,本实施例的方法包括:
S101、在目标区域掺杂第一离子;
S102、在目标区域与IGBT中其他区域的接触面上掺杂硼离子。
从而根据实施例1中目标区域的选择,以具体形成相应的P型衬底11、P型阱区13、P型源区14,其中,第一离子可以经由但不限于离子注入、扩散、蒸发、溅射中任一种方式掺杂到目标区域中。此外,硼离子也可以经由但不限于上述方式掺杂到具体接触面上,以避免掺杂的金属离子所造成的金属污染。
实施例3
本实施例在实施例1的基础上提供一种IGBT。具体地,本实施例的IGBT较之实施例1的改进之处在于,本实施例的目标区域,也即P型衬底11、P型阱区13以及P型源区14中的至少一种,除了掺杂有第一离子之外,还掺杂有第二离子,该第二离子的扩散系数不小于硼离子的扩散系数,具体地,第二离子可以是但不限于硼离子、铝离子、镓离子、铟离子、铊离子。
在本实施例中,第一离子优选铝离子,第二离子优选镓离子,或者,第一离子优选镓离子,第二离子优选铝离子。此外,第一离子和第二离子根据具体应用既可以相互掺杂在一起,也可以分布在不同的层。第二离子的掺杂浓度和深度也可以根据具体应用进行自定义设置。
在本实施例中,IGBT目标区域所掺杂的第一离子、第二离子的扩散系数均不小于硼离子的扩散系数,不似现有技术中采用硼离子作为掺杂杂质, 从而在相同条件下形成的杂质分布形貌更为渐变,也即形成的PN结为渐变结,进而提高了击穿电压、缩短了关断时间、提升了抗闩锁能力,进一步改良了IGBT的性能。此外,由于本发明的杂质扩散系数较大,从而能够在较低温度、较短时间内形成更宽、更深的PN结,具有一定的成本优势。
实施例4
本实施例提供一种制造IGBT的方法,用于制造实施例3的IGBT,图3示出了本实施例的流程图。参见图3,本实施例的方法包括:
S201、在目标区域掺杂第一离子;
S202、在目标区域掺杂第二离子;
S203、在目标区域与IGBT中其他区域的接触面上掺杂硼离子。
从而根据实施例3中目标区域的选择,以具体形成相应的P型衬底11、P型阱区13、P型源区14,其中,第一离子和第二离子可以经由但不限于离子注入、扩散、蒸发、溅射中任一种方式掺杂到目标区域中。此外,硼离子也可以经由但不限于上述方式掺杂到具体接触面上,以避免掺杂的金属离子所造成的金属污染。
虽然以上描述了本发明的具体实施方式,但是本领域的技术人员应当理解,这些仅是举例说明,在不背离本发明的原理和实质的前提下,可以对这些实施方式做出多种变更或修改。因此,本发明的保护范围由所附权利要求书限定。

Claims (10)

  1. 一种IGBT,其特征在于,所述IGBT中的目标区域掺杂有第一离子,其中,所述目标区域包括P型衬底、P型阱区、P型源区中的至少一种,所述第一离子的扩散系数大于硼离子的扩散系数。
  2. 如权利要求1所述的IGBT,其特征在于,所述第一离子选自:铝离子、镓离子、铟离子、铊离子。
  3. 如权利要求1所述的IGBT,其特征在于,所述目标区域还掺杂有第二离子,所述第二离子的扩散系数不小于硼离子的扩散系数。
  4. 如权利要求3所述的IGBT,其特征在于,所述第一离子和所述第二离子位于不同的层。
  5. 如权利要求3所述的IGBT,其特征在于,所述第一离子选自:铝离子、镓离子、铟离子、铊离子;
    所述第二离子选自:硼离子、铝离子、镓离子、铟离子、铊离子。
  6. 如权利要求5所述的IGBT,其特征在于,所述第一离子是铝离子,所述第二离子是镓离子。
  7. 权利要求1或3所述的IGBT,其特征在于,所述目标区域与所述IGBT中其他区域的接触面上掺杂有硼离子。
  8. 一种制造IGBT的方法,其特征在于,所述方法包括:
    在所述IGBT的目标区域掺杂第一离子,所述第一离子经由离子注入、扩散、蒸发、溅射中任一种方式掺杂到所述目标区域;
    其中,所述目标区域包括P型衬底、P型阱区、P型源区中的至少一种,所述第一离子的扩散系数大于硼离子的扩散系数。
  9. 如权利要求8所述的制造IGBT的方法,其特征在于,所述方法还包括:
    在所述目标区域掺杂第二离子,所述第二离子经由离子注入、扩散、蒸 发、溅射中任一种方式掺杂到所述目标区域;
    其中,所述第二离子的扩散系数不小于硼离子的扩散系数。
  10. 如权利要求8或9所述的制造IGBT的方法,其特征在于,所述方法还包括:
    在所述目标区域与所述IGBT中其他区域的接触面上掺杂硼离子。
PCT/CN2019/090835 2018-08-23 2019-06-12 Igbt及其制造方法 WO2020038079A1 (zh)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104064587A (zh) * 2013-03-22 2014-09-24 株式会社东芝 半导体装置及其制造方法
CN106024933A (zh) * 2016-08-04 2016-10-12 江南大学 一种晶体硅太阳电池的背面局部双质杂质掺杂结构及其掺杂方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4096838B2 (ja) * 2003-08-20 2008-06-04 富士電機デバイステクノロジー株式会社 半導体装置およびその製造方法
JP6421487B2 (ja) * 2014-07-31 2018-11-14 富士電機株式会社 半導体装置および半導体装置の製造方法
US9577045B2 (en) * 2014-08-04 2017-02-21 Fairchild Semiconductor Corporation Silicon carbide power bipolar devices with deep acceptor doping
CN107481929B (zh) * 2016-06-08 2020-08-25 中芯国际集成电路制造(上海)有限公司 一种半导体器件及其制造方法、电子装置
CN110858609B (zh) 2018-08-23 2021-11-05 上海先进半导体制造股份有限公司 Igbt及其制造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104064587A (zh) * 2013-03-22 2014-09-24 株式会社东芝 半导体装置及其制造方法
CN106024933A (zh) * 2016-08-04 2016-10-12 江南大学 一种晶体硅太阳电池的背面局部双质杂质掺杂结构及其掺杂方法

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
BALIGA, SILICON POWER FIELD CONTROLLED DEVICES AND INTEGRATED CIRCUITS, 31 December 1986 (1986-12-31), pages 70 - 71 *
TAYLOR, DESIGN AND MANUFACTURE OF THYRISTORS, 31 July 1992 (1992-07-31), pages 99 *
WAN, JIQING ET AL., PRINCIPLES OF POWER TRANSISTORS, 31 March 2009 (2009-03-31), pages 169 - 170 *

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