WO2020015178A1 - 液晶显示器 - Google Patents

液晶显示器 Download PDF

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Publication number
WO2020015178A1
WO2020015178A1 PCT/CN2018/107813 CN2018107813W WO2020015178A1 WO 2020015178 A1 WO2020015178 A1 WO 2020015178A1 CN 2018107813 W CN2018107813 W CN 2018107813W WO 2020015178 A1 WO2020015178 A1 WO 2020015178A1
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Prior art keywords
circuit
reset
capacitor
voltage
terminal
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PCT/CN2018/107813
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English (en)
French (fr)
Inventor
张先明
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深圳市华星光电半导体显示技术有限公司
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Priority to US16/308,475 priority Critical patent/US11074878B2/en
Publication of WO2020015178A1 publication Critical patent/WO2020015178A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/026—Arrangements or methods related to booting a display
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/027—Arrangements or methods related to powering off a display

Definitions

  • the present invention relates to the field of display technology, and in particular, to a liquid crystal display.
  • Liquid crystal displays have many advantages such as thin body, power saving, and no radiation, and have been widely used, such as LCD TVs, smart phones, digital cameras, tablet computers, computer screens, or notebook computer screens. In the field of flat panel displays, Dominant.
  • liquid crystal display devices which include a liquid crystal display panel and a backlight module.
  • a liquid crystal display panel is composed of a color film substrate, an array substrate, a liquid crystal sandwiched between the color film substrate and the array substrate, and a frame adhesive.
  • the liquid crystal display controls the orientation of liquid crystal molecules through an electric field, changes the polarization state of light, and realizes the purpose of display by transmitting and blocking the light path through a polarizing plate.
  • the timing controller is a key component in the driving circuit of the liquid crystal display. It is generally used to convert the low-voltage differential signal (LVDS) signal sent by the motherboard into the gate driving signal and source driving signal required for the LCD panel display. Complete the conversion output of the low-voltage differential signal to the mini-LVDS, and output various control timings required for the gate drive and source drive.
  • the timing controller is generally provided with a reset circuit to ensure normal operation after power-on.
  • FIG. 1 shows the basic circuit diagram of the existing timing controller reset.
  • the power supply voltage VDD starts to charge the first capacitor C1 through the first resistor R1
  • the reset pin voltage Vrst is initially low
  • the timing controller starts to reset.
  • the reset pin voltage Vrst is high. Potential, the timing controller reset ends.
  • the charge on the first capacitor C1 cannot be completely discharged when the machine is quickly turned on and off, but the power supply voltage / core voltage (VDD / Vcore) voltage may have been completely discharged, which may cause it to appear when the machine is turned on again. abnormal.
  • an object of the present invention is to provide a liquid crystal display to prevent abnormal reset when the machine is turned on and off quickly.
  • the present invention provides a liquid crystal display, including:
  • Timing controller which includes a reset pin, a reset auxiliary pin, a charging circuit, and a charging control circuit
  • the reset pin circuit includes a first resistor and a first capacitor, a first terminal of the first resistor and a first terminal of the first capacitor are respectively connected to the reset pin, and a second terminal of the first resistor is connected to a power supply voltage, The second end of the first capacitor is grounded;
  • the reset auxiliary pin circuit includes a second resistor and a second capacitor, a first end of the second resistor and a first end of the second capacitor are respectively connected to the reset auxiliary pin, a second end of the second resistor and a second The second end of the capacitor is grounded;
  • the charging circuit includes a current source and a current source switch.
  • the current source is connected to the input terminal of the current source switch, the output terminal of the current source switch is connected to the first terminal of the second capacitor, and the control terminal of the current source switch is connected to control whether the charging circuit is A charging control signal for charging the second capacitor;
  • the charging control circuit is used to generate a charging control signal.
  • the charging control signal controls the charging circuit. Charge the second capacitor.
  • the charging control circuit includes:
  • a logic processing circuit for determining whether the voltage of the reset auxiliary pin is less than a preset first reference voltage and whether the voltage of the reset pin is greater than a preset second reference voltage
  • the charging control signal generating circuit generates a charging control signal according to a judgment result of the logic processing circuit.
  • the logic processing circuit includes:
  • a first comparator configured to compare a reset auxiliary pin voltage with a first reference voltage, and output a first result to a logic circuit
  • a second comparator configured to compare the reset pin voltage with a second reference voltage, and output a second result to the logic circuit
  • the logic circuit judges whether the condition is satisfied according to the first result and the second result, and outputs a third result to the charging control signal generating circuit.
  • the logic circuit is an AND gate circuit.
  • the inverting input terminal of the first comparator inputs the reset auxiliary pin voltage, and the non-inverting input terminal inputs the first reference voltage.
  • the non-inverting input terminal of the second comparator inputs the reset pin voltage, and the inverting input terminal inputs the second reference voltage.
  • the charging control signal generating circuit includes:
  • the control terminal inputs the result of the logic processing circuit, the anode is connected to the control terminal of the switch tube, and the cathode is grounded;
  • the control terminal of the switch tube is connected to the power supply voltage via a third resistor, the first terminal is grounded, the second terminal is connected to the power supply voltage via a fourth resistor, and the second terminal is also connected to a charging control signal.
  • the unidirectional thyristor is composed of an NPN transistor and a PNP transistor.
  • the current source switch is a metal oxide semiconductor field effect transistor.
  • the liquid crystal display of the present invention determines whether the reset is started or ended through the joint action of the reset auxiliary pin and the reset pin to prevent abnormalities during fast power-on and power-off. Time to reset, it can also meet the requirements of delaying VDD power on for a certain period of time during fast power-on and reset.
  • FIG. 1 is a schematic diagram of a basic circuit for resetting an existing timing controller
  • FIG. 2 is a schematic circuit diagram of a liquid crystal display according to a preferred embodiment of the present invention.
  • FIG. 2 it is a schematic circuit diagram of a preferred embodiment of a liquid crystal display of the present invention, which mainly includes: a reset pin circuit 1, a reset auxiliary pin circuit 2, and a timing controller; the timing controller includes a reset pin and a reset. Auxiliary pin, charging circuit 3 and charging control circuit 4 for controlling reset auxiliary pin voltage; charging control circuit 4 includes logic processing circuit 5 and charging control signal generating circuit 6; when the timing controller power-on condition is met, charging control The circuit 4 generates a charging control signal Reset_EN to control the charging circuit 3 to start charging.
  • a pin is added to the timing controller as a reset auxiliary pin, and works together with the reset pin to determine whether the reset starts or ends, preventing an abnormality when the machine is quickly turned on and off.
  • the reset pin circuit 1 can refer to the prior art.
  • the reset pin circuit 1 includes a first resistor R1 and a first capacitor C1.
  • the reset pin of the timing controller is connected to the first terminal of the first resistor R1 and the first capacitor C1, respectively.
  • the first terminal of the first resistor R1 is connected to the power supply voltage VDD, and the second terminal of the first capacitor C1 is grounded.
  • the reset auxiliary pin circuit 2 includes a second resistor R2 and a second capacitor C2.
  • the reset auxiliary pin added by the timing controller is respectively connected to the first terminal of the second resistor R2 and the first terminal of the second capacitor C2, and the second resistor R2 The second terminal of the second capacitor and the second terminal of the second capacitor C2 are grounded.
  • the charging circuit 3 includes a current source and a current source switch K.
  • the current source is connected to the input terminal of the current source switch K, the output terminal of the current source switch K is connected to the first terminal of the second capacitor C2, and the control terminal of the current source switch K is connected for A charging control signal Reset_EN that controls whether the charging circuit 3 charges the second capacitor C2.
  • the current source controls the reset auxiliary pin voltage V1 by charging the second capacitor C2. Whether to start charging the second capacitor C2 is controlled by the charging control signal Reset_EN.
  • the current source switch K can use a MOS tube to connect the charging control signal Reset_EN.
  • the charging control signal Reset_EN to control the charging and discharging of the current source; for example, it can be set to when Reset_EN is at a high potential and start charging the second capacitor C2, whose charging current is much larger than that of the second resistor R2 and discharging Current.
  • the charging control circuit 4 is used for generating a charging control signal Reset_EN.
  • the charging control circuit 4 The signal Reset_EN controls the charging circuit 3 to charge the second capacitor C2.
  • the timing controller determines whether the start-up condition is satisfied by obtaining the reset auxiliary pin voltage V1 and the reset pin voltage Vrst. In this preferred embodiment, specifically, the timing controller needs to meet the reset auxiliary lead when it is turned on.
  • the pin voltage V1 is less than a preset first reference voltage Vref1, and the reset pin voltage Vrst is greater than a preset second reference voltage Vref2.
  • the charging control circuit 4 may include a logic processing circuit 5 for determining whether the timing controller meets the power-on condition, and a charging control signal that generates a charging control signal Reset_EN according to the third result S3 of the logic processing circuit 5.
  • the logic processing circuit 5 mainly includes a first comparator OP1, a second comparator OP2, and a logic circuit;
  • the charge control signal generating circuit 6 mainly includes a switch Q1, a third resistor R3, a fourth resistor R4, a PNP transistor Q2, and an NPN transistor Q3.
  • the logic processing circuit 5 mainly includes:
  • the inverting input terminal of the first comparator OP1 inputs the reset auxiliary pin voltage V1, the non-inverting input terminal inputs the first reference voltage Vref1, compares the reset auxiliary pin voltage V1 and the first reference voltage Vref1, and outputs a first result S1 to the logic circuit. ;
  • the non-inverting input terminal of the second comparator OP2 inputs the reset pin voltage Vrst, the inverting input terminal inputs the second reference voltage Vref2, compares the reset pin voltage Vrst and the second reference voltage Vref2, and outputs a second result S2 to the logic circuit;
  • the logic circuit processes the first result S1 and the second result S2 according to the preset logic, and outputs the third result S3 to the charging control signal generating circuit 6.
  • the preset logic it is determined whether a condition to be satisfied when the timing controller is turned on is established, that is, reset.
  • the auxiliary pin voltage V1 is less than a preset first reference voltage Vref1, and the reset pin voltage Vrst is greater than a preset second reference voltage Vref2.
  • the logic circuit may be an AND gate circuit.
  • the charging control signal generating circuit 6 mainly includes:
  • a unidirectional thyristor circuit composed of a PNP transistor Q2 and an NPN transistor Q3.
  • the control terminal inputs the third result S3 of the logic processing circuit 5.
  • the anode is connected to the control terminal of the switch Q1 and the cathode is grounded.
  • the control terminal of the switch Q1 is connected to the power supply voltage VDD via a third resistor R3, the first terminal is grounded, the second terminal is connected to the power supply voltage VDD via a fourth resistor R4, and the second terminal is also connected to the charging control signal Reset_EN.
  • the switch Q1 may be NMOS.
  • the charging control signal Reset_EN when the third result S3 is at a low level, the charging control signal Reset_EN is at a low level; when the third result S3 is at a high level, that is, when the timing controller startup condition is met, the startup The post-charge control signal Reset_EN can be maintained at a high level, thereby controlling the current source to remain on.
  • the timing controller when the timing controller is powered on, two conditions need to be met, namely, the reset auxiliary pin voltage V1 is less than the first reference voltage Vref1, and the reset pin voltage Vrst is greater than the second reference voltage Vref2.
  • the feet work together to determine whether the reset starts or ends. When both conditions are met, the power can be turned on to avoid the reset exception. In this case, it is required:
  • the power supply voltage VDD decreases rapidly after shutdown.
  • the internal latch of the timing controller has stopped working, and the charge control signal Reset_EN is at a low level. Turn on, that is to meet the two conditions again, but because the charge on the second capacitor C2 needs to be discharged, it will not be reset quickly. It needs to meet the discharge formula, and it can be reset again after meeting the pre-calculated discharge time.
  • the present invention can not only delay the VDD power-on for a certain period of time during normal power-on and reset, but also meet the same needs during fast power-on and power-off. Delay VDD power-on for a certain time to reset, leave enough time for reset, and avoid reset abnormality when switching on and off quickly.
  • the liquid crystal display of the present invention determines whether the reset is started or ended through the joint action of the reset auxiliary pin and the reset pin to prevent abnormalities during fast power-on and power-off. Time to reset, it can also meet the requirements of delaying VDD power on for a certain period of time during fast power-on and reset.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种液晶显示器，包括：时序控制器，其包括复位引脚、复位辅助引脚、充电电路（3）和充电控制电路（4）；复位引脚电路（1）；复位辅助引脚电路（2），其复位辅助引脚外接第二电阻（R2）的第一端和第二电容（C2）的第一端，第二电阻（R2）的第二端和第二电容（C2）的第二端接地；该充电电路（3）包括电流源和电流源开关（K），电流源连接电流源开关（K）的输入端，电流源开关（K）的输出端连接第二电容（C2）的第一端，电流源开关（K）的控制端连接充电控制信号；该充电控制电路（4）用于产生充电控制信号，当满足复位辅助引脚电压小于预设的第一参考电压且复位引脚电压大于预设的第二参考电压的条件时，向第二电容（C2）充电。通过复位辅助引脚与复位引脚共同作用来判定复位，防止快速开关机时的异常。

Description

液晶显示器 技术领域
本发明涉及显示技术领域，尤其涉及一种液晶显示器。
背景技术
液晶显示器具有机身薄、省电、无辐射等众多优点，得到了广泛地应用，如：液晶电视、智能手机、数字相机、平板电脑、计算机屏幕、或笔记本电脑屏幕等，在平板显示领域中占主导地位。
现有市场上的液晶显示器大部分为背光型液晶显示装置，其包括液晶显示面板及背光模组。通常液晶显示面板由彩膜基板、阵列基板、夹于彩膜基板与阵列基板之间的液晶及边框胶组成。液晶显示器是通过电场对液晶分子取向的控制，改变光的偏振状态，并藉由偏光板实现光路的穿透与阻挡，实现显示的目的。
时序控制器(TCON)是液晶显示器驱动电路中的一个关键部件，一般用于把主板送来的低压差分信号(LVDS)信号转换为液晶面板显示所需的栅极驱动信号及源极驱动信号，完成低压差分信号到迷你低压差分信号(MINI-LVDS)的转换输出，同时输出栅极驱动、源极驱动所需的各种控制时序。时序控制器一般设有复位电路以确保通电后能够正常工作。
在液晶显示器的使用过程中，经常会遇到快速开关机的情况，但是在快速开关机时，会有几率发生复位(Reset)异常。主要原因是关机开机时间间隔太短，时序控制器内部逻辑电路无法正常工作。
如图1所示为现有时序控制器复位的基本电路示意图。开机后，电源电压VDD开始通过第一电阻R1对第一电容C1充电，复位引脚电压Vrst初始为低电位，时序控制器开始复位，第一电容C1充电结束后，复位引脚电压Vrst为高电位，时序控制器复位结束。按照现有时序控制器复位的基本电路，在快速开关机时，第一电容C1上电荷无法完全释放，但是电源电压/核心电压(VDD/Vcore)电压可能已经释放完全，可能导致再次开机时出现异常。
发明内容
因此，本发明的目的在于提供一种液晶显示器，防止快速开关机时的复位异常。
为实现上述目的，本发明提供了一种液晶显示器，包括：
时序控制器，其包括复位引脚、复位辅助引脚、充电电路和充电控制电路；
复位引脚电路，其包括第一电阻和第一电容，第一电阻的第一端和第一电容的第一端分别连接所述复位引脚，第一电阻的第二端连接至电源电压，第一电容的第二端接地；
复位辅助引脚电路，其包括第二电阻和第二电容，第二电阻的第一端和第二电容的第一端分别连接所述复位辅助引脚，第二电阻的第二端和第二电容的第二端接地；
所述充电电路包括电流源和电流源开关，电流源连接电流源开关的输入端，电流源开关的输出端连接第二电容的第一端，电流源开关的控制端连接用于控制充电电路是否向第二电容充电的充电控制信号；
所述充电控制电路用于产生充电控制信号，当满足复位辅助引脚电压小于预设的第一参考电压且复位引脚电压大于预设的第二参考电压的条件时，充电控制信号控制充电电路向第二电容充电。
其中，所述充电控制电路包括：
逻辑处理电路，用于判断复位辅助引脚电压是否小于预设的第一参考电压且复位引脚电压是否大于预设的第二参考电压；
充电控制信号产生电路，根据逻辑处理电路的判断结果产生充电控制信号。
其中，所述逻辑处理电路包括：
第一比较器，用于比较复位辅助引脚电压和第一参考电压，输出第一结果至逻辑电路；
第二比较器，用于比较复位引脚电压和第二参考电压，输出第二结果至逻辑电路；
逻辑电路，根据第一结果和第二结果判断是否满足所述条件，输出第三结果至充电控制信号产生电路。
其中，所述逻辑电路为与门电路。
其中，所述第一比较器的反相输入端输入复位辅助引脚电压，同相输入端输入第一参考电压。
其中，所述第二比较器的同相输入端输入复位引脚电压，反相输入端输入第二参考电压。
其中，所述充电控制信号产生电路包括：
单向可控硅，其控制端输入逻辑处理电路的结果，阳极连接开关管控 制端，阴极接地；
开关管，其控制端经由第三电阻连接至电源电压，第一端接地，第二端经由第四电阻连接至电源电压，第二端还连接充电控制信号。
其中，所述单向可控硅由一NPN三极管和一PNP三极管组成。
其中，所述电流源开关为金属氧化物半导体场效应晶体管。
综上，本发明的液晶显示器，通过复位辅助引脚与复位引脚共同作用来判定复位是否开始或者是否结束，防止快速开关机时的异常；既可满足在正常开关机时延迟VDD上电一定时间进行复位，同样也可以满足在快速开关机时延迟VDD上电一定时间进行复位。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其他有益效果显而易见。
附图中，
图1为现有时序控制器复位的基本电路示意图；
图2为本发明液晶显示器一较佳实施例的电路示意图。
具体实施方式
参见图2，其为本发明液晶显示器一较佳实施例的电路示意图，主要包括：复位引脚电路1，复位辅助引脚电路2，以及时序控制器；时序控制器内包括复位引脚、复位辅助引脚、用于控制复位辅助引脚电压的充电电路3和充电控制电路4；充电控制电路4包括逻辑处理电路5和充电控制信号产生电路6；当满足时序控制器开机条件时，充电控制电路4产生充电控制信号Reset_EN以控制充电电路3开始充电。本发明在时序控制器上增加一引脚(Pin)作为复位辅助引脚，与复位引脚共同作用来判定复位是否开始，或者是否结束，防止快速开关机时的异常。
复位引脚电路1可以参照现有技术，在此实施例中，包括第一电阻R1和第一电容C1，时序控制器的复位引脚分别连接第一电阻R1的第一端和第一电容C1的第一端，第一电阻R1的第二端连接至电源电压VDD，第一电容C1的第二端接地。
复位辅助引脚电路2包括第二电阻R2和第二电容C2，时序控制器增加的复位辅助引脚分别连接第二电阻R2的第一端和第二电容C2的第一端，第二电阻R2的第二端和第二电容C2的第二端接地。
充电电路3包括电流源和电流源开关K，电流源连接电流源开关K的输入端，电流源开关K的输出端连接第二电容C2的第一端，电流源开关K的控制端连接用于控制充电电路3是否向第二电容C2充电的充电控制信号Reset_EN。电流源通过向第二电容C2充电以控制复位辅助引脚电压V1，是否开始向第二电容C2充电由充电控制信号Reset_EN控制；电流源开关K可以采用一颗MOS管，将充电控制信号Reset_EN连接至MOS管的控制端，利用充电控制信号Reset_EN控制电流源充放电；例如，可以设置为Reset_EN为高(High)电位时，开始给第二电容C2充电，其充电电流远大于第二电阻R2放电电流。
充电控制电路4用于产生充电控制信号Reset_EN，当满足复位辅助引脚电压V1小于预设的第一参考电压Vref1且复位引脚电压Vrst大于预设的第二参考电压Vref2的条件时，充电控制信号Reset_EN控制充电电路3向第二电容C2充电。本发明中，时序控制器通过获取复位辅助引脚电压V1和复位引脚电压Vrst来判断是否满足开机条件；在此较佳实施例中，具体可以为，时序控制器开机时需要满足复位辅助引脚电压V1小于预设的第一参考电压Vref1，且复位引脚电压Vrst大于预设的第二参考电压Vref2。
在此较佳实施例中，充电控制电路4可以包括用于判断时序控制器是否满足开机条件的逻辑处理电路5，以及根据逻辑处理电路5的第三结果S3产生充电控制信号Reset_EN的充电控制信号产生电路6。逻辑处理电路5主要包括第一比较器OP1，第二比较器OP2，以及逻辑电路；充电控制信号产生电路6主要包括开关管Q1，第三电阻R3，第四电阻R4，PNP三极管Q2以及NPN三极管Q3。
逻辑处理电路5主要包括：
第一比较器OP1的反相输入端输入复位辅助引脚电压V1，同相输入端输入第一参考电压Vref1，比较复位辅助引脚电压V1和第一参考电压Vref1，输出第一结果S1至逻辑电路；
第二比较器OP2的同相输入端输入复位引脚电压Vrst，反相输入端输入第二参考电压Vref2，比较复位引脚电压Vrst和第二参考电压Vref2，输出第二结果S2至逻辑电路；
逻辑电路，根据预设逻辑处理第一结果S1和第二结果S2，输出第三结果S3至充电控制信号产生电路6，根据预设逻辑判断时序控制器开机时需要满足的条件是否成立，即复位辅助引脚电压V1小于预设的第一参考电压Vref1，且复位引脚电压Vrst大于预设的第二参考电压Vref2。在此实施例中，逻辑电路可以为与门电路。
充电控制信号产生电路6主要包括：
由PNP三极管Q2以及NPN三极管Q3组成的单向可控硅电路，控制端输入逻辑处理电路5的第三结果S3，阳极连接开关管Q1控制端，阴极接地；
开关管Q1控制端经由第三电阻R3连接至电源电压VDD，第一端接地，第二端经由电阻第四电阻R4连接至电源电压VDD，第二端还连接充电控制信号Reset_EN。开关管Q1具体可以为NMOS。在此较佳实施例中，当第三结果S3为低电平时，充电控制信号Reset_EN为低电平；当第三结果S3为变为高电平时，也就是当满足时序控制器开机条件，开机后充电控制信号Reset_EN可以保持为高电平，从而控制电流源保持打开。
本发明中，时序控制器在开机时需要满足两个条件，即复位辅助引脚电压V1小于第一参考电压Vref1，复位引脚电压Vrst大于第二参考电压Vref2，通过复位辅助引脚与复位引脚共同作用来判定复位是否开始或者是否结束，当两个条件都满足后再开机即可以避免复位异常；在这种情况下也就是要求：
若是慢速开关机，即关机后慢速开机，产生复位辅助引脚电压V1的第二电容C2的电荷已经释放完，满足第一个条件；只要电源电压VDD通过第一电阻R1给第一电容C1充电一定时间满足复位引脚电压Vrst大于第二参考电压Vref2即可满足第二个条件，充电时间符合公式Vt＝V0+(Vu-V0)×[1-exp(-t/RC)]；该公式表示通过电阻R向电容C充电，其中，V0为电容C上的初始电压值；Vu为电容C充满终止电压值；Vt为任意时刻t电容C上的电压值。预设合适的第二参考电压Vref2，通过此公式即可算出电源电压VDD充电第一电容C1至满足复位条件的时间。
若为快速开关机，即关机后快速开机，关机后电源电压VDD迅速降低，这个时候时序控制器内部的锁存器已经停止工作，充电控制信号Reset_EN为低(Low)电位，若要重新复位后开机，即要再次满足两个条件，但是由于第二电容C2上的电荷需要放电，就不会迅速的进行复位，需要满足放电公式，符合预先算出的放电时间后才能再次复位，进入正常工作，放电时间符合公式Vt＝V0×exp(-t/RC)，该公式表示初始电压为V0的电容C通过电阻R放电，Vt为任意时刻t电容上的电压值。通过预设合适的第一参考电压Vref1，就可以预先设定第二电容C2所需的放电时间。
从而，通过预先设置合适的第一参考电压Vref1和第二参考电压Vref2，本发明既可满足在正常开关机时延迟VDD上电一定时间进行复位，同样也可以满足在快速开关机时，同样需要延迟VDD上电一定时间进行复位，为 复位留出足够的时间，即可避免快速开关机时的复位异常。
综上，本发明的液晶显示器，通过复位辅助引脚与复位引脚共同作用来判定复位是否开始或者是否结束，防止快速开关机时的异常；既可满足在正常开关机时延迟VDD上电一定时间进行复位，同样也可以满足在快速开关机时延迟VDD上电一定时间进行复位。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (9)

  1. 一种液晶显示器，包括：
    时序控制器，其包括复位引脚、复位辅助引脚、充电电路和充电控制电路；
    复位引脚电路，其包括第一电阻和第一电容，第一电阻的第一端和第一电容的第一端分别连接复位引脚，第一电阻的第二端连接至电源电压，第一电容的第二端接地；
    复位辅助引脚电路，其包括第二电阻和第二电容，第二电阻的第一端和第二电容的第一端分别连接复位辅助引脚，第二电阻的第二端和第二电容的第二端接地；
    所述充电电路包括电流源和电流源开关，电流源连接电流源开关的输入端，电流源开关的输出端连接第二电容的第一端，电流源开关的控制端连接用于控制充电电路是否向第二电容充电的充电控制信号；
    所述充电控制电路用于产生充电控制信号，当满足复位辅助引脚电压小于预设的第一参考电压且复位引脚电压大于预设的第二参考电压的条件时，充电控制信号控制充电电路向第二电容充电。
  2. 如权利要求1所述的液晶显示器，其中，所述充电控制电路包括：
    逻辑处理电路，用于判断复位辅助引脚电压是否小于预设的第一参考电压且复位引脚电压是否大于预设的第二参考电压；
    充电控制信号产生电路，根据逻辑处理电路的判断结果产生充电控制信号。
  3. 如权利要求2所述的液晶显示器，其中，所述逻辑处理电路包括：
    第一比较器，用于比较复位辅助引脚电压和第一参考电压，输出第一结果至逻辑电路；
    第二比较器，用于比较复位引脚电压和第二参考电压，输出第二结果至逻辑电路；
    逻辑电路，根据第一结果和第二结果判断是否满足所述条件，输出第三结果至充电控制信号产生电路。
  4. 如权利要求3所述的液晶显示器，其中，所述逻辑电路为与门电路。
  5. 如权利要求3所述的液晶显示器，其中，所述第一比较器的反相输入端输入复位辅助引脚电压，同相输入端输入第一参考电压。
  6. 如权利要求3所述的液晶显示器，其中，所述第二比较器的同相输 入端输入复位引脚电压，反相输入端输入第二参考电压。
  7. 如权利要求2所述的液晶显示器，其中，所述充电控制信号产生电路包括：
    单向可控硅，其控制端输入逻辑处理电路的结果，阳极连接开关管控制端，阴极接地；
    开关管，其控制端经由第三电阻连接至电源电压，第一端接地，第二端经由第四电阻连接至电源电压，第二端还连接充电控制信号。
  8. 如权利要求7所述的液晶显示器，其中，所述单向可控硅由一NPN三极管和一PNP三极管组成。
  9. 如权利要求1所述的液晶显示器，其中，所述电流源开关为金属氧化物半导体场效应晶体管。
PCT/CN2018/107813 2018-07-20 2018-09-27 液晶显示器 WO2020015178A1 (zh)

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