WO2020006848A1 - Dispositif vdmosfet ayant une rainure de source de type u et intégrant une diode schottky - Google Patents

Dispositif vdmosfet ayant une rainure de source de type u et intégrant une diode schottky Download PDF

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Publication number
WO2020006848A1
WO2020006848A1 PCT/CN2018/102830 CN2018102830W WO2020006848A1 WO 2020006848 A1 WO2020006848 A1 WO 2020006848A1 CN 2018102830 W CN2018102830 W CN 2018102830W WO 2020006848 A1 WO2020006848 A1 WO 2020006848A1
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WO
WIPO (PCT)
Prior art keywords
source
region
schottky diode
gate
drift region
Prior art date
Application number
PCT/CN2018/102830
Other languages
English (en)
Chinese (zh)
Inventor
汤晓燕
陈辉
张玉明
宋庆文
张艺蒙
Original Assignee
西安电子科技大学
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 西安电子科技大学 filed Critical 西安电子科技大学
Publication of WO2020006848A1 publication Critical patent/WO2020006848A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
    • H01L29/7806—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a Schottky barrier diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H01L29/0856—Source regions
    • H01L29/0865—Disposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors

Definitions

  • the invention relates to the field of microelectronic technology, and in particular to a U-shaped source-slot VDMOSFET device with integrated Schottky diode.
  • the wide band gap semiconductor material silicon carbide has a large forbidden band width, a high critical breakdown electric field, and excellent physical and chemical characteristics such as high thermal conductivity and high electron saturation drift speed.
  • a P + ohmic contact region is usually introduced on the surface of the P-type base region to short-circuit the P-type base region and the N + source region.
  • the VDMOSFET acts as a power switch in the converter.
  • the phenomenon of "power degradation” occurs, which increases the on-resistance and forward voltage drop of the diode. And cause reliability problems.
  • a Schottky diode with a turn-on voltage lower than the body diode is usually used in parallel across the source and drain of the device to provide a freewheeling path and ensure that the body diode does not conduct. This method greatly increases The complexity and cost of circuit design.
  • the present invention provides a U-shaped source-slot VDMOSFET device with an integrated Schottky diode.
  • the technical problem to be solved by the present invention is achieved through the following technical solutions:
  • the application provides a U-shaped source-slot VDMOSFET device with an integrated Schottky diode, including: a substrate; and
  • a drain disposed below the substrate
  • N-drift region disposed above the substrate
  • N + source region located in N-drift regions on both sides of the source
  • P-type base regions which are arranged in N-drift regions on both sides of the source;
  • a gate-source isolation layer disposed above the N + source region
  • a gate dielectric disposed above the N-drift region
  • a gate disposed above the gate dielectric
  • the interface between the source and the N-drift region is Schottky contact.
  • the interface between the source and the N + source region is an ohmic contact.
  • the interface between the source and the P-type base region is an ohmic contact.
  • the gate is polysilicon.
  • a gate metal is further included, which is disposed above the gate.
  • the doping concentration of the P-type base region near the surface is 1 ⁇ 10 17 cm -3 .
  • the doping concentration of the P-type base region below the N + source region is 5 ⁇ 10 18 cm - 3 .
  • the depth of the source trench where the source is located is greater than the junction depth of the N + source region and smaller than the junction depth of the P-type base region.
  • the substrate is an N-type SiC material
  • the thickness is 200 ⁇ m to 500 ⁇ m
  • the doping concentration is 5 ⁇ 10 18 cm -3 to 1 ⁇ 10 20 cm -3
  • the doping ion is a nitrogen ion.
  • the N + source region is an N-type SiC material with a thickness of 0.3 to 0.5 ⁇ m, a doping concentration of 5 ⁇ 10 18 cm -3 , and a doping ion is a nitrogen ion.
  • the invention provides a U-shaped source-slot VDMOSFET device with integrated Schottky diode.
  • the device forms a Schottky diode through Schottky contact at the U-shaped source slot position (the interface where the source contacts the N-drift region).
  • the external Schottky diode instead of the external Schottky diode as a freewheeling path, it does not cause the "dielectric degradation" of the body diode, while reducing the extra Schottky diode, reducing the area of the device, improving the reliability of the device and reducing Complexity and cost of device design.
  • the device does not need to introduce a surface P + ohmic contact region by forming a U-shaped source trench at the source electrode. While reducing the area and cost, the surface is lightly doped in the P-type base region through multiple ion implantations. The concentration distribution of heavy doping at the bottom, so as to achieve an ohmic contact at the interface between the source and the P-type base region, and inhibit the parasitic NPN transistor from turning on.
  • a U-shaped source trench is formed at the source electrode through a shallower etching depth. This process step can be completed in the etching mark step in the traditional process without adding a new etching process step.
  • FIG. 1 is a schematic diagram of a U-shaped source trench VDMOSFET device with an integrated Schottky diode according to an embodiment of the present invention.
  • VDMOSFET vertical double-diffused MOSFET
  • vertical double-diffused metal oxide semiconductor field effect transistor Vertical double-diffused metal oxide semiconductor field effect transistor
  • a first embodiment of the present application relates to a U-shaped source trench VDMOSFET device with an integrated Schottky diode. As shown in Figure 1, the device includes:
  • the drain 9 is disposed below the substrate 8;
  • N-drift region 7 is disposed above the substrate 8;
  • the source electrode 4 is disposed above the N-drift region 7;
  • N + source region 5 is disposed in N-drift region 7 on both sides of source electrode 4;
  • the P-type base region 6 is disposed in the N-drift region 7 on both sides of the source electrode 4 and is located below the N + source region 5;
  • the gate-source isolation layer 3 is disposed above the N + source region 5;
  • the gate dielectric 2 is disposed above the N-drift region 7;
  • the gate 10 is disposed above the gate dielectric 2;
  • the interface between the source electrode 4 and the N-drift region 7 is a Schottky contact.
  • the interface between the source electrode 4 and the N + source region 5 is an ohmic contact.
  • the interface between the source electrode 4 and the P-type base region 6 is an ohmic contact.
  • the gate 10 is polysilicon.
  • the device further includes a gate metal 1 disposed above the gate 10 for metal interconnection between the gate and other circuits.
  • the gate metal 1 is a Ti or Ni or Au material.
  • the surface of the P-type base region 6 (that is, the region where the P-type base region 6 is close to the gate dielectric 2 and has the same thickness as the N + source region 5) has a lower doping concentration and a higher doping concentration at the bottom;
  • the impurity concentration is 1 ⁇ 10 17 cm -3
  • the doping concentration of the P-type base region 6 located below the N + source region 5 is 5 ⁇ 10 18 cm - 3 .
  • the depth of the U-shaped source groove (ie, the distance between the bottom surface of the U-shaped source groove and the upper surface of the N + source region 5) is greater than the junction depth of the N + source region 5 and smaller than the junction depth of the P-type base region 6.
  • the source electrode 4 is made of Ti or Ni or Au material
  • the drain electrode 9 is made of Ti or Ni or Au material.
  • the substrate 8 is an N-type SiC material with a thickness of 200 ⁇ m to 500 ⁇ m, a doping concentration of 5 ⁇ 10 18 cm -3 to 1 ⁇ 10 20 cm -3 , and the doping ion is a nitrogen ion.
  • the N + source region 5 is an N-type SiC material with a thickness of 0.3 to 0.5 ⁇ m, a doping concentration of 5 ⁇ 10 18 cm -3 , and a doping ion is a nitrogen ion.
  • the N-drift region 7 is an N-type SiC material with a thickness of 10 ⁇ m to 20 ⁇ m, a doping concentration of 1 ⁇ 10 15 cm -3 to 8 ⁇ 10 15 cm -3 , and the doping ion is a nitrogen ion. .
  • the MOS switch In the operation of the device, when the device's gate voltage is low, the MOS switch is turned off.
  • the anode of the Schottky diode is the source of the MOS switch and the cathode is the drain of the MOS switch. Between them, the Schottky diode is turned on, and the load current flows from the source to the drain through the Schottky diode.
  • the MOS switch When the device's gate voltage is high, the MOS switch is on, the Schottky diode is off, and the source and drain are turned on through the MOS switch.
  • an action is performed according to an element, it means that the action is performed at least according to the element, which includes two cases: performing the action based on the element only, and according to the element and Other elements perform the action.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

La présente invention concerne le domaine des circuits intégrés et concerne ainsi un dispositif VDMOSFET qui a une rainure de source de type U et qui intègre une diode Schottky, comprenant un substrat (8) ; une électrode de drain (9) qui est disposée au-dessous du substrat (8) ; une région de dérive N (7) qui est disposée au-dessus du substrat (8) ; une électrode de source (4) qui est disposée au-dessus de la région de dérive N (7) ; une région de source N + (5) qui est disposée dans la région de dérive N (7) sur deux côtés de l'électrode de source (4) ; une région de base de type P (6) qui est disposée à l'intérieur de la région de dérive N (7) ; une couche d'isolation de source de grille (3) qui est disposée au-dessus de la région de source N + (5) ; un milieu de grille (2) et une électrode de grille (10) ; l'interface entre l'électrode de source (4) et la région de dérive N (7) est un contact Schottky. Le dispositif peut améliorer la fiabilité des performances du dispositif et réduire la complexité et les coûts de conception.
PCT/CN2018/102830 2018-07-04 2018-08-29 Dispositif vdmosfet ayant une rainure de source de type u et intégrant une diode schottky WO2020006848A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201810723450.1A CN109192776B (zh) 2018-07-04 2018-07-04 集成肖特基二极管的u型源槽vdmosfet器件
CN201810723450.1 2018-07-04

Publications (1)

Publication Number Publication Date
WO2020006848A1 true WO2020006848A1 (fr) 2020-01-09

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PCT/CN2018/102830 WO2020006848A1 (fr) 2018-07-04 2018-08-29 Dispositif vdmosfet ayant une rainure de source de type u et intégrant une diode schottky

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CN (1) CN109192776B (fr)
WO (1) WO2020006848A1 (fr)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101950759A (zh) * 2010-08-27 2011-01-19 电子科技大学 一种Super Junction VDMOS器件
CN102723363A (zh) * 2011-03-29 2012-10-10 比亚迪股份有限公司 一种vdmos器件及其制作方法
US9530880B2 (en) * 2015-03-03 2016-12-27 Micrel, Inc. DMOS transistor with trench schottky diode

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101950759A (zh) * 2010-08-27 2011-01-19 电子科技大学 一种Super Junction VDMOS器件
CN102723363A (zh) * 2011-03-29 2012-10-10 比亚迪股份有限公司 一种vdmos器件及其制作方法
US9530880B2 (en) * 2015-03-03 2016-12-27 Micrel, Inc. DMOS transistor with trench schottky diode

Also Published As

Publication number Publication date
CN109192776A (zh) 2019-01-11
CN109192776B (zh) 2020-06-09

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