WO2019235146A1 - Module à semi-conducteur - Google Patents

Module à semi-conducteur Download PDF

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Publication number
WO2019235146A1
WO2019235146A1 PCT/JP2019/019109 JP2019019109W WO2019235146A1 WO 2019235146 A1 WO2019235146 A1 WO 2019235146A1 JP 2019019109 W JP2019019109 W JP 2019019109W WO 2019235146 A1 WO2019235146 A1 WO 2019235146A1
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WO
WIPO (PCT)
Prior art keywords
terminal
pair
semiconductor module
semiconductor device
module according
Prior art date
Application number
PCT/JP2019/019109
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English (en)
Japanese (ja)
Inventor
沢水 神田
松尾　昌明
Original Assignee
ローム株式会社
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Publication date
Application filed by ローム株式会社 filed Critical ローム株式会社
Priority to DE212019000029.0U priority Critical patent/DE212019000029U1/de
Publication of WO2019235146A1 publication Critical patent/WO2019235146A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0618—Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/06181—On opposite sides of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4901—Structure
    • H01L2224/4903—Connectors having different sizes, e.g. different diameters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/4917—Crossed wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Definitions

  • the present disclosure relates to a semiconductor module in which a semiconductor device including a plurality of semiconductor elements is bonded to a heat sink.
  • Patent Document 1 discloses a semiconductor device including a substrate, a metal foil disposed on the upper surface of the substrate, a plurality of IGBT chips joined in a conductive state to the metal foil, and a heat sink disposed on the lower surface of the substrate.
  • the semiconductor device is used for the purpose of power conversion for converting DC power into AC power.
  • a compound (silicone grease) is interposed between the heat radiating plate and the lower surface of the substrate to suppress a gap formed between the substrate and the heat radiating plate.
  • heat is generated from the plurality of IGBT chips.
  • Heat generated from the plurality of IGBT chips is conducted to the heat radiating plate through the metal foil, the substrate, and the silicone grease.
  • the heat conducted to the heat sink is dissipated into the atmosphere.
  • Silicone grease is a material having a relatively high thermal conductivity, but its thermal conductivity is less than 10 W / (m ⁇ K).
  • semiconductor devices intended for power conversion have been used in electric vehicles and the like. Such semiconductor devices are required to have higher output. In order to satisfy this requirement, it is an issue to further improve the heat dissipation of the semiconductor device.
  • a semiconductor module provided by the present disclosure includes: a base material having a first main surface and a first back surface facing opposite sides in the thickness direction; a conductive member disposed on the first main surface; and the conductive member.
  • a semiconductor device comprising: a plurality of semiconductor elements joined in a conductive state; and a sealing resin that covers the plurality of semiconductor elements so that the first back surface is exposed; a heat sink; the heat sink; A joining sheet interposed between the back surface and the joining sheet, the joining sheet has electrical insulation and flexibility, and the thermal conductivity of the joining sheet is the thermal conductivity of the sealing resin. Is bigger than.
  • FIG. 3 is a plan view of the semiconductor device shown in FIG. 2 and transmits a sealing resin.
  • FIG. 3 is a bottom view of the semiconductor device shown in FIG. 2.
  • FIG. 3 is a right side view of the semiconductor device shown in FIG. 2.
  • FIG. 3 is a left side view of the semiconductor device shown in FIG. 2.
  • FIG. 3 is a front view of the semiconductor device shown in FIG. 2.
  • FIG. 4 is a sectional view taken along line VIII-VIII in FIG. 3.
  • FIG. 4 is a cross-sectional view taken along line IX-IX in FIG. 3.
  • FIG. 4 is a cross-sectional view taken along line XX in FIG. 3. It is the elements on larger scale of FIG. FIG. 4 is a partially enlarged view of FIG. 3.
  • FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. 12.
  • FIG. 15 is a sectional view taken along line XV-XV in FIG. 14. It is the elements on larger scale of FIG. It is the elements on larger scale of FIG. It is sectional drawing of the semiconductor device contained in the component of the semiconductor module concerning 2nd Embodiment of this indication. It is sectional drawing of the semiconductor device shown in FIG. It is the elements on larger scale of FIG.
  • FIG. 24 is a plan view of the semiconductor device included in the semiconductor device included in the components of the semiconductor module illustrated in FIG. 23.
  • FIG. 25 is a plan view of the semiconductor device shown in FIG. 24 and transmits the sealing resin.
  • FIG. 26 is a plan view corresponding to FIG. 25 and transmits the second terminal.
  • FIG. 25 is a bottom view of the semiconductor device shown in FIG. 24.
  • FIG. 25 is a right side view of the semiconductor device shown in FIG. 24.
  • FIG. 25 is a left side view of the semiconductor device shown in FIG. 24.
  • FIG. 25 is a front view of the semiconductor device shown in FIG. 24.
  • FIG. 26 is a sectional view taken along line XXXI-XXXI in FIG.
  • FIG. 26 is a sectional view taken along line XXXII-XXXII in FIG. 25. It is the elements on larger scale of FIG. It is the elements on larger scale of FIG.
  • FIG. 24 is a plan view of the semiconductor module shown in FIG. 23.
  • FIG. 36 is a sectional view taken along line XXXVI-XXXVI in FIG. 35. It is the elements on larger scale of FIG.
  • the semiconductor module A10 includes a semiconductor device B10, a heat sink 70, and a bonding sheet 80 as its components.
  • the sealing resin 60 is transmitted for convenience of understanding.
  • the VIII-VIII line, the IX-IX line, and the XX line are indicated by alternate long and short dash lines.
  • a semiconductor device B10 shown in FIG. 1 is a power conversion device (power module) on which a plurality of semiconductor elements such as MOSFETs are mounted.
  • the semiconductor device B10 is used for a drive source such as a motor or an inverter device of various electric products.
  • the semiconductor device B10 includes a base material 10, a conductive member 20, an auxiliary conductive member 21, a pair of input terminals 31, a pair of output terminals 32, a plurality of gate terminals 33, a plurality of detection terminals 34, a plurality of semiconductor elements 40, and a seal.
  • a stop resin 60 is provided.
  • the thickness direction of the base material 10 is referred to as “thickness direction z”.
  • a direction orthogonal to the thickness direction z is referred to as a “first direction x”.
  • a direction orthogonal to both the thickness direction z and the first direction x is referred to as a “second direction y”.
  • the semiconductor device B10 is rectangular when viewed along the thickness direction z, that is, when viewed in plan.
  • the first direction x corresponds to the short direction of the semiconductor device B10.
  • the second direction y corresponds to the longitudinal direction of the semiconductor device B10.
  • the side where the pair of input terminals 31 is located in the first direction x is referred to as “one side in the first direction x”.
  • the side where the pair of output terminals 32 is located in the first direction x is referred to as “the other side in the first direction x”.
  • the base member 10 is provided with a conductive member 20.
  • the base material 10 serves as a support member for the conductive member 20 and the plurality of semiconductor elements 40.
  • the base material 10 has electrical insulation.
  • the base material 10 is made of a material containing ceramics having relatively high thermal conductivity. An example of the ceramic is aluminum nitride (AlN).
  • the substrate 10 has a first main surface 11A and a first back surface 12A.
  • the first main surface 11A and the first back surface 12A face opposite to each other in the thickness direction z.
  • 11 A of 1st main surfaces face the side in which the electrically-conductive member 20 is arrange
  • the first main surface 11 ⁇ / b> A is covered with the sealing resin 60 together with the conductive member 20 and the plurality of semiconductor elements 40.
  • the first back surface 12 ⁇ / b> A is exposed from the sealing resin 60.
  • a surface treatment region 19 including a rough surface is formed on the first back surface 12A.
  • the surface treatment region 19 can be formed by sandblasting or the like.
  • the surface treatment region 19 is formed over the entire first back surface 12A.
  • the conductive member 20 is disposed on the first main surface 11A of the substrate 10 as shown in FIGS.
  • the conductive member 20 is a metal plate.
  • the said metal plate consists of copper (Cu) or a copper alloy.
  • the conductive member 20 is bonded to the first main surface 11A by a bonding material (not shown) such as silver (Ag) paste.
  • silver plating may be applied to the surface of the conductive member 20.
  • the conductive member 20 may be a metal foil such as a copper foil instead of the metal plate.
  • the conductive member 20 includes a pair of first conductive portions 20A and a pair of second conductive portions 20B.
  • the configuration of the conductive member 20 is not limited to this embodiment, and can be freely set based on the number of the plurality of semiconductor elements 40 set according to the performance required for the semiconductor device B10.
  • the pair of first conductive portions 20A is located on one side in the first direction x on the first main surface 11A. As viewed along the thickness direction z, the pair of first conductive portions 20A has a rectangular shape. The pair of first conductive portions 20A are separated from each other in the second direction y.
  • the pair of second conductive portions 20B are located on the other side in the first direction x on the first main surface 11A.
  • the pair of first conductive portions 20A and the pair of second conductive portions 20B are separated from each other in the first direction x.
  • the pair of second conductive portions 20B has a rectangular shape.
  • the pair of second conductive portions 20B are separated from each other in the second direction y.
  • the auxiliary conductive member 21 is disposed on the first main surface 11A of the base material 10 as shown in FIGS.
  • the auxiliary conductive member 21 is located on one side of the first main surface 11A in the first direction x and between the pair of first conductive portions 20A in the second direction y. Viewed along the thickness direction z, the auxiliary conductive member 21 has a rectangular shape.
  • the auxiliary conductive member 21 is a metal plate made of the same material as that of the conductive member 20.
  • the auxiliary conductive member 21 is bonded to the first main surface 11A by a bonding material (not shown) such as silver (Ag) paste.
  • silver plating may be applied to the surface of the auxiliary conductive member 21.
  • the auxiliary conductive member 21 may be a metal foil such as a copper foil instead of the metal plate.
  • the semiconductor device B ⁇ b> 10 further includes a connecting member 29.
  • the connecting member 29 has conductivity.
  • the connecting member 29 extends along the second direction y and is connected to the surfaces of the pair of first conductive portions 20 ⁇ / b> A while straddling the auxiliary conductive member 21.
  • the pair of first conductive portions 20 ⁇ / b> A are electrically connected to each other via the connecting member 29.
  • the connecting member 29 is composed of a plurality of wires.
  • the plurality of wires are made of, for example, aluminum (Al).
  • the connecting member 29 may be a metal piece that extends in the second direction y when viewed along the thickness direction z, instead of a plurality of wires.
  • the pair of input terminals 31 are located on one side in the first direction x in the semiconductor device B10, as shown in FIGS.
  • the pair of input terminals 31 are separated from each other in the second direction y.
  • the pair of input terminals 31 is supplied with external DC power.
  • the pair of input terminals 31 is composed of the same lead frame together with the pair of output terminals 32, the plurality of gate terminals 33, and the plurality of detection terminals 34.
  • the lead frame is made of copper or a copper alloy.
  • the pair of input terminals 31 includes a first terminal 31A and a second terminal 31B. Each of the first terminal 31A and the second terminal 31B has a pad portion 311 and a terminal portion 312.
  • the pad portion 311 is separated from the base material 10 as viewed along the thickness direction z, and is covered with the sealing resin 60. As a result, the pair of input terminals 31 are supported by the sealing resin 60.
  • a first connection wire 51 is connected to the surface of the pad portion 311.
  • the first connection wire 51 is made of aluminum, for example. Note that the surface of the pad portion 311 may be subjected to, for example, silver plating.
  • the first terminal 31A is the positive electrode (P terminal) of the pair of input terminals 31. As shown in FIGS. 3 and 8, the first connection wire 51 connected to the surface of the pad portion 311 of the first terminal 31A is connected to the surface of one first conductive portion 20A. Thereby, the first terminal 31A is electrically connected to the pair of first conductive portions 20A.
  • the second terminal 31B is the negative electrode (N terminal) of the pair of input terminals 31.
  • the first connection wire 51 connected to the surface of the pad portion 311 of the second terminal 31 ⁇ / b> B is connected to the surface of the auxiliary conductive member 21.
  • the second terminal 31 ⁇ / b> B is electrically connected to the auxiliary conductive member 21.
  • the terminal portion 312 is connected to the pad portion 311 and is exposed from the sealing resin 60.
  • the terminal portion 312 is used when the semiconductor device B10 is mounted on a wiring board.
  • the terminal portion 312 has a base portion 312A and an upright portion 312B.
  • the base 312A is connected to the pad 311 and extends in the first direction x from a first side surface 631 (details will be described later) of the sealing resin 60 located on one side in the first direction x. As shown in FIG.
  • the standing portion 312 ⁇ / b> B extends from the tip of the base portion 312 ⁇ / b> A in the first direction x toward the side where the first main surface 11 ⁇ / b> A of the base material 10 in the thickness direction z faces.
  • the terminal portion 312 has an L shape when viewed in the second direction y.
  • the pair of output terminals 32 are located on the other side in the first direction x in the semiconductor device B10, as shown in FIGS.
  • the pair of output terminals 32 are separated from each other in the second direction y. From the pair of output terminals 32, AC power (voltage) converted by the plurality of semiconductor elements 40 is output.
  • Each of the pair of output terminals 32 includes a pad portion 321 and a terminal portion 322. Note that the number of output terminals 32 is not limited to this embodiment, and can be freely set according to the performance required for the semiconductor device B10.
  • the pad portion 321 is separated from the base material 10 as viewed along the thickness direction z, and is covered with the sealing resin 60. Accordingly, the pair of output terminals 32 are supported by the sealing resin 60.
  • a second connection wire 52 is connected to the surface of the pad portion 321.
  • the second connection wire 52 is made of aluminum, for example. Note that the surface of the pad portion 321 may be subjected to, for example, silver plating.
  • the plurality of second connection wires 52 connected to the surfaces of the pair of pad portions 321 are connected to the surfaces of the pair of second conductive portions 20B. Thereby, the pair of output terminals 32 is electrically connected to the pair of second conductive portions 20B.
  • the terminal portion 322 is connected to the pad portion 321 and exposed from the sealing resin 60.
  • the terminal portion 322 is used when the semiconductor device B10 is mounted on a wiring board.
  • the terminal portion 322 has a base portion 322A and an upright portion 322B.
  • the base portion 322A is connected to the pad portion 321 and extends in the first direction x from a first side surface 631 (details will be described later) of the sealing resin 60 located on the other side in the first direction x. As shown in FIG.
  • the upright portion 322 ⁇ / b> B extends from the tip of the base portion 322 ⁇ / b> A in the first direction x toward the side where the first main surface 11 ⁇ / b> A of the base material 10 in the thickness direction z faces.
  • the terminal portion 322 is L-shaped when viewed in the second direction y. Note that the shape of the terminal portion 322 is the same as the shape of the terminal portion 312 of the pair of input terminals 31.
  • the plurality of semiconductor elements 40 are joined to the pair of first conductive portions 20 ⁇ / b> A and the pair of second conductive portions 20 ⁇ / b> B constituting the conductive member 20. .
  • the plurality of semiconductor elements 40 have a rectangular shape (square shape in the semiconductor device B10) when viewed along the thickness direction z.
  • the plurality of semiconductor elements 40 include a pair of first elements 40A and a pair of second elements 40B.
  • the pair of first elements 40A constitute an upper arm circuit of the semiconductor device B10.
  • the pair of second elements 40B constitutes the lower arm circuit of the semiconductor device B10. Note that the number of the plurality of semiconductor elements 40 is not limited to this configuration, and can be freely set according to the performance required for the semiconductor device B10.
  • the pair of first elements 40A and the pair of second elements 40B are MOSFETs (Metal-Oxide-Semiconductor-Field-Effect-Transistors) configured using a semiconductor material mainly composed of silicon carbide (SiC).
  • MOSFETs Metal-Oxide-Semiconductor-Field-Effect-Transistors
  • the pair of first elements 40A and the pair of second elements 40B are not limited to MOSFETs, but are field effect transistors including MISFETs (Metal-Insulator-Semiconductor-Field-Effect-Transistors) or IGBTs (Insulated-Gate-Bipolar-Transistors).
  • MISFETs Metal-Insulator-Semiconductor-Field-Effect-Transistors
  • IGBTs Insulated-Gate-Bipolar-Transistors.
  • a bipolar transistor may be used.
  • the plurality of semiconductor elements 40 include a pair
  • each of the pair of first elements 40A and the pair of second elements 40B includes a first surface 401, a second surface 402, a first electrode 41, a second electrode 42, and a gate electrode 43. And an insulating film 44.
  • the first surface 401 and the second surface 402 face away from each other in the thickness direction z.
  • the 1st surface 401 faces the side where 11 A of 1st main surfaces of the base material 10 face.
  • the first electrode 41 is provided on the first surface 401.
  • a source current flows through the first electrode 41.
  • the first electrode 41 is divided into four regions.
  • a plurality of first wires 501 are individually connected to the four divided regions.
  • the plurality of first wires 501 are made of aluminum, for example.
  • the plurality of first wires 501 connected to the first electrodes 41 of the pair of first elements 40A are connected to the surfaces of the pair of second conductive portions 20B. Thereby, the first electrodes 41 of the pair of first elements 40A are electrically connected to the pair of second conductive portions 20B.
  • a plurality of second wires 502 are individually connected to the four divided regions.
  • the plurality of second wires 502 are made of aluminum, for example.
  • the plurality of second wires 502 connected to the first electrodes 41 of the pair of second elements 40 ⁇ / b> B are connected to the surface of the auxiliary conductive member 21.
  • the first electrodes 41 of the pair of second elements 40 ⁇ / b> B are electrically connected to the auxiliary conductive member 21. Therefore, the second terminal 31B is electrically connected to the pair of second elements 40B via the auxiliary conductive member 21.
  • the second electrode 42 is provided over the entire second surface 402. A drain current flows through the second electrode 42.
  • each of the second electrodes 42 of the pair of first elements 40 ⁇ / b> A is bonded to the surface thereof in a state of being electrically connected to one of the pair of first conductive portions 20 ⁇ / b> A by the conductive bonding layer 49 having conductivity.
  • the conductive bonding layer 49 is, for example, lead-free solder mainly composed of tin (Sn).
  • each of the second electrodes 42 of the pair of second elements 40 ⁇ / b> B is connected to any of the pair of second conductive portions 20 ⁇ / b> B by the conductive bonding layer 49. It is joined to the surface in a state of electrical conduction.
  • the gate electrode 43 is provided on the first surface 401.
  • a gate voltage for driving each of the pair of first elements 40A and the pair of second elements 40B is applied to the gate electrode 43.
  • the size of the gate electrode 43 is smaller than the size of the first electrode 41.
  • the insulating film 44 is provided on the first surface 401.
  • the insulating film 44 surrounds the first electrode 41 when viewed along the thickness direction z.
  • the insulating film 44 is formed by laminating, for example, a silicon dioxide (SiO 2) layer, a silicon nitride (Si 3 N 4) layer, and a polybenzoxazole (PBO) layer in this order from the first surface 401.
  • Insulating film 44 may be a polyimide layer instead of the polybenzoxazole layer.
  • the plurality of gate terminals 33 are located on both sides of the first direction x in the semiconductor device B10 as shown in FIGS.
  • the plurality of gate terminals 33 are arranged corresponding to the number of the pair of first elements 40A and the pair of second elements 40B.
  • a gate voltage for driving one of the pair of first elements 40A and the pair of second elements 40B corresponding thereto is applied to each of the plurality of gate terminals 33.
  • Each of the plurality of gate terminals 33 includes a pad portion 331 and a terminal portion 332.
  • the pad portion 331 is separated from the base material 10 as viewed along the thickness direction z, and is covered with the sealing resin 60. Accordingly, the plurality of gate terminals 33 are supported by the sealing resin 60.
  • One of a plurality of gate wires 503 is connected to the surface of the pad portion 331.
  • the plurality of gate wires 503 are made of aluminum, for example. Note that the surface of the pad portion 331 may be subjected to, for example, silver plating.
  • each of the plurality of gate wires 503 connected to the surfaces of the plurality of pad portions 331 is a gate of one of the corresponding pair of first elements 40A and the pair of second elements 40B. It is connected to the electrode 43. Thereby, each of the plurality of gate terminals 33 is electrically connected to either the gate electrode 43 of the pair of first elements 40A or the gate electrode 43 of the pair of second elements 40B.
  • the terminal portion 332 is connected to the pad portion 331 and exposed from the sealing resin 60.
  • the terminal portion 332 is used when the semiconductor device B10 is mounted on a wiring board.
  • the terminal portion 332 has a base portion 332A and an upright portion 332B.
  • the base portion 332 ⁇ / b> A is connected to the pad portion 331 and extends in a first direction x from one of a pair of first side surfaces 631 (details will be described later) of the sealing resin 60.
  • the dimension of the base portion 332A in the first direction x is smaller than the dimensions of the base portion 312A of the pair of input terminals 31 and the base portions 322A of the pair of output terminals 32 in the first direction x. As shown in FIGS.
  • the standing portion 332 ⁇ / b> B extends from the tip of the base portion 332 ⁇ / b> A in the first direction x toward the side where the first main surface 11 ⁇ / b> A of the base material 10 in the thickness direction z faces. Accordingly, as shown in FIGS. 7 to 9, the terminal portion 332 is L-shaped when viewed along the second direction y.
  • the pair of gate terminals 33 corresponding to the pair of first elements 40A are located on the other side in the first direction x in the semiconductor device B10.
  • the pair of gate terminals 33 are located between the pair of output terminals 32 in the second direction y.
  • the pair of gate terminals 33 corresponding to the pair of second elements 40B are located on one side in the first direction x in the semiconductor device B10.
  • the pair of gate terminals 33 are located between the pair of input terminals 31 in the second direction y.
  • the plurality of detection terminals 34 are located on both sides of the first direction x in the semiconductor device B10 as shown in FIGS.
  • the plurality of detection terminals 34 are arranged corresponding to the number of the pair of first elements 40A and the pair of second elements 40B.
  • Each of the plurality of detection terminals 34 is located next to the gate terminal 33 that is electrically connected to the gate electrode 43 of one of the pair of first elements 40A and the pair of second elements 40B to which it corresponds.
  • a voltage corresponding to the source current flowing through the first electrode 41 of one of the pair of first elements 40A and the pair of second elements 40B is applied to each of the plurality of detection terminals 34. Based on the voltage applied to each of the plurality of detection terminals 34, the source current flowing through the first electrode 41 is detected in the external circuit of the semiconductor device B10.
  • Each of the plurality of detection terminals 34 includes a pad portion 341 and a terminal portion 342.
  • the pad portion 341 is separated from the base material 10 as viewed along the thickness direction z, and is covered with the sealing resin 60. Thereby, the plurality of detection terminals 34 are supported by the sealing resin 60.
  • One of a plurality of detection wires 504 is connected to the surface of the pad portion 341.
  • the plurality of detection wires 504 are made of aluminum, for example.
  • the surface of the pad portion 341 may be subjected to silver plating, for example.
  • each of the plurality of detection wires 504 connected to the surfaces of the plurality of pad portions 341 has the first of the corresponding pair of first elements 40A and the pair of second elements 40B.
  • One electrode 41 is connected. Thereby, each of the plurality of detection terminals 34 is electrically connected to one of the first electrode 41 of the pair of first elements 40A and the first electrode 41 of the pair of second elements 40B.
  • the terminal portion 342 is connected to the pad portion 341 and exposed from the sealing resin 60.
  • the terminal portion 342 is used when the semiconductor device B10 is mounted on a wiring board.
  • the terminal part 342 has a base part 342A and an upright part 342B.
  • the base portion 342A is connected to the pad portion 341, and extends in any of the first direction x from any one of a pair of first side surfaces 631 (details will be described later) of the sealing resin 60.
  • the dimension in the first direction x of the base portion 342A is smaller than the dimensions in the first direction x of the base portions 312A of the pair of input terminals 31 and the base portions 322A of the pair of output terminals 32. As shown in FIGS.
  • the standing portion 342 ⁇ / b> B extends from the tip of the base portion 342 ⁇ / b> A in the first direction x toward the side where the first main surface 11 ⁇ / b> A of the base material 10 in the thickness direction z faces.
  • the terminal portion 342 has an L shape when viewed in the second direction y. Note that the shape of the terminal portion 342 is the same as the shape of the terminal portion 332 of the plurality of gate terminals 33.
  • the sealing resin 60 includes the base material 10 (except the first back surface 12A), the conductive member 20, the auxiliary conductive member 21, the connecting member 29, and a plurality of semiconductor elements 40 ( A pair of first elements 40A and a pair of second elements 40B) are covered.
  • the sealing resin 60 further covers the plurality of first wires 501, the plurality of second wires 502, the plurality of gate wires 503, the plurality of detection wires 504, the plurality of first connection wires 51, and the plurality of second connection wires 52. ing.
  • the sealing resin 60 is made of a material containing, for example, an epoxy resin.
  • the sealing resin 60 has a top surface 61, a bottom surface 62, a pair of first side surfaces 631, a pair of second side surfaces 632, and a pair of through holes 64.
  • the top surface 61 faces the side to which the first main surface 11A of the substrate 10 in the thickness direction z faces.
  • the bottom surface 62 faces the side on which the first back surface 12A of the substrate 10 in the thickness direction z faces.
  • the first back surface 12 ⁇ / b> A is exposed from the bottom surface 62.
  • the bottom surface 62 has a frame shape surrounding the first back surface 12A.
  • the pair of first side surfaces 631 are connected to both the top surface 61 and the bottom surface 62 and face the first direction x. From one side in the first direction x of the first side surface 631, the terminal portions 312 of the pair of input terminals 31, the terminal portions 332 of the pair of gate terminals 33 disposed corresponding to the pair of second elements 40B, and The terminal portions 342 of the pair of detection terminals 34 are exposed. From the other side of the first side surface 631 in the first direction x, the terminal portions 322 of the pair of output terminals 32, the terminal portions 332 of the pair of gate terminals 33 disposed corresponding to the pair of first elements 40A, and The terminal portions 342 of the pair of detection terminals 34 are exposed.
  • the pair of second side surfaces 632 are connected to both the top surface 61 and the bottom surface 62 and face the second direction y.
  • the pair of through holes 64 penetrates the sealing resin 60 from the top surface 61 to the bottom surface 62 in the thickness direction z.
  • the hole edges of the pair of through holes 64 are circular.
  • the pair of through holes 64 are located on both sides of the base material 10 in the second direction y.
  • the heat sink 70 dissipates heat generated from the plurality of semiconductor elements 40 into the atmosphere during the operation of the semiconductor device B10. As shown in FIG. 1, in the example shown by the semiconductor module A10, the heat sink 70 has a rectangular parallelepiped shape, but the shape of the heat sink 70 is not limited to this.
  • the heat sink 70 is made of a metal having a relatively high thermal conductivity. Examples of the metal include copper, iron (Fe), and aluminum.
  • the heat sink 70 has an upper surface 71 and a pair of fastening members 72.
  • the upper surface 71 faces the side where the semiconductor device B10 in the thickness direction z is located.
  • Each of the pair of fastening members 72 includes a bolt 721 and a nut 722.
  • the pair of bolts 721 extend from the upper surface 71 in the thickness direction z.
  • the arrangement interval (interval in the second direction y) and the diameter of the pair of bolts 721 correspond to the pair of through holes 64 provided in the sealing resin 60 of the semiconductor device B10.
  • each of the pair of bolts 721 is configured to be inserted into one of the pair of through holes 64.
  • the tip of each of the pair of bolts 721 is threaded.
  • the nut 722 is engaged with the bolt 721.
  • the nut 722 is in contact with the top surface 61 of the sealing resin 60 of the semiconductor device B10.
  • the bonding sheet 80 is interposed between the upper surface 71 of the heat sink 70 and the first back surface 12A of the base material 10 of the semiconductor device B10.
  • the joining sheet 80 is an elastic sheet having electrical insulation and flexibility.
  • the thermal conductivity of the bonding sheet 80 is 10 W / (m ⁇ K) or more and 25 W / (m ⁇ K) or less. Therefore, the thermal conductivity of the bonding sheet 80 is the thermal conductivity of the sealing resin 60 of the semiconductor device B10 (the thermal conductivity of the sealing resin 60 made of a material containing an epoxy resin is 0.2 to 0.5 W / ( m ⁇ K)).
  • the thickness of the joining sheet 80 is 0.2 mm or more and 0.6 mm or less.
  • the bonding sheet 80 contains a filler containing boron nitride (BN).
  • both the first back surface 12 ⁇ / b> A of the base material 10 and the bottom surface 62 of the sealing resin 60 are pressure-bonded to the bonding sheet 80.
  • the joining sheet 80 is pressed by the upper surface 71 of the heat sink 70, the first back surface 12A, and the bottom surface 62. Crimping can be performed.
  • the surface treatment region 19 formed on the first back surface 12 ⁇ / b> A is in uniform contact with the bonding sheet 80. For this reason, the surface treatment region 19 is in a state of being engaged with the bonding sheet 80.
  • the semiconductor module A10 includes the semiconductor device B10 including the sealing resin 60 and the base material 10 having the first back surface 12A exposed from the sealing resin 60, the heat sink 70, and the bonding sheet 80.
  • the joining sheet 80 is interposed between the heat sink 70 and the first back surface 12A.
  • the thermal conductivity of the bonding sheet 80 is larger than the thermal conductivity of the sealing resin 60, the heat reaching the first back surface 12 ⁇ / b> A can be efficiently transferred to the heat sink 70.
  • the joining sheet 80 has flexibility, as shown in FIG. 16, even if there is unevenness on the upper surface 71 of the heat sink 70, the joining sheet 80 follows the unevenness and joins the heat sink 70. It can suppress that a space
  • the base material 10 and the heat sink 70 repeat thermal expansion and thermal contraction.
  • the compound when a compound is used instead of the bonding sheet 80, the compound gradually flows out due to the thermal expansion and contraction, and a gap is formed between the heat sink 70 and the semiconductor device B10 (pump (Out phenomenon) may occur.
  • the gap is formed, the heat dissipation of the semiconductor device B10 is lowered. Therefore, according to the bonding sheet 80 having flexibility, since the bonding sheet 80 follows the thermal expansion and contraction of the base material 10 and the heat sink 70, a gap is formed between the heat sink 70 and the semiconductor device B10. Can be prevented.
  • the first back surface 12A of the base material 10 is pressure-bonded to the bonding sheet 80.
  • a surface treatment region 19 including a rough surface is formed in a portion in contact with the bonding sheet 80.
  • the thermal conductivity of the bonding sheet 80 is preferably 10 W / (m ⁇ K) or more and 25 W / (m ⁇ K), which is larger than the thermal conductivity of the compound. Thereby, the heat dissipation of semiconductor device B10 can be improved more.
  • a filler containing boron nitride is contained in the bonding sheet 80 in order to obtain the thermal conductivity of the bonding sheet 80.
  • the semiconductor device B10 includes warpage C (the first back surface 12A of the base material 10, the boundary between the bottom surface 62 of the sealing resin 60 and the second side surface 632 (or the first side surface 631)). (Dimension in the thickness direction z) may occur.
  • the warp C is about 0.1 mm at the maximum. Therefore, in order to suppress the formation of the gap between the heat sink 70 and the semiconductor device B10, the bonding sheet 80 is used to fill the gap between the heat sink 70 and the semiconductor device B10 formed by the warp C.
  • the thickness is preferably 0.2 mm or more and 0.6 mm or less.
  • the bottom surface 62 of the sealing resin 60 is pressure-bonded to the bonding sheet 80.
  • the bottom surface 62 has a frame shape surrounding the first back surface 12 ⁇ / b> A of the base material 10.
  • the semiconductor module A20 includes a semiconductor device B20, a heat sink 70, and a bonding sheet 80. Among these, the configuration of the semiconductor device B20 is different from the semiconductor module A10 described above. Note that the cross-sectional position of the semiconductor device B20 illustrated in FIG. 18 is the same as the cross-sectional position of the semiconductor device B10 illustrated in FIG. The cross-sectional position of the semiconductor device B20 shown in FIG. 19 is the same as the cross-sectional position of the semiconductor device B10 shown in FIG. The cross-sectional position of the semiconductor module A20 shown in FIG. 21 is the same as the cross-sectional position of the semiconductor module A10 shown in FIG.
  • the semiconductor device B20 constituting the semiconductor module A20 will be described.
  • the configuration of the substrate 10 is different from the semiconductor device B10 of the semiconductor module A10 described above.
  • the external shape and circuit configuration of the semiconductor device B20 are the same as the external shape and circuit configuration of the semiconductor device B10 shown in FIGS.
  • the substrate 10 has a first substrate 10A and a second substrate 10B.
  • the first base material 10A includes a first main surface 11A and a second back surface 12B. Among these, the second back surface 12B faces the side opposite to the first main surface 11A.
  • the first base material 10A has electrical insulation.
  • the first base material 10A is made of a material containing ceramics having excellent thermal conductivity. Examples of the ceramic include aluminum nitride (AlN).
  • the second base material 10B includes a first back surface 12A and a second main surface 11B. Among these, the 2nd main surface 11B faces the opposite side to 12 A of 1st back surfaces.
  • the second base material 10B has conductivity.
  • Second substrate 10B is made of copper, for example.
  • the second main surface 11B is joined to the second back surface 12B.
  • the base material 10 is a composite member made of different materials.
  • a surface treatment region 19 including a rough surface is formed on the first back surface 12A of the second base material 10B.
  • the surface treatment region 19 is formed over the entire first back surface 12A.
  • the bonding sheet 80 is interposed between the upper surface 71 of the heat sink 70 and the first back surface 12A of the second base material 10B of the semiconductor device B20.
  • both the first back surface 12A of the second base material 10B and the bottom surface 62 of the sealing resin 60 are pressure-bonded to the bonding sheet 80.
  • the surface treatment region 19 formed on the first back surface 12 ⁇ / b> A of the second base material 10 ⁇ / b> B is uniformly in contact with the bonding sheet 80. For this reason, the surface treatment region 19 is in a state of being engaged with the bonding sheet 80.
  • the semiconductor module A20 includes the semiconductor device B20 including the sealing resin 60 and the base material 10 having the first back surface 12A exposed from the sealing resin 60, the heat sink 70, and the bonding sheet 80.
  • the joining sheet 80 has electrical insulation and flexibility, and is interposed between the heat sink 70 and the first back surface 12A.
  • the thermal conductivity of the bonding sheet 80 is larger than the thermal conductivity of the sealing resin 60. Therefore, even with the semiconductor module A20, the heat dissipation of the semiconductor device B20 can be further improved.
  • the base material 10 of the semiconductor device B20 has a first base material 10A and a second base material 10B.
  • the first main surface 11A of the second base material 10B is joined to the second back surface 12B of the first base material 10A.
  • a metal such as copper as the material of the second base material 10B
  • the thermal conductivity of the whole base material 10 can be made larger than the thermal conductivity of the base material 10 of the semiconductor device B10. Therefore, the heat dissipation of the semiconductor device B20 can be made larger than that of the semiconductor device B10.
  • FIG. 23 the semiconductor module A30 includes a semiconductor device B30, a heat sink 70, and a bonding sheet 80. Among these, the configurations of the semiconductor device B30 and the heat sink 70 are different from the semiconductor module A10 described above.
  • the sealing resin 60 is transmitted for the sake of convenience. In FIG.
  • FIG. 26 passes through the sealing resin 60 and the second terminal 31 ⁇ / b> B for convenience of understanding.
  • the semiconductor device B30 has a pair of insulating substrates 22, a pair of gate layers 23, a pair of detection layers 24, a plurality of dummy terminals 35, an insulating member 39, a pair of third connection wires 53, and a pair of semiconductor devices B10.
  • a fourth connection wire 54 is further provided.
  • the semiconductor device B30 does not include the auxiliary conductive member 21, the connecting member 29, the plurality of first connection wires 51, and the plurality of second connection wires 52.
  • the side where the first terminal 31A and the second terminal 31B are located in the first direction x is referred to as “one side in the first direction x”.
  • the side where the output terminal 32 is located in the first direction x is referred to as “the other side in the first direction x”.
  • the semiconductor device B30 includes a pair of base materials 10 as shown in FIGS.
  • the pair of base materials 10 are separated from each other in the first direction x. Viewed along the thickness direction z, the pair of base materials 10 has a rectangular shape with the second direction y as a long side.
  • the material of the pair of base materials 10 is the same as the material of the base material 10 of the semiconductor device B10.
  • a surface treatment region 19 including a rough surface is formed on the first back surface 12A.
  • the surface treatment region 19 is formed over the entire first back surface 12A.
  • the semiconductor device B30 includes a conductive member 20, as shown in FIGS. 25, 26, 31, and 32.
  • the conductive member 20 includes a first conductive portion 20A and a second conductive portion 20B. Viewed along the thickness direction z, the first conductive portion 20A and the second conductive portion 20B have a rectangular shape with the second direction y as a long side. 20 A of 1st electroconductive parts are joined to 11 A of 1st main surfaces of the base material 10 located in the one side of the 1st direction x. In the first conductive portion 20A, the plurality of first elements 40A are joined to the surface thereof in a state of being electrically connected to the first conductive portion 20A.
  • the second conductive portion 20B is joined to the first main surface 11A of the base material 10 located on the other side in the first direction x.
  • the plurality of second elements 40B are joined to the surface thereof in a state of being electrically connected to the second conductive portion 20B.
  • the material of the conductive member 20 is the same as the material of the conductive member 20 of the semiconductor device B10.
  • the pair of insulating substrates 22 is bonded to the surface of the first conductive portion 20A and the other is bonded to the surface of the second conductive portion 20B. ing.
  • the pair of insulating substrates 22 has a strip shape extending in the second direction y.
  • the insulating substrate 22 bonded to the surface of the first conductive portion 20A is located on the other side in the first direction x with respect to the plurality of first elements 40A.
  • the insulating substrate 22 bonded to the surface of the second conductive portion 20B is located on one side in the first direction x with respect to the plurality of second elements 40B.
  • the pair of insulating substrates 22 is made of a material containing, for example, a glass epoxy resin.
  • the pair of gate layers 23 is disposed on the insulating substrate 22 bonded to the surface of the first conductive portion 20A, and the other is the second conductive layer. It arrange
  • the pair of gate layers 23 has a strip shape extending in the second direction y.
  • the pair of gate layers 23 has conductivity.
  • the pair of gate layers 23 is made of, for example, copper.
  • the pair of detection layers 24 is disposed on the insulating substrate 22 bonded to the surface of the first conductive portion 20A, and the other is the second conductive layer. It arrange
  • the pair of detection layers 24 has a strip shape extending in the second direction y.
  • the pair of detection layers 24 have conductivity.
  • the pair of detection layers 24 is made of copper, for example.
  • the semiconductor device B30 includes a first terminal 31A and a second terminal 31B, as shown in FIGS.
  • the first terminal 31A and the second terminal 31B are located on one side in the first direction x.
  • the first terminal 31A and the second terminal 31B are separated from each other in the thickness direction z.
  • the first terminal 31A and the second terminal 31B are metal plates.
  • the said metal plate consists of copper or a copper alloy, for example.
  • the first terminal 31A includes a pad portion 311 and a terminal portion 312.
  • the boundary between the pad portion 311 and the terminal portion 312 is a surface along the second direction y and the thickness direction z, and the sealing resin 60 located on one side in the first direction x. This is a surface including the first side surface 631.
  • the pad portion 311 is entirely covered with the sealing resin 60.
  • the other side of the pad portion 311 in the first direction x has a comb shape. This comb-like portion is joined to the surface thereof in a state of being electrically connected to the first conductive portion 20A. The joining is performed by solder joining or ultrasonic joining.
  • the first terminal 31A is electrically connected to the first conductive portion 20A.
  • the terminal portion 312 extends from the first side surface 631 in the first direction x.
  • the terminal portion 312 has a rectangular shape.
  • both sides of the terminal portion 312 in the second direction y are covered with the sealing resin 60.
  • Other portions of the terminal portion 312 are exposed from the first side surface 631.
  • the first terminal 31 ⁇ / b> A is supported by the sealing resin 60.
  • the base material 10 positioned on one side in the first direction x is supported by the first terminal 31A via the first conductive portion 20A.
  • the second terminal 31B has a pad portion 311 and a terminal portion 312.
  • the pad portion 311 has a connecting portion 311A and a plurality of extending portions 311B.
  • the connecting portion 311A has a strip shape extending in the second direction y.
  • the connecting portion 311A is connected to the terminal portion 312.
  • the plurality of extending portions 311B extend from the connecting portion 311A toward the other side in the first direction x.
  • the plurality of extending portions 311B are separated from each other in the second direction y.
  • the terminal portion 312 has a strip shape extending from the first side surface 631 in the first direction x. As viewed along the thickness direction z, the terminal portion 312 has a rectangular shape. In the example shown by the semiconductor device B ⁇ b> 30, both sides of the terminal portion 312 in the second direction y are covered with the sealing resin 60. Other portions of the terminal portion 312 are exposed from the first side surface 631. As shown in FIGS.
  • the terminal portion 312 overlaps the terminal portion 312 of the first terminal 31 ⁇ / b> A as viewed along the thickness direction z.
  • the shape of the terminal portion 312 is the same as the shape of the first terminal 31A, and when viewed along the thickness direction z, the entire terminal portion 312 is the first terminal 31A. It overlaps with the terminal portion 312.
  • the insulating member 39 is interposed between the first terminal 31A and the second terminal 31B in the thickness direction z.
  • the insulating member 39 is a flat plate.
  • the insulating member 39 is, for example, insulating paper.
  • the entire first terminal 31 ⁇ / b> A overlaps the insulating member 39.
  • the second terminal 31 ⁇ / b> B a part of the pad portion 311 and the entire terminal portion 312 overlap the insulating member 39 when viewed along the thickness direction z.
  • These portions that overlap the insulating member 39 when viewed along the thickness direction z are in contact with the insulating member 39.
  • the first terminal 31A and the second terminal 31B are insulated from each other by the insulating member 39.
  • a part of the insulating member 39 is covered with the sealing resin 60.
  • the semiconductor device B30 includes an output terminal 32 as shown in FIGS. 24 to 27 and FIG.
  • the output terminal 32 is located on the other side in the first direction x.
  • the output terminal 32 is a metal plate.
  • the said metal plate consists of copper or a copper alloy, for example.
  • the output terminal 32 has a pad portion 321 and a terminal portion 322.
  • the boundary between the pad portion 321 and the terminal portion 322 is a surface along the second direction y and the thickness direction z and the first side surface 631 of the sealing resin 60 located on the other side in the first direction x. It is a surface to include.
  • the pad portion 321 is entirely covered with the sealing resin 60.
  • One side of the pad portion 321 in the first direction x has a comb shape.
  • the comb-like portion is joined to the surface thereof in a state of conducting to the second conductive portion 20B.
  • the joining is performed by solder joining or ultrasonic joining.
  • the output terminal 32 is electrically connected to the second conductive portion 20B.
  • the terminal portion 322 extends from the first side surface 631 in the first direction x. Viewed along the thickness direction z, the terminal portion 322 has a rectangular shape.
  • both sides of the terminal portion 322 in the second direction y are covered with the sealing resin 60. Other portions of the terminal portion 322 are exposed from the first side surface 631.
  • the output terminal 32 is supported by the sealing resin 60.
  • the base material 10 positioned on the other side in the first direction x is supported by the output terminal 32 via the second conductive portion 20B.
  • the semiconductor device B30 includes a pair of gate terminals 33 and a pair of detection terminals 34, as shown in FIGS.
  • the pair of gate terminals 33 and the pair of detection terminals 34 are configured from the same lead frame together with the plurality of dummy terminals 35.
  • the lead frame is made of copper or a copper alloy.
  • the pair of gate terminals 33 is located next to the pair of base materials 10 in the second direction y.
  • One gate terminal 33 is located next to the substrate 10 located on one side in the first direction x.
  • the other gate terminal 33 is located next to the base material 10 located on the other side in the first direction x.
  • Each of the pair of gate terminals 33 includes a pad portion 331 and a terminal portion 332.
  • the pad portion 331 is covered with the sealing resin 60. Thereby, the pair of gate terminals 33 are supported by the sealing resin 60.
  • the surface of the pad portion 331 may be subjected to, for example, silver plating.
  • the terminal portion 332 is connected to the pad portion 331 and exposed from the second side surface 632 of the sealing resin 60 (see FIG. 30). When viewed along the first direction x, the terminal portion 332 has an L shape.
  • the pair of detection terminals 34 are located next to the pair of gate terminals 33 in the first direction x.
  • Each of the pair of detection terminals 34 includes a pad portion 341 and a terminal portion 342.
  • the pad portion 341 is covered with the sealing resin 60. Thereby, the pair of detection terminals 34 are supported by the sealing resin 60.
  • the surface of the pad portion 341 may be subjected to silver plating, for example.
  • the terminal portion 342 is connected to the pad portion 341 and exposed from the second side surface 632 of the sealing resin 60 (see FIG. 30). When viewed along the first direction x, the terminal portion 342 has an L shape.
  • the plurality of dummy terminals 35 are positioned on the opposite side of the pair of gate terminals 33 with respect to the pair of detection terminals 34 in the first direction x, as shown in FIGS. 25, 26 and 34.
  • the number of dummy terminals 35 is six. Of these, the three dummy terminals 35 are located on one side in the first direction x. The remaining three dummy terminals 35 are located on the other side in the first direction x.
  • the number of the dummy terminals 35 is not limited to this.
  • the semiconductor device B30 may be configured not to include a plurality of dummy terminals 35. Each of the plurality of dummy terminals 35 has a pad portion 351 and a terminal portion 352.
  • the pad portion 351 is covered with the sealing resin 60. Accordingly, the plurality of dummy terminals 35 are supported by the sealing resin 60. Note that the surface of the pad portion 351 may be subjected to silver plating, for example.
  • the terminal portion 352 is connected to the pad portion 351 and exposed from the second side surface 632 of the sealing resin 60 (see FIG. 30). As shown in FIGS. 28 and 29, the terminal portion 352 is L-shaped when viewed along the first direction x. Note that the shapes of the terminal portions 332 of the pair of gate terminals 33 and the terminal portions 342 of the pair of detection terminals 34 are the same as the shapes of the terminal portions 352.
  • the plurality of semiconductor elements 40 are joined in a state of conducting to the conductive member 20 so as to be staggered with respect to the second direction y when viewed along the thickness direction z. ing.
  • the plurality of first wires 501 connected to the first electrode 41 are connected to the surface of the second conductive portion 20B. Thereby, the plurality of first elements 40A are electrically connected to the second conductive portion 20B.
  • the multiple first wires 501 extend in the first direction x.
  • the gate wire 503 connected to the gate electrode 43 is connected to the gate layer 23 disposed on the insulating substrate 22 bonded to the first conductive portion 20A.
  • the detection wire 504 connected to any region of the first electrode 41 is connected to the detection layer 24 disposed on the insulating substrate 22 bonded to the first conductive portion 20A.
  • the plurality of second wires 502 connected to the first electrode 41 are connected to the extending portion 311B of the pad portion 311 of the second terminal 31B. Thereby, the plurality of second elements 40B are electrically connected to the second terminal 31B.
  • the plurality of second wires 502 extend in the first direction x.
  • the gate wire 503 connected to the gate electrode 43 is connected to the gate layer 23 disposed on the insulating substrate 22 bonded to the second conductive portion 20B.
  • the detection wire 504 connected to any region of the first electrode 41 is connected to the detection layer 24 disposed on the insulating substrate 22 bonded to the second conductive portion 20B.
  • the pair of third connection wires 53 are connected to the pair of gate layers 23 and the pair of gate terminals 33 as shown in FIGS.
  • the pair of third connection wires 53 are connected to the surfaces of the pair of pad portions 331.
  • the pair of third connection wires 53 is made of, for example, aluminum.
  • the gate terminal 33 located on one side in the first direction x is electrically connected to the gate electrodes 43 of the plurality of first elements 40A.
  • the gate terminal 33 located on the other side in the first direction x is electrically connected to the gate electrodes 43 of the plurality of second elements 40B.
  • the pair of third connection wires 53 are covered with the sealing resin 60.
  • the pair of fourth connection wires 54 are connected to the pair of detection layers 24 and the pair of detection terminals 34 as shown in FIGS. 25 and 34.
  • the pair of fourth connection wires 54 are connected to the surfaces of the pair of pad portions 341.
  • the pair of fourth connection wires 54 is made of, for example, aluminum.
  • the detection terminal 34 located on one side in the first direction x is electrically connected to the first electrodes 41 of the plurality of first elements 40A.
  • the detection terminal 34 located on the other side in the first direction x is electrically connected to the first electrodes 41 of the plurality of second elements 40B.
  • the pair of fourth connection wires 54 are covered with the sealing resin 60.
  • the sealing resin 60 includes a top surface 61, a bottom surface 62, a pair of first side surfaces 631, a pair of second side surfaces 632, a plurality of third side surfaces 633, and a plurality of fourth side surfaces 634. And a plurality of through holes 64. Note that, among these, the configurations of the top surface 61, the bottom surface 62, and the pair of second side surfaces 632 are the same as those in the semiconductor device B10 described above, and thus the description thereof is omitted here.
  • the pair of first side surfaces 631 are connected to both the top surface 61 and the bottom surface 62 and face the first direction x. From one side of the first side surface 631 in the first direction x, the terminal portion 312 of the first terminal 31A, the terminal portion 312 of the second terminal 31B, and the insulating member 39 are exposed. The terminal portion 322 of the output terminal 32 is exposed from the other side of the second side surface 632 in the first direction x.
  • the plurality of third side surfaces 633 are connected to both the top surface 61 and the bottom surface 62 and face the second direction y.
  • the multiple third side surfaces 633 include a pair of third side surfaces 633 located on one side in the first direction x and a pair of third side surfaces 633 located on the other side in the first direction x.
  • the pair of third side surfaces 633 are opposed to each other in the second direction y.
  • the pair of third side surfaces 633 are connected to both sides of the first side surface 631 in the second direction y.
  • the plurality of fourth side surfaces 634 are connected to both the top surface 61 and the bottom surface 62 and face the first direction x.
  • the plurality of fourth side surfaces 634 are located outside the semiconductor device B30 with respect to the pair of first side surfaces 631 in the first direction x.
  • the plurality of fourth side surfaces 634 includes a pair of fourth side surfaces 634 located on one side in the first direction x and a pair of fourth side surfaces 634 located on the other side in the first direction x. In each of one side and the other side of the first direction x, both sides of the pair of fourth side surfaces 634 in the second direction y are connected to the pair of second side surfaces 632 and the pair of third side surfaces 633.
  • the plurality of through holes 64 are positioned at the four corners of the sealing resin 60 as viewed along the thickness direction z. As shown in FIG. 31, the configuration of each of the plurality of through holes 64 is the same as the configuration of the through hole 64 of the semiconductor device B10.
  • the heat sink 70 has an upper surface 71 and a plurality of fastening members 72.
  • the upper surface 71 faces the side where the semiconductor device B30 in the thickness direction z is located.
  • Each of the plurality of fastening members 72 includes a bolt 721 and a nut 722.
  • the plurality of bolts 721 extend from the upper surface 71 in the thickness direction z.
  • the arrangement positions and diameters of the plurality of bolts 721 correspond to the plurality of through holes 64 provided in the sealing resin 60 of the semiconductor device B30.
  • each of the plurality of bolts 721 is configured to be inserted into one of the plurality of through holes 64.
  • a thread is cut at the tip of each of the plurality of bolts 721.
  • the nut 722 is engaged with the bolt 721.
  • the joining sheet 80 is interposed between the upper surface 71 of the heat sink 70 and the first back surface 12A of the pair of base materials 10 of the semiconductor device B30.
  • both the pair of first back surfaces 12 ⁇ / b> A and the bottom surface 62 of the sealing resin 60 are pressure bonded to the bonding sheet 80.
  • the surface treatment region 19 formed on the pair of first back surfaces 12A is in contact with the bonding sheet 80 uniformly. For this reason, the surface treatment region 19 is in a state of being engaged with the bonding sheet 80.
  • the semiconductor module A30 includes a semiconductor device B30 including a sealing resin 60 and a pair of base materials 10 having a first back surface 12A exposed from the sealing resin 60, a heat sink 70, and a bonding sheet 80.
  • the bonding sheet 80 has electrical insulation and flexibility, and is interposed between the heat sink 70 and the pair of first back surfaces 12A.
  • the thermal conductivity of the bonding sheet 80 is larger than the thermal conductivity of the sealing resin 60. Therefore, even with the semiconductor module A30, the heat dissipation of the semiconductor device B30 can be further improved.
  • the first terminal 31A and the second terminal 31B are separated from each other in the thickness direction z. As viewed along the thickness direction z, at least a part of the terminal portion 312 of the second terminal 31B overlaps the terminal portion 312 of the first terminal 31A. Thereby, in the use of the semiconductor device B30, the magnetic fields generated in the first terminal 31A and the second terminal 31B interfere with each other, thereby reducing the inductance of the first terminal 31A and the second terminal 31B. Therefore, since the surge voltage applied to the first terminal 31A and the second terminal 31B is reduced, the power loss of the semiconductor device B30 can be suppressed.
  • Appendix 1 A base material having a first main surface and a first back surface facing each other in the thickness direction, a conductive member disposed on the first main surface, and a plurality of semiconductors joined in a conductive state to the conductive member
  • a semiconductor device comprising: an element; and a sealing resin that covers the plurality of semiconductor elements such that the first back surface is exposed; A heat sink, A joining sheet interposed between the heat sink and the first back surface, The joining sheet has electrical insulation and flexibility, The semiconductor module whose thermal conductivity of the said joining sheet is larger than the thermal conductivity of the said sealing resin.
  • Appendix 2 The semiconductor module according to appendix 1, wherein the first back surface is pressure-bonded to the bonding sheet.
  • Appendix 3 The semiconductor module according to appendix 2, wherein a surface treatment region including a rough surface is formed in a portion in contact with the bonding sheet on the first back surface.
  • Appendix 4 The semiconductor module according to appendix 3, wherein the base material has electrical insulation.
  • Appendix 5 The semiconductor module according to appendix 4, wherein the base material is made of a material containing ceramics.
  • the base material includes a first base material having electrical insulation and a second base material having conductivity,
  • the first base material includes the first main surface and a second back surface facing the opposite side to the first main surface,
  • the second base material includes the first back surface, and a second main surface facing the side opposite to the first back surface,
  • Appendix 7 The semiconductor module according to appendix 6, wherein the second base material is made of a material containing copper.
  • Appendix 8 The semiconductor module according to any one of appendices 2 to 7, wherein the bonding sheet has a thermal conductivity of 10 W / (m ⁇ K) to 25 W / (m ⁇ K).
  • Appendix 9 The semiconductor module according to appendix 8, wherein the bonding sheet contains a filler containing boron nitride.
  • Appendix 10 The semiconductor module according to appendix 9, wherein the bonding sheet has a thickness of 0.2 mm to 0.6 mm.
  • the sealing resin has a bottom surface that faces the thickness direction and the first back surface is exposed, and a pair of side surfaces that are connected to the bottom surface and face a first direction orthogonal to the thickness direction.
  • Appendix 12 The semiconductor module according to appendix 11, wherein the bottom surface has a frame shape surrounding the first back surface.
  • the plurality of semiconductor elements include a first element and a second element
  • the conductive member includes a first conductive part joined in a state where the first element is conductive, and a second conductive part joined in a state where the second element is conductive
  • the semiconductor device further includes: a first terminal that conducts to the first conductive part; a second terminal that conducts to the second element; and an output terminal that conducts to the second conductive part.
  • Appendix 14 The semiconductor module according to appendix 13, wherein the conductive member is a metal plate.
  • Appendix 15 The first terminal and the second terminal are exposed from one surface of the pair of side surfaces, The semiconductor module according to appendix 13 or 14, wherein the output terminal is exposed from the other surface of the pair of side surfaces.
  • the first terminal and the second terminal are separated from each other in a second direction orthogonal to both the thickness direction and the first direction;
  • Each of the first terminal, the second terminal, and the output terminal has a terminal portion exposed from any one of the pair of side surfaces,
  • the terminal portion includes a base portion extending in the first direction from one of the pair of side surfaces, and a tip of the base portion in the first direction on a side where the first main surface faces in the thickness direction.
  • the semiconductor module according to appendix 15 further comprising an upright portion extending toward the surface.
  • Appendix 17 The first terminal and the second terminal are separated from each other in the thickness direction, Each of the first terminal and the second terminal has a terminal portion extending in the first direction from one surface of the pair of side surfaces, The semiconductor module according to appendix 15, wherein at least a part of the terminal portion of the second terminal overlaps the terminal portion of the first terminal as viewed along the thickness direction.

Abstract

L'invention concerne un module à semi-conducteur comprenant un dispositif à semi-conducteur, un dissipateur thermique et une feuille de connexion, en tant qu'éléments constitutifs de celui-ci. Le dispositif à semi-conducteur comprend un substrat, un élément conducteur, une pluralité d'éléments semi-conducteurs et une résine d'étanchéité. Le substrat a une première surface principale et une première surface arrière qui font face à des directions opposées dans une direction d'épaisseur. L'élément conducteur est disposé sur la première surface principale. La pluralité d'éléments semi-conducteurs est connectée, en communication électrique, à l'élément conducteur. La résine d'étanchéité recouvre la pluralité d'éléments semi-conducteurs de telle sorte que la première surface arrière est exposée. La feuille de connexion est interposée entre le dissipateur thermique et la première surface arrière. La feuille de connexion est électriquement isolante et flexible. La feuille de connexion a une conductivité thermique qui est supérieure à la conductivité thermique de la résine d'étanchéité.
PCT/JP2019/019109 2018-06-08 2019-05-14 Module à semi-conducteur WO2019235146A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE212019000029.0U DE212019000029U1 (de) 2018-06-08 2019-05-14 Halbleitermodul

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018-109963 2018-06-08
JP2018109963 2018-06-08

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WO2019235146A1 true WO2019235146A1 (fr) 2019-12-12

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CN116825768A (zh) * 2020-10-14 2023-09-29 罗姆股份有限公司 半导体模块
CN116936561A (zh) * 2020-10-14 2023-10-24 罗姆股份有限公司 半导体模块
JP7483814B2 (ja) 2021-11-18 2024-05-15 台達電子企業管理（上海）有限公司 スイッチモジュール

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JP2009088215A (ja) * 2007-09-28 2009-04-23 Dowa Metaltech Kk 半導体装置
JP2014207430A (ja) * 2013-03-21 2014-10-30 ローム株式会社 半導体装置
JP2018026370A (ja) * 2014-11-13 2018-02-15 株式会社日立製作所 パワー半導体モジュール
JP2018029201A (ja) * 2017-10-13 2018-02-22 ローム株式会社 半導体装置
JP2018050084A (ja) * 2009-05-14 2018-03-29 ローム株式会社 半導体モジュール
WO2018056205A1 (fr) * 2016-09-20 2018-03-29 住友ベークライト株式会社 Procédé de production d'une structure de dissipation de chaleur

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Publication number Priority date Publication date Assignee Title
JP2009088215A (ja) * 2007-09-28 2009-04-23 Dowa Metaltech Kk 半導体装置
JP2018050084A (ja) * 2009-05-14 2018-03-29 ローム株式会社 半導体モジュール
JP2014207430A (ja) * 2013-03-21 2014-10-30 ローム株式会社 半導体装置
JP2018026370A (ja) * 2014-11-13 2018-02-15 株式会社日立製作所 パワー半導体モジュール
WO2018056205A1 (fr) * 2016-09-20 2018-03-29 住友ベークライト株式会社 Procédé de production d'une structure de dissipation de chaleur
JP2018029201A (ja) * 2017-10-13 2018-02-22 ローム株式会社 半導体装置

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116825768A (zh) * 2020-10-14 2023-09-29 罗姆股份有限公司 半导体模块
CN116936561A (zh) * 2020-10-14 2023-10-24 罗姆股份有限公司 半导体模块
CN116825768B (zh) * 2020-10-14 2024-02-23 罗姆股份有限公司 半导体模块
CN116936561B (zh) * 2020-10-14 2024-05-03 罗姆股份有限公司 半导体模块
JP7483814B2 (ja) 2021-11-18 2024-05-15 台達電子企業管理（上海）有限公司 スイッチモジュール

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