WO2019200819A1 - Bps型阵列基板的制作方法及bps型阵列基板 - Google Patents

Bps型阵列基板的制作方法及bps型阵列基板 Download PDF

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Publication number
WO2019200819A1
WO2019200819A1 PCT/CN2018/104504 CN2018104504W WO2019200819A1 WO 2019200819 A1 WO2019200819 A1 WO 2019200819A1 CN 2018104504 W CN2018104504 W CN 2018104504W WO 2019200819 A1 WO2019200819 A1 WO 2019200819A1
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auxiliary
main
pad unit
layer
color resist
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PCT/CN2018/104504
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English (en)
French (fr)
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邓竹明
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深圳市华星光电技术有限公司
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Priority to US16/088,401 priority Critical patent/US10634958B1/en
Publication of WO2019200819A1 publication Critical patent/WO2019200819A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells
    • G02F1/13394—Gaskets; Spacers; Sealing of cells spacers regularly patterned on the cell subtrate, e.g. walls, pillars
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133512—Light shielding layers, e.g. black matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G02F1/133516—Methods for their manufacture, e.g. printing, electro-deposition or photolithography
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells
    • G02F1/13396—Spacers having different sizes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells
    • G02F1/13398—Spacer materials; Spacer properties
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136222—Colour filters incorporated in the active matrix substrate
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a method for fabricating a BPS type array substrate and a BPS type array substrate.
  • Liquid crystal display is the most widely used display product on the market. Its production process technology is very mature, its product yield is high, its production cost is relatively low, and its market acceptance is high. Most of the liquid crystal displays on the market are backlight type liquid crystal display devices, which include a liquid crystal display panel and a backlight module.
  • a liquid crystal display panel is composed of a color filter (CF) substrate, an array (Array) substrate, a liquid crystal sandwiched between the color filter substrate and the array substrate, and a sealant (Sealant), wherein the CF substrate mainly includes A color filter layer that forms colored light through a color resistive unit (R/G/B), a black matrix (BM) for preventing light leakage at the edge of the pixel, and a spacer for maintaining the thickness of the box (Photo Spacer, PS)
  • two types of spacers are usually used, such as a main spacer and a secondary spacer (Sub PS) on the CF substrate.
  • Black Photo Spacer (BPS) material is a new type of material, which has the characteristics of the spacer material in the traditional technology, such as excellent elastic recovery force and low pollution to liquid crystal, etc.
  • the characteristics of the black matrix material such as the higher optical density (OD) value, can be used as a shading effect. Therefore, it can be used to combine the two processes of BM and PS to reduce one yellow light process. Reduce material costs and tact time, thereby reducing overall production costs.
  • the COA (Color Filter on Array) technology is a technique of preparing a color filter layer on an array substrate. Since the display panel of the COA structure does not have the alignment problem between the color filter substrate and the array substrate, the difficulty of the process of the box in the preparation process of the display panel can be reduced, and the error in the box can be avoided, so the black matrix can be designed as a narrow line width. Increases the aperture ratio.
  • a new type of BM-Less technology is a technology based on COA technology that combines BM and PS into the same BPS material and is completed on the same process and designed on the Array substrate.
  • the black matrix and the main The spacer, the auxiliary spacer and the color filter are all designed on the side of the array substrate, so that not only the error due to the accuracy of the group in the group process, but also the translation caused by the bending of the panel in the curved display technology can be avoided. More importantly, it saves a material and process, shortens production time and reduces product cost.
  • the main spacer 101 and the auxiliary spacer 102 are used under the single layer.
  • a color resist 201 and a second color resist 202 serve as a pad stage, and a height difference between the main spacer 101 and the auxiliary spacer 102 is composed of a difference in thickness between the first color resist 201 and the second color resist 202.
  • the thickness h1 of the main spacer 101 and the auxiliary spacer 102 itself is similar to the cell gap H1 of the liquid crystal panel, and the main spacer 101 and the auxiliary spacer 102 have a larger amount of BPS material and a higher cost. .
  • the present invention provides a method for fabricating a BPS type array substrate, comprising the following steps:
  • Step S1 providing a substrate, forming a TFT layer on the substrate, and forming a protective layer covering the TFT layer on the substrate;
  • Step S2 forming a color photoresist layer on the protective layer, the color photoresist layer comprising a first color resist layer and a second color resist layer of different colors, wherein the first color resist layer comprises a first pixel in parallel a unit, a first main pad unit, and a first auxiliary pad unit, the second color resist layer includes a second pixel unit, a second main pad unit, and a second auxiliary pad unit, wherein the One pixel unit and second pixel unit are arranged side by side on the protective layer, and the first main pad unit and the second main pad unit are stacked on the protective layer and together constitute a main pad portion, the first auxiliary lining
  • the pad unit and the second auxiliary pad unit are stacked on the protective layer and jointly form an auxiliary pad portion, and the first color resist layer is formed by a half exposure process, and the first main pad unit and the first thickness are obtained by one exposure.
  • An auxiliary pad unit such that a thickness of the first auxiliary pad unit is smaller than a thickness of the first main pad
  • Step S3 forming an organic insulating layer covering the color photoresist layer on the protective layer, coating a BPS material on the organic insulating layer, and exposing and developing the BPS material to obtain a BPS light shielding layer.
  • the BPS light shielding layer includes a black matrix and a main spacer and an auxiliary spacer disposed on the black matrix, and the main spacer and the auxiliary spacer respectively correspond to the main pad portion and the auxiliary lining Above the pad portion, the height of the main spacer is greater than the height of the secondary spacer, and the height of the secondary spacer is greater than the height of the black matrix.
  • the first color resist layer is formed by a half exposure process using a semi-transparent mask or a gray tone mask, so that the first main pad unit and the first auxiliary having different thicknesses are obtained by one exposure.
  • the BPS material is exposed by a full exposure method to obtain a black matrix, a main spacer and an auxiliary spacer, and between the first main pad unit and the first auxiliary pad unit.
  • the difference in thickness constitutes a difference in height between the main pad portion and the auxiliary pad portion.
  • the first main pad unit is correspondingly located on the second main pad unit, and the first auxiliary pad unit is correspondingly located on the second auxiliary pad unit;
  • the second main pad unit is correspondingly located above the first main pad unit, and the second auxiliary pad unit is correspondingly located above the first auxiliary pad unit.
  • the color photoresist layer further includes a third color resist layer
  • the third color resist layer includes a third pixel unit arranged in parallel with the first pixel unit and the second pixel unit on the protective layer;
  • the first color resist layer, the second color resist layer and the third color resist layer are respectively one of a red color resist layer, a green color resist layer and a blue color resist layer.
  • the TFT layer includes a scan line and a data line that is perpendicularly intersected and insulated from the scan line;
  • the black matrix is correspondingly disposed above the scan line.
  • the present invention also provides a BPS type array substrate, comprising a base substrate, a TFT layer disposed on the base substrate, a protective layer covering the base substrate and the TFT layer, and a color disposed on the protective layer a photoresist layer, an organic insulating layer covering the color photoresist layer and the protective layer, and a BPS light shielding layer disposed on the organic insulating layer;
  • the BPS light shielding layer includes a black matrix and a main spacer and an auxiliary spacer disposed on the black matrix;
  • the color photoresist layer includes a first color resist layer and a second color resist layer of different colors, the first color resist layer including a first pixel unit, a first main pad unit, and a first auxiliary pad unit
  • the second color resist layer includes a second pixel unit, a second main pad unit, and a second auxiliary pad unit, wherein the first pixel unit and the second pixel unit are arranged side by side on the protective layer.
  • the first main pad unit and the second main pad unit are stacked on the protective layer and collectively constitute a main pad portion, and the first auxiliary pad unit and the second auxiliary pad unit are stacked on the protective layer and Cooperating to form an auxiliary pad portion, the thickness of the first auxiliary pad unit being smaller than the thickness of the first main pad unit, the height of the main pad portion being greater than the height of the auxiliary pad portion;
  • the main spacer and the auxiliary spacer are respectively located above the main pad portion and the auxiliary pad portion, the height of the main spacer is greater than the height of the auxiliary spacer, and the auxiliary spacer The height of the mat is greater than the height of the black matrix.
  • a difference in thickness between the first main pad unit and the first auxiliary pad unit constitutes a height difference between the main pad portion and the auxiliary pad portion.
  • the first main pad unit is correspondingly located on the second main pad unit, and the first auxiliary pad unit is correspondingly located on the second auxiliary pad unit;
  • the second main pad unit is correspondingly located above the first main pad unit, and the second auxiliary pad unit is correspondingly located above the first auxiliary pad unit.
  • the color photoresist layer further includes a third color resist layer
  • the third color resist layer includes a third pixel unit arranged in parallel with the first pixel unit and the second pixel unit on the protective layer;
  • the first color resist layer, the second color resist layer and the third color resist layer are respectively one of a red color resist layer, a green color resist layer and a blue color resist layer.
  • the TFT layer includes a scan line and a data line that is perpendicularly intersected and insulated from the scan line;
  • the black matrix is correspondingly disposed above the scan line.
  • the invention provides a method for fabricating a BPS type array substrate, wherein the double color resisting structure formed by the first color resist layer and the second color resist layer is used for padding the main spacer and the auxiliary respectively.
  • a main pad portion and an auxiliary pad portion of the spacer such that the main pad portion and the auxiliary pad portion are convex, so that the thickness of the main spacer and the auxiliary spacer itself is reduced, thereby reducing
  • the amount of BPS material forming the main spacer and the auxiliary spacer is reduced, and the production cost is reduced, and the main spacer and the auxiliary spacer can be realized by thinning the thickness of the first color resist layer under the auxiliary pad portion by a half exposure process.
  • the height difference between the objects is simple to make.
  • the main pad portion and the auxiliary pad portion for respectively padding the main spacer and the auxiliary spacer are double formed by using the first color resist layer and the second color resist layer.
  • a layer color resisting structure such that the main pad portion and the auxiliary pad portion are convex, so that the thickness of the main spacer and the auxiliary spacer itself is reduced, thereby reducing the formation of the main spacer and the auxiliary spacer.
  • FIG. 1 is a schematic cross-sectional structural view of a conventional BPS type liquid crystal panel
  • FIG. 2 is a schematic flow chart of a method for fabricating a BPS type array substrate according to the present invention
  • step S2 is a schematic diagram of step S2 of the method for fabricating a BPS type array substrate of the present invention
  • step S3 is a schematic diagram of step S3 of the method for fabricating a BPS type array substrate of the present invention
  • FIG. 6 is a schematic plan view showing a planar structure of a BPS type array substrate of the present invention.
  • Fig. 7 is a cross-sectional structural view showing the BPS type array substrate of the present invention taken along line a-a' of Fig. 6.
  • the present invention first provides a method for fabricating a BPS type array substrate, comprising the following steps:
  • Step S1 as shown in FIG. 3, a base substrate 10 is provided, a TFT layer 20 is formed on the base substrate 10, and a protective layer 30 covering the TFT layer 20 is formed on the base substrate 10.
  • the TFT layer 20 includes a scan line 21 and a data line 22 that is perpendicularly intersected with the scan line 21 and insulated.
  • a color photoresist layer 40 is formed on the protective layer 30, and the color photoresist layer 40 includes a first color resist layer 41 and a second color resist layer 42 of different colors.
  • a third color resist layer 43 comprising a first pixel unit 411, a first main pad unit 412 and a first auxiliary pad unit 413, wherein the second color resist layer 42 comprises a second pixel unit 421, a second main pad unit 422, and a second auxiliary pad unit 423, wherein the first pixel unit 411 and the second pixel unit 421 are arranged side by side on the protective layer 30,
  • the first main pad unit 412 and the second main pad unit 422 are stacked on the protective layer 30 and collectively constitute a main pad portion 45, and the first auxiliary pad unit 413 and the second auxiliary pad unit 423 are stacked and protected
  • the auxiliary pad portion 46 is formed on the layer 30 and jointly formed, and the first color resist layer 41 is formed by a half exposure process, and the first main pad unit
  • the third color resist layer 43 includes a third pixel unit 431 arranged in parallel with the first pixel unit 411 and the second pixel unit 421 on the protective layer 30.
  • the first color resist layer 41, the second color resist layer 42 and the third color resist layer 43 are respectively one of a red color resist layer, a green color resist layer and a blue color resist layer.
  • the first color resist layer 41 is formed by a half exposure process using a Half Tone Mask (HTM) or a Gray Tone Mask (GTM).
  • HTM Half Tone Mask
  • GTM Gray Tone Mask
  • the first color resist layer 41 is formed behind the second color resist layer 42, and the first main pad unit 412 is correspondingly located on the second main pad unit 422.
  • the first auxiliary pad unit 413 is correspondingly located on the second auxiliary pad unit 423; or
  • the first color resist layer 41 is formed before the second color resist layer 42 , the second main pad unit 422 is correspondingly located above the first main pad unit 412 , and the second auxiliary pad unit 423 is correspondingly located. Above the first auxiliary pad unit 413.
  • Step S3 an organic insulating layer 50 covering the color resist layer 40 is formed on the protective layer 30, a BPS material is coated on the organic insulating layer 50, and the BPS material is coated on the BPS material.
  • Exposure and development are performed to obtain a BPS light shielding layer 60 including a black matrix 61 and a main spacer 62 and an auxiliary spacer 63 disposed on the black matrix 61, the main spacer 62 And the auxiliary spacers 63 are respectively located above the main pad portion 45 and the auxiliary pad portion 46, the height of the main spacer 62 is larger than the height of the sub-spacer 63, the sub-gush The height of the object 63 is greater than the height of the black matrix 61.
  • the black matrix 61 is correspondingly disposed above the scan line 21 .
  • the BPS material is exposed by a full exposure method using a mask of a full tone design to obtain a black matrix 61, a main spacer 62 and an auxiliary spacer 63. Therefore, the thickness of the main spacer 62 is the same as the thickness of the auxiliary spacer 63, so that the difference in thickness between the first main pad unit 412 and the first auxiliary pad unit 413 constitutes the main The difference in height between the pad portion 45 and the auxiliary pad portion 46.
  • the two-layer color resisting structure formed by the first color resist layer 41 and the second color resist layer 42 is used to respectively lift the main spacer 62 and the auxiliary spacer 63.
  • the pad portion 45 and the auxiliary pad portion 46 are such that the main pad portion 45 and the auxiliary pad portion 46 are convex, so that the thickness of the main spacer 62 and the auxiliary spacer 63 itself is reduced, and thus
  • the amount of BPS material forming the main spacer 62 and the auxiliary spacer 63 is reduced, the production cost is reduced, and the thickness of the first color resist layer 41 under the auxiliary pad portion 63 is thinned by a half exposure process to realize the main spacer.
  • the height difference between the object 62 and the auxiliary spacer 63 is simple in production.
  • the present invention further provides a BPS type array substrate, including a base substrate 10, a TFT layer 20 disposed on the base substrate 10, and a cover. a protective layer 30 of the base substrate 10 and the TFT layer 20, a color photoresist layer 40 disposed on the protective layer 30, an organic insulating layer 50 covering the color photoresist layer 40 and the protective layer 30, and a BPS light shielding layer 60 disposed on the organic insulating layer 50;
  • the BPS light shielding layer 60 includes a black matrix 61 and a main spacer 62 and an auxiliary spacer 63 disposed on the black matrix 61;
  • the color resist layer 40 includes a first color resist layer 41 and a second color resist layer 42 of different colors
  • the first color resist layer 41 includes a first pixel unit 411 and a first main pad unit 412 which are juxtaposed.
  • the second color resist layer 42 includes a second pixel unit 421, a second main pad unit 422, and a second auxiliary pad unit 423, wherein the first pixel unit 411
  • the second pixel unit 421 is arranged side by side on the protective layer 30.
  • the first main pad unit 412 and the second main pad unit 422 are stacked on the protective layer 30 and together constitute a main pad portion 45.
  • An auxiliary pad unit 413 and a second auxiliary pad unit 423 are stacked on the protective layer 30 and collectively constitute an auxiliary pad portion 46, the first auxiliary pad unit 413 having a thickness smaller than the first main lining of the same layer a thickness of the pad unit 412, a height of the main pad portion 45 being greater than a height of the auxiliary pad portion 46;
  • the main spacer 62 and the auxiliary spacer 63 are respectively located above the main pad portion 45 and the auxiliary pad portion 46, and the height of the main spacer 62 is greater than that of the sub-spacer 63 The height of the sub-spacer 63 is greater than the height of the black matrix 61.
  • the difference in thickness between the first main pad unit 412 and the first auxiliary pad unit 413 constitutes a height difference between the main pad portion 45 and the auxiliary pad portion 46.
  • the first main pad unit 412 is correspondingly located on the second main pad unit 422, and the first auxiliary pad unit 413 is correspondingly located on the second auxiliary pad unit 423; or
  • the second main pad unit 422 is correspondingly located above the first main pad unit 412, and the second auxiliary pad unit 423 is correspondingly located above the first auxiliary pad unit 413.
  • the color photoresist layer 40 further includes a third color resist layer 43; the third color resist layer 43 includes the first pixel unit 411 and the second pixel unit 421 arranged side by side on the protective layer 30.
  • the third pixel unit 431 is a third color resist layer 43;
  • the first color resist layer 41, the second color resist layer 42 and the third color resist layer 43 are respectively one of a red color resist layer, a green color resist layer and a blue color resist layer.
  • the TFT layer 20 includes a scan line 21 and a data line 22 that is perpendicularly intersected and insulated from the scan line 21.
  • the black matrix 61 is correspondingly disposed above the scan line 21 .
  • the main pad portion 45 and the auxiliary pad portion 46 for respectively raising the main spacer 62 and the auxiliary spacer 63 are both the first color resist layer 41 and the second color resist layer.
  • the double-layer color resisting structure formed by the layer 42 causes the main pad portion 45 and the auxiliary pad portion 46 to be convex, so that the thickness of the main spacer 62 and the auxiliary spacer 63 itself is reduced, and thus The amount of BPS material forming the main spacer 62 and the auxiliary spacer 63 is reduced to reduce the production cost.
  • the method for fabricating a BPS type array substrate uses a double color resisting structure formed by a first color resist layer and a second color resist layer to respectively pad the main spacer and the auxiliary spacer.
  • the main pad portion and the auxiliary pad portion of the pad cause the main pad portion and the auxiliary pad portion to be convex, so that the thickness of the main spacer and the auxiliary spacer itself is reduced, thereby reducing formation
  • the amount of BPS material of the main spacer and the auxiliary spacer reduces the production cost, and the main spacer and the auxiliary spacer can be realized by thinning the thickness of the first color resist layer under the auxiliary pad portion by a half exposure process. The difference between the heights is simple.
  • the main pad portion and the auxiliary pad portion for respectively padding the main spacer and the auxiliary spacer are double formed by using the first color resist layer and the second color resist layer.
  • a layer color resisting structure such that the main pad portion and the auxiliary pad portion are convex, so that the thickness of the main spacer and the auxiliary spacer itself is reduced, thereby reducing the formation of the main spacer and the auxiliary spacer.

Abstract

本发明提供一种BPS型阵列基板的制作方法及BPS型阵列基板。本发明的BPS型阵列基板的制作方法，利用第一色阻层和第二色阻层形成的双层色阻结构分别用于垫高主隔垫物和辅助隔垫物的主衬垫部和辅助衬垫部，使得所述主衬垫部和辅助衬垫部凸起明显，从而使得主隔垫物和辅助隔垫物自身的厚度减小，进而可以减少形成主隔垫物和辅助隔垫物的BPS材料用量，降低生产成本，通过半曝光工艺减薄辅助衬垫部下方第一色阻层的厚度即可实现所述主隔垫物和辅助隔垫物之间的高度差，制作方法简单。

Description

BPS型阵列基板的制作方法及BPS型阵列基板 技术领域
本发明涉及显示技术领域，尤其涉及一种BPS型阵列基板的制作方法及BPS型阵列基板。
背景技术
液晶显示器(Liquid Crystal Display，LCD)是目前市场上应用最为广泛的显示产品，其生产工艺技术十分成熟，产品良率高，生产成本相对较低，市场接受度高。现有市场上的液晶显示器大部分为背光型液晶显示装置，其包括液晶显示面板及背光模组。通常液晶显示面板由彩膜(Color Filter，CF)基板、阵列(Array)基板、夹于彩膜基板与阵列基板之间的液晶及密封框胶(Sealant)组成，其中，CF基板主要包括用于通过色阻单元(R/G/B)形成有色光的彩色滤光层、用于防止像素边缘漏光的黑色矩阵(Black Matrix，BM)以及用于维持盒厚的隔垫物(Photo Spacer，PS)，在大尺寸液晶显示面板中，通常会使用两种类型以上的隔垫物，如在CF基板上设置主隔垫物(Main PS)及辅助隔垫物(Sub PS)，起到多级缓冲的作用，以防止各种Mura或者不良现象的发生。
黑色隔垫物(Black Photo Spacer，BPS)材料是一种新型材料，它既具有传统技术中隔垫物材料的特性，如较优秀的弹性回复力及对液晶较低的污染等，而且还具有黑色矩阵材料的特性，如较高的光学密度(optical density，OD)值，可以起到遮光作用，因此，能够用于将BM与PS两种工艺制程合二为一，减少一道黄光制程，减少材料成本及生产时间(tact time)，从而降低整个生产成本。
COA(Color Filter on Array)技术是将彩色滤光层制备在阵列基板上的技术。由于COA结构的显示面板不存在彩膜基板与阵列基板的对位问题，因此可以降低显示面板制备过程中对盒制程的难度，避免了对盒时的误差，因此黑色矩阵可以设计为窄线宽，提高了开口率。一种新型的BM-Less技术是基于COA技术上将BM与PS集合于同一BPS材料且同一制程完成并设计在Array基板上的一种技术，与传统的液晶显示技术比较，将黑色矩阵、主隔垫物、辅助隔垫物及彩色滤光膜全部设计在阵列基板侧，这样不仅可以避免对组制程中由于对组精度的误差，或者曲面显示技术中由于面板弯曲造成的平移带来的露光，更重要的是节省一道材料及制程，缩短生产时 间，降低了产品成本。
但是目前BPS材料的技术难度较大，尚未大量量产，价格昂贵，而现有BPS型产品结构中，如图1所示，主隔垫物101和辅助隔垫物102下方使用单层的第一色阻201和第二色阻202作为衬垫载台，主隔垫物101和辅助隔垫物102之间的高度差由第一色阻201和第二色阻202的厚度差所构成，主隔垫物101和辅助隔垫物102自身的厚度h1与液晶面板的盒厚(Cell gap)H1相近，主隔垫物101和辅助隔垫物102对BPS材料的用量较大，成本较高。
发明内容
本发明的目的在于提供一种BPS型阵列基板的制作方法，主隔垫物和辅助隔垫物自身的厚度较小，从而可以减少BPS材料的用量，降低生产成本。
本发明的目的还在于提供一种BPS型阵列基板，主隔垫物和辅助隔垫物自身的厚度较小，从而可以减少BPS材料的用量，降低生产成本。
为实现上述目的，本发明提供一种BPS型阵列基板的制作方法，包括如下步骤：
步骤S1、提供一衬底基板，在衬底基板上形成TFT层，在所述衬底基板上形成覆盖TFT层的保护层；
步骤S2、在所述保护层上形成彩色光阻层，所述彩色光阻层包括不同颜色的第一色阻层和第二色阻层，所述第一色阻层包括并列的第一像素单元、第一主衬垫单元及第一辅助衬垫单元，所述第二色阻层包括并列的第二像素单元、第二主衬垫单元及第二辅助衬垫单元，其中，所述第一像素单元、第二像素单元并列排布于保护层上，所述第一主衬垫单元和第二主衬垫单元堆叠于保护层上并共同构成主衬垫部，所述第一辅助衬垫单元和第二辅助衬垫单元堆叠于保护层上并共同构成辅助衬垫部，通过半曝光工艺制作所述第一色阻层，经一次曝光得到厚度不同的第一主衬垫单元和第一辅助衬垫单元，使得所述第一辅助衬垫单元的厚度小于所述第一主衬垫单元的厚度，从而使得所述主衬垫部的高度大于所述辅助衬垫部的高度；
步骤S3、在所述保护层上形成覆盖所述彩色光阻层的有机绝缘层，在所述有机绝缘层上涂布BPS材料，并对所述BPS材料进行曝光、显影，得到BPS遮光层，所述BPS遮光层包括黑色矩阵以及设于所述黑色矩阵上的主隔垫物与辅助隔垫物，所述主隔垫物和辅助隔垫物分别对应位于所述主衬垫部和辅助衬垫部的上方，所述主隔垫物的高度大于所述副隔垫物的高 度，所述副隔垫物的高度大于所述黑色矩阵的高度。
所述步骤S2中，采用半透式掩膜板或灰色调掩膜板进行半曝光工艺制作所述第一色阻层，从而经一次曝光得到厚度不同的第一主衬垫单元和第一辅助衬垫单元；
所述步骤S3中，采用全曝光方式对所述BPS材料进行曝光，得到黑色矩阵、主隔垫物与辅助隔垫物，所述第一主衬垫单元和第一辅助衬垫单元之间的厚度差构成所述主衬垫部和辅助衬垫部之间的高度差。
所述步骤S2中，所述第一主衬垫单元对应位于第二主衬垫单元之上，所述第一辅助衬垫单元对应位于第二辅助衬垫单元之上；或者，
所述第二主衬垫单元对应位于第一主衬垫单元之上，所述第二辅助衬垫单元对应位于第一辅助衬垫单元之上。
所述步骤S2中，所述彩色光阻层还包括第三色阻层；
所述第三色阻层包括与所述第一像素单元和第二像素单元并列排布于保护层上的第三像素单元；
所述第一色阻层、第二色阻层及第三色阻层分别为红色色阻层、绿色色阻层及蓝色色阻层中的一种。
所述步骤S1中，所述的TFT层包括扫描线及与所述扫描线垂直交叉且绝缘的数据线；
所述黑色矩阵对应设于所述扫描线上方。
本发明还提供一种BPS型阵列基板，包括衬底基板、设于所述衬底基板上的TFT层、覆盖所述衬底基板及TFT层的保护层、设于所述保护层上的彩色光阻层、覆盖于所述彩色光阻层和保护层上的有机绝缘层及设于所述有机绝缘层上的BPS遮光层；
所述BPS遮光层包括黑色矩阵及设于所述黑色矩阵上的主隔垫物与辅助隔垫物；
所述彩色光阻层包括不同颜色的第一色阻层和第二色阻层，所述第一色阻层包括并列的第一像素单元、第一主衬垫单元及第一辅助衬垫单元，所述第二色阻层包括并列的第二像素单元、第二主衬垫单元及第二辅助衬垫单元，其中，所述第一像素单元、第二像素单元并列排布于保护层上，所述第一主衬垫单元和第二主衬垫单元堆叠于保护层上并共同构成主衬垫部，所述第一辅助衬垫单元和第二辅助衬垫单元堆叠于保护层上并共同构成辅助衬垫部，所述第一辅助衬垫单元的厚度小于所述第一主衬垫单元的厚度，所述主衬垫部的高度大于所述辅助衬垫部的高度；
所述主隔垫物和辅助隔垫物分别对应位于所述主衬垫部和辅助衬垫部 的上方，所述主隔垫物的高度大于所述副隔垫物的高度，所述副隔垫物的高度大于所述黑色矩阵的高度。
所述第一主衬垫单元和第一辅助衬垫单元之间的厚度差构成所述主衬垫部和辅助衬垫部之间的高度差。
所述第一主衬垫单元对应位于第二主衬垫单元之上，所述第一辅助衬垫单元对应位于第二辅助衬垫单元之上；或者，
所述第二主衬垫单元对应位于第一主衬垫单元之上，所述第二辅助衬垫单元对应位于第一辅助衬垫单元之上。
所述彩色光阻层还包括第三色阻层；
所述第三色阻层包括与所述第一像素单元和第二像素单元并列排布于保护层上的第三像素单元；
所述第一色阻层、第二色阻层及第三色阻层分别为红色色阻层、绿色色阻层及蓝色色阻层中的一种。
所述的TFT层包括扫描线及与所述扫描线垂直交叉且绝缘的数据线；
所述黑色矩阵对应设于所述扫描线上方。
本发明的有益效果：本发明提供的一种BPS型阵列基板的制作方法，利用第一色阻层和第二色阻层形成的双层色阻结构分别用于垫高主隔垫物和辅助隔垫物的主衬垫部和辅助衬垫部，使得所述主衬垫部和辅助衬垫部凸起明显，从而使得主隔垫物和辅助隔垫物自身的厚度减小，进而可以减少形成主隔垫物和辅助隔垫物的BPS材料用量，降低生产成本，通过半曝光工艺减薄辅助衬垫部下方第一色阻层的厚度即可实现所述主隔垫物和辅助隔垫物之间的高度差，制作方法简单。本发明的BPS型阵列基板，分别用于垫高主隔垫物和辅助隔垫物的主衬垫部和辅助衬垫部均是利用第一色阻层和第二色阻层所形成的双层色阻结构，使得所述主衬垫部和辅助衬垫部凸起明显，从而使得主隔垫物和辅助隔垫物自身的厚度减小，进而可以减少形成主隔垫物和辅助隔垫物的BPS材料用量，降低生产成本。
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其它有益效果显而易见。
附图中，
图1为现有BPS型液晶面板的剖面结构示意图；
图2为本发明的BPS型阵列基板的制作方法的流程示意图；
图3为本发明的BPS型阵列基板的制作方法的步骤S1的示意图；
图4为本发明的BPS型阵列基板的制作方法的步骤S2的示意图；
图5为本发明的BPS型阵列基板的制作方法的步骤S3的示意图；
图6为本发明的BPS型阵列基板的平面结构示意图；
图7为本发明的BPS型阵列基板沿图6中a-a’线的剖面结构示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图2，本发明首先提供一种BPS型阵列基板的制作方法，包括如下步骤：
步骤S1、如图3所示，提供一衬底基板10，在衬底基板10上形成TFT层20，在所述衬底基板10上形成覆盖TFT层20的保护层30。
具体地，所述步骤S1中，所述的TFT层20包括扫描线21及与所述扫描线21垂直交叉且绝缘的数据线22。
步骤S2、如图4和图6所示，在所述保护层30上形成彩色光阻层40，所述彩色光阻层40包括不同颜色的第一色阻层41、第二色阻层42及第三色阻层43，所述第一色阻层41包括并列的第一像素单元411、第一主衬垫单元412及第一辅助衬垫单元413，所述第二色阻层42包括并列的第二像素单元421、第二主衬垫单元422及第二辅助衬垫单元423，其中，所述第一像素单元411、第二像素单元421并列排布于保护层30上，所述第一主衬垫单元412和第二主衬垫单元422堆叠于保护层30上并共同构成主衬垫部45，所述第一辅助衬垫单元413和第二辅助衬垫单元423堆叠于保护层30上并共同构成辅助衬垫部46，通过半曝光工艺制作所述第一色阻层41，经一次曝光得到厚度不同的第一主衬垫单元412和第一辅助衬垫单元413，使得所述第一辅助衬垫单元413自身的厚度小于同层的所述第一主衬垫单元412自身的厚度，从而使得所述主衬垫部45在衬底基板10上的高度大于所述辅助衬垫部46在衬底基板10上的高度。
具体地，所述第三色阻层43包括与所述第一像素单元411和第二像素单元421并列排布于保护层30上的第三像素单元431。
具体地，所述第一色阻层41、第二色阻层42及第三色阻层43分别为红色色阻层、绿色色阻层及蓝色色阻层中的一种。
具体地，所述步骤S2中，采用半透式掩膜板(Half Tone Mask，HTM)或灰色调掩膜板(Gray Tone Mask，GTM)进行半曝光工艺制作所述第一色阻层41，从而经一次曝光得到厚度不同的第一主衬垫单元412和第一辅助衬垫单元413。
具体地，所述步骤S2中，所述第一色阻层41形成在第二色阻层42之后，所述第一主衬垫单元412对应位于第二主衬垫单元422之上，所述第一辅助衬垫单元413对应位于第二辅助衬垫单元423之上；或者，
所述第一色阻层41形成在第二色阻层42之前，所述第二主衬垫单元422对应位于第一主衬垫单元412之上，所述第二辅助衬垫单元423对应位于第一辅助衬垫单元413之上。
步骤S3、如图5所示，在所述保护层30上形成覆盖所述彩色光阻层40的有机绝缘层50，在所述有机绝缘层50上涂布BPS材料，并对所述BPS材料进行曝光、显影，得到BPS遮光层60，所述BPS遮光层60包括黑色矩阵61以及设于所述黑色矩阵61上的主隔垫物62与辅助隔垫物63，所述主隔垫物62和辅助隔垫物63分别对应位于所述主衬垫部45和辅助衬垫部46的上方，所述主隔垫物62的高度大于所述副隔垫物63的高度，所述副隔垫物63的高度大于所述黑色矩阵61的高度。
具体地，所述黑色矩阵61对应设于所述扫描线21上方。
具体地，所述步骤S3中，利用全透式(Full tone)设计的掩膜板采用全曝光方式对所述BPS材料进行曝光而得到黑色矩阵61、主隔垫物62与辅助隔垫物63，因此，所述主隔垫物62的厚度与辅助隔垫物63的厚度均相同，使所述第一主衬垫单元412和第一辅助衬垫单元413之间的厚度差构成所述主衬垫部45和辅助衬垫部46之间的高度差。
本发明的BPS型阵列基板的制作方法，利用第一色阻层41和第二色阻层42形成的双层色阻结构分别用于垫高主隔垫物62和辅助隔垫物63的主衬垫部45和辅助衬垫部46，使得所述主衬垫部45和辅助衬垫部46凸起明显，从而使得主隔垫物62和辅助隔垫物63自身的厚度减小，进而可以减少形成主隔垫物62和辅助隔垫物63的BPS材料用量，降低生产成本，通过半曝光工艺减薄辅助衬垫部63下方第一色阻层41的厚度即可实现所述主隔垫物62和辅助隔垫物63之间的高度差，制作方法简单。
请参阅图6-7，基于上述的BPS型阵列基板的制作方法，本发明还提供一种BPS型阵列基板，包括衬底基板10、设于所述衬底基板10上的TFT层20、覆盖所述衬底基板10及TFT层20的保护层30、设于所述保护层30上的彩色光阻层40、覆盖于所述彩色光阻层40和保护层30上的有机绝 缘层50及设于所述有机绝缘层50上的BPS遮光层60；
所述BPS遮光层60包括黑色矩阵61及设于所述黑色矩阵61上的主隔垫物62与辅助隔垫物63；
所述彩色光阻层40包括不同颜色的第一色阻层41和第二色阻层42，所述第一色阻层41包括并列的第一像素单元411、第一主衬垫单元412及第一辅助衬垫单元413，所述第二色阻层42包括并列的第二像素单元421、第二主衬垫单元422及第二辅助衬垫单元423，其中，所述第一像素单元411、第二像素单元421并列排布于保护层30上，所述第一主衬垫单元412和第二主衬垫单元422堆叠于保护层30上并共同构成主衬垫部45，所述第一辅助衬垫单元413和第二辅助衬垫单元423堆叠于保护层30上并共同构成辅助衬垫部46，所述第一辅助衬垫单元413的厚度小于同层的所述第一主衬垫单元412的厚度，所述主衬垫部45的高度大于所述辅助衬垫部46的高度；
所述主隔垫物62和辅助隔垫物63分别对应位于所述主衬垫部45和辅助衬垫部46的上方，所述主隔垫物62的高度大于所述副隔垫物63的高度，所述副隔垫物63的高度大于所述黑色矩阵61的高度。
具体地，所述第一主衬垫单元412和第一辅助衬垫单元413之间的厚度差构成所述主衬垫部45和辅助衬垫部46之间的高度差。
具体地，所述第一主衬垫单元412对应位于第二主衬垫单元422之上，所述第一辅助衬垫单元413对应位于第二辅助衬垫单元423之上；或者，
所述第二主衬垫单元422对应位于第一主衬垫单元412之上，所述第二辅助衬垫单元423对应位于第一辅助衬垫单元413之上。
具体地，所述彩色光阻层40还包括第三色阻层43；所述第三色阻层43包括与所述第一像素单元411和第二像素单元421并列排布于保护层30上的第三像素单元431。
具体地，所述第一色阻层41、第二色阻层42及第三色阻层43分别为红色色阻层、绿色色阻层及蓝色色阻层中的一种。
具体地，所述的TFT层20包括扫描线21及与所述扫描线21垂直交叉且绝缘的数据线22。
具体地，所述黑色矩阵61对应设于所述扫描线21上方。
本发明的BPS型阵列基板，分别用于垫高主隔垫物62和辅助隔垫物63的主衬垫部45和辅助衬垫部46均是利用第一色阻层41和第二色阻层42所形成的双层色阻结构，使得所述主衬垫部45和辅助衬垫部46凸起明显，从而使得主隔垫物62和辅助隔垫物63自身的厚度减小，进而可以减 少形成主隔垫物62和辅助隔垫物63的BPS材料用量，降低生产成本。
综上所述，本发明提供的一种BPS型阵列基板的制作方法，利用第一色阻层和第二色阻层形成的双层色阻结构分别用于垫高主隔垫物和辅助隔垫物的主衬垫部和辅助衬垫部，使得所述主衬垫部和辅助衬垫部凸起明显，从而使得主隔垫物和辅助隔垫物自身的厚度减小，进而可以减少形成主隔垫物和辅助隔垫物的BPS材料用量，降低生产成本，通过半曝光工艺减薄辅助衬垫部下方第一色阻层的厚度即可实现所述主隔垫物和辅助隔垫物之间的高度差，制作方法简单。本发明的BPS型阵列基板，分别用于垫高主隔垫物和辅助隔垫物的主衬垫部和辅助衬垫部均是利用第一色阻层和第二色阻层所形成的双层色阻结构，使得所述主衬垫部和辅助衬垫部凸起明显，从而使得主隔垫物和辅助隔垫物自身的厚度减小，进而可以减少形成主隔垫物和辅助隔垫物的BPS材料用量，降低生产成本。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (10)

  1. 一种BPS型阵列基板的制作方法，包括如下步骤：
    步骤S1、提供一衬底基板，在衬底基板上形成TFT层，在所述衬底基板上形成覆盖TFT层的保护层；
    步骤S2、在所述保护层上形成彩色光阻层，所述彩色光阻层包括不同颜色的第一色阻层和第二色阻层，所述第一色阻层包括并列的第一像素单元、第一主衬垫单元及第一辅助衬垫单元，所述第二色阻层包括并列的第二像素单元、第二主衬垫单元及第二辅助衬垫单元，其中，所述第一像素单元、第二像素单元并列排布于保护层上，所述第一主衬垫单元和第二主衬垫单元堆叠于保护层上并共同构成主衬垫部，所述第一辅助衬垫单元和第二辅助衬垫单元堆叠于保护层上并共同构成辅助衬垫部，通过半曝光工艺制作所述第一色阻层，经一次曝光得到厚度不同的第一主衬垫单元和第一辅助衬垫单元，使得所述第一辅助衬垫单元的厚度小于所述第一主衬垫单元的厚度，从而使得所述主衬垫部的高度大于所述辅助衬垫部的高度；
    步骤S3、在所述保护层上形成覆盖所述彩色光阻层的有机绝缘层，在所述有机绝缘层上涂布BPS材料，并对所述BPS材料进行曝光、显影，得到BPS遮光层，所述BPS遮光层包括黑色矩阵、以及设于所述黑色矩阵上的主隔垫物与辅助隔垫物，所述主隔垫物和辅助隔垫物分别对应位于所述主衬垫部和辅助衬垫部的上方，所述主隔垫物的高度大于所述副隔垫物的高度，所述副隔垫物的高度大于所述黑色矩阵的高度。
  2. 如权利要求1所述的BPS型阵列基板的制作方法，其中，所述步骤S2中，采用半透式掩膜板或灰色调掩膜板进行半曝光工艺制作所述第一色阻层，从而经一次曝光得到厚度不同的第一主衬垫单元和第一辅助衬垫单元；
    所述步骤S3中，采用全曝光方式对所述BPS材料进行曝光，得到黑色矩阵、主隔垫物与辅助隔垫物，所述第一主衬垫单元和第一辅助衬垫单元之间的厚度差构成所述主衬垫部和辅助衬垫部之间的高度差。
  3. 如权利要求1所述的BPS型阵列基板的制作方法，其中，所述步骤S2中，所述第一主衬垫单元对应位于第二主衬垫单元之上，所述第一辅助衬垫单元对应位于第二辅助衬垫单元之上；或者，
    所述第二主衬垫单元对应位于第一主衬垫单元之上，所述第二辅助衬垫单元对应位于第一辅助衬垫单元之上。
  4. 如权利要求1所述的BPS型阵列基板的制作方法，其中，所述步骤S2中，所述彩色光阻层还包括第三色阻层；
    所述第三色阻层包括与所述第一像素单元和第二像素单元并列排布于保护层上的第三像素单元；
    所述第一色阻层、第二色阻层及第三色阻层分别为红色色阻层、绿色色阻层及蓝色色阻层中的一种。
  5. 如权利要求1所述的BPS型阵列基板的制作方法，其中，所述步骤S1中，所述的TFT层包括扫描线及与所述扫描线垂直交叉且绝缘的数据线；
    所述黑色矩阵对应设于所述扫描线上方。
  6. 一种BPS型阵列基板，包括衬底基板、设于所述衬底基板上的TFT层、覆盖所述衬底基板及TFT层的保护层、设于所述保护层上的彩色光阻层、覆盖于所述彩色光阻层和保护层上的有机绝缘层及设于所述有机绝缘层上的BPS遮光层；
    所述BPS遮光层包括黑色矩阵及设于所述黑色矩阵上的主隔垫物与辅助隔垫物；
    所述彩色光阻层包括不同颜色的第一色阻层和第二色阻层，所述第一色阻层包括并列的第一像素单元、第一主衬垫单元及第一辅助衬垫单元，所述第二色阻层包括并列的第二像素单元、第二主衬垫单元及第二辅助衬垫单元，其中，所述第一像素单元、第二像素单元并列排布于保护层上，所述第一主衬垫单元和第二主衬垫单元堆叠于保护层上并共同构成主衬垫部，所述第一辅助衬垫单元和第二辅助衬垫单元堆叠于保护层上并共同构成辅助衬垫部，所述第一辅助衬垫单元的厚度小于所述第一主衬垫单元的厚度，所述主衬垫部的高度大于所述辅助衬垫部的高度；
    所述主隔垫物和辅助隔垫物分别对应位于所述主衬垫部和辅助衬垫部的上方，所述主隔垫物的高度大于所述副隔垫物的高度，所述副隔垫物的高度大于所述黑色矩阵的高度。
  7. 如权利要求6所述的BPS型阵列基板，其中，所述第一主衬垫单元和第一辅助衬垫单元之间的厚度差构成所述主衬垫部和辅助衬垫部之间的高度差。
  8. 如权利要求6所述的BPS型阵列基板，其中，所述第一主衬垫单元对应位于第二主衬垫单元之上，所述第一辅助衬垫单元对应位于第二辅助衬垫单元之上；或者，
    所述第二主衬垫单元对应位于第一主衬垫单元之上，所述第二辅助衬垫单元对应位于第一辅助衬垫单元之上。
  9. 如权利要求6所述的BPS型阵列基板，其中，所述彩色光阻层还包括第三色阻层；
    所述第三色阻层包括与所述第一像素单元和第二像素单元并列排布于保护层上的第三像素单元；
    所述第一色阻层、第二色阻层及第三色阻层分别为红色色阻层、绿色色阻层及蓝色色阻层中的一种。
  10. 如权利要求6所述的BPS型阵列基板，其中，所述的TFT层包括扫描线及与所述扫描线垂直交叉且绝缘的数据线；
    所述黑色矩阵对应设于所述扫描线上方。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11415847B2 (en) * 2019-12-12 2022-08-16 Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Display panel and manufacturing method thereof

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109298590B (zh) * 2018-09-26 2020-07-28 深圳市华星光电技术有限公司 用于制作衬垫式bps的光罩和液晶显示面板
CN109031772A (zh) * 2018-10-23 2018-12-18 惠科股份有限公司 彩膜基板和显示面板
CN109270731A (zh) * 2018-11-12 2019-01-25 成都中电熊猫显示科技有限公司 阵列基板及其制作方法和显示面板
CN109507827B (zh) * 2018-12-27 2022-10-18 惠科股份有限公司 显示面板制作方法、显示面板制作装置和显示面板
CN109904175B (zh) * 2019-03-19 2021-01-22 合肥京东方显示技术有限公司 一种显示面板的制作方法及一种显示面板
CN110045537A (zh) * 2019-04-04 2019-07-23 深圳市华星光电技术有限公司 一种阵列基板
CN110333635A (zh) * 2019-06-24 2019-10-15 深圳市华星光电半导体显示技术有限公司 一种阵列基板及显示面板
CN110718570A (zh) * 2019-09-17 2020-01-21 深圳市华星光电技术有限公司 显示面板及显示装置
CN111258128B (zh) * 2020-03-18 2021-11-23 Tcl华星光电技术有限公司 显示面板及其制作方法
CN111650790A (zh) * 2020-05-06 2020-09-11 福建华佳彩有限公司 一种coa显示屏及制作方法
CN111781765A (zh) * 2020-07-06 2020-10-16 深圳市华星光电半导体显示技术有限公司 液晶显示面板及显示装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103257482A (zh) * 2013-03-19 2013-08-21 京东方科技集团股份有限公司 彩膜基板及其制作方法、以及液晶面板
CN105974636A (zh) * 2016-07-18 2016-09-28 深圳市华星光电技术有限公司 液晶显示面板的制作方法
US20170192280A1 (en) * 2016-01-06 2017-07-06 Samsung Display Co., Ltd. Display device and manufacturing method thereof
CN107193162A (zh) * 2017-07-31 2017-09-22 深圳市华星光电技术有限公司 一种阵列基板及制造方法
CN107479260A (zh) * 2017-09-08 2017-12-15 深圳市华星光电技术有限公司 Coa基板及其制作方法、显示面板

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000321600A (ja) * 1999-05-13 2000-11-24 Internatl Business Mach Corp <Ibm> 液晶表示装置及びこれの製造方法
CN101261392B (zh) * 2008-04-17 2010-08-04 友达光电股份有限公司 触控显示面板、彩色滤光基板及其制作方法
KR101835545B1 (ko) * 2011-07-27 2018-03-07 엘지디스플레이 주식회사 액정표시장치 및 그 제조방법
CN106483719B (zh) * 2016-12-29 2019-08-02 深圳市华星光电技术有限公司 一种电子设备、阵列基板及其制作方法
CN107275288B (zh) * 2017-06-16 2019-12-24 深圳市华星光电半导体显示技术有限公司 Tft基板的制作方法及tft基板
CN107290911A (zh) * 2017-07-19 2017-10-24 深圳市华星光电半导体显示技术有限公司 一种显示面板及其制程
CN107490914A (zh) * 2017-09-08 2017-12-19 深圳市华星光电半导体显示技术有限公司 阵列基板及其制作方法
CN107591360B (zh) * 2017-09-28 2019-03-12 深圳市华星光电半导体显示技术有限公司 Tft基板的制作方法及其结构
US10345660B1 (en) * 2018-03-20 2019-07-09 Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Manufacturing method of array substrate and manufacturing method of photo spacer structure thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103257482A (zh) * 2013-03-19 2013-08-21 京东方科技集团股份有限公司 彩膜基板及其制作方法、以及液晶面板
US20170192280A1 (en) * 2016-01-06 2017-07-06 Samsung Display Co., Ltd. Display device and manufacturing method thereof
CN105974636A (zh) * 2016-07-18 2016-09-28 深圳市华星光电技术有限公司 液晶显示面板的制作方法
CN107193162A (zh) * 2017-07-31 2017-09-22 深圳市华星光电技术有限公司 一种阵列基板及制造方法
CN107479260A (zh) * 2017-09-08 2017-12-15 深圳市华星光电技术有限公司 Coa基板及其制作方法、显示面板

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11415847B2 (en) * 2019-12-12 2022-08-16 Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Display panel and manufacturing method thereof

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