WO2019169755A1 - 一种Micro-LED芯片、显示屏及制备方法 - Google Patents

一种Micro-LED芯片、显示屏及制备方法 Download PDF

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WO2019169755A1
WO2019169755A1 PCT/CN2018/089084 CN2018089084W WO2019169755A1 WO 2019169755 A1 WO2019169755 A1 WO 2019169755A1 CN 2018089084 W CN2018089084 W CN 2018089084W WO 2019169755 A1 WO2019169755 A1 WO 2019169755A1
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micro
led chip
layer
type gan
gan layer
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PCT/CN2018/089084
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French (fr)
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韦冬
邢汝博
刘会敏
杨小龙
王建太
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昆山工研院新型平板显示技术中心有限公司
昆山国显光电有限公司
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Priority to US16/413,632 priority Critical patent/US10861834B2/en
Publication of WO2019169755A1 publication Critical patent/WO2019169755A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/782—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, each consisting of a single circuit element
    • H01L21/786—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, each consisting of a single circuit element the substrate being other than a semiconductor body, e.g. insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the invention relates to the technical field of LED display, in particular to a micro-LED chip, a display screen and a preparation method thereof.
  • Micro LED Display is a new generation of display technology. It uses a miniaturized LED array, which is to thin, miniaturize and array the LED structure design, making it about 1% of the current mainstream LED size. . Each pixel in the Micro LED display can be addressed and individually driven to reduce the pixel distance from the original millimeter to the micron.
  • the advantages of Micro LED include low power consumption, high brightness, ultra high resolution and color saturation, fast response, ultra power saving, long life, high efficiency, etc.
  • the power consumption is about 10% of LCD, OLED 50%.
  • the brightness is 30 times higher than the OLED, and the resolution is up to 1500 PPI (pixel density), which is equivalent to 5 times that of the Apple Watch using OLED panels up to 300 PPI. Better material stability and no image imprinting.
  • the pad size is also reduced by a factor of two, so that the bonding force between the chip and the screen substrate is reduced, and the LED chip is desoldered.
  • the increase in probability eventually leads to a multiplication of the number of dead pixels on the Micro-LED display.
  • the bonding force for welding is required to be higher during use, and the number of dead spots on the screen is more due to the desoldering.
  • the present invention provides a micro-LED chip, a display screen, and a preparation method for preventing the phenomenon of desoldering when the micro-LED chip and the driving circuit substrate are soldered.
  • a micro-LED chip including a sapphire substrate, an N-type GaN layer, a quantum well light-emitting layer, a P-type GaN layer, an ITO layer, an N-type contact electrode, a reflective electrode, and an insulating layer is provided a layer, wherein the reflective electrode has a vertical cross-sectional shape that is narrower in width and lower, and an upper surface thereof is higher than an upper surface of the ITO layer.
  • the N-type contact electrode is located on an upper surface of the N-type GaN layer, and an upper surface of the N-type contact electrode is at the same height as an upper surface of the P-type GaN layer.
  • the insulating layer is located on an upper surface of the Micro-LED chip, the height of which is higher than the height of the reflective electrode.
  • the longitudinal cross-sectional shape of the reflective electrode is an inverted trapezoid.
  • a micro-LED display panel comprising the above-described Micro-LED chip, a driving circuit substrate, and the driving circuit substrate are soldered to the reflective electrode of the Micro-LED chip.
  • a method for preparing a Micro-LED display screen comprises the following steps:
  • An ITO layer is grown on the surface of the P-type GaN layer, and the ITO layer is etched to form a second trench;
  • a drive circuit substrate is soldered to the reflective electrode.
  • the step of generating an N-type contact electrode in the first trench is to generate an N-type contact electrode at the bottom of the first trench to make the N-type contact electrode
  • the surface is at the same height as the upper surface of the P-type GaN layer.
  • the step of depositing an insulating layer on the surface of the Micro-LED chip is to deposit an insulating layer on the surface of the Micro-LED chip such that an upper surface of the insulating layer is higher than an upper surface of the reflective electrode.
  • the longitudinal cross-sectional shape of the reflective electrode is an inverted trapezoid.
  • the micro-LED chip, the display screen and the preparation method of the invention increase the bonding force of the micro-LED chip by using the inverted trapezoidal electrode as the pad design, thereby not only solving the de-soldering of the micro-LED chip and the screen substrate when soldering
  • the problem is to effectively reduce the occurrence probability of the abnormality of the micro-LED chip and the driving circuit substrate, improve the processing yield of the Micro-LED display, and reduce the production cost.
  • FIG. 1 is a schematic structural view of a Micro-LED display screen according to an embodiment of the present invention.
  • FIG. 2 is a flow chart of a method for preparing a Micro-LED display screen according to an embodiment of the present invention
  • FIG. 3 is a schematic longitudinal cross-sectional view of an epitaxial layer formed in accordance with an embodiment of the present invention.
  • FIG. 4 is a schematic longitudinal cross-sectional view showing formation of a first trench in an epitaxial layer according to an embodiment of the present invention
  • FIG. 5 is a schematic longitudinal cross-sectional view showing the formation of a second trench in an ITO layer according to an embodiment of the present invention
  • FIG. 6 is a schematic longitudinal cross-sectional view showing formation of an N-type contact electrode in a first trench, in accordance with an embodiment of the present invention
  • FIG. 7 is a schematic longitudinal cross-sectional view showing formation of reflective electrodes on an N-type contact electrode and a second trench, respectively, according to an embodiment of the present invention
  • FIG. 8 is a schematic longitudinal cross-sectional view of a micro-LED chip according to an embodiment of the present invention.
  • FIG. 9 is a schematic longitudinal cross-sectional structural view of a driving circuit substrate with solder bumps according to an embodiment of the present invention.
  • FIG. 10 is a schematic longitudinal cross-sectional view showing a micro-LED chip and a driving circuit substrate welded together according to an embodiment of the present invention.
  • the Micro-LED display panel includes a Micro-LED chip, and a driving circuit substrate 10 soldered together with the Micro-LED chip, wherein the Micro-LED chip includes a sapphire substrate.
  • the Micro-LED chip includes a sapphire substrate.
  • the N-type GaN layer 2 is formed over the sapphire substrate 1.
  • the N-type GaN layer 2 includes a first region suitable for forming the N-type contact electrode 6, and a second region.
  • a quantum well light-emitting layer 3 and a P-type GaN layer 4 are sequentially formed on the second region of the N-type GaN layer 2.
  • the ITO layer 5 is located on the upper surface of the P-type GaN layer 4.
  • the N-type contact electrode 6 is located on the upper surface of the first region of the N-type GaN layer 2, and the upper surface of the N-type contact electrode 6 is at the same height as the upper surface of the P-type GaN layer 4, so that the N-type contact electrode 6 can be more soldered Good contact.
  • each of the reflective electrodes 7 is higher than the upper surface of the ITO layer 5, and has a vertically long and narrow longitudinal cross-sectional shape, thereby increasing the contact area of the reflective electrode 7 with the solder and increasing the bonding of the micro-LED chip.
  • the force solves the problem that the micro-LED chip and the drive circuit substrate 10 are easily desoldered when soldered.
  • the longitudinal cross-sectional shape of the reflective electrode 7 is an inverted trapezoid, and in any other embodiment, any suitable upper and lower narrow shapes may be employed.
  • the insulating layer 8 is located on the upper surface of the Micro-LED chip, and its height is higher than the height of the reflective electrode 7, so that the solder can be prevented from overflowing to the surface of the Micro-LED chip, and the P and N electrodes are directly turned on.
  • FIG. 2 is a flow chart of a method of fabricating a Micro-LED display screen in accordance with one embodiment of the present invention. The method of preparing the micro-LED display panel of the present invention will be described in detail below with reference to FIG.
  • an N-type GaN layer 2, a quantum well light-emitting layer 3, and a P-type GaN layer 4 are sequentially grown on the sapphire substrate 1 to form an epitaxial layer of the Micro-LED chip.
  • 3 is a schematic longitudinal cross-sectional view of an epitaxial layer formed according to an embodiment of the present invention. As shown in FIG. 3, the epitaxial layer of the micro-LED chip is an N-type GaN layer 2, a quantum well light-emitting layer 3, and sequentially from bottom to top. P-type GaN layer 4.
  • the P-type GaN layer 4, the quantum well light-emitting layer 3, and the N-type GaN layer 2 are etched from top to bottom in one region of the epitaxial layer of the Micro-LED chip to form the first trench 20.
  • the N-type GaN layer 2 is partially etched.
  • 4 is a schematic longitudinal cross-sectional view showing a first trench formed in an epitaxial layer according to an embodiment of the present invention. As shown in FIG. 4, the first trench 20 passes through the P-type GaN layer 4 and the quantum well light-emitting layer 3 until N-type GaN layer 2.
  • an ITO layer 5 (ITO film) is grown on the P-type GaN layer 4, and is etched to expose the P-type GaN layer 4 to form a second trench 30.
  • 5 is a schematic longitudinal cross-sectional view showing the formation of a second trench in an ITO layer according to an embodiment of the present invention. As shown in FIG. 5, the ITO layer 5 is located on the upper surface of the P-type GaN layer 4, and the second trench 30 is The bottom is a P-type GaN layer 4.
  • an N-type contact electrode 6 is formed at the bottom of the first trench 20.
  • 6 is a schematic longitudinal cross-sectional view showing formation of an N-type contact electrode in a first trench, as shown in FIG. 6, the horizontal width of the formed N-type contact electrode 6 is smaller than that of the first trench 20, in accordance with an embodiment of the present invention.
  • the horizontal width of the upper surface is at the same height as the P-type GaN layer 4.
  • a reflective electrode 7 is formed in the upper surface of the N-type contact electrode 6 and the second trench, respectively.
  • 7 is a schematic longitudinal cross-sectional view showing formation of reflective electrodes on an N-type contact electrode and a second trench, respectively, in accordance with an embodiment of the present invention.
  • the formed reflective electrode 7 has an inverted trapezoidal longitudinal cross-sectional shape whose upper surface is higher than the ITO layer 5.
  • FIG. 8 is a schematic longitudinal cross-sectional view of a Micro-LED chip in accordance with one embodiment of the present invention. As shown in FIG. 8, the height of the insulating layer 8 is higher than the height of the reflective electrode 7, and after the opening, two reflective electrodes 7 are exposed.
  • solder bumps 9 are formed on the lower portion of the driving circuit substrate 10.
  • 9 is a schematic longitudinal cross-sectional view of a driving circuit substrate with solder bumps according to an embodiment of the present invention. As shown in FIG. 9, two solder bumps 9 are formed on a lower portion of the driving circuit substrate 10, respectively.
  • the openings in the insulating layer 8 correspond to each other.
  • the volume of each solder bump 9 needs to be equal to or slightly smaller than the opening volume of the insulating layer 8, so that each solder bump 9 is completely filled into the opening to prevent the solder from overflowing from the hole, thereby causing the P and N electrodes to be directly turned on. .
  • step 208 the driving circuit substrate 10 is placed on the upper surface of the insulating layer 8, and the driving circuit substrate 10 is soldered on the inverted trapezoidal reflective electrode 7 by the solder bumps 9, thereby completing the preparation of the Micro-LED display panel.
  • 10 is a schematic longitudinal cross-sectional view showing a micro-LED chip soldered together with a substrate according to an embodiment of the present invention. As shown in FIG. 10, solder forms a solder joint around the inverted trapezoidal reflective electrode 7, and the micro-LED chip is The drive circuit substrate 10 is welded together.
  • micro-LED chip of the present invention can be used to manufacture a Micro-LED display, particularly a flexible, folded, and stretched Micro-LED display.
  • the technical solutions described in the foregoing embodiments may be modified, or some of the technical features may be equivalently replaced, but any modifications made within the spirit and principles of the present invention. And equivalent replacements, improvements, etc., are intended to be included within the scope of the present invention.

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Abstract

一种Micro-LED显示屏及其制备方法。该制备方法包括以下步骤：在蓝宝石衬底（1）上依次生长N型GaN层（2）、量子阱发光层（3）和P型GaN层（4）；由上至下依次刻蚀P型GaN层（4）、量子阱发光层（3）以及N型GaN层（2）形成第一沟槽（20）；在P型GaN层（4）上表面生长ITO层（5），并对其进行刻蚀，形成第二沟槽（30）；在第一沟槽（20）中形成N型接触电极（6）；在N型接触电极（6）上表面以及第二沟槽（30）中分别形成具有上宽下窄的纵截面形状的反射电极（7）；在Micro-LED芯片表面沉积绝缘层（8）并对其进行蚀刻，露出反射电极（7）；将驱动电路基板（10）焊接至反射电极（7）。反射电极具有上宽下窄的截面形状，增大了反射电极与焊料的接触面积，增加了Micro-LED芯片焊接的结合力，提高了Micro-LED显示屏的成品率。

Description

一种Micro-LED芯片、显示屏及制备方法 技术领域
本发明涉及LED显示技术领域，尤其涉及一种Micro-LED芯片、显示屏及制备方法。
背景技术
微发光二极管显示器(Micro LED Display)为新一代的显示技术，采用微型化LED阵列，也就是将LED结构设计进行薄膜化、微小化与阵列化，使其体积约为目前主流LED大小的1％。Micro LED显示屏中的每一个像素都能定址、单独驱动发光，将像素点的距离由原本的毫米级降到微米级。Micro LED的优点包括，低功耗、高亮度、超高分辨率与色彩饱和度、反应速度快、超省电、寿命较长、效率较高等，其功率消耗量约为LCD的10％、OLED的50％。而与同样是自发光显示的OLED相较之下，亮度比其高30倍，且分辨率可达1500PPI(像素密度)，相当于Apple Watch采用OLED面板达到300PPI的5倍之多，另外，具有较佳的材料稳定性与无影像烙印。
现有的微发光二极体显示器结构，随着LED芯片尺寸的缩小，焊盘尺寸会也会成倍减小，使得芯片与屏体基板焊接的结合力会随之减小，LED芯片脱焊的概率增加，最终导致Micro-LED显示屏的坏点数量成倍增多。特别在柔性、折叠、以及拉伸等Micro-LED屏体中，在使用过程中，对焊接的结合力要求更高，因脱焊致使屏幕出现坏点的数量会更多。
发明内容
为了解决现有技术存在的不足，本发明提供一种Micro-LED芯片、显示屏及制备方法，防止Micro-LED芯片与驱动电路基板焊接时的脱焊现象。
根据本发明的一个方面，提供了一种Micro-LED芯片，包括，蓝宝石衬底、N型GaN层、量子阱发光层、P型GaN层、ITO层、N型接触电极、反射电极，以及绝缘层，其中，所述反射电极为上宽下窄的纵截面形状，且其上表面高于所述ITO层的上表面。
在其中一个实施例中，所述N型接触电极位于所述N型GaN层的上表面，所述N型接触电极的上表面与所述P型GaN层上表面处于同一高度。
在其中一个实施例中，所述绝缘层位于所述Micro-LED芯片的上表面，其高度比所述反射电极的高度高。
在其中一个实施例中，所述反射电极的纵截面形状为倒梯形。
根据本发明的另一个方面，提供了一种Micro-LED显示屏，包括上述方面的Micro-LED芯片、驱动电路基板，所述驱动电路基板焊接至所述Micro-LED芯片的所述反射电极。
为了实现上述目的，本发明提供的Micro-LED显示屏的制备方法，包括以下步骤：
在蓝宝石衬底上依次生长N型GaN层、量子阱发光层和P型GaN层；
刻蚀P型GaN层、量子阱发光层以及N型GaN层，形成第一沟槽；
在P型GaN层上表面生长ITO层，并对ITO层进行刻蚀，生成第二沟槽；
在所述第一沟槽中生成N型接触电极；
在N型接触电极上表面以及所述第二沟槽中分别生成具有上宽下窄的纵截面形状的反射电极；
在Micro-LED芯片表面沉积绝缘层并进行蚀刻，露出所述反射电极；
将驱动电路基板焊接至所述反射电极。
在其中一个实施例中，所述在所述第一沟槽中生成N型接触电极的步骤，是在所述第一沟槽的底部生成N型接触电极，使所述N型接触电极的上表面与所述P型GaN层上表面处于同一高度。
在其中一个实施例中，所述在Micro-LED芯片表面沉积绝缘层的步骤，是在Micro-LED芯片表面沉积绝缘层，使所述绝缘层的上表面高于所述反射电极上表面。
在其中一个实施例中，所述反射电极的纵截面形状为倒梯形。
本发明的Micro-LED芯片、显示屏及制备方法，通过采用倒梯形电极作为焊盘的设计，增加Micro-LED芯片焊接的结合力，不但解决了Micro-LED芯片与屏体基板焊接时脱焊的问题，有效地减少Micro-LED芯片与驱动电路基板脱焊异常的发生概率，提高Micro-LED显示器的加工良率，降低了生产成本。
本发明的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本发明而了解。
附图说明
附图用来提供对本发明的进一步理解，并且构成说明书的一部分，与本发明的实施例一起，用于解释本发明，并不构成对本发明的限制。在附图中：
图1为根据本发明的一个实施例的Micro-LED显示屏结构示意图；
图2为根据本发明的一个实施例的Micro-LED显示屏制备方法流程图；
图3为根据本发明的一个实施例的形成的外延层的纵截面结构示意图；
图4为根据本发明的一个实施例的在外延层形成第一沟槽的纵截面结构示意图；
图5为根据本发明的一个实施例的在ITO层形成第二沟槽的纵截面结构示意图；
图6为根据本发明的一个实施例的在第一沟槽中形成N型接触电极的纵截面结构示意图；
图7为根据本发明的一个实施例的在N型接触电极上和第二沟槽中分别形成反射电极的纵截面结构示意图；
图8为根据本发明的一个实施例的Micro-LED芯片的纵截面结构示意图；
图9为根据本发明的一个实施例的带有焊料凸点的驱动电路基板的纵截面结构示意图；
图10为根据本发明的一个实施例的Micro-LED芯片与驱动电路基板焊接在一起的纵截面结构示意图。
具体实施方法
以下结合附图对本发明的优选实施例进行说明，应当理解，此处所描述的优选实施例仅用于说明和解释本发明，并不用于限定本发明。
图1为根据本发明的一个实施例的Micro-LED显示屏结构示意图。如图1所示，在这个实施例中，Micro-LED显示屏包括Micro-LED芯片，以及通过焊料与Micro-LED芯片焊接在一起的驱动电路基板10，其中，Micro-LED芯片包括蓝宝石衬底1、N型GaN层2、量子阱发光层3、P型GaN层4、ITO层5、N型接触电极6、反射电极7、绝缘层8。
在蓝宝石衬底1的上方形成有N型GaN层2。N型GaN层2包括适于形成N型接触电极6的第一区域，以及第二区域。在N型GaN层2的第二区域上依次形成有量子阱发光层3和P型GaN层4。
ITO层5位于P型GaN层4的上表面。
N型接触电极6位于N型GaN层2的第一区域的上表面，N型接触电极6的上表面与P型GaN层4的上表面位于同一高度，使得N型接触电极6能够与焊料更好地接触。
两个反射电极7，一个位于N型接触电极6上表面，另一个位于P型GaN层4上表面。每个反射电极7的上表面均高于ITO层5的上表面，且具有上宽下窄的纵截面形状， 从而增大了反射电极7与焊料的接触面积，增加Micro-LED芯片焊接的结合力，解决Micro-LED芯片与驱动电路基板10焊接时容易脱焊的问题。在本实施例中，反射电极7的纵截面形状为倒梯形，在其他实施例中可以采用任何合适的上宽下窄的形状。
绝缘层8位于Micro-LED芯片上表面，其高度比反射电极7的高度高，可以避免焊料溢出到Micro-LED芯片的表面，导致P、N电极直接导通。
图2为根据本发明的一个实施例的Micro-LED显示屏制备方法流程图。下面将参考图2，对本发明的Micro-LED显示屏制备方法进行详细描述。
首先，在步骤201，在蓝宝石衬底1上依次生长一层N型GaN层2、一层量子阱发光层3和一层P型GaN层4，形成Micro-LED芯片的外延层。图3为根据本发明的一个实施例形成的外延层的纵截面结构示意图，如图3所示，Micro-LED芯片的外延层从下至上依次为N型GaN层2、量子阱发光层3和P型GaN层4。
在步骤202，在Micro-LED芯片的外延层的一个区域，从上至下对P型GaN层4、量子阱发光层3和N型GaN层2进行蚀刻，形成第一沟槽20。在本步骤中，对N型GaN层2进行部分刻蚀。图4为根据本发明的一个实施例的在外延层形成第一沟槽的纵截面结构示意图，如图4所示，第一沟槽20穿过P型GaN层4、量子阱发光层3直到N型GaN层2。
在步骤203，在P型GaN层4上生长一层ITO层5(ITO薄膜)，并对其进行刻蚀，露出P型GaN层4，生成第二沟槽30。图5为根据本发明的一个实施例的在ITO层形成第二沟槽的纵截面结构示意图，如图5所示，ITO层5位于P型GaN层4的上表面，第二沟槽30的底部为P型GaN层4。
在步骤204，在第一沟槽20底部生成N型接触电极6。图6为根据本发明的一个实施例的在第一沟槽中形成N型接触电极的纵截面结构示意图，如图6所示，形成的N型接触电极6的水平宽度小于第一沟槽20的水平宽度，其上表面与P型GaN层4位于同一高度。
在步骤205，在N型接触电极6的上表面和第二沟槽中分别形成反射电极7。图7为根据本发明的一个实施例的在N型接触电极上和第二沟槽中分别形成反射电极的纵截面结构示意图。如图7所示，形成的反射电极7具有倒梯形的纵截面形状，其上表面高于ITO层5。
在步骤206，沉积绝缘材料，在Micro-LED芯片的上表面形成绝缘层8，然后对绝缘层8进行开孔，露出反射电极7。图8为根据本发明的一个实施例的Micro-LED芯片的纵截面结构示意图。如图8所示，绝缘层8的高度比反射电极7的高度高，开孔后露出了两个反射电极7。
在步骤207，在驱动电路基板10的下部制备焊料凸点9。图9为根据本发明的一个实施例的带有焊料凸点的驱动电路基板的纵截面结构示意图，如图9所示，在驱动电路基板10的下部形成有两个焊料凸点9，分别与绝缘层8上的开孔相对应。每个焊料凸点9的体积需等于或略小于绝缘层8的开孔体积，满足每个焊料凸点9完全填充到开孔里，避免焊料从孔中溢出，导致P、N电极直接导通。
在步骤208，将驱动电路基板10置于绝缘层8上表面，利用焊料凸点9将驱动电路基板10焊接在倒梯形反射电极7上，完成Micro-LED显示屏的制备。图10为根据本发明的一个实施例的Micro-LED芯片与基板焊接在一起的纵截面结构示意图，如图10所示，焊料在倒梯形反射电极7周围形成焊点，将Micro-LED芯片与驱动电路基板10焊接在一起。
以上仅为本发明的优选实施例而已，并不用于限制本发明，本发明的Micro-LED芯片，可用于制造Micro-LED显示屏，特别是柔性、折叠、以及拉伸的Micro-LED显示屏。对于本领域的技术人员来说，其依然可以对前述实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换，但是凡在本发明的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。

Claims (9)

  1. 一种Micro-LED芯片，包括，蓝宝石衬底、N型GaN层、量子阱发光层、P型GaN层、ITO层、N型接触电极、反射电极，以及绝缘层，其特征在于，
    所述反射电极具有上宽下窄的纵截面形状，且其上表面高于所述ITO层的上表面。
  2. 根据权利要求1所述的Micro-LED芯片，其中，所述N型接触电极位于所述N型GaN层的上表面，所述N型接触电极的上表面与所述P型GaN层上表面处于同一高度。
  3. 根据权利要求1所述的Micro-LED芯片，其中，所述绝缘层位于所述Micro-LED芯片的上表面，所述绝缘层的高度比所述反射电极的高度高。
  4. 根据权利要求1所述的Micro-LED芯片，其中，所述反射电极的纵截面形状为倒梯形。
  5. 一种Micro-LED显示屏，包括：Micro-LED芯片、驱动电路基板，其特征在于，所述Micro-LED芯片采用权利要求1-4中任一项所述的Micro-LED芯片。
  6. 一种Micro-LED显示屏的制备方法，其特征在于，包括以下步骤：
    在蓝宝石衬底上依次生长N型GaN层、量子阱发光层和P型GaN层；
    由上至下依次刻蚀所述P型GaN层、所述量子阱发光层以及所述N型GaN层，形成第一沟槽；
    在所述P型GaN层上表面生长ITO层，并对所述ITO层进行刻蚀，生成第二沟槽；
    在所述第一沟槽中生成N型接触电极；
    在所述N型接触电极上表面以及所述第二沟槽中分别生成具有上宽下窄的纵截面形状的反射电极；
    在Micro-LED芯片表面沉积绝缘层并对所述绝缘层进行蚀刻，露出所述反射电极；
    将驱动电路基板焊接至所述反射电极。
  7. 根据权利要求6所述的Micro-LED显示屏的制备方法，其中，所述在所述第一沟槽中生成N型接触电极的步骤，是在所述第一沟槽的底部生成N型接触电极，使所述 N型接触电极的上表面与所述P型GaN层上表面处于同一高度。
  8. 根据权利要求6所述的Micro-LED显示屏的制备方法，其中，所述在Micro-LED芯片表面沉积绝缘层的步骤，是在所述Micro-LED芯片表面沉积绝缘层，使所述绝缘层的上表面高于所述反射电极上表面。
  9. 根据权利要求6所述的Micro-LED显示屏的制备方法，其中，所述反射电极的纵截面形状为倒梯形。
PCT/CN2018/089084 2018-03-08 2018-05-30 一种Micro-LED芯片、显示屏及制备方法 WO2019169755A1 (zh)

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