WO2019095631A1 - 高纯半绝缘碳化硅单晶的制备方法 - Google Patents

高纯半绝缘碳化硅单晶的制备方法 Download PDF

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WO2019095631A1
WO2019095631A1 PCT/CN2018/084372 CN2018084372W WO2019095631A1 WO 2019095631 A1 WO2019095631 A1 WO 2019095631A1 CN 2018084372 W CN2018084372 W CN 2018084372W WO 2019095631 A1 WO2019095631 A1 WO 2019095631A1
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powder
furnace
crystal
sic
single crystal
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高超
窦文涛
李加林
张红岩
刘家朋
宗艳民
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山东天岳先进材料科技有限公司
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    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/36—Carbides
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials

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  • the invention belongs to the technical field of crystal growth, and in particular relates to a preparation method of a high-purity semi-insulating silicon carbide single crystal.
  • High-purity semi-insulating SiC single crystal substrate has excellent properties such as high resistivity and high thermal conductivity, especially low lattice mismatch between SiC and GaN materials, making high-purity semi-insulating SiC single crystal substrate It is a preferred substrate material for high frequency transistors such as AlGaN/GaN. In order to prepare a high-purity semi-insulating SiC single crystal substrate, it is necessary to control the purity of the SiC raw material used for growing the SiC single crystal so that the concentration of the electroactive impurities in the SiC single crystal reaches a lower content, thereby achieving its semi-insulating property.
  • the electrical properties of SiC single crystals need to simultaneously balance the shallow donor impurity (N) and the shallow acceptor impurity (B, Al) in the crystal so that the carriers provided by the two different shallow-level impurities are kept as low as possible.
  • Concentration level Generally, the impurity that is difficult to remove in SiC single crystal is a shallow-level N impurity, which is introduced into the forbidden band and its shallow level is introduced at 0.09 eV ( E C -0.09 eV) under the conduction band. The shallow energy of these N The grade provides excess electrons in the crystal, giving the crystal an n-type low resistance property.
  • CREE proposes to inject the intrinsic point defect into the crystal by rapidly cooling during the growth of the SiC crystal, and the deep level introduced by the point defect is used as the excess carrier. Capture center to achieve semi-insulating properties of SiC crystals.
  • the crystal will be subjected to a large thermal shock, thereby introducing a large internal stress in the crystal, resulting in an increase in the cracking rate of the crystal during the subsequent process, and the curvature of the substrate due to the internal stress, causing warpage and warpage.
  • the isosurface quality is poor, which in turn affects the quality of subsequent GaN epitaxial layers and devices.
  • the present invention provides a method for preparing a high-purity semi-insulating silicon carbide single crystal.
  • the present invention introduces a larger atomic-sized group IVA element while reducing electroactive impurities in a raw material, and adopts a blending process in crystal growth.
  • the heterogeneous SiC raw material is crystallized, and an appropriate amount of the group IV element is introduced into the SiC crystal, thereby increasing the concentration of the intrinsic point defect in the crystal, achieving sufficient compensation for the shallow level impurity, and realizing the semi-insulating property of the SiC crystal.
  • the use of the present invention to grow high-purity semi-insulating SiC crystals does not need to be achieved by rapid cooling, thereby reducing crystal stress and improving crystal quality; in addition, the intrinsic point introduced into the crystal can be well controlled by controlling the doping concentration. The defect concentration, thus achieving the regulation of the crystal resistivity.
  • the method for preparing a semi-insulating silicon carbide single crystal according to the present invention has the following specific steps:
  • SiC single crystal growth was carried out using a SiC synthetic material containing a Group IVA element.
  • the molar ratio of the Si powder to the C powder is 1:1 to 1.05:1. Too high or low molar ratio may cause the Si powder to react incompletely with the C powder, resulting in the residual SiC powder containing residual Si powder or C powder, thereby affecting the quality of the SiC crystal grown using the raw material.
  • the molar ratio of the IVA group element to the C powder is controlled to be 10 -6 :1 to A ratio of 10 -4 :1; too low a molar ratio will result in insufficient concentration of doped Group IV elements in the synthesized SiC powder, affecting the subsequent crystal growth quality; too high molar ratio will exceed the Group IV element in SiC
  • the solubility causes some of the IV elements to be doped into the SiC powder grains, resulting in ineffective doping.
  • Group IVA elements include C, Si, Ge, Sn, Pb, C, and Si are intrinsic elements of synthetic SiC materials, without doping; Pb element atomic radius is too large, and the lattice compatibility with SiC is too large, not It is easy to dope into the SiC lattice; therefore, the preferred IVA group element described in the present invention is Ge or Sn. These two elements are the same main group elements of C and Si. After occupying the lattice position, no additional carriers are introduced, so the electrical properties of SiC are not changed by themselves; however, the radius of Ge and Sn atoms is larger than C and Si. Therefore, the compressive stress is introduced into the crystal lattice after occupying the lattice position.
  • the presence of compressive stress in the lattice leads to the formation of intrinsic point defects, which can introduce energy levels in the forbidden band and deep-level trapping of carriers in SiC crystals, thereby reducing SiC crystals.
  • the carrier concentration in the middle achieves high resistance characteristics of the SiC substrate.
  • the graphite container of the group IV element is placed at the center of the bottom of the graphite crucible so that the group IV element contained in the graphite container can be sufficiently released and uniformly doped to the synthesized SiC powder along the temperature gradient.
  • the graphite container of the present invention that is, a container made of a graphite material, is a commonly used container in the art.
  • the vacuum in the furnace chamber is maintained at 10 -3 Pa for 2-5 hours to remove residual air and harmful impurities in the furnace chamber. Too low vacuum or too short time will lead to incomplete removal of residual control and harmful impurities; excessive vacuum or excessively long time will cause cost increase and efficiency decrease.
  • the pressure in the furnace chamber is maintained at 600-800 mabr, the temperature is 1900-2100 ° C, and the reaction time is 20-50 hours to sufficiently react the Si powder and the C powder.
  • Too low pressure, too high temperature, too long time will lead to over-reaction, resulting in problems such as re-decomposition and carbonization of SiC powder; excessive pressure, too low temperature, too short time will cause incomplete reaction. .
  • the SiC single crystal growth is carried out using a SiC composite containing a Group IV element, and crystal growth can be carried out using known conditions or parameters of a conventional manufacturing scheme of physical vapor transport (PVT), without being affected by the shape of the graphite crucible, the crystal growth temperature, and for the effects of pressure, protective atmosphere, and crystal growth rate, reference may be made to U.S. Patent No. RE34861 and Patent CN197364A.
  • PVT physical vapor transport
  • an element containing a large atom of the IVA group is released as the SiC material is sublimated, and participates in the growth process of the SiC single crystal, occupying the lattice position of the Si and C atoms. Since the atomic size of the Group IVA element introduced by doping is large, a certain compressive stress is caused around it. These compressive stresses cause lattice distortion around the dopant atoms, causing Si atoms and C atoms to be extruded out of the lattice position, forming intrinsic point defects.
  • the intrinsic point defect in SiC can introduce a deep level in the forbidden band and compensate for the shallow level, thereby reducing the carrier concentration in SiC and increasing the resistivity of the SiC substrate.
  • the invention improves the point defect concentration in a single crystal by doping a larger atomic size group IVA element in the SiC composite material and introducing it into the SiC single crystal during the single crystal growth process, thereby realizing the SiC single crystal.
  • the invention can realize the control of the intrinsic point defect concentration by adjusting the concentration of the IV element doped in the raw material, thereby better controlling the resistivity of the SiC crystal, thereby realizing the growth of the high-purity semi-insulating SiC single crystal.
  • the invention does not need to introduce the intrinsic point defect through the rapid cooling process, reduces the internal stress caused by the temperature impact in the SiC single crystal, reduces the cracking risk of the single crystal processing, and improves the processing quality of the substrate.
  • a method for preparing a high-purity semi-insulating silicon carbide single crystal the specific steps of which are:
  • SiC single crystal growth was carried out using a SiC synthetic material containing a Group IVA element.
  • the molar ratio of the Si powder to the C powder was 1.01:1.
  • the group IV element is Ge.
  • the molar ratio of the Group IV element to the C powder is from 10 to 5 :1.
  • the resulting SiC single crystal substrate is expressed in the form of electrical resistivity as follows:
  • the overall resistivity of the substrate is higher than 1E12 ⁇ cm, and the average resistivity that can be monitored is 2.6E11 ⁇ cm, and the median value is 2.2E11 ⁇ cm.
  • the substrate has excellent semi-insulation properties.
  • a method for preparing a high-purity semi-insulating silicon carbide single crystal the specific steps of which are:
  • SiC single crystal growth was carried out using a SiC synthetic material containing a Group IVA element.
  • the molar ratio of the Si powder to the C powder was 1.02:1.
  • the group IVA element is Sn.
  • the molar ratio of the Group IVA element to the C powder is from 10 -6 :1.
  • the resulting SiC single crystal substrate is expressed in the form of electrical resistivity as follows:
  • the overall resistivity of the substrate is higher than 1E12 ⁇ cm, and the average resistivity that can be monitored is 3.0E11 ⁇ cm, and the median value is 3.4E11 ⁇ cm.
  • the substrate has excellent semi-insulation properties.
  • a method for preparing a high-purity semi-insulating silicon carbide single crystal the specific steps of which are:
  • SiC single crystal growth was carried out using a SiC synthetic material containing a Group IVA element.
  • the molar ratio of the Si powder to the C powder was 1.03:1.
  • the group IVA element is Sn.
  • the molar ratio of the Group IVA element to the C powder is from 10 to 4 :1.
  • the resulting SiC single crystal substrate is expressed in the form of electrical resistivity as follows:
  • the overall resistivity of the substrate is higher than 1E12 ⁇ cm, and the average resistivity that can be monitored is 4.1E11 ⁇ cm, and the median value is 4.1E11 ⁇ cm.
  • the substrate has excellent semi-insulation properties.
  • a method for preparing a high-purity semi-insulating silicon carbide single crystal the specific steps of which are:
  • SiC single crystal growth was carried out using a SiC synthetic material containing a Group IVA element.
  • the molar ratio of the Si powder to the C powder was 1.04:1.
  • the Group IVA element is Ge.
  • the molar ratio of the Group IVA element to the C powder is from 10 -6 :1.
  • the resulting SiC single crystal substrate is expressed in the form of electrical resistivity as follows:
  • the overall resistivity of the substrate is higher than 1E12 ⁇ cm, and the average resistivity that can be monitored is 3.2E11 ⁇ cm, and the median value is 3.3E11 ⁇ cm.
  • the substrate has excellent semi-insulation properties.
  • a method for preparing a high-purity semi-insulating silicon carbide single crystal the specific steps of which are:
  • SiC single crystal growth was carried out using a SiC synthetic material containing a Group IVA element.
  • the molar ratio of the Si powder to the C powder was 1.05:1.
  • the group IVA element is Sn.
  • the molar ratio of the Group IVA element to the C powder is from 10 to 4 :1.
  • the resulting SiC single crystal substrate is expressed in the form of electrical resistivity as follows:
  • the overall resistivity of the substrate is higher than 1E12 ⁇ cm, and it has excellent semi-insulation properties.

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  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Carbon And Carbon Compounds (AREA)

Abstract

一种高纯半绝缘碳化硅单晶的制备方法，属于晶体生长技术领域，通过在原料中降低电活性杂质的同时引入原子尺寸较大的IVA族元素，晶体生长过程中采用掺杂SiC原料长晶，将适量的IV族元素引入SiC晶体中，从而提高晶体中本征点缺陷的浓度，实现对浅能级杂质的充分补偿，实现SiC晶体的半绝缘特性。无需通过快速降温实现高纯半绝缘SiC晶体的生长，从而减小了晶体应力，提高了晶体质量；此外，通过控制掺杂浓度可以很好的控制引入到晶体中的本征点缺陷浓度，从而实现了对晶体电阻率的调控。

Description

[根据细则37.2由ISA制定的发明名称]　高纯半绝缘碳化硅单晶的制备方法
本发明属于晶体生长技术领域，具体涉及一种高纯半绝缘碳化硅单晶的制备方法。
高纯半绝缘SiC单晶衬底具有的高电阻率、高热导率等优异性能，特别是SiC与GaN两种材料间较低的晶格失配度，使高纯半绝缘SiC单晶衬底成为AlGaN/GaN等高频晶体管的优选衬底材料。为了制备高纯半绝缘SiC单晶衬底，需要控制生长SiC单晶所用的SiC原料的纯度，以使SiC单晶中的电活性杂质浓度达到较低的含量，进而实现其半绝缘特性。然而，SiC单晶的电学性能需要同时平衡晶体中的浅施主杂质（N）和浅受主杂质（B、Al），以使两种不同浅能级杂质提供的载流子保持在尽量低的浓度水平。通常SiC单晶中较难去除的杂质为浅能级N杂质，其在禁带中引入其引入的浅能级位置在导带下0.09eV处(E C-0.09eV)，这些N的浅能级在晶体中提供多余的电子，使晶体呈n型低阻特性。
为了尽量降低SiC单晶中的净载流子浓度，CREE提出，通过在SiC晶体生长过程中快速降温实现向晶体中注入本征点缺陷，通过点缺陷引入的深能级作为多余载流子的俘获中心，实现SiC晶体的半绝缘特性。但快速降温的过程中晶体会遭受较大的热冲击，从而在晶体中引入较大内应力，导致晶体在加后续工过程中开裂率增加、衬底因内应力较大导致弯曲度、翘曲度等面型质量较差，进而影响后续GaN外延层及器件的质量。
发明内容
针对上述问题，本发明提出了一种高纯半绝缘碳化硅单晶的制备方法，本发明通过在原料中降低电活性杂质的同时引入原子尺寸较大的IVA族元素，晶体生长过程中采用掺杂SiC原料长晶，将适量的IV族元素引入SiC晶体中，从而提高晶体中本征点缺陷的浓度，实现对浅能级杂质的充分补偿，实现SiC晶体的半绝缘特性。因此，使用本发明生长高纯半绝缘SiC晶体无需通过快速降温实现，从而减小了晶体应力，提高了晶体质量；此外，通过控制掺杂浓度可以很好的控制引入到晶体中的本征点缺陷浓度，从而实现了对晶体电阻率的调控。
本发明所述的一种半绝缘碳化硅单晶的制备方法，其具体步骤为：
（1）将Si粉与C粉混合均匀，备用；
（2）将IVA族元素置于石墨容器内，备用；
（3）将盛放IVA族元素的石墨容器放置在石墨坩埚底部中心的位置，然后将混合均匀的Si粉和C粉填充于石墨坩埚内，使石墨容器埋于Si粉和C粉中；
（4）将石墨坩埚放置于SiC原料合成炉内后，密封炉膛；
（5）将炉膛内的压力抽真空至10-3 Pa并保持2-5h后，逐步向炉腔内通入保护气氛；
（6）以30-50mbar/h的速率将炉膛压力提升至600-800mbar，同时以10-20℃/h的速率将炉膛内的温度提升至1900-2100℃，在此温度下保持20-50h，完成原料合成过程；
（7）原料合成过程结束后，停止加热炉膛，使炉膛温度自然降低至室温后，打开炉膛取出石墨坩埚，即可得到含有IVA族元素的SiC合成料；
（8）使用含有IVA族元素的SiC合成料进行SiC单晶生长。
步骤（1）中，为了使Si粉和C粉完全反应生成SiC粉料，Si粉和C粉的摩尔比1：1至1.05:1。过高或高低的摩尔比会使Si粉与C粉反应不完全，导致合成的SiC粉料中含有残余的Si粉或C粉，从而影响使用此原料生长的SiC晶体的质量。
步骤（2）中，为了保证IVA族元素原子在合成的SiC晶粒中占比在1016-1018 cm-3之间，IVA族元素与C粉的摩尔比控制在10-6:1至10-4:1之间；过低的摩尔比将导致合成的SiC粉料中含有的掺杂IV族元素浓度不足，影响后续长晶质量；过高的摩尔比将超出IV族元素在SiC中的溶解度，导致部分IV元素无法掺杂进入SiC粉料晶粒中，造成无效掺杂。
众所周知，IVA族元素包括C、Si、Ge、Sn、Pb，C、Si是合成SiC料的本征元素，无需掺杂；Pb元素原子半径过大，与SiC晶格适配度过大，不易于掺杂进入SiC晶格中；因此本发明所述的最佳IVA族元素为Ge或Sn。这两种元素是C、Si的同主族元素，占据晶格位置后不会引入额外的载流子，因此本身不会改变SiC的电学性能；但是，Ge、Sn原子半径要大于C、Si，因此占据晶格位置后会在晶格中引入压应力。晶格中压应力的存在会导致本征点缺陷的产生，这些本征点缺陷可以在禁带中引入能级，对SiC晶体中的载流子起到深能级俘获作用，从而降低SiC晶体中的载流子浓度，实现SiC衬底的高阻特性。
步骤（3）中，将IV族元素的石墨容器放置在石墨坩埚底部中心的位置，以使石墨容器中盛放的IV族元素能够充分释放并沿温度梯度均匀的掺杂至合成的SiC粉料中。本发明所述的石墨容器即由石墨材料制成的容器，为本领域常用容器。
步骤（5）中，炉腔内真空保持10-3Pa并保持2-5小时，以去除炉腔内的残余空气及有害杂质。过低的真空度或过短的时间会导致残余控制及有害杂质去除不完全；过高的真空度或过长的时间会造成成本上升、效率降低.
步骤（6）中，保持炉腔内的压力600-800mabr，温度1900-2100℃，反应时间20-50小时，以使Si粉和C粉充分反应。过低的压力、过高的温度、过长的时间会导致反应过度，产生SiC粉料重新分解碳化等问题；过高的压力、过低的温度、过短的时间会产生反应不完全的问题。
使用含有IV族元素的SiC合成料进行SiC单晶生长，可以采用物理气相输运法（PVT）的常规制造方案的已知条件或参数进行晶体生长，不受石墨坩埚的形状、晶体生长温度和压力、保护气氛及晶体生长速率等的影响，具体可以参考美国专利No.RE34861和专利CN197364A。
本发明晶体生长过程中，含有IVA族大尺寸原子的元素随着SiC料的升华而释放，并参与到SiC单晶生长过程中，占据Si与C原子的晶格位置。由于掺杂引入的IVA族元素的原子尺寸较大，因此在其周围引起一定的压应力。这些压应力会导致掺杂原子周围晶格畸变，造成Si原子和C原子被挤出晶格位置，形成本征点缺陷。SiC中的本征点缺陷能够在禁带中引入深能级，起到补偿浅能级的作用，从而减少SiC中的载流子浓度，提高SiC衬底的电阻率。
本发明通过在SiC合成料中掺杂较大原子尺寸的IVA族元素并在单晶生长过程中将之引入到SiC单晶中，从而提高了单晶中的点缺陷浓度，实现SiC单晶的半绝缘特性。本发明可以通过调节原料中掺杂的IV元素浓度来实现对本征点缺陷浓度的控制，进而更好的控制SiC晶体的电阻率，从而实现高纯半绝缘SiC单晶生长。本发明不需要通过快速降温过程引入本征点缺陷，减少了SiC单晶中因温度冲击造成的内应力，降低了单晶加工的开裂风险，提高了衬底的加工质量。
具体实施方式
实施例1
一种高纯半绝缘碳化硅单晶的制备方法，其具体步骤为：
（1）将Si粉与C粉混合均匀，备用；
（2）将IVA族元素置于石墨容器内，备用；
（3）将盛放IVA族元素的石墨容器放置在石墨坩埚底部中心的位置，然后将混合均匀的Si粉和C粉填充于石墨坩埚内，使石墨容器埋于Si粉和C粉中；
（4）将石墨坩埚放置于SiC原料合成炉内后，密封炉膛；
（5）将炉膛内的压力抽真空至10-3 Pa并保持2h后，逐步向炉腔内通入保护气氛；
（6）以40mbar/h的速率将炉膛压力提升至600mbar，同时以20℃/h的速率将炉膛内的温度提升至2000℃，在此温度下保持20h，完成原料合成过程；
（7）原料合成过程结束后，停止加热炉膛，使炉膛温度自然降低至室温后，打开炉膛取出石墨坩埚，即可得到含有IVA族元素的SiC合成料；
（8）使用含有IVA族元素的SiC合成料进行SiC单晶生长。
所述的Si粉和C粉的摩尔比为1.01:1。
所述的IV族元素为Ge。
所述的IV族元素与C粉的摩尔比为10-5:1。
最终得到的SiC单晶衬底以电阻率的形式表现如下：
衬底整体电阻率高于1E12 Ω·cm，可监测到的电阻率平均值2.6E11 Ω·cm，中位值2.2E11 Ω·cm，衬底具有优异的半绝缘性能。
实施例2
一种高纯半绝缘碳化硅单晶的制备方法，其具体步骤为：
（1）将Si粉与C粉混合均匀，备用；
（2）将IVA族元素置于石墨容器内，备用；
（3）将盛放IVA族元素的石墨容器放置在石墨坩埚底部中心的位置，然后将混合均匀的Si粉和C粉填充于石墨坩埚内，使石墨容器埋于Si粉和C粉中；
（4）将石墨坩埚放置于SiC原料合成炉内后，密封炉膛；
（5）将炉膛内的压力抽真空至10-3 Pa并保持3h后，逐步向炉腔内通入保护气氛；
（6）以30mbar/h的速率将炉膛压力提升至800mbar，同时以20℃/h的速率将炉膛内的温度提升至2100℃，在此温度下保持50h，完成原料合成过程；
（7）原料合成过程结束后，停止加热炉膛，使炉膛温度自然降低至室温后，打开炉膛取出石墨坩埚，即可得到含有IVA族元素的SiC合成料；
（8）使用含有IVA族元素的SiC合成料进行SiC单晶生长。
所述的Si粉和C粉的摩尔比为1.02:1。
所述的IVA族元素为Sn。
所述的IVA族元素与C粉的摩尔比为10-6:1。
最终得到的SiC单晶衬底以电阻率的形式表现如下：
衬底整体电阻率高于1E12 Ω·cm，可监测到的电阻率平均值3.0E11 Ω·cm，中位值3.4E11 Ω·cm，衬底具有优异的半绝缘性能。
实施例3
一种高纯半绝缘碳化硅单晶的制备方法，其具体步骤为：
（1）将Si粉与C粉混合均匀，备用；
（2）将IVA族元素置于石墨容器内，备用；
（3）将盛放IVA族元素的石墨容器放置在石墨坩埚底部中心的位置，然后将混合均匀的Si粉和C粉填充于石墨坩埚内，使石墨容器埋于Si粉和C粉中；
（4）将石墨坩埚放置于SiC原料合成炉内后，密封炉膛；
（5）将炉膛内的压力抽真空至10-3 Pa并保持4h后，逐步向炉腔内通入保护气氛；
（6）以50mbar/h的速率将炉膛压力提升至700mbar，同时以15℃/h的速率将炉膛内的温度提升至1900℃，在此温度下保持30h，完成原料合成过程；
（7）原料合成过程结束后，停止加热炉膛，使炉膛温度自然降低至室温后，打开炉膛取出石墨坩埚，即可得到含有IVA族元素的SiC合成料；
（8）使用含有IVA族元素的SiC合成料进行SiC单晶生长。
所述的Si粉和C粉的摩尔比为1.03:1。
所述的IVA族元素为Sn。
所述的IVA族元素与C粉的摩尔比为10-4:1。
最终得到的SiC单晶衬底以电阻率的形式表现如下：
衬底整体电阻率高于1E12 Ω·cm，可监测到的电阻率平均值4.1E11 Ω·cm，中位值4.1E11 Ω·cm，衬底具有优异的半绝缘性能。
实施例4
一种高纯半绝缘碳化硅单晶的制备方法，其具体步骤为：
（1）将Si粉与C粉混合均匀，备用；
（2）将IVA族元素置于石墨容器内，备用；
（3）将盛放IVA族元素的石墨容器放置在石墨坩埚底部中心的位置，然后将混合均匀的Si粉和C粉填充于石墨坩埚内，使石墨容器埋于Si粉和C粉中；
（4）将石墨坩埚放置于SiC原料合成炉内后，密封炉膛；
（5）将炉膛内的压力抽真空至10-3 Pa并保持5h后，逐步向炉腔内通入保护气氛；
（6）以45mbar/h的速率将炉膛压力提升至650mbar，同时以10℃/h的速率将炉膛内的温度提升至1950℃，在此温度下保持40h，完成原料合成过程；
（7）原料合成过程结束后，停止加热炉膛，使炉膛温度自然降低至室温后，打开炉膛取出石墨坩埚，即可得到含有IVA族元素的SiC合成料；
（8）使用含有IVA族元素的SiC合成料进行SiC单晶生长。
所述的Si粉和C粉的摩尔比为1.04:1。
所述的IVA族元素为Ge。
所述的IVA族元素与C粉的摩尔比为10-6:1。
最终得到的SiC单晶衬底以电阻率的形式表现如下：
衬底整体电阻率高于1E12 Ω·cm，可监测到的电阻率平均值3.2E11 Ω·cm，中位值3.3E11 Ω·cm，衬底具有优异的半绝缘性能。
实施例5
一种高纯半绝缘碳化硅单晶的制备方法，其具体步骤为：
（1）将Si粉与C粉混合均匀，备用；
（2）将IVA族元素置于石墨容器内，备用；
（3）将盛放IVA族元素的石墨容器放置在石墨坩埚底部中心的位置，然后将混合均匀的Si粉和C粉填充于石墨坩埚内，使石墨容器埋于Si粉和C粉中；
（4）将石墨坩埚放置于SiC原料合成炉内后，密封炉膛；
（5）将炉膛内的压力抽真空至10-3 Pa并保持3.5h后，逐步向炉腔内通入保护气氛；
（6）以35mbar/h的速率将炉膛压力提升至750mbar，同时以20℃/h的速率将炉膛内的温度提升至1900℃，在此温度下保持35h，完成原料合成过程；
（7）原料合成过程结束后，停止加热炉膛，使炉膛温度自然降低至室温后，打开炉膛取出石墨坩埚，即可得到含有IVA族元素的SiC合成料；
（8）使用含有IVA族元素的SiC合成料进行SiC单晶生长。
所述的Si粉和C粉的摩尔比为1.05:1。
所述的IVA族元素为Sn。
所述的IVA族元素与C粉的摩尔比为10-4:1。
最终得到的SiC单晶衬底以电阻率的形式表现如下：
衬底整体电阻率高于1E12 Ω·cm，具有优异的半绝缘性能。

Claims (4)

1、一种高纯半绝缘碳化硅单晶的制备方法，其特征在于：其具体步骤为：（1）将Si粉与C粉混合均匀，备用；（2）将IVA族元素置于石墨容器内，备用；（3）将盛放IVA族元素的石墨容器放置在石墨坩埚底部中心的位置，然后将混合均匀的Si粉和C粉填充于石墨坩埚内，使石墨容器埋于Si粉和C粉中；（4）将石墨坩埚放置于SiC原料合成炉内后，密封炉膛；（5）将炉膛内的压力抽真空至10-3 Pa并保持2-5h后，逐步向炉腔内通入保护气氛；（6）以30-50mbar/h的速率将炉膛压力提升至600-800mbar，同时以10-20℃/h的速率将炉膛内的温度提升至1900-2100℃，在此温度下保持20-50h，完成原料合成过程；（7）原料合成过程结束后，停止加热炉膛，使炉膛温度自然降低至室温后，打开炉膛取出石墨坩埚，即可得到含有IVA族元素的SiC合成料；（8）使用含有IVA族元素的SiC合成料进行SiC单晶生长。
2、根据权利要求1所述的一种高纯半绝缘碳化硅单晶的制备方法，其特征在于：所述的Si粉和C粉的摩尔比为1-1.05:1。
3、根据权利要求1所述的一种高纯半绝缘碳化硅单晶的制备方法，其特征在于：所述的IVA族元素为Ge或Sn。
4、根据权利要求1所述的一种高纯半绝缘碳化硅单晶的制备方法，其特征在于：所述的IVA族元素与C粉的摩尔比为10-6:1至10-4:1之间。
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